linux/debian/patches/bugfix/mips/trylock.patch

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* Add patches from linux-mips.org's 2.6.18-stable branch: - bugfix/copy-user-highpage.patch, needed for cache alias handling on mips/mipsel/hppa. - bugfix/mips/syscall-wiring.patch, fixes TLS register access, and n32 rt_sigqueueinfo. - bugfix/mips/sb1-flush-cache-data-page.patch, missing cache flush on SB-1. - bugfix/mips/trylock.patch, fix trylock implementation for R1x000 and R3xxx. - bugfix/mips/smp-cpu-bringup.patch, correct initialization of non-contiguous CPU topology. - bugfix/mips/header-exports.patch, clean up userland exports of kernel headers. - bugfix/mips/sb1-interrupt-handler.patch, fix broken interrupt routing on SB-1. - bugfix/mips/cache-alias.patch, fixes #387498 for mips/mipsel. - bugfix/mips/ip22-zilog-console.patch, fix long delays seen with SGI ip22 serial console. - bugfix/mips/signal-handling.patch, fixes a signal handling race condition shown with gdb. - bugfix/mips/sb1-duart-tts.patch, replaces mips-sb1-duart-tts.patch, use standard Linux names for SB-1 consoles. - bugfix/mips/wait-race.patch, correct behaviour of the idle loop. - bugfix/mips/sgi-ioc3.patch, checksumming fix for IOC3 network driver. - features/mips/qemu-kernel.patch, support for the mips/mipsel machine emulated by Qemu. - features/mips/backtrace.patch, reimplementation of stack analysis and backtrace printing, useful for in-kernel debugging. - bugfix/mips/dec-scsi.patch, replaces mips-dec-scsi.patch, fixes DSP SCSI driver for DECstations. - bugfix/mips/dec-serial.patch, replaces mips-dec-serial.patch, fix serial console handling on DECstations. svn path=/dists/trunk/linux-2.6/; revision=7681
2006-11-02 09:54:18 +00:00
# Fix __raw_read_trylock implementaation for mips/mipsel, from
# linux-mips.org 2.6.18-stable, scheduled for kernel.org mainline.
diff --git a/include/asm-mips/spinlock.h b/include/asm-mips/spinlock.h
index 669b8e3..4c1a1b5 100644
--- a/include/asm-mips/spinlock.h
+++ b/include/asm-mips/spinlock.h
@@ -239,7 +239,51 @@ static inline void __raw_write_unlock(ra
: "memory");
}
-#define __raw_read_trylock(lock) generic__raw_read_trylock(lock)
+static inline int __raw_read_trylock(raw_rwlock_t *rw)
+{
+ unsigned int tmp;
+ int ret;
+
+ if (R10000_LLSC_WAR) {
+ __asm__ __volatile__(
+ " .set noreorder # __raw_read_trylock \n"
+ " li %2, 0 \n"
+ "1: ll %1, %3 \n"
+ " bnez %1, 2f \n"
+ " addu %1, 1 \n"
+ " sc %1, %0 \n"
+ " beqzl %1, 1b \n"
+ " .set reorder \n"
+#ifdef CONFIG_SMP
+ " sync \n"
+#endif
+ " li %2, 1 \n"
+ "2: \n"
+ : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret)
+ : "m" (rw->lock)
+ : "memory");
+ } else {
+ __asm__ __volatile__(
+ " .set noreorder # __raw_read_trylock \n"
+ " li %2, 0 \n"
+ "1: ll %1, %3 \n"
+ " bnez %1, 2f \n"
+ " addu %1, 1 \n"
+ " sc %1, %0 \n"
+ " beqz %1, 1b \n"
+ " .set reorder \n"
+#ifdef CONFIG_SMP
+ " sync \n"
+#endif
+ " li %2, 1 \n"
+ "2: \n"
+ : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret)
+ : "m" (rw->lock)
+ : "memory");
+ }
+
+ return ret;
+}
static inline int __raw_write_trylock(raw_rwlock_t *rw)
{