331 lines
9.2 KiB
Diff
331 lines
9.2 KiB
Diff
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From: Eric Anholt <eric@anholt.net>
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Date: Mon, 2 Mar 2015 13:01:12 -0800
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Subject: [05/16] drm/vc4: Bind and initialize the V3D engine.
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Origin: http://cgit.freedesktop.org/~airlied/linux/commit?id=d3f5168a0810005920e7a3d5ba83e249bd9a750c
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This is the component of the GPU that does 3D rendering.
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Signed-off-by: Eric Anholt <eric@anholt.net>
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---
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drivers/gpu/drm/vc4/Makefile | 1 +
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drivers/gpu/drm/vc4/vc4_debugfs.c | 2 +
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drivers/gpu/drm/vc4/vc4_drv.c | 1 +
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drivers/gpu/drm/vc4/vc4_drv.h | 13 +++
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drivers/gpu/drm/vc4/vc4_v3d.c | 225 ++++++++++++++++++++++++++++++++++++++
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5 files changed, 242 insertions(+)
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create mode 100644 drivers/gpu/drm/vc4/vc4_v3d.c
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diff --git a/drivers/gpu/drm/vc4/Makefile b/drivers/gpu/drm/vc4/Makefile
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index eb776a6..e87a6f2 100644
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--- a/drivers/gpu/drm/vc4/Makefile
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+++ b/drivers/gpu/drm/vc4/Makefile
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@@ -11,6 +11,7 @@ vc4-y := \
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vc4_hdmi.o \
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vc4_hvs.o \
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vc4_plane.o \
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+ vc4_v3d.o \
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vc4_validate_shaders.o
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vc4-$(CONFIG_DEBUG_FS) += vc4_debugfs.o
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diff --git a/drivers/gpu/drm/vc4/vc4_debugfs.c b/drivers/gpu/drm/vc4/vc4_debugfs.c
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index 6bcf96e..d76ad10 100644
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--- a/drivers/gpu/drm/vc4/vc4_debugfs.c
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+++ b/drivers/gpu/drm/vc4/vc4_debugfs.c
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@@ -22,6 +22,8 @@ static const struct drm_info_list vc4_debugfs_list[] = {
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{"crtc0_regs", vc4_crtc_debugfs_regs, 0, (void *)(uintptr_t)0},
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{"crtc1_regs", vc4_crtc_debugfs_regs, 0, (void *)(uintptr_t)1},
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{"crtc2_regs", vc4_crtc_debugfs_regs, 0, (void *)(uintptr_t)2},
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+ {"v3d_ident", vc4_v3d_debugfs_ident, 0},
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+ {"v3d_regs", vc4_v3d_debugfs_regs, 0},
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};
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#define VC4_DEBUGFS_ENTRIES ARRAY_SIZE(vc4_debugfs_list)
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diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c
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index da4be9c8..db58d74 100644
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--- a/drivers/gpu/drm/vc4/vc4_drv.c
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+++ b/drivers/gpu/drm/vc4/vc4_drv.c
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@@ -236,6 +236,7 @@ static struct platform_driver *const component_drivers[] = {
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&vc4_hdmi_driver,
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&vc4_crtc_driver,
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&vc4_hvs_driver,
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+ &vc4_v3d_driver,
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};
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static int vc4_platform_drm_probe(struct platform_device *pdev)
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diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
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index bd77d55..8945463 100644
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--- a/drivers/gpu/drm/vc4/vc4_drv.h
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+++ b/drivers/gpu/drm/vc4/vc4_drv.h
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@@ -15,6 +15,7 @@ struct vc4_dev {
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struct vc4_hdmi *hdmi;
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struct vc4_hvs *hvs;
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struct vc4_crtc *crtc[3];
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+ struct vc4_v3d *v3d;
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struct drm_fbdev_cma *fbdev;
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@@ -82,6 +83,11 @@ to_vc4_bo(struct drm_gem_object *bo)
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return (struct vc4_bo *)bo;
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}
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+struct vc4_v3d {
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+ struct platform_device *pdev;
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+ void __iomem *regs;
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+};
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+
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struct vc4_hvs {
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struct platform_device *pdev;
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void __iomem *regs;
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@@ -119,6 +125,8 @@ to_vc4_encoder(struct drm_encoder *encoder)
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return container_of(encoder, struct vc4_encoder, base);
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}
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+#define V3D_READ(offset) readl(vc4->v3d->regs + offset)
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+#define V3D_WRITE(offset, val) writel(val, vc4->v3d->regs + offset)
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#define HVS_READ(offset) readl(vc4->hvs->regs + offset)
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#define HVS_WRITE(offset, val) writel(val, vc4->hvs->regs + offset)
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@@ -241,6 +249,11 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
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u32 vc4_plane_write_dlist(struct drm_plane *plane, u32 __iomem *dlist);
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u32 vc4_plane_dlist_size(struct drm_plane_state *state);
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+/* vc4_v3d.c */
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+extern struct platform_driver vc4_v3d_driver;
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+int vc4_v3d_debugfs_ident(struct seq_file *m, void *unused);
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+int vc4_v3d_debugfs_regs(struct seq_file *m, void *unused);
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+
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/* vc4_validate_shader.c */
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struct vc4_validated_shader_info *
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vc4_validate_shader(struct drm_gem_cma_object *shader_obj);
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diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm/vc4/vc4_v3d.c
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new file mode 100644
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index 0000000..040ad0d
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--- /dev/null
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+++ b/drivers/gpu/drm/vc4/vc4_v3d.c
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@@ -0,0 +1,225 @@
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+/*
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+ * Copyright (c) 2014 The Linux Foundation. All rights reserved.
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+ * Copyright (C) 2013 Red Hat
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+ * Author: Rob Clark <robdclark@gmail.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published by
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+ * the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful, but WITHOUT
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+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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+ * more details.
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+ *
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+ * You should have received a copy of the GNU General Public License along with
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+ * this program. If not, see <http://www.gnu.org/licenses/>.
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+ */
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+
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+#include "linux/component.h"
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+#include "vc4_drv.h"
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+#include "vc4_regs.h"
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+
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+#ifdef CONFIG_DEBUG_FS
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+#define REGDEF(reg) { reg, #reg }
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+static const struct {
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+ uint32_t reg;
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+ const char *name;
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+} vc4_reg_defs[] = {
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+ REGDEF(V3D_IDENT0),
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+ REGDEF(V3D_IDENT1),
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+ REGDEF(V3D_IDENT2),
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+ REGDEF(V3D_SCRATCH),
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+ REGDEF(V3D_L2CACTL),
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+ REGDEF(V3D_SLCACTL),
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+ REGDEF(V3D_INTCTL),
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+ REGDEF(V3D_INTENA),
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+ REGDEF(V3D_INTDIS),
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+ REGDEF(V3D_CT0CS),
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+ REGDEF(V3D_CT1CS),
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+ REGDEF(V3D_CT0EA),
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+ REGDEF(V3D_CT1EA),
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+ REGDEF(V3D_CT0CA),
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+ REGDEF(V3D_CT1CA),
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+ REGDEF(V3D_CT00RA0),
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+ REGDEF(V3D_CT01RA0),
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+ REGDEF(V3D_CT0LC),
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+ REGDEF(V3D_CT1LC),
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+ REGDEF(V3D_CT0PC),
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+ REGDEF(V3D_CT1PC),
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+ REGDEF(V3D_PCS),
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+ REGDEF(V3D_BFC),
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+ REGDEF(V3D_RFC),
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+ REGDEF(V3D_BPCA),
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+ REGDEF(V3D_BPCS),
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+ REGDEF(V3D_BPOA),
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+ REGDEF(V3D_BPOS),
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+ REGDEF(V3D_BXCF),
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+ REGDEF(V3D_SQRSV0),
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+ REGDEF(V3D_SQRSV1),
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+ REGDEF(V3D_SQCNTL),
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+ REGDEF(V3D_SRQPC),
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+ REGDEF(V3D_SRQUA),
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+ REGDEF(V3D_SRQUL),
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+ REGDEF(V3D_SRQCS),
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+ REGDEF(V3D_VPACNTL),
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+ REGDEF(V3D_VPMBASE),
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+ REGDEF(V3D_PCTRC),
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+ REGDEF(V3D_PCTRE),
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+ REGDEF(V3D_PCTR0),
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+ REGDEF(V3D_PCTRS0),
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+ REGDEF(V3D_PCTR1),
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+ REGDEF(V3D_PCTRS1),
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+ REGDEF(V3D_PCTR2),
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+ REGDEF(V3D_PCTRS2),
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+ REGDEF(V3D_PCTR3),
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+ REGDEF(V3D_PCTRS3),
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+ REGDEF(V3D_PCTR4),
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+ REGDEF(V3D_PCTRS4),
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+ REGDEF(V3D_PCTR5),
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+ REGDEF(V3D_PCTRS5),
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+ REGDEF(V3D_PCTR6),
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+ REGDEF(V3D_PCTRS6),
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+ REGDEF(V3D_PCTR7),
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+ REGDEF(V3D_PCTRS7),
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+ REGDEF(V3D_PCTR8),
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+ REGDEF(V3D_PCTRS8),
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+ REGDEF(V3D_PCTR9),
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+ REGDEF(V3D_PCTRS9),
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+ REGDEF(V3D_PCTR10),
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+ REGDEF(V3D_PCTRS10),
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+ REGDEF(V3D_PCTR11),
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+ REGDEF(V3D_PCTRS11),
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+ REGDEF(V3D_PCTR12),
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+ REGDEF(V3D_PCTRS12),
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+ REGDEF(V3D_PCTR13),
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+ REGDEF(V3D_PCTRS13),
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+ REGDEF(V3D_PCTR14),
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+ REGDEF(V3D_PCTRS14),
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+ REGDEF(V3D_PCTR15),
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+ REGDEF(V3D_PCTRS15),
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+ REGDEF(V3D_DBGE),
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+ REGDEF(V3D_FDBGO),
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+ REGDEF(V3D_FDBGB),
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+ REGDEF(V3D_FDBGR),
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+ REGDEF(V3D_FDBGS),
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+ REGDEF(V3D_ERRSTAT),
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+};
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+
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+int vc4_v3d_debugfs_regs(struct seq_file *m, void *unused)
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+{
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+ struct drm_info_node *node = (struct drm_info_node *)m->private;
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+ struct drm_device *dev = node->minor->dev;
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+ struct vc4_dev *vc4 = to_vc4_dev(dev);
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+ int i;
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+
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+ for (i = 0; i < ARRAY_SIZE(vc4_reg_defs); i++) {
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+ seq_printf(m, "%s (0x%04x): 0x%08x\n",
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+ vc4_reg_defs[i].name, vc4_reg_defs[i].reg,
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+ V3D_READ(vc4_reg_defs[i].reg));
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+ }
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+
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+ return 0;
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+}
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+
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+int vc4_v3d_debugfs_ident(struct seq_file *m, void *unused)
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+{
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+ struct drm_info_node *node = (struct drm_info_node *)m->private;
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+ struct drm_device *dev = node->minor->dev;
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+ struct vc4_dev *vc4 = to_vc4_dev(dev);
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+ uint32_t ident1 = V3D_READ(V3D_IDENT1);
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+ uint32_t nslc = VC4_GET_FIELD(ident1, V3D_IDENT1_NSLC);
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+ uint32_t tups = VC4_GET_FIELD(ident1, V3D_IDENT1_TUPS);
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+ uint32_t qups = VC4_GET_FIELD(ident1, V3D_IDENT1_QUPS);
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+
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+ seq_printf(m, "Revision: %d\n",
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+ VC4_GET_FIELD(ident1, V3D_IDENT1_REV));
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+ seq_printf(m, "Slices: %d\n", nslc);
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+ seq_printf(m, "TMUs: %d\n", nslc * tups);
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+ seq_printf(m, "QPUs: %d\n", nslc * qups);
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+ seq_printf(m, "Semaphores: %d\n",
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+ VC4_GET_FIELD(ident1, V3D_IDENT1_NSEM));
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+
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+ return 0;
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+}
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+#endif /* CONFIG_DEBUG_FS */
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+
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+static void vc4_v3d_init_hw(struct drm_device *dev)
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+{
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+ struct vc4_dev *vc4 = to_vc4_dev(dev);
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+
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+ /* Take all the memory that would have been reserved for user
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+ * QPU programs, since we don't have an interface for running
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+ * them, anyway.
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+ */
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+ V3D_WRITE(V3D_VPMBASE, 0);
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+}
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+
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+static int vc4_v3d_bind(struct device *dev, struct device *master, void *data)
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+{
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+ struct platform_device *pdev = to_platform_device(dev);
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+ struct drm_device *drm = dev_get_drvdata(master);
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+ struct vc4_dev *vc4 = to_vc4_dev(drm);
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+ struct vc4_v3d *v3d = NULL;
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+
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+ v3d = devm_kzalloc(&pdev->dev, sizeof(*v3d), GFP_KERNEL);
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+ if (!v3d)
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+ return -ENOMEM;
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+
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+ v3d->pdev = pdev;
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+
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+ v3d->regs = vc4_ioremap_regs(pdev, 0);
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+ if (IS_ERR(v3d->regs))
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+ return PTR_ERR(v3d->regs);
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+
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+ vc4->v3d = v3d;
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+
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+ if (V3D_READ(V3D_IDENT0) != V3D_EXPECTED_IDENT0) {
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+ DRM_ERROR("V3D_IDENT0 read 0x%08x instead of 0x%08x\n",
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+ V3D_READ(V3D_IDENT0), V3D_EXPECTED_IDENT0);
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+ return -EINVAL;
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+ }
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+
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+ vc4_v3d_init_hw(drm);
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+
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+ return 0;
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+}
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+
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+static void vc4_v3d_unbind(struct device *dev, struct device *master,
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+ void *data)
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+{
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+ struct drm_device *drm = dev_get_drvdata(master);
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+ struct vc4_dev *vc4 = to_vc4_dev(drm);
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+
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+ vc4->v3d = NULL;
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+}
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+
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+static const struct component_ops vc4_v3d_ops = {
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+ .bind = vc4_v3d_bind,
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+ .unbind = vc4_v3d_unbind,
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+};
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+
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+static int vc4_v3d_dev_probe(struct platform_device *pdev)
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+{
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+ return component_add(&pdev->dev, &vc4_v3d_ops);
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+}
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+
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+static int vc4_v3d_dev_remove(struct platform_device *pdev)
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+{
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+ component_del(&pdev->dev, &vc4_v3d_ops);
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+ return 0;
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+}
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+
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+static const struct of_device_id vc4_v3d_dt_match[] = {
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+ { .compatible = "brcm,vc4-v3d" },
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+ {}
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+};
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+
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+struct platform_driver vc4_v3d_driver = {
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+ .probe = vc4_v3d_dev_probe,
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+ .remove = vc4_v3d_dev_remove,
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+ .driver = {
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+ .name = "vc4_v3d",
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+ .of_match_table = vc4_v3d_dt_match,
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+ },
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+};
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