diff --git a/debian/changelog b/debian/changelog index 6e04f9038..c0d74dc03 100644 --- a/debian/changelog +++ b/debian/changelog @@ -415,6 +415,8 @@ linux (4.9.30-1) UNRELEASED; urgency=medium (Closes: #863907) * Add Debian package version to "hung task" log messages * btrfs: warn about RAID5/6 being experimental at mount time (Closes: #863290) + * [x86] pinctrl: cherryview: Add a quirk to make Acer Chromebook keyboard + work again (Closes: #862723) [ Salvatore Bonaccorso ] * tracing: Use strlcpy() instead of strcpy() in __trace_find_cmdline() diff --git a/debian/patches/bugfix/x86/pinctrl-cherryview-add-a-quirk-to-make-acer-chromebo.patch b/debian/patches/bugfix/x86/pinctrl-cherryview-add-a-quirk-to-make-acer-chromebo.patch new file mode 100644 index 000000000..589780803 --- /dev/null +++ b/debian/patches/bugfix/x86/pinctrl-cherryview-add-a-quirk-to-make-acer-chromebo.patch @@ -0,0 +1,94 @@ +From: Mika Westerberg +Date: Mon, 10 Apr 2017 13:16:33 +0300 +Subject: pinctrl: cherryview: Add a quirk to make Acer Chromebook keyboard + work again +Origin: https://git.kernel.org/linus/7036502783729c2aaf7a3c24c89087c58721430f +Bug-Debian: https://bugs.debian.org/862723 + +After commit 47c950d10202 ("pinctrl: cherryview: Do not add all +southwest and north GPIOs to IRQ domain") the driver does not add all +GPIOs to the irqdomain. The reason for that is that those GPIOs cannot +generate IRQs at all, only GPEs (General Purpose Events). This causes +Linux virtual IRQ numbering to change. + +However, it seems some CYAN Chromebooks, including Acer Chromebook +hardcodes these Linux IRQ numbers in the ACPI tables of the machine. +Since the numbering is different now, the IRQ meant for keyboard does +not match the Linux virtual IRQ number anymore making the keyboard +non-functional. + +Work this around by adding special quirk just for these machines where +we add back all GPIOs to the irqdomain. Rest of the Cherryview/Braswell +based machines will not be affected by the change. + +Link: https://bugzilla.kernel.org/show_bug.cgi?id=194945 +Fixes: 47c950d10202 ("pinctrl: cherryview: Do not add all southwest and north GPIOs to IRQ domain") +Reported-by: Adam S Levy +Signed-off-by: Mika Westerberg +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/intel/pinctrl-cherryview.c | 26 ++++++++++++++++++++++++-- + 1 file changed, 24 insertions(+), 2 deletions(-) + +diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c +index f80134e3e0b6..9ff790174906 100644 +--- a/drivers/pinctrl/intel/pinctrl-cherryview.c ++++ b/drivers/pinctrl/intel/pinctrl-cherryview.c +@@ -13,6 +13,7 @@ + * published by the Free Software Foundation. + */ + ++#include + #include + #include + #include +@@ -1524,10 +1525,31 @@ static void chv_gpio_irq_handler(struct irq_desc *desc) + chained_irq_exit(chip, desc); + } + ++/* ++ * Certain machines seem to hardcode Linux IRQ numbers in their ACPI ++ * tables. Since we leave GPIOs that are not capable of generating ++ * interrupts out of the irqdomain the numbering will be different and ++ * cause devices using the hardcoded IRQ numbers fail. In order not to ++ * break such machines we will only mask pins from irqdomain if the machine ++ * is not listed below. ++ */ ++static const struct dmi_system_id chv_no_valid_mask[] = { ++ { ++ /* See https://bugzilla.kernel.org/show_bug.cgi?id=194945 */ ++ .ident = "Acer Chromebook (CYAN)", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "Edgar"), ++ DMI_MATCH(DMI_BIOS_DATE, "05/21/2016"), ++ }, ++ } ++}; ++ + static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq) + { + const struct chv_gpio_pinrange *range; + struct gpio_chip *chip = &pctrl->chip; ++ bool need_valid_mask = !dmi_check_system(chv_no_valid_mask); + int ret, i, offset; + + *chip = chv_gpio_chip; +@@ -1536,7 +1558,7 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq) + chip->label = dev_name(pctrl->dev); + chip->parent = pctrl->dev; + chip->base = -1; +- chip->irq_need_valid_mask = true; ++ chip->irq_need_valid_mask = need_valid_mask; + + ret = devm_gpiochip_add_data(pctrl->dev, chip, pctrl); + if (ret) { +@@ -1567,7 +1589,7 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq) + intsel &= CHV_PADCTRL0_INTSEL_MASK; + intsel >>= CHV_PADCTRL0_INTSEL_SHIFT; + +- if (intsel >= pctrl->community->nirqs) ++ if (need_valid_mask && intsel >= pctrl->community->nirqs) + clear_bit(i, chip->irq_valid_mask); + } + diff --git a/debian/patches/series b/debian/patches/series index 71f171420..34648b8ef 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -53,6 +53,7 @@ debian/amd64-don-t-warn-about-expected-w+x-pages-on-xen.patch # Arch bug fixes bugfix/arm/arm-dts-kirkwood-fix-sata-pinmux-ing-for-ts419.patch +bugfix/x86/pinctrl-cherryview-add-a-quirk-to-make-acer-chromebo.patch # Arch features features/mips/MIPS-increase-MAX-PHYSMEM-BITS-on-Loongson-3-only.patch