Update to 4.8-rc3
This commit is contained in:
parent
75b51a8352
commit
1222968771
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@ -1,3 +1,9 @@
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linux (4.8~rc3-1~exp1) UNRELEASED; urgency=medium
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* New upstream release candidate
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-- Ben Hutchings <ben@decadent.org.uk> Sun, 28 Aug 2016 19:01:59 +0100
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linux (4.7.2-1) unstable; urgency=medium
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* New upstream release: https://kernelnewbies.org/Linux_4.7
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@ -1,62 +0,0 @@
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From: Dave Carroll <david.carroll@microsemi.com>
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Date: Fri, 5 Aug 2016 13:44:10 -0600
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Subject: aacraid: Check size values after double-fetch from user
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Origin: https://git.kernel.org/linus/fa00c437eef8dc2e7b25f8cd868cfa405fcc2bb3
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In aacraid's ioctl_send_fib() we do two fetches from userspace, one the
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get the fib header's size and one for the fib itself. Later we use the
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size field from the second fetch to further process the fib. If for some
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reason the size from the second fetch is different than from the first
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fix, we may encounter an out-of- bounds access in aac_fib_send(). We
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also check the sender size to insure it is not out of bounds. This was
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reported in https://bugzilla.kernel.org/show_bug.cgi?id=116751 and was
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assigned CVE-2016-6480.
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Reported-by: Pengfei Wang <wpengfeinudt@gmail.com>
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Fixes: 7c00ffa31 '[SCSI] 2.6 aacraid: Variable FIB size (updated patch)'
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Cc: stable@vger.kernel.org
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Signed-off-by: Dave Carroll <david.carroll@microsemi.com>
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Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
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Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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---
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drivers/scsi/aacraid/commctrl.c | 13 +++++++++++--
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1 file changed, 11 insertions(+), 2 deletions(-)
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diff --git a/drivers/scsi/aacraid/commctrl.c b/drivers/scsi/aacraid/commctrl.c
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index b381b3718a98..5648b715fed9 100644
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--- a/drivers/scsi/aacraid/commctrl.c
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+++ b/drivers/scsi/aacraid/commctrl.c
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@@ -63,7 +63,7 @@ static int ioctl_send_fib(struct aac_dev * dev, void __user *arg)
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struct fib *fibptr;
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struct hw_fib * hw_fib = (struct hw_fib *)0;
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dma_addr_t hw_fib_pa = (dma_addr_t)0LL;
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- unsigned size;
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+ unsigned int size, osize;
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int retval;
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if (dev->in_reset) {
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@@ -87,7 +87,8 @@ static int ioctl_send_fib(struct aac_dev * dev, void __user *arg)
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* will not overrun the buffer when we copy the memory. Return
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* an error if we would.
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*/
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- size = le16_to_cpu(kfib->header.Size) + sizeof(struct aac_fibhdr);
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+ osize = size = le16_to_cpu(kfib->header.Size) +
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+ sizeof(struct aac_fibhdr);
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if (size < le16_to_cpu(kfib->header.SenderSize))
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size = le16_to_cpu(kfib->header.SenderSize);
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if (size > dev->max_fib_size) {
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@@ -118,6 +119,14 @@ static int ioctl_send_fib(struct aac_dev * dev, void __user *arg)
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goto cleanup;
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}
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+ /* Sanity check the second copy */
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+ if ((osize != le16_to_cpu(kfib->header.Size) +
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+ sizeof(struct aac_fibhdr))
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+ || (size < le16_to_cpu(kfib->header.SenderSize))) {
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+ retval = -EINVAL;
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+ goto cleanup;
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+ }
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+
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if (kfib->header.Command == cpu_to_le16(TakeABreakPt)) {
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aac_adapter_interrupt(dev);
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/*
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@ -23,9 +23,9 @@ format to detect missing firmware.
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---
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--- a/drivers/base/firmware_class.c
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+++ b/drivers/base/firmware_class.c
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@@ -329,21 +329,22 @@ static int fw_get_filesystem_firmware(st
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rc = kernel_read_file_from_path(path, &buf->data, &size,
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INT_MAX, READING_FIRMWARE);
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@@ -350,21 +350,22 @@ fw_get_filesystem_firmware(struct device
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rc = kernel_read_file_from_path(path, &buf->data, &size, msize,
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id);
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if (rc) {
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- if (rc == -ENOENT)
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- dev_dbg(device, "loading %s failed with error %d\n",
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@ -53,7 +53,7 @@ format to detect missing firmware.
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return rc;
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}
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@@ -1114,7 +1115,7 @@ _request_firmware(const struct firmware
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@@ -1155,7 +1156,7 @@ _request_firmware(const struct firmware
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if (opt_flags & FW_OPT_NOWAIT) {
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timeout = usermodehelper_read_lock_wait(timeout);
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if (!timeout) {
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@ -15,27 +15,27 @@ the kernel.
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--- a/scripts/Kbuild.include
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+++ b/scripts/Kbuild.include
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@@ -112,12 +112,12 @@ as-instr = $(call try-run,\
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@@ -116,12 +116,12 @@ CC_OPTION_CFLAGS = $(filter-out $(GCC_PL
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# Usage: cflags-y += $(call cc-option,-march=winchip-c6,-march=i586)
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cc-option = $(call try-run,\
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- $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",$(1),$(2))
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+ $(CC) $(NOSTDINC_FLAGS) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",$(1),$(2))
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- $(CC) $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",$(1),$(2))
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+ $(CC) $(NOSTDINC_FLAGS) $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",$(1),$(2))
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# cc-option-yn
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# Usage: flag := $(call cc-option-yn,-march=winchip-c6)
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cc-option-yn = $(call try-run,\
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- $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",y,n)
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+ $(CC) $(NOSTDINC_FLAGS) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",y,n)
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- $(CC) $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",y,n)
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+ $(CC) $(NOSTDINC_FLAGS) $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",y,n)
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# cc-option-align
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# Prefix align with either -falign or -malign
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@@ -127,18 +127,19 @@ cc-option-align = $(subst -functions=0,,
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@@ -131,18 +131,19 @@ cc-option-align = $(subst -functions=0,,
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# cc-disable-warning
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# Usage: cflags-y += $(call cc-disable-warning,unused-but-set-variable)
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cc-disable-warning = $(call try-run,\
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- $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) -W$(strip $(1)) -c -x c /dev/null -o "$$TMP",-Wno-$(strip $(1)))
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+ $(CC) $(NOSTDINC_FLAGS) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) -W$(strip $(1)) -c -x c /dev/null -o "$$TMP",-Wno-$(strip $(1)))
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- $(CC) $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) -W$(strip $(1)) -c -x c /dev/null -o "$$TMP",-Wno-$(strip $(1)))
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+ $(CC) $(NOSTDINC_FLAGS) $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) -W$(strip $(1)) -c -x c /dev/null -o "$$TMP",-Wno-$(strip $(1)))
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# cc-name
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# Expands to either gcc or clang
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@ -53,7 +53,7 @@ the kernel.
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# cc-ifversion
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# Usage: EXTRA_CFLAGS += $(call cc-ifversion, -lt, 0402, -O1)
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@@ -152,7 +153,7 @@ cc-ldoption = $(call try-run,\
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@@ -156,7 +157,7 @@ cc-ldoption = $(call try-run,\
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# ld-option
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# Usage: LDFLAGS += $(call ld-option, -X)
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ld-option = $(call try-run,\
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@ -64,7 +64,7 @@ the kernel.
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# Usage: KBUILD_ARFLAGS := $(call ar-option,D)
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--- a/Makefile
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+++ b/Makefile
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@@ -630,6 +630,8 @@ KBUILD_CFLAGS += -O2
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@@ -634,6 +634,8 @@ KBUILD_CFLAGS += -O2
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endif
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endif
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@ -73,7 +73,7 @@ the kernel.
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# Tell gcc to never replace conditional load with a non-conditional one
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KBUILD_CFLAGS += $(call cc-option,--param=allow-store-data-races=0)
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@@ -769,7 +771,7 @@ KBUILD_CFLAGS += $(call cc-option, -fno-
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@@ -752,7 +754,7 @@ KBUILD_CFLAGS += $(call cc-option, -fno-
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endif
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# arch Makefile may override CC so keep this after arch Makefile is included
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@ -1,88 +0,0 @@
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From ed7b630b310775f3b6c0b360ede7a12cd8dff6fe Mon Sep 17 00:00:00 2001
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From: Jiri Olsa <jolsa@redhat.com>
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Date: Fri, 24 Jun 2016 14:40:25 +0200
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Subject: [PATCH] perf symbols: Use proper dso name for is_regular_file
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Origin: https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/?id=ed7b630b310775f3b6c0b360ede7a12cd8dff6fe
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Marc reported use of uninitialized memory:
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> In commit "403567217d3f perf symbols: Do not read symbols/data from
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> device files" a check to uninitialzied memory was added. This leads to
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> the following valgrind output:
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>
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> ==24515== Syscall param stat(file_name) points to uninitialised byte(s)
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> ==24515== at 0x75B26D5: _xstat (in /lib/x86_64-linux-gnu/libc-2.22.so)
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> ==24515== by 0x4E548D: stat (stat.h:454)
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> ==24515== by 0x4E548D: is_regular_file (util.c:687)
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> ==24515== by 0x4A5BEE: dso__load (symbol.c:1435)
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> ==24515== by 0x4BB1AE: map__load (map.c:289)
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> ==24515== by 0x4BB1AE: map__find_symbol (map.c:333)
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> ==24515== by 0x4835B3: thread__find_addr_location (event.c:1300)
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> ==24515== by 0x4B5342: add_callchain_ip (machine.c:1652)
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> ==24515== by 0x4B5342: thread__resolve_callchain_sample (machine.c:1906)
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> ==24515== by 0x4B9E7D: thread__resolve_callchain (machine.c:1958)
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> ==24515== by 0x441B3E: process_event (builtin-script.c:795)
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> ==24515== by 0x441B3E: process_sample_event (builtin-script.c:920)
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> ==24515== by 0x4BEE29: perf_evlist__deliver_sample (session.c:1192)
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> ==24515== by 0x4BEE29: machines__deliver_event (session.c:1229)
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> ==24515== by 0x4BF770: perf_session__deliver_event (session.c:1286)
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> ==24515== by 0x4BF770: ordered_events__deliver_event (session.c:114)
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> ==24515== by 0x4C1D17: __ordered_events__flush (ordered-events.c:207)
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> ==24515== by 0x4C1D17: ordered_events__flush.part.3 (ordered-events.c:274)
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> ==24515== by 0x4BF44C: perf_session__process_user_event (session.c:1325)
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> ==24515== by 0x4BF44C: perf_session__process_event (session.c:1451)
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> ==24515== Address 0x807c6a0 is 0 bytes inside a block of size 4,096 alloc'd
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> ==24515== at 0x4C29C0F: malloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
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> ==24515== by 0x4A5BCB: dso__load (symbol.c:1421)
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> ==24515== by 0x4BB1AE: map__load (map.c:289)
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> ==24515== by 0x4BB1AE: map__find_symbol (map.c:333)
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> ==24515== by 0x4835B3: thread__find_addr_location (event.c:1300)
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> ==24515== by 0x4B5342: add_callchain_ip (machine.c:1652)
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> ==24515== by 0x4B5342: thread__resolve_callchain_sample (machine.c:1906)
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> ==24515== by 0x4B9E7D: thread__resolve_callchain (machine.c:1958)
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> ==24515== by 0x441B3E: process_event (builtin-script.c:795)
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> ==24515== by 0x441B3E: process_sample_event (builtin-script.c:920)
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> ==24515== by 0x4BEE29: perf_evlist__deliver_sample (session.c:1192)
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> ==24515== by 0x4BEE29: machines__deliver_event (session.c:1229)
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> ==24515== by 0x4BF770: perf_session__deliver_event (session.c:1286)
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> ==24515== by 0x4BF770: ordered_events__deliver_event (session.c:114)
|
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> ==24515== by 0x4C1D17: __ordered_events__flush (ordered-events.c:207)
|
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> ==24515== by 0x4C1D17: ordered_events__flush.part.3 (ordered-events.c:274)
|
||||
> ==24515== by 0x4BF44C: perf_session__process_user_event (session.c:1325)
|
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> ==24515== by 0x4BF44C: perf_session__process_event (session.c:1451)
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> ==24515== by 0x4C0EAC: __perf_session__process_events (session.c:1804)
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> ==24515== by 0x4C0EAC: perf_session__process_events (session.c:1858)
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|
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The reason was a typo that passed global 'name' variable as the
|
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is_regular_file argument instead dso->long_name.
|
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|
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Reported-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Signed-off-by: Jiri Olsa <jolsa@kernel.org>
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Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Cc: David Ahern <dsahern@gmail.com>
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Cc: Namhyung Kim <namhyung@kernel.org>
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Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
|
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Cc: Wang Nan <wangnan0@huawei.com>
|
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Fixes: 403567217d3f ("perf symbols: Do not read symbols/data from device files")
|
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Link: http://lkml.kernel.org/r/1466772025-17471-2-git-send-email-jolsa@kernel.org
|
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Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
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---
|
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tools/perf/util/symbol.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/tools/perf/util/symbol.c b/tools/perf/util/symbol.c
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index b044f1a32d16..37e8d20ae03e 100644
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--- a/tools/perf/util/symbol.c
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+++ b/tools/perf/util/symbol.c
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@@ -1430,7 +1430,7 @@ int dso__load(struct dso *dso, struct map *map, symbol_filter_t filter)
|
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* Read the build id if possible. This is required for
|
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* DSO_BINARY_TYPE__BUILDID_DEBUGINFO to work
|
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*/
|
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- if (is_regular_file(name) &&
|
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+ if (is_regular_file(dso->long_name) &&
|
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filename__read_build_id(dso->long_name, build_id, BUILD_ID_SIZE) > 0)
|
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dso__set_build_id(dso, build_id);
|
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|
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--
|
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2.8.1
|
||||
|
|
@ -26,7 +26,7 @@ missing, except for the pre-R600 case.
|
|||
---
|
||||
--- a/drivers/gpu/drm/radeon/radeon_drv.c
|
||||
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
|
||||
@@ -44,6 +44,8 @@
|
||||
@@ -42,6 +42,8 @@
|
||||
|
||||
#include "drm_crtc_helper.h"
|
||||
#include "radeon_kfd.h"
|
||||
|
@ -35,7 +35,7 @@ missing, except for the pre-R600 case.
|
|||
|
||||
/*
|
||||
* KMS wrapper.
|
||||
@@ -295,6 +297,29 @@ MODULE_DEVICE_TABLE(pci, pciidlist);
|
||||
@@ -309,6 +311,29 @@ MODULE_DEVICE_TABLE(pci, pciidlist);
|
||||
|
||||
static struct drm_driver kms_driver;
|
||||
|
||||
|
@ -65,8 +65,8 @@ missing, except for the pre-R600 case.
|
|||
static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
|
||||
{
|
||||
struct apertures_struct *ap;
|
||||
@@ -338,6 +363,12 @@ static int radeon_pci_probe(struct pci_d
|
||||
!vga_switcheroo_handler_flags())
|
||||
@@ -346,6 +371,12 @@ static int radeon_pci_probe(struct pci_d
|
||||
if (vga_switcheroo_client_probe_defer(pdev))
|
||||
return -EPROBE_DEFER;
|
||||
|
||||
+ if ((ent->driver_data & RADEON_FAMILY_MASK) >= CHIP_R600 &&
|
||||
|
|
|
@ -1,42 +0,0 @@
|
|||
From: Uwe Kleine-König <uwe@kleine-koenig.org>
|
||||
Date: Wed, 11 May 2016 09:11:23 +0200
|
||||
Subject: [PATCH] rtc: initialize output parameter for read alarm to
|
||||
"uninitialized"
|
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Origin: https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/?id=d68778b80dd78ad6ed998397af182163d0ef16b0
|
||||
|
||||
rtc drivers are supposed to set values they don't support to -1. To
|
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simplify this for drivers and also make it harder for them to get it
|
||||
wrong initialize the values to -1.
|
||||
|
||||
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
|
||||
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
|
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---
|
||||
drivers/rtc/interface.c | 12 +++++++++++-
|
||||
1 file changed, 11 insertions(+), 1 deletion(-)
|
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|
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diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c
|
||||
index 9ef5f6f89f98..99475908e556 100644
|
||||
--- a/drivers/rtc/interface.c
|
||||
+++ b/drivers/rtc/interface.c
|
||||
@@ -104,7 +104,17 @@ static int rtc_read_alarm_internal(struct rtc_device *rtc, struct rtc_wkalrm *al
|
||||
else if (!rtc->ops->read_alarm)
|
||||
err = -EINVAL;
|
||||
else {
|
||||
- memset(alarm, 0, sizeof(struct rtc_wkalrm));
|
||||
+ alarm->enabled = 0;
|
||||
+ alarm->pending = 0;
|
||||
+ alarm->time.tm_sec = -1;
|
||||
+ alarm->time.tm_min = -1;
|
||||
+ alarm->time.tm_hour = -1;
|
||||
+ alarm->time.tm_mday = -1;
|
||||
+ alarm->time.tm_mon = -1;
|
||||
+ alarm->time.tm_year = -1;
|
||||
+ alarm->time.tm_wday = -1;
|
||||
+ alarm->time.tm_yday = -1;
|
||||
+ alarm->time.tm_isdst = -1;
|
||||
err = rtc->ops->read_alarm(rtc->dev.parent, alarm);
|
||||
}
|
||||
|
||||
--
|
||||
2.8.1
|
||||
|
|
@ -1,94 +0,0 @@
|
|||
From: Uwe Kleine-König <uwe@kleine-koenig.org>
|
||||
Date: Sat, 2 Jul 2016 17:28:08 +0200
|
||||
Subject: [PATCH] rtc: s35390a: fix reading out alarm
|
||||
Origin: https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/?id=ee82c046c1031af95e8c24dda072e04c565d4247
|
||||
|
||||
There are several issues fixed in this patch:
|
||||
|
||||
- When alarm isn't enabled, set .enabled to zero instead of returning
|
||||
-EINVAL.
|
||||
- Ignore how IRQ1 is configured when determining if IRQ2 is on.
|
||||
- The three alarm registers have an enable flag which must be
|
||||
evaluated.
|
||||
- The chip always triggers when the seconds register gets 0.
|
||||
|
||||
Note that the rtc framework however doesn't handle the result correctly
|
||||
because it doesn't check wday being initialized and so interprets an
|
||||
alarm being set for 10:00 AM in three days as 10:00 AM tomorrow (or
|
||||
today if that's not over yet).
|
||||
|
||||
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
|
||||
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
|
||||
---
|
||||
drivers/rtc/rtc-s35390a.c | 40 +++++++++++++++++++++++++++++++---------
|
||||
1 file changed, 31 insertions(+), 9 deletions(-)
|
||||
|
||||
diff --git a/drivers/rtc/rtc-s35390a.c b/drivers/rtc/rtc-s35390a.c
|
||||
index f40afdd0e5f5..6507a01cf9ad 100644
|
||||
--- a/drivers/rtc/rtc-s35390a.c
|
||||
+++ b/drivers/rtc/rtc-s35390a.c
|
||||
@@ -242,6 +242,8 @@ static int s35390a_set_alarm(struct i2c_client *client, struct rtc_wkalrm *alm)
|
||||
|
||||
if (alm->time.tm_wday != -1)
|
||||
buf[S35390A_ALRM_BYTE_WDAY] = bin2bcd(alm->time.tm_wday) | 0x80;
|
||||
+ else
|
||||
+ buf[S35390A_ALRM_BYTE_WDAY] = 0;
|
||||
|
||||
buf[S35390A_ALRM_BYTE_HOURS] = s35390a_hr2reg(s35390a,
|
||||
alm->time.tm_hour) | 0x80;
|
||||
@@ -269,23 +271,43 @@ static int s35390a_read_alarm(struct i2c_client *client, struct rtc_wkalrm *alm)
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
- if (bitrev8(sts) != S35390A_INT2_MODE_ALARM)
|
||||
- return -EINVAL;
|
||||
+ if ((bitrev8(sts) & S35390A_INT2_MODE_MASK) != S35390A_INT2_MODE_ALARM) {
|
||||
+ /*
|
||||
+ * When the alarm isn't enabled, the register to configure
|
||||
+ * the alarm time isn't accessible.
|
||||
+ */
|
||||
+ alm->enabled = 0;
|
||||
+ return 0;
|
||||
+ } else {
|
||||
+ alm->enabled = 1;
|
||||
+ }
|
||||
|
||||
err = s35390a_get_reg(s35390a, S35390A_CMD_INT2_REG1, buf, sizeof(buf));
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
/* This chip returns the bits of each byte in reverse order */
|
||||
- for (i = 0; i < 3; ++i) {
|
||||
+ for (i = 0; i < 3; ++i)
|
||||
buf[i] = bitrev8(buf[i]);
|
||||
- buf[i] &= ~0x80;
|
||||
- }
|
||||
|
||||
- alm->time.tm_wday = bcd2bin(buf[S35390A_ALRM_BYTE_WDAY]);
|
||||
- alm->time.tm_hour = s35390a_reg2hr(s35390a,
|
||||
- buf[S35390A_ALRM_BYTE_HOURS]);
|
||||
- alm->time.tm_min = bcd2bin(buf[S35390A_ALRM_BYTE_MINS]);
|
||||
+ /*
|
||||
+ * B0 of the three matching registers is an enable flag. Iff it is set
|
||||
+ * the configured value is used for matching.
|
||||
+ */
|
||||
+ if (buf[S35390A_ALRM_BYTE_WDAY] & 0x80)
|
||||
+ alm->time.tm_wday =
|
||||
+ bcd2bin(buf[S35390A_ALRM_BYTE_WDAY] & ~0x80);
|
||||
+
|
||||
+ if (buf[S35390A_ALRM_BYTE_HOURS] & 0x80)
|
||||
+ alm->time.tm_hour =
|
||||
+ s35390a_reg2hr(s35390a,
|
||||
+ buf[S35390A_ALRM_BYTE_HOURS] & ~0x80);
|
||||
+
|
||||
+ if (buf[S35390A_ALRM_BYTE_MINS] & 0x80)
|
||||
+ alm->time.tm_min = bcd2bin(buf[S35390A_ALRM_BYTE_MINS] & ~0x80);
|
||||
+
|
||||
+ /* alarm triggers always at s=0 */
|
||||
+ alm->time.tm_sec = 0;
|
||||
|
||||
dev_dbg(&client->dev, "%s: alm is mins=%d, hours=%d, wday=%d\n",
|
||||
__func__, alm->time.tm_min, alm->time.tm_hour,
|
||||
--
|
||||
2.8.1
|
||||
|
|
@ -1,128 +0,0 @@
|
|||
From: Uwe Kleine-König <uwe@kleine-koenig.org>
|
||||
Date: Sat, 2 Jul 2016 17:28:09 +0200
|
||||
Subject: [PATCH] rtc: s35390a: implement reset routine as suggested by the
|
||||
reference
|
||||
Origin: https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/?id=0af8a35b6ab4ba000d8f18748bb621c8ed5e7827
|
||||
|
||||
There were two deviations from the reference manual: you have to wait
|
||||
half a second when POC is active and you might have to repeat
|
||||
initialization when POC or BLD are still set after the sequence.
|
||||
|
||||
Note however that as POC and BLD are cleared by read the driver might
|
||||
not be able to detect that a reset is necessary. I don't have a good
|
||||
idea how to fix this.
|
||||
|
||||
Additionally report the value read from STATUS1 to the caller. This
|
||||
prepares the next patch.
|
||||
|
||||
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
|
||||
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
|
||||
---
|
||||
drivers/rtc/rtc-s35390a.c | 65 +++++++++++++++++++++++++++++++++++++++--------
|
||||
1 file changed, 55 insertions(+), 10 deletions(-)
|
||||
|
||||
diff --git a/drivers/rtc/rtc-s35390a.c b/drivers/rtc/rtc-s35390a.c
|
||||
index 6507a01cf9ad..6c90c9f48cab 100644
|
||||
--- a/drivers/rtc/rtc-s35390a.c
|
||||
+++ b/drivers/rtc/rtc-s35390a.c
|
||||
@@ -15,6 +15,7 @@
|
||||
#include <linux/bitrev.h>
|
||||
#include <linux/bcd.h>
|
||||
#include <linux/slab.h>
|
||||
+#include <linux/delay.h>
|
||||
|
||||
#define S35390A_CMD_STATUS1 0
|
||||
#define S35390A_CMD_STATUS2 1
|
||||
@@ -94,19 +95,63 @@ static int s35390a_get_reg(struct s35390a *s35390a, int reg, char *buf, int len)
|
||||
return 0;
|
||||
}
|
||||
|
||||
-static int s35390a_reset(struct s35390a *s35390a)
|
||||
+/*
|
||||
+ * Returns <0 on error, 0 if rtc is setup fine and 1 if the chip was reset.
|
||||
+ * To keep the information if an irq is pending, pass the value read from
|
||||
+ * STATUS1 to the caller.
|
||||
+ */
|
||||
+static int s35390a_reset(struct s35390a *s35390a, char *status1)
|
||||
{
|
||||
- char buf[1];
|
||||
+ char buf;
|
||||
+ int ret;
|
||||
+ unsigned initcount = 0;
|
||||
|
||||
- if (s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, buf, sizeof(buf)) < 0)
|
||||
- return -EIO;
|
||||
+ ret = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, status1, 1);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
|
||||
- if (!(buf[0] & (S35390A_FLAG_POC | S35390A_FLAG_BLD)))
|
||||
+ if (*status1 & S35390A_FLAG_POC)
|
||||
+ /*
|
||||
+ * Do not communicate for 0.5 seconds since the power-on
|
||||
+ * detection circuit is in operation.
|
||||
+ */
|
||||
+ msleep(500);
|
||||
+ else if (!(*status1 & S35390A_FLAG_BLD))
|
||||
+ /*
|
||||
+ * If both POC and BLD are unset everything is fine.
|
||||
+ */
|
||||
return 0;
|
||||
|
||||
- buf[0] |= (S35390A_FLAG_RESET | S35390A_FLAG_24H);
|
||||
- buf[0] &= 0xf0;
|
||||
- return s35390a_set_reg(s35390a, S35390A_CMD_STATUS1, buf, sizeof(buf));
|
||||
+ /*
|
||||
+ * At least one of POC and BLD are set, so reinitialise chip. Keeping
|
||||
+ * this information in the hardware to know later that the time isn't
|
||||
+ * valid is unfortunately not possible because POC and BLD are cleared
|
||||
+ * on read. So the reset is best done now.
|
||||
+ *
|
||||
+ * The 24H bit is kept over reset, so set it already here.
|
||||
+ */
|
||||
+initialize:
|
||||
+ *status1 = S35390A_FLAG_24H;
|
||||
+ buf = S35390A_FLAG_RESET | S35390A_FLAG_24H;
|
||||
+ ret = s35390a_set_reg(s35390a, S35390A_CMD_STATUS1, &buf, 1);
|
||||
+
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ ret = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, &buf, 1);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ if (buf & (S35390A_FLAG_POC | S35390A_FLAG_BLD)) {
|
||||
+ /* Try up to five times to reset the chip */
|
||||
+ if (initcount < 5) {
|
||||
+ ++initcount;
|
||||
+ goto initialize;
|
||||
+ } else
|
||||
+ return -EIO;
|
||||
+ }
|
||||
+
|
||||
+ return 1;
|
||||
}
|
||||
|
||||
static int s35390a_disable_test_mode(struct s35390a *s35390a)
|
||||
@@ -353,7 +398,7 @@ static int s35390a_probe(struct i2c_client *client,
|
||||
unsigned int i;
|
||||
struct s35390a *s35390a;
|
||||
struct rtc_time tm;
|
||||
- char buf[1];
|
||||
+ char buf[1], status1;
|
||||
|
||||
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
|
||||
err = -ENODEV;
|
||||
@@ -382,7 +427,7 @@ static int s35390a_probe(struct i2c_client *client,
|
||||
}
|
||||
}
|
||||
|
||||
- err = s35390a_reset(s35390a);
|
||||
+ err = s35390a_reset(s35390a, &status1);
|
||||
if (err < 0) {
|
||||
dev_err(&client->dev, "error resetting chip\n");
|
||||
goto exit_dummy;
|
||||
--
|
||||
2.8.1
|
||||
|
|
@ -1,123 +0,0 @@
|
|||
From: Uwe Kleine-König <uwe@kleine-koenig.org>
|
||||
Date: Sat, 2 Jul 2016 17:28:10 +0200
|
||||
Subject: [PATCH] rtc: s35390a: improve irq handling
|
||||
Origin: https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/?id=998dd84e542720cf02cbe9ea002de3850df32996
|
||||
|
||||
On some QNAP NAS devices the rtc can wake the machine. Several people
|
||||
noticed that once the machine was woken this way it fails to shut down.
|
||||
That's because the driver fails to acknowledge the interrupt and so it
|
||||
keeps active and restarts the machine immediatly after shutdown. See
|
||||
https://bugs.debian.org/794266 for a bug report.
|
||||
|
||||
Doing this correctly requires to interpret the INT2 flag of the first read
|
||||
of the STATUS1 register because this bit is cleared by read.
|
||||
|
||||
Note this is not maximally robust though because a pending irq isn't
|
||||
detected when the STATUS1 register was already read (and so INT2 is not
|
||||
set) but the irq was not disabled. But that is a hardware imposed problem
|
||||
that cannot easily be fixed by software.
|
||||
|
||||
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
|
||||
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
|
||||
---
|
||||
drivers/rtc/rtc-s35390a.c | 48 ++++++++++++++++++++++++++++++-----------------
|
||||
1 file changed, 31 insertions(+), 17 deletions(-)
|
||||
|
||||
diff --git a/drivers/rtc/rtc-s35390a.c b/drivers/rtc/rtc-s35390a.c
|
||||
index 6c90c9f48cab..d5b572266a72 100644
|
||||
--- a/drivers/rtc/rtc-s35390a.c
|
||||
+++ b/drivers/rtc/rtc-s35390a.c
|
||||
@@ -35,10 +35,14 @@
|
||||
#define S35390A_ALRM_BYTE_HOURS 1
|
||||
#define S35390A_ALRM_BYTE_MINS 2
|
||||
|
||||
+/* flags for STATUS1 */
|
||||
#define S35390A_FLAG_POC 0x01
|
||||
#define S35390A_FLAG_BLD 0x02
|
||||
+#define S35390A_FLAG_INT2 0x04
|
||||
#define S35390A_FLAG_24H 0x40
|
||||
#define S35390A_FLAG_RESET 0x80
|
||||
+
|
||||
+/* flag for STATUS2 */
|
||||
#define S35390A_FLAG_TEST 0x01
|
||||
|
||||
#define S35390A_INT2_MODE_MASK 0xF0
|
||||
@@ -394,11 +398,11 @@ static struct i2c_driver s35390a_driver;
|
||||
static int s35390a_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
- int err;
|
||||
+ int err, err_reset;
|
||||
unsigned int i;
|
||||
struct s35390a *s35390a;
|
||||
struct rtc_time tm;
|
||||
- char buf[1], status1;
|
||||
+ char buf, status1;
|
||||
|
||||
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
|
||||
err = -ENODEV;
|
||||
@@ -427,29 +431,35 @@ static int s35390a_probe(struct i2c_client *client,
|
||||
}
|
||||
}
|
||||
|
||||
- err = s35390a_reset(s35390a, &status1);
|
||||
- if (err < 0) {
|
||||
+ err_reset = s35390a_reset(s35390a, &status1);
|
||||
+ if (err_reset < 0) {
|
||||
+ err = err_reset;
|
||||
dev_err(&client->dev, "error resetting chip\n");
|
||||
goto exit_dummy;
|
||||
}
|
||||
|
||||
- err = s35390a_disable_test_mode(s35390a);
|
||||
- if (err < 0) {
|
||||
- dev_err(&client->dev, "error disabling test mode\n");
|
||||
- goto exit_dummy;
|
||||
- }
|
||||
-
|
||||
- err = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, buf, sizeof(buf));
|
||||
- if (err < 0) {
|
||||
- dev_err(&client->dev, "error checking 12/24 hour mode\n");
|
||||
- goto exit_dummy;
|
||||
- }
|
||||
- if (buf[0] & S35390A_FLAG_24H)
|
||||
+ if (status1 & S35390A_FLAG_24H)
|
||||
s35390a->twentyfourhour = 1;
|
||||
else
|
||||
s35390a->twentyfourhour = 0;
|
||||
|
||||
- if (s35390a_get_datetime(client, &tm) < 0)
|
||||
+ if (status1 & S35390A_FLAG_INT2) {
|
||||
+ /* disable alarm (and maybe test mode) */
|
||||
+ buf = 0;
|
||||
+ err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &buf, 1);
|
||||
+ if (err < 0) {
|
||||
+ dev_err(&client->dev, "error disabling alarm");
|
||||
+ goto exit_dummy;
|
||||
+ }
|
||||
+ } else {
|
||||
+ err = s35390a_disable_test_mode(s35390a);
|
||||
+ if (err < 0) {
|
||||
+ dev_err(&client->dev, "error disabling test mode\n");
|
||||
+ goto exit_dummy;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ if (err_reset > 0 || s35390a_get_datetime(client, &tm) < 0)
|
||||
dev_warn(&client->dev, "clock needs to be set\n");
|
||||
|
||||
device_set_wakeup_capable(&client->dev, 1);
|
||||
@@ -462,6 +472,10 @@ static int s35390a_probe(struct i2c_client *client,
|
||||
err = PTR_ERR(s35390a->rtc);
|
||||
goto exit_dummy;
|
||||
}
|
||||
+
|
||||
+ if (status1 & S35390A_FLAG_INT2)
|
||||
+ rtc_update_irq(s35390a->rtc, 1, RTC_AF);
|
||||
+
|
||||
return 0;
|
||||
|
||||
exit_dummy:
|
||||
--
|
||||
2.8.1
|
||||
|
|
@ -1,35 +0,0 @@
|
|||
From: Ben Hutchings <ben@decadent.org.uk>
|
||||
Date: Mon, 04 Apr 2016 12:53:35 +0100
|
||||
Subject: scripts: Fix X.509 PEM support in sign-file
|
||||
Forwarded: http://mid.gmane.org/20160517132056.GD7555@decadent.org.uk
|
||||
|
||||
sign-file originally required the X.509 certificate to be in DER
|
||||
format, but now has a fallback to PEM format. It expects BIO_reset()
|
||||
to return 1 on success, but:
|
||||
|
||||
BIO_reset() normally returns 1 for success and 0 or -1 for failure.
|
||||
File BIOs are an exception, they return 0 for success and -1 for
|
||||
failure.
|
||||
|
||||
BIO_reset() also prints accumulated error messages, which we don't
|
||||
want when we're about to try a fallback, so drain them first.
|
||||
|
||||
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
|
||||
---
|
||||
--- a/scripts/sign-file.c
|
||||
+++ b/scripts/sign-file.c
|
||||
@@ -174,7 +174,13 @@ static X509 *read_x509(const char *x509_
|
||||
ERR(!b, "%s", x509_name);
|
||||
x509 = d2i_X509_bio(b, NULL); /* Binary encoded X.509 */
|
||||
if (!x509) {
|
||||
- ERR(BIO_reset(b) != 1, "%s", x509_name);
|
||||
+ /*
|
||||
+ * We want to hold onto the error messages in case
|
||||
+ * it's neither valid DER or PEM, but BIO_reset() will
|
||||
+ * print them immediately so we can't.
|
||||
+ */
|
||||
+ drain_openssl_errors();
|
||||
+ ERR(BIO_reset(b) != 0, "%s", x509_name);
|
||||
x509 = PEM_read_bio_X509(b, NULL, NULL,
|
||||
NULL); /* PEM encoded X.509 */
|
||||
if (x509)
|
|
@ -1,64 +0,0 @@
|
|||
From: Helge Deller <deller@gmx.de>
|
||||
Date: Fri, 19 Aug 2016 22:39:02 +0200
|
||||
Subject: [1/2] parisc: Fix automatic selection of cr16 clocksource
|
||||
Origin: https://git.kernel.org/linus/ae141830b118c3fb5b7eab6fa7c8ab7b7224b0a4
|
||||
|
||||
Commit 54b66800907 (parisc: Add native high-resolution sched_clock()
|
||||
implementation) added support to use the CPU-internal cr16 counters as reliable
|
||||
clocksource with the help of HAVE_UNSTABLE_SCHED_CLOCK.
|
||||
|
||||
Sadly the commit missed to remove the hack which prevented cr16 to become the
|
||||
default clocksource even on SMP systems.
|
||||
|
||||
Signed-off-by: Helge Deller <deller@gmx.de>
|
||||
Cc: stable@vger.kernel.org # 4.7+
|
||||
---
|
||||
arch/parisc/kernel/processor.c | 8 --------
|
||||
arch/parisc/kernel/time.c | 12 ------------
|
||||
2 files changed, 20 deletions(-)
|
||||
|
||||
--- a/arch/parisc/kernel/processor.c
|
||||
+++ b/arch/parisc/kernel/processor.c
|
||||
@@ -51,8 +51,6 @@ EXPORT_SYMBOL(_parisc_requires_coherency
|
||||
|
||||
DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data);
|
||||
|
||||
-extern int update_cr16_clocksource(void); /* from time.c */
|
||||
-
|
||||
/*
|
||||
** PARISC CPU driver - claim "device" and initialize CPU data structures.
|
||||
**
|
||||
@@ -228,12 +226,6 @@ static int processor_probe(struct parisc
|
||||
}
|
||||
#endif
|
||||
|
||||
- /* If we've registered more than one cpu,
|
||||
- * we'll use the jiffies clocksource since cr16
|
||||
- * is not synchronized between CPUs.
|
||||
- */
|
||||
- update_cr16_clocksource();
|
||||
-
|
||||
return 0;
|
||||
}
|
||||
|
||||
--- a/arch/parisc/kernel/time.c
|
||||
+++ b/arch/parisc/kernel/time.c
|
||||
@@ -220,18 +220,6 @@ static struct clocksource clocksource_cr
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
-int update_cr16_clocksource(void)
|
||||
-{
|
||||
- /* since the cr16 cycle counters are not synchronized across CPUs,
|
||||
- we'll check if we should switch to a safe clocksource: */
|
||||
- if (clocksource_cr16.rating != 0 && num_online_cpus() > 1) {
|
||||
- clocksource_change_rating(&clocksource_cr16, 0);
|
||||
- return 1;
|
||||
- }
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-
|
||||
void __init start_cpu_itimer(void)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
|
@ -1,38 +0,0 @@
|
|||
From: Helge Deller <deller@gmx.de>
|
||||
Date: Sat, 20 Aug 2016 11:51:38 +0200
|
||||
Subject: [2/2] parisc: Fix order of EREFUSED define in errno.h
|
||||
Origin: https://git.kernel.org/linus/3eb53b20d7bd1374598cfb1feaa081fcac0e76cd
|
||||
|
||||
When building gccgo in userspace, errno.h gets parsed and the go include file
|
||||
sysinfo.go is generated.
|
||||
|
||||
Since EREFUSED is defined to the same value as ECONNREFUSED, and ECONNREFUSED
|
||||
is defined later on in errno.h, this leads to go complaining that EREFUSED
|
||||
isn't defined yet.
|
||||
|
||||
Fix this trivial problem by moving the define of EREFUSED down after
|
||||
ECONNREFUSED in errno.h (and clean up the indenting while touching this line).
|
||||
|
||||
Signed-off-by: Helge Deller <deller@gmx.de>
|
||||
Cc: stable@vger.kernel.org
|
||||
---
|
||||
arch/parisc/include/uapi/asm/errno.h | 4 ++--
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/parisc/include/uapi/asm/errno.h b/arch/parisc/include/uapi/asm/errno.h
|
||||
index c0ae62520d15..274d5bc6ecce 100644
|
||||
--- a/arch/parisc/include/uapi/asm/errno.h
|
||||
+++ b/arch/parisc/include/uapi/asm/errno.h
|
||||
@@ -97,10 +97,10 @@
|
||||
#define ENOTCONN 235 /* Transport endpoint is not connected */
|
||||
#define ESHUTDOWN 236 /* Cannot send after transport endpoint shutdown */
|
||||
#define ETOOMANYREFS 237 /* Too many references: cannot splice */
|
||||
-#define EREFUSED ECONNREFUSED /* for HP's NFS apparently */
|
||||
#define ETIMEDOUT 238 /* Connection timed out */
|
||||
#define ECONNREFUSED 239 /* Connection refused */
|
||||
-#define EREMOTERELEASE 240 /* Remote peer released connection */
|
||||
+#define EREFUSED ECONNREFUSED /* for HP's NFS apparently */
|
||||
+#define EREMOTERELEASE 240 /* Remote peer released connection */
|
||||
#define EHOSTDOWN 241 /* Host is down */
|
||||
#define EHOSTUNREACH 242 /* No route to host */
|
||||
|
|
@ -6,14 +6,12 @@ Forwarded: no
|
|||
This reverts commit 05b41775e2edd69a83f592e3534930c934d4038e.
|
||||
It broke feature detection that was working just fine for us.
|
||||
---
|
||||
tools/perf/config/Makefile | 2 +-
|
||||
tools/perf/Makefile.config | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
|
||||
index 094ddae..9b8937c 100644
|
||||
--- a/tools/perf/config/Makefile
|
||||
+++ b/tools/perf/config/Makefile
|
||||
@@ -32,7 +32,7 @@ ifeq ($(ARCH),x86)
|
||||
--- a/tools/perf/Makefile.config
|
||||
+++ b/tools/perf/Makefile.config
|
||||
@@ -38,7 +38,7 @@ ifeq ($(ARCH),x86)
|
||||
LIBUNWIND_LIBS = -lunwind -lunwind-x86_64
|
||||
$(call detected,CONFIG_X86_64)
|
||||
else
|
||||
|
|
|
@ -1,57 +0,0 @@
|
|||
From: Ben Hutchings <ben@decadent.org.uk>
|
||||
Date: Thu, 18 Feb 2016 23:37:19 +0000
|
||||
Subject: [PATCH] Revert "perf tools, x86: Build perf on older user-space as
|
||||
well"
|
||||
Forwarded: no
|
||||
|
||||
This reverts commit eae7a755ee81129370c8f555b0d5672e6673735d.
|
||||
The empty unistd_{32,64}.h headers prevent building on sh, which also
|
||||
now splits its unistd.h this way.
|
||||
|
||||
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
|
||||
---
|
||||
tools/perf/perf-sys.h | 6 ------
|
||||
tools/perf/util/include/asm/unistd_32.h | 1 -
|
||||
tools/perf/util/include/asm/unistd_64.h | 1 -
|
||||
3 files changed, 8 deletions(-)
|
||||
delete mode 100644 tools/perf/util/include/asm/unistd_32.h
|
||||
delete mode 100644 tools/perf/util/include/asm/unistd_64.h
|
||||
|
||||
diff --git a/tools/perf/perf-sys.h b/tools/perf/perf-sys.h
|
||||
index 83a25cef82fd..182a84eb5bd6 100644
|
||||
--- a/tools/perf/perf-sys.h
|
||||
+++ b/tools/perf/perf-sys.h
|
||||
@@ -11,9 +11,6 @@
|
||||
#if defined(__i386__)
|
||||
#define cpu_relax() asm volatile("rep; nop" ::: "memory");
|
||||
#define CPUINFO_PROC {"model name"}
|
||||
-#ifndef __NR_perf_event_open
|
||||
-# define __NR_perf_event_open 336
|
||||
-#endif
|
||||
#ifndef __NR_futex
|
||||
# define __NR_futex 240
|
||||
#endif
|
||||
@@ -25,9 +22,6 @@
|
||||
#if defined(__x86_64__)
|
||||
#define cpu_relax() asm volatile("rep; nop" ::: "memory");
|
||||
#define CPUINFO_PROC {"model name"}
|
||||
-#ifndef __NR_perf_event_open
|
||||
-# define __NR_perf_event_open 298
|
||||
-#endif
|
||||
#ifndef __NR_futex
|
||||
# define __NR_futex 202
|
||||
#endif
|
||||
diff --git a/tools/perf/util/include/asm/unistd_32.h b/tools/perf/util/include/asm/unistd_32.h
|
||||
deleted file mode 100644
|
||||
index 8b137891791f..000000000000
|
||||
--- a/tools/perf/util/include/asm/unistd_32.h
|
||||
+++ /dev/null
|
||||
@@ -1 +0,0 @@
|
||||
-
|
||||
diff --git a/tools/perf/util/include/asm/unistd_64.h b/tools/perf/util/include/asm/unistd_64.h
|
||||
deleted file mode 100644
|
||||
index 8b137891791f..000000000000
|
||||
--- a/tools/perf/util/include/asm/unistd_64.h
|
||||
+++ /dev/null
|
||||
@@ -1 +0,0 @@
|
||||
-
|
|
@ -7,7 +7,7 @@ Forwarded: not-needed
|
|||
|
||||
--- a/.gitignore
|
||||
+++ b/.gitignore
|
||||
@@ -52,22 +52,11 @@ Module.symvers
|
||||
@@ -53,23 +53,11 @@ Module.symvers
|
||||
/Module.markers
|
||||
|
||||
#
|
||||
|
@ -25,12 +25,13 @@ Forwarded: not-needed
|
|||
-#
|
||||
-!.gitignore
|
||||
-!.mailmap
|
||||
-!.cocciconfig
|
||||
-
|
||||
-#
|
||||
# Generated include files
|
||||
#
|
||||
include/config
|
||||
@@ -112,3 +101,10 @@ all.config
|
||||
@@ -114,3 +102,10 @@ all.config
|
||||
|
||||
# Kdevelop4
|
||||
*.kdev4
|
||||
|
|
|
@ -57,9 +57,9 @@ use of $(ARCH) needs to be moved after this.
|
|||
KCONFIG_CONFIG ?= .config
|
||||
export KCONFIG_CONFIG
|
||||
|
||||
@@ -371,6 +335,44 @@ AFLAGS_KERNEL =
|
||||
CFLAGS_GCOV = -fprofile-arcs -ftest-coverage -fno-tree-loop-im -Wno-maybe-uninitialized
|
||||
CFLAGS_KCOV = -fsanitize-coverage=trace-pc
|
||||
@@ -373,6 +337,44 @@ LDFLAGS_vmlinux =
|
||||
CFLAGS_GCOV = -fprofile-arcs -ftest-coverage -fno-tree-loop-im
|
||||
CFLAGS_KCOV := $(call cc-option,-fsanitize-coverage=trace-pc,)
|
||||
|
||||
+-include $(obj)/.kernelvariables
|
||||
+
|
||||
|
|
|
@ -9,7 +9,7 @@ Forwarded: not-needed
|
|||
|
||||
--- a/arch/powerpc/boot/Makefile
|
||||
+++ b/arch/powerpc/boot/Makefile
|
||||
@@ -204,7 +204,6 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp
|
||||
@@ -221,7 +221,6 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp
|
||||
image-$(CONFIG_PPC_EFIKA) += zImage.chrp
|
||||
image-$(CONFIG_PPC_PMAC) += zImage.pmac
|
||||
image-$(CONFIG_PPC_HOLLY) += dtbImage.holly
|
||||
|
@ -17,7 +17,7 @@ Forwarded: not-needed
|
|||
image-$(CONFIG_EPAPR_BOOT) += zImage.epapr
|
||||
|
||||
#
|
||||
@@ -262,23 +261,6 @@ image-$(CONFIG_MPC834x_MDS) += cuImage.
|
||||
@@ -280,23 +279,6 @@ image-$(CONFIG_MPC834x_MDS) += cuImage.
|
||||
image-$(CONFIG_MPC836x_MDS) += cuImage.mpc836x_mds
|
||||
image-$(CONFIG_ASP834x) += dtbImage.asp834x-redboot
|
||||
|
||||
|
@ -38,6 +38,6 @@ Forwarded: not-needed
|
|||
-image-$(CONFIG_SBC8548) += cuImage.sbc8548
|
||||
-image-$(CONFIG_KSI8560) += cuImage.ksi8560
|
||||
-
|
||||
# Board ports in arch/powerpc/platform/embedded6xx/Kconfig
|
||||
image-$(CONFIG_STORCENTER) += cuImage.storcenter
|
||||
image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2
|
||||
# Board ports in arch/powerpc/platform/86xx/Kconfig
|
||||
image-$(CONFIG_MVME7100) += dtbImage.mvme7100
|
||||
|
||||
|
|
|
@ -9,8 +9,8 @@ are set.
|
|||
|
||||
--- a/Makefile
|
||||
+++ b/Makefile
|
||||
@@ -1019,7 +1019,7 @@ endif
|
||||
prepare2: prepare3 outputmakefile asm-generic
|
||||
@@ -1004,7 +1004,7 @@ endif
|
||||
prepare2: prepare3 prepare-compiler-check outputmakefile asm-generic
|
||||
|
||||
prepare1: prepare2 $(version_h) include/generated/utsrelease.h \
|
||||
- include/config/auto.conf
|
||||
|
@ -18,7 +18,7 @@ are set.
|
|||
$(cmd_crmodverdir)
|
||||
$(Q)test -e include/generated/autoksyms.h || \
|
||||
touch include/generated/autoksyms.h
|
||||
@@ -1068,6 +1068,16 @@ define filechk_version.h
|
||||
@@ -1079,6 +1079,16 @@ define filechk_version.h
|
||||
echo '#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))';)
|
||||
endef
|
||||
|
||||
|
@ -35,7 +35,7 @@ are set.
|
|||
$(version_h): $(srctree)/Makefile FORCE
|
||||
$(call filechk,version.h)
|
||||
$(Q)rm -f $(old_version_h)
|
||||
@@ -1075,6 +1085,9 @@ $(version_h): $(srctree)/Makefile FORCE
|
||||
@@ -1086,6 +1096,9 @@ $(version_h): $(srctree)/Makefile FORCE
|
||||
include/generated/utsrelease.h: include/config/kernel.release FORCE
|
||||
$(call filechk,utsrelease.h)
|
||||
|
||||
|
@ -99,7 +99,7 @@ are set.
|
|||
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/io.h>
|
||||
@@ -1286,8 +1287,9 @@ void show_regs(struct pt_regs * regs)
|
||||
@@ -1309,8 +1310,9 @@ void show_regs(struct pt_regs * regs)
|
||||
|
||||
printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
|
||||
regs->nip, regs->link, regs->ctr);
|
||||
|
@ -113,15 +113,15 @@ are set.
|
|||
printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
|
||||
--- a/kernel/printk/printk.c
|
||||
+++ b/kernel/printk/printk.c
|
||||
@@ -46,6 +46,7 @@
|
||||
@@ -45,6 +45,7 @@
|
||||
#include <linux/utsname.h>
|
||||
#include <linux/ctype.h>
|
||||
#include <linux/uio.h>
|
||||
+#include <generated/package.h>
|
||||
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm-generic/sections.h>
|
||||
@@ -3153,11 +3154,12 @@ void __init dump_stack_set_arch_desc(con
|
||||
#include <asm/sections.h>
|
||||
@@ -3291,11 +3292,12 @@ void __init dump_stack_set_arch_desc(con
|
||||
*/
|
||||
void dump_stack_print_info(const char *log_lvl)
|
||||
{
|
||||
|
|
|
@ -22,7 +22,7 @@ Signed-off-by: Linn Crosetto <linn@hpe.com>
|
|||
|
||||
--- a/arch/x86/kernel/setup.c
|
||||
+++ b/arch/x86/kernel/setup.c
|
||||
@@ -1145,6 +1145,12 @@ void __init setup_arch(char **cmdline_p)
|
||||
@@ -1155,6 +1155,12 @@ void __init setup_arch(char **cmdline_p)
|
||||
/* Allocate bigger log buffer */
|
||||
setup_log_buf(1);
|
||||
|
||||
|
@ -34,8 +34,8 @@ Signed-off-by: Linn Crosetto <linn@hpe.com>
|
|||
+
|
||||
reserve_initrd();
|
||||
|
||||
early_initrd_acpi_init();
|
||||
@@ -1153,12 +1159,6 @@ void __init setup_arch(char **cmdline_p)
|
||||
acpi_table_upgrade();
|
||||
@@ -1163,12 +1169,6 @@ void __init setup_arch(char **cmdline_p)
|
||||
|
||||
io_delay_init();
|
||||
|
||||
|
@ -50,15 +50,15 @@ Signed-off-by: Linn Crosetto <linn@hpe.com>
|
|||
*/
|
||||
--- a/drivers/acpi/tables.c
|
||||
+++ b/drivers/acpi/tables.c
|
||||
@@ -34,6 +34,7 @@
|
||||
#include <linux/bootmem.h>
|
||||
#include <linux/earlycpio.h>
|
||||
@@ -36,6 +36,7 @@
|
||||
#include <linux/memblock.h>
|
||||
#include <linux/initrd.h>
|
||||
#include <linux/acpi.h>
|
||||
+#include <linux/security.h>
|
||||
#include "internal.h"
|
||||
|
||||
#ifdef CONFIG_ACPI_CUSTOM_DSDT
|
||||
@@ -539,6 +540,12 @@ static void __init acpi_table_initrd_ini
|
||||
@@ -543,6 +544,12 @@ void __init acpi_table_upgrade(void)
|
||||
if (table_nr == 0)
|
||||
return;
|
||||
|
||||
|
@ -69,5 +69,5 @@ Signed-off-by: Linn Crosetto <linn@hpe.com>
|
|||
+ }
|
||||
+
|
||||
acpi_tables_addr =
|
||||
memblock_find_in_range(0, max_low_pfn_mapped << PAGE_SHIFT,
|
||||
memblock_find_in_range(0, ACPI_TABLE_UPGRADE_MAX_PHYS,
|
||||
all_tables_size, PAGE_SIZE);
|
||||
|
|
|
@ -22,7 +22,7 @@ Signed-off-by: Linn Crosetto <linn@hpe.com>
|
|||
|
||||
--- a/arch/arm64/Kconfig
|
||||
+++ b/arch/arm64/Kconfig
|
||||
@@ -953,6 +953,19 @@ config EFI
|
||||
@@ -972,6 +972,19 @@ config EFI
|
||||
allow the kernel to be booted as an EFI application. This
|
||||
is only useful on systems that have UEFI firmware.
|
||||
|
||||
|
@ -67,7 +67,7 @@ Signed-off-by: Linn Crosetto <linn@hpe.com>
|
|||
|
||||
--- a/drivers/firmware/efi/efi.c
|
||||
+++ b/drivers/firmware/efi/efi.c
|
||||
@@ -482,7 +482,8 @@ static __initdata struct {
|
||||
@@ -580,7 +580,8 @@ static __initdata struct params fdt_para
|
||||
UEFI_PARAM("MemMap Address", "linux,uefi-mmap-start", mmap),
|
||||
UEFI_PARAM("MemMap Size", "linux,uefi-mmap-size", mmap_size),
|
||||
UEFI_PARAM("MemMap Desc. Size", "linux,uefi-mmap-desc-size", desc_size),
|
||||
|
@ -76,7 +76,7 @@ Signed-off-by: Linn Crosetto <linn@hpe.com>
|
|||
+ UEFI_PARAM("Secure Boot Enabled", "linux,uefi-secure-boot", secure_boot)
|
||||
};
|
||||
|
||||
struct param_info {
|
||||
static __initdata struct params xen_fdt_params[] = {
|
||||
--- a/drivers/firmware/efi/libstub/arm-stub.c
|
||||
+++ b/drivers/firmware/efi/libstub/arm-stub.c
|
||||
@@ -20,7 +20,7 @@
|
||||
|
@ -114,7 +114,7 @@ Signed-off-by: Linn Crosetto <linn@hpe.com>
|
|||
fdt_set_fail:
|
||||
--- a/include/linux/efi.h
|
||||
+++ b/include/linux/efi.h
|
||||
@@ -745,6 +745,7 @@ struct efi_fdt_params {
|
||||
@@ -687,6 +687,7 @@ struct efi_fdt_params {
|
||||
u32 mmap_size;
|
||||
u32 desc_size;
|
||||
u32 desc_ver;
|
||||
|
|
|
@ -18,7 +18,7 @@ Signed-off-by: Matthew Garrett <mjg59@srcf.ucam.org>
|
|||
|
||||
--- a/drivers/pci/pci-sysfs.c
|
||||
+++ b/drivers/pci/pci-sysfs.c
|
||||
@@ -711,6 +711,9 @@ static ssize_t pci_write_config(struct f
|
||||
@@ -716,6 +716,9 @@ static ssize_t pci_write_config(struct f
|
||||
loff_t init_off = off;
|
||||
u8 *data = (u8 *) buf;
|
||||
|
||||
|
@ -28,7 +28,7 @@ Signed-off-by: Matthew Garrett <mjg59@srcf.ucam.org>
|
|||
if (off > dev->cfg_size)
|
||||
return 0;
|
||||
if (off + count > dev->cfg_size) {
|
||||
@@ -998,6 +1001,9 @@ static int pci_mmap_resource(struct kobj
|
||||
@@ -1007,6 +1010,9 @@ static int pci_mmap_resource(struct kobj
|
||||
resource_size_t start, end;
|
||||
int i;
|
||||
|
||||
|
@ -38,7 +38,7 @@ Signed-off-by: Matthew Garrett <mjg59@srcf.ucam.org>
|
|||
for (i = 0; i < PCI_ROM_RESOURCE; i++)
|
||||
if (res == &pdev->resource[i])
|
||||
break;
|
||||
@@ -1098,6 +1104,9 @@ static ssize_t pci_write_resource_io(str
|
||||
@@ -1106,6 +1112,9 @@ static ssize_t pci_write_resource_io(str
|
||||
struct bin_attribute *attr, char *buf,
|
||||
loff_t off, size_t count)
|
||||
{
|
||||
|
@ -80,7 +80,7 @@ Signed-off-by: Matthew Garrett <mjg59@srcf.ucam.org>
|
|||
ret = pci_domain_nr(dev->bus);
|
||||
@@ -233,7 +240,7 @@ static int proc_bus_pci_mmap(struct file
|
||||
struct pci_filp_private *fpriv = file->private_data;
|
||||
int i, ret;
|
||||
int i, ret, write_combine;
|
||||
|
||||
- if (!capable(CAP_SYS_RAWIO))
|
||||
+ if (!capable(CAP_SYS_RAWIO) || (get_securelevel() > 0))
|
||||
|
|
|
@ -1,139 +0,0 @@
|
|||
|
||||
Taken from the Linux Tegra tree. Patch has been accepted for 4.8-rc1
|
||||
|
||||
Origin: https://git.kernel.org/cgit/linux/kernel/git/tegra/linux.git/log/?h=for-4.8/arm64/dt
|
||||
|
||||
|
||||
commit 7596723ecd54456da4b8bc5afc4a961aa09bd34b
|
||||
Author: Thierry Reding <treding@nvidia.com>
|
||||
Date: Mon Nov 23 16:21:43 2015 +0100
|
||||
|
||||
arm64: tegra: Add DSI panel on Jetson TX1
|
||||
|
||||
Some variants of the Jetson TX1 ship with a 8.0" WUXGA TFT LCD panel
|
||||
connected via four DSI lanes.
|
||||
|
||||
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts
|
||||
index 683b339..983775e 100644
|
||||
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts
|
||||
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts
|
||||
@@ -6,4 +6,49 @@
|
||||
/ {
|
||||
model = "NVIDIA Jetson TX1 Developer Kit";
|
||||
compatible = "nvidia,p2371-2180", "nvidia,tegra210";
|
||||
+
|
||||
+ host1x@50000000 {
|
||||
+ dsi@54300000 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ avdd-dsi-csi-supply = <&vdd_dsi_csi>;
|
||||
+
|
||||
+ panel@0 {
|
||||
+ compatible = "auo,b080uan01";
|
||||
+ reg = <0>;
|
||||
+
|
||||
+ enable-gpios = <&gpio TEGRA_GPIO(V, 2)
|
||||
+ GPIO_ACTIVE_HIGH>;
|
||||
+ power-supply = <&vdd_5v0_io>;
|
||||
+ backlight = <&backlight>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ i2c@7000c400 {
|
||||
+ backlight: backlight@2c {
|
||||
+ compatible = "ti,lp8557";
|
||||
+ reg = <0x2c>;
|
||||
+
|
||||
+ dev-ctrl = /bits/ 8 <0x80>;
|
||||
+ init-brt = /bits/ 8 <0xff>;
|
||||
+
|
||||
+ pwm-period = <29334>;
|
||||
+
|
||||
+ pwms = <&pwm 0 29334>;
|
||||
+ pwm-names = "lp8557";
|
||||
+
|
||||
+ /* 3 LED string */
|
||||
+ rom_14h {
|
||||
+ rom-addr = /bits/ 8 <0x14>;
|
||||
+ rom-val = /bits/ 8 <0x87>;
|
||||
+ };
|
||||
+
|
||||
+ /* boost frequency 1 MHz */
|
||||
+ rom_13h {
|
||||
+ rom-addr = /bits/ 8 <0x13>;
|
||||
+ rom-val = /bits/ 8 <0x01>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
|
||||
index b28aff5..78a16a5 100644
|
||||
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
|
||||
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
|
||||
@@ -1261,6 +1261,23 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ pwm@7000a000 {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ i2c@7000c400 {
|
||||
+ status = "okay";
|
||||
+ clock-frequency = <100000>;
|
||||
+
|
||||
+ exp1: gpio@74 {
|
||||
+ compatible = "ti,tca9539";
|
||||
+ reg = <0x74>;
|
||||
+
|
||||
+ #gpio-cells = <2>;
|
||||
+ gpio-controller;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
/* MMC/SD */
|
||||
sdhci@700b0000 {
|
||||
status = "okay";
|
||||
@@ -1340,6 +1357,39 @@
|
||||
regulator-enable-ramp-delay = <472>;
|
||||
regulator-disable-ramp-delay = <4880>;
|
||||
};
|
||||
+
|
||||
+ vdd_dsi_csi: regulator@5 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ reg = <5>;
|
||||
+ regulator-name = "AVDD_DSI_CSI_1V2";
|
||||
+ regulator-min-microvolt = <1200000>;
|
||||
+ regulator-max-microvolt = <1200000>;
|
||||
+ vin-supply = <&vdd_sys_1v2>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_3v3_dis: regulator@6 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ reg = <6>;
|
||||
+ regulator-name = "VDD_DIS_3V3_LCD";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ vin-supply = <&vdd_3v3_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_1v8_dis: regulator@7 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ reg = <7>;
|
||||
+ regulator-name = "VDD_LCD_1V8_DIS";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ gpio = <&exp1 14 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ vin-supply = <&vdd_1v8>;
|
||||
+ };
|
||||
};
|
||||
|
||||
gpio-keys {
|
|
@ -1,351 +0,0 @@
|
|||
|
||||
Taken from the Linux Tegra tree. Patch has been accepted for 4.8-rc1
|
||||
|
||||
Origin: https://git.kernel.org/cgit/linux/kernel/git/tegra/linux.git/log/?h=for-4.8/arm64/dt
|
||||
|
||||
|
||||
commit 77934269438e1a4a32f1b9a357f39422f58dcf89
|
||||
Author: Thierry Reding <treding@nvidia.com>
|
||||
Date: Mon Nov 23 16:20:35 2015 +0100
|
||||
|
||||
arm64: tegra: Add PMIC support on Jetson TX1
|
||||
|
||||
Add a device tree node for the MAX77620 PMIC found on the p2180
|
||||
processor module (Jetson TX1). Also add supporting power supplies,
|
||||
such as the main 5 V system supply.
|
||||
|
||||
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
|
||||
index 316c92c..8335bbe 100644
|
||||
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
|
||||
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
|
||||
@@ -1,3 +1,5 @@
|
||||
+#include <dt-bindings/mfd/max77620.h>
|
||||
+
|
||||
#include "tegra210.dtsi"
|
||||
|
||||
/ {
|
||||
@@ -5,6 +7,7 @@
|
||||
compatible = "nvidia,p2180", "nvidia,tegra210";
|
||||
|
||||
aliases {
|
||||
+ rtc0 = "/i2c@7000d000/pmic@3c";
|
||||
rtc1 = "/rtc@7000e000";
|
||||
serial0 = &uarta;
|
||||
};
|
||||
@@ -19,6 +22,248 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+ i2c@7000d000 {
|
||||
+ status = "okay";
|
||||
+ clock-frequency = <400000>;
|
||||
+
|
||||
+ pmic: pmic@3c {
|
||||
+ compatible = "maxim,max77620";
|
||||
+ reg = <0x3c>;
|
||||
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+
|
||||
+ #interrupt-cells = <2>;
|
||||
+ interrupt-controller;
|
||||
+
|
||||
+ #gpio-cells = <2>;
|
||||
+ gpio-controller;
|
||||
+
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&max77620_default>;
|
||||
+
|
||||
+ max77620_default: pinmux {
|
||||
+ gpio0 {
|
||||
+ pins = "gpio0";
|
||||
+ function = "gpio";
|
||||
+ };
|
||||
+
|
||||
+ gpio1 {
|
||||
+ pins = "gpio1";
|
||||
+ function = "fps-out";
|
||||
+ drive-push-pull = <1>;
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
|
||||
+ maxim,active-fps-power-up-slot = <7>;
|
||||
+ maxim,active-fps-power-down-slot = <0>;
|
||||
+ };
|
||||
+
|
||||
+ gpio2_3 {
|
||||
+ pins = "gpio2", "gpio3";
|
||||
+ function = "fps-out";
|
||||
+ drive-open-drain = <1>;
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
|
||||
+ };
|
||||
+
|
||||
+ gpio4 {
|
||||
+ pins = "gpio4";
|
||||
+ function = "32k-out1";
|
||||
+ };
|
||||
+
|
||||
+ gpio5_6_7 {
|
||||
+ pins = "gpio5", "gpio6", "gpio7";
|
||||
+ function = "gpio";
|
||||
+ drive-push-pull = <1>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fps {
|
||||
+ fps0 {
|
||||
+ maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
|
||||
+ maxim,suspend-fps-time-period-us = <1280>;
|
||||
+ };
|
||||
+
|
||||
+ fps1 {
|
||||
+ maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
|
||||
+ maxim,suspend-fps-time-period-us = <1280>;
|
||||
+ };
|
||||
+
|
||||
+ fps2 {
|
||||
+ maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ regulators {
|
||||
+ in-ldo0-1-supply = <&vdd_pre>;
|
||||
+ in-ldo7-8-supply = <&vdd_pre>;
|
||||
+ in-sd3-supply = <&vdd_5v0_sys>;
|
||||
+
|
||||
+ vdd_soc: sd0 {
|
||||
+ regulator-name = "VDD_SOC";
|
||||
+ regulator-min-microvolt = <600000>;
|
||||
+ regulator-max-microvolt = <1400000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <146>;
|
||||
+ regulator-ramp-delay = <27500>;
|
||||
+
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_ddr: sd1 {
|
||||
+ regulator-name = "VDD_DDR_1V1_PMIC";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <130>;
|
||||
+ regulator-ramp-delay = <27500>;
|
||||
+
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_pre: sd2 {
|
||||
+ regulator-name = "VDD_PRE_REG_1V35";
|
||||
+ regulator-min-microvolt = <1350000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <176>;
|
||||
+ regulator-ramp-delay = <27500>;
|
||||
+
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_1v8: sd3 {
|
||||
+ regulator-name = "VDD_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <242>;
|
||||
+ regulator-ramp-delay = <27500>;
|
||||
+
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_sys_1v2: ldo0 {
|
||||
+ regulator-name = "AVDD_SYS_1V2";
|
||||
+ regulator-min-microvolt = <1200000>;
|
||||
+ regulator-max-microvolt = <1200000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <26>;
|
||||
+ regulator-ramp-delay = <100000>;
|
||||
+
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_pex_1v05: ldo1 {
|
||||
+ regulator-name = "VDD_PEX_1V05";
|
||||
+ regulator-min-microvolt = <1050000>;
|
||||
+ regulator-max-microvolt = <1050000>;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <22>;
|
||||
+ regulator-ramp-delay = <100000>;
|
||||
+
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
|
||||
+ };
|
||||
+
|
||||
+ vddio_sdmmc: ldo2 {
|
||||
+ regulator-name = "VDDIO_SDMMC";
|
||||
+ /*
|
||||
+ * Technically this supply should have
|
||||
+ * a supported range from 1.8 - 3.3 V.
|
||||
+ * However, that would cause the SDHCI
|
||||
+ * driver to request 2.7 V upon access
|
||||
+ * and that in turn will cause traffic
|
||||
+ * to be broken. Leave it at 3.3 V for
|
||||
+ * now.
|
||||
+ */
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <62>;
|
||||
+ regulator-ramp-delay = <100000>;
|
||||
+
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_cam_hv: ldo3 {
|
||||
+ regulator-name = "VDD_CAM_HV";
|
||||
+ regulator-min-microvolt = <2800000>;
|
||||
+ regulator-max-microvolt = <2800000>;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <50>;
|
||||
+ regulator-ramp-delay = <100000>;
|
||||
+
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_rtc: ldo4 {
|
||||
+ regulator-name = "VDD_RTC";
|
||||
+ regulator-min-microvolt = <850000>;
|
||||
+ regulator-max-microvolt = <850000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <22>;
|
||||
+ regulator-ramp-delay = <100000>;
|
||||
+
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_ts_hv: ldo5 {
|
||||
+ regulator-name = "VDD_TS_HV";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <62>;
|
||||
+ regulator-ramp-delay = <100000>;
|
||||
+
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_ts: ldo6 {
|
||||
+ regulator-name = "VDD_TS_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <36>;
|
||||
+ regulator-ramp-delay = <100000>;
|
||||
+
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
|
||||
+ maxim,active-fps-power-up-slot = <7>;
|
||||
+ maxim,active-fps-power-down-slot = <0>;
|
||||
+ };
|
||||
+
|
||||
+ avdd_1v05_pll: ldo7 {
|
||||
+ regulator-name = "AVDD_1V05_PLL";
|
||||
+ regulator-min-microvolt = <1050000>;
|
||||
+ regulator-max-microvolt = <1050000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <24>;
|
||||
+ regulator-ramp-delay = <100000>;
|
||||
+
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
|
||||
+ };
|
||||
+
|
||||
+ avdd_1v05: ldo8 {
|
||||
+ regulator-name = "AVDD_SATA_HDMI_DP_1V05";
|
||||
+ regulator-min-microvolt = <1050000>;
|
||||
+ regulator-max-microvolt = <1050000>;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <22>;
|
||||
+ regulator-ramp-delay = <100000>;
|
||||
+
|
||||
+ maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
pmc@7000e400 {
|
||||
nvidia,invert-interrupt;
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
|
||||
index a2480c0..27bb835 100644
|
||||
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
|
||||
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
|
||||
@@ -1270,6 +1270,61 @@
|
||||
cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
+ regulators {
|
||||
+ compatible = "simple-bus";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ vdd_sys_mux: regulator@0 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ reg = <0>;
|
||||
+ regulator-name = "VDD_SYS_MUX";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vdd_5v0_sys: regulator@1 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ reg = <1>;
|
||||
+ regulator-name = "VDD_5V0_SYS";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ vin-supply = <&vdd_sys_mux>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_3v3_sys: regulator@2 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ reg = <2>;
|
||||
+ regulator-name = "VDD_3V3_SYS";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ vin-supply = <&vdd_sys_mux>;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <160>;
|
||||
+ regulator-disable-ramp-delay = <10000>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_5v0_io: regulator@3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ reg = <3>;
|
||||
+ regulator-name = "VDD_5V0_IO_SYS";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
label = "gpio-keys";
|
|
@ -1,182 +0,0 @@
|
|||
|
||||
Taken from the Linux Tegra tree. Patch has been accepted for 4.8-rc1
|
||||
|
||||
Origin: https://git.kernel.org/cgit/linux/kernel/git/tegra/linux.git/log/?h=for-4.8/arm64/dt
|
||||
|
||||
|
||||
commit 4e07ac9076beb1341a919c55f3a080d4fe991882
|
||||
Author: Thierry Reding <treding@nvidia.com>
|
||||
Date: Thu Nov 12 11:28:35 2015 +0100
|
||||
|
||||
arm64: tegra: Add Tegra210 XUSB pad controller
|
||||
|
||||
Add a device tree node for the XUSB pad controller found on Tegra210.
|
||||
|
||||
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
|
||||
index 76fe31f..694228b 100644
|
||||
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
|
||||
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
|
||||
@@ -621,6 +621,161 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ padctl: padctl@7009f000 {
|
||||
+ compatible = "nvidia,tegra210-xusb-padctl";
|
||||
+ reg = <0x0 0x7009f000 0x0 0x1000>;
|
||||
+ resets = <&tegra_car 142>;
|
||||
+ reset-names = "padctl";
|
||||
+
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ pads {
|
||||
+ usb2 {
|
||||
+ clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>;
|
||||
+ clock-names = "trk";
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ lanes {
|
||||
+ usb2-0 {
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ usb2-1 {
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ usb2-2 {
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ usb2-3 {
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ hsic {
|
||||
+ clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>;
|
||||
+ clock-names = "trk";
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ lanes {
|
||||
+ hsic-0 {
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ hsic-1 {
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pcie {
|
||||
+ clocks = <&tegra_car TEGRA210_CLK_PLL_E>;
|
||||
+ clock-names = "pll";
|
||||
+ resets = <&tegra_car 205>;
|
||||
+ reset-names = "phy";
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ lanes {
|
||||
+ pcie-0 {
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ pcie-1 {
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ pcie-2 {
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ pcie-3 {
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ pcie-4 {
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ pcie-5 {
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ pcie-6 {
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sata {
|
||||
+ clocks = <&tegra_car TEGRA210_CLK_PLL_E>;
|
||||
+ clock-names = "pll";
|
||||
+ resets = <&tegra_car 204>;
|
||||
+ reset-names = "phy";
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ lanes {
|
||||
+ sata-0 {
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <0>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ports {
|
||||
+ usb2-0 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ usb2-1 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ usb2-2 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ usb2-3 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ hsic-0 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ usb3-0 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ usb3-1 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ usb3-2 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ usb3-3 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
sdhci@700b0000 {
|
||||
compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
|
||||
reg = <0x0 0x700b0000 0x0 0x200>;
|
|
@ -1,32 +0,0 @@
|
|||
|
||||
Taken from the Linux Tegra tree. Patch has been accepted for 4.8-rc1
|
||||
|
||||
Origin: https://git.kernel.org/cgit/linux/kernel/git/tegra/linux.git/log/?h=for-4.8/arm64/dt
|
||||
|
||||
|
||||
commit 5593eb76b602e3ab2d525cdeecd49c0978e3b0e6
|
||||
Author: Thierry Reding <treding@nvidia.com>
|
||||
Date: Thu Jun 2 14:07:47 2016 +0200
|
||||
|
||||
arm64: tegra: Enable debug serial on Jetson TX1
|
||||
|
||||
Add a chosen node to the device tree that contains a stdout-path
|
||||
property which defines the debug serial port.
|
||||
|
||||
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
|
||||
index 8335bbe..5fda583 100644
|
||||
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
|
||||
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
|
||||
@@ -12,6 +12,10 @@
|
||||
serial0 = &uarta;
|
||||
};
|
||||
|
||||
+ chosen {
|
||||
+ stdout-path = "serial0:115200n8";
|
||||
+ };
|
||||
+
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x80000000 0x1 0x0>;
|
|
@ -1,198 +0,0 @@
|
|||
|
||||
Taken from the Linux Tegra tree. Patch has been accepted for 4.8-rc1
|
||||
|
||||
Origin: https://git.kernel.org/cgit/linux/kernel/git/tegra/linux.git/log/?h=for-4.8/arm64/dt
|
||||
|
||||
|
||||
commit d23e054c66ec3daa91ef4ea43d9a99ea65d4e8da
|
||||
Author: Thierry Reding <treding@nvidia.com>
|
||||
Date: Thu Jun 2 14:22:41 2016 +0200
|
||||
|
||||
arm64: tegra: Enable XUSB controller on Jetson TX1
|
||||
|
||||
Enable the XUSB controller on Jetson TX1. One of the USB 3.0 lanes goes
|
||||
to an internal ethernet interface, while a second USB 3.0 lane supports
|
||||
the USB-A receptacle on the I/O board.
|
||||
|
||||
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
|
||||
index 78a16a5..8bba178 100644
|
||||
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
|
||||
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
|
||||
@@ -1278,6 +1278,146 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ usb@70090000 {
|
||||
+ phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>,
|
||||
+ <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>,
|
||||
+ <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>,
|
||||
+ <&{/padctl@7009f000/pads/usb2/lanes/usb2-3}>,
|
||||
+ <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>,
|
||||
+ <&{/padctl@7009f000/pads/pcie/lanes/pcie-5}>;
|
||||
+ phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3", "usb3-0",
|
||||
+ "usb3-1";
|
||||
+
|
||||
+ dvddio-pex-supply = <&vdd_pex_1v05>;
|
||||
+ hvddio-pex-supply = <&vdd_1v8>;
|
||||
+ avdd-usb-supply = <&vdd_3v3_sys>;
|
||||
+ /* XXX what are these? */
|
||||
+ avdd-pll-utmip-supply = <&vdd_1v8>;
|
||||
+ avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
|
||||
+ dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>;
|
||||
+ hvdd-usb-ss-pll-e-supply = <&vdd_1v8>;
|
||||
+
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ padctl@7009f000 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ pads {
|
||||
+ usb2 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ lanes {
|
||||
+ usb2-0 {
|
||||
+ nvidia,function = "xusb";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ usb2-1 {
|
||||
+ nvidia,function = "xusb";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ usb2-2 {
|
||||
+ nvidia,function = "xusb";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ usb2-3 {
|
||||
+ nvidia,function = "xusb";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pcie {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ lanes {
|
||||
+ pcie-0 {
|
||||
+ nvidia,function = "pcie-x1";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ pcie-1 {
|
||||
+ nvidia,function = "pcie-x4";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ pcie-2 {
|
||||
+ nvidia,function = "pcie-x4";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ pcie-3 {
|
||||
+ nvidia,function = "pcie-x4";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ pcie-4 {
|
||||
+ nvidia,function = "pcie-x4";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ pcie-5 {
|
||||
+ nvidia,function = "usb3-ss";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ pcie-6 {
|
||||
+ nvidia,function = "usb3-ss";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sata {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ lanes {
|
||||
+ sata-0 {
|
||||
+ nvidia,function = "sata";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ports {
|
||||
+ usb2-0 {
|
||||
+ status = "okay";
|
||||
+ mode = "otg";
|
||||
+ };
|
||||
+
|
||||
+ usb2-1 {
|
||||
+ status = "okay";
|
||||
+ vbus-supply = <&vdd_5v0_rtl>;
|
||||
+ mode = "host";
|
||||
+ };
|
||||
+
|
||||
+ usb2-2 {
|
||||
+ status = "okay";
|
||||
+ vbus-supply = <&vdd_usb_vbus>;
|
||||
+ mode = "host";
|
||||
+ };
|
||||
+
|
||||
+ usb2-3 {
|
||||
+ status = "okay";
|
||||
+ mode = "host";
|
||||
+ };
|
||||
+
|
||||
+ usb3-0 {
|
||||
+ nvidia,usb2-companion = <1>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ usb3-1 {
|
||||
+ nvidia,usb2-companion = <2>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
/* MMC/SD */
|
||||
sdhci@700b0000 {
|
||||
status = "okay";
|
||||
@@ -1390,6 +1530,28 @@
|
||||
enable-active-high;
|
||||
vin-supply = <&vdd_1v8>;
|
||||
};
|
||||
+
|
||||
+ vdd_5v0_rtl: regulator@8 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ reg = <8>;
|
||||
+ regulator-name = "RTL_5V";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ gpio = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ vin-supply = <&vdd_5v0_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vdd_usb_vbus: regulator@9 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ reg = <9>;
|
||||
+ regulator-name = "USB_VBUS_EN1";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ gpio = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ vin-supply = <&vdd_5v0_sys>;
|
||||
+ };
|
||||
};
|
||||
|
||||
gpio-keys {
|
|
@ -1,53 +0,0 @@
|
|||
|
||||
Taken from the Linux Tegra tree. Patch has been accepted for 4.8-rc1
|
||||
|
||||
Origin: https://git.kernel.org/cgit/linux/kernel/git/tegra/linux.git/log/?h=for-4.8/arm64/dt
|
||||
|
||||
|
||||
commit 6d5aef5b9517974a181d06b0bed4bc66b32f3660
|
||||
Author: Thierry Reding <treding@nvidia.com>
|
||||
Date: Fri Mar 4 15:26:47 2016 +0100
|
||||
|
||||
arm64: tegra: p2597: Add SDMMC power supplies
|
||||
|
||||
Add power supplies for the SD/MMC card slot. Note that vmmc-supply is
|
||||
currently restricted to 3.3 V because we don't support switching the
|
||||
mode yet.
|
||||
|
||||
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
|
||||
index 27bb835..b28aff5 100644
|
||||
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
|
||||
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
|
||||
@@ -1268,6 +1268,9 @@
|
||||
no-1-8-v;
|
||||
|
||||
cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
|
||||
+
|
||||
+ vqmmc-supply = <&vddio_sdmmc>;
|
||||
+ vmmc-supply = <&vdd_3v3_sd>;
|
||||
};
|
||||
|
||||
regulators {
|
||||
@@ -1323,6 +1326,20 @@
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
+
|
||||
+ vdd_3v3_sd: regulator@4 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ reg = <4>;
|
||||
+ regulator-name = "VDD_3V3_SD";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ gpio = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ vin-supply = <&vdd_3v3_sys>;
|
||||
+
|
||||
+ regulator-enable-ramp-delay = <472>;
|
||||
+ regulator-disable-ramp-delay = <4880>;
|
||||
+ };
|
||||
};
|
||||
|
||||
gpio-keys {
|
|
@ -1,295 +0,0 @@
|
|||
|
||||
Patch has been accepted for 4.8-rc1
|
||||
|
||||
|
||||
commit 02c5ba1ee99cd67b27f562c120ae659e8acadded
|
||||
Author: Laxman Dewangan <ldewangan@nvidia.com>
|
||||
Date: Fri May 13 10:49:14 2016 +0530
|
||||
|
||||
gpio: max77620: add gpio driver for MAX77620/MAX20024
|
||||
|
||||
MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO
|
||||
pins. It also supports interrupts from these pins.
|
||||
|
||||
Add GPIO driver for these pins to control via GPIO APIs.
|
||||
|
||||
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
|
||||
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
|
||||
index 48da857..9244381 100644
|
||||
--- a/drivers/gpio/Kconfig
|
||||
+++ b/drivers/gpio/Kconfig
|
||||
@@ -871,6 +871,15 @@ config GPIO_LP3943
|
||||
LP3943 can be used as a GPIO expander which provides up to 16 GPIOs.
|
||||
Open drain outputs are required for this usage.
|
||||
|
||||
+config GPIO_MAX77620
|
||||
+ tristate "GPIO support for PMIC MAX77620 and MAX20024"
|
||||
+ depends on MFD_MAX77620
|
||||
+ help
|
||||
+ GPIO driver for MAX77620 and MAX20024 PMIC from Maxim Semiconductor.
|
||||
+ MAX77620 PMIC has 8 pins that can be configured as GPIOs. The
|
||||
+ driver also provides interrupt support for each of the gpios.
|
||||
+ Say yes here to enable the max77620 to be used as gpio controller.
|
||||
+
|
||||
config GPIO_MSIC
|
||||
bool "Intel MSIC mixed signal gpio support"
|
||||
depends on MFD_INTEL_MSIC
|
||||
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
|
||||
index 991598e..6e111fc 100644
|
||||
--- a/drivers/gpio/Makefile
|
||||
+++ b/drivers/gpio/Makefile
|
||||
@@ -61,6 +61,7 @@ obj-$(CONFIG_GPIO_MAX730X) += gpio-max730x.o
|
||||
obj-$(CONFIG_GPIO_MAX7300) += gpio-max7300.o
|
||||
obj-$(CONFIG_GPIO_MAX7301) += gpio-max7301.o
|
||||
obj-$(CONFIG_GPIO_MAX732X) += gpio-max732x.o
|
||||
+obj-$(CONFIG_GPIO_MAX77620) += gpio-max77620.o
|
||||
obj-$(CONFIG_GPIO_MB86S7X) += gpio-mb86s7x.o
|
||||
obj-$(CONFIG_GPIO_MENZ127) += gpio-menz127.o
|
||||
obj-$(CONFIG_GPIO_MC33880) += gpio-mc33880.o
|
||||
diff --git a/drivers/gpio/gpio-max77620.c b/drivers/gpio/gpio-max77620.c
|
||||
new file mode 100644
|
||||
index 0000000..d927562
|
||||
--- /dev/null
|
||||
+++ b/drivers/gpio/gpio-max77620.c
|
||||
@@ -0,0 +1,238 @@
|
||||
+/*
|
||||
+ * MAXIM MAX77620 GPIO driver
|
||||
+ *
|
||||
+ * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify it
|
||||
+ * under the terms and conditions of the GNU General Public License,
|
||||
+ * version 2, as published by the Free Software Foundation.
|
||||
+ */
|
||||
+
|
||||
+#include <linux/gpio/driver.h>
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <linux/mfd/max77620.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/regmap.h>
|
||||
+
|
||||
+#define GPIO_REG_ADDR(offset) (MAX77620_REG_GPIO0 + offset)
|
||||
+
|
||||
+struct max77620_gpio {
|
||||
+ struct gpio_chip gpio_chip;
|
||||
+ struct regmap *rmap;
|
||||
+ struct device *dev;
|
||||
+ int gpio_irq;
|
||||
+ int irq_base;
|
||||
+ int gpio_base;
|
||||
+};
|
||||
+
|
||||
+static const struct regmap_irq max77620_gpio_irqs[] = {
|
||||
+ REGMAP_IRQ_REG(0, 0, MAX77620_IRQ_LVL2_GPIO_EDGE0),
|
||||
+ REGMAP_IRQ_REG(1, 0, MAX77620_IRQ_LVL2_GPIO_EDGE1),
|
||||
+ REGMAP_IRQ_REG(2, 0, MAX77620_IRQ_LVL2_GPIO_EDGE2),
|
||||
+ REGMAP_IRQ_REG(3, 0, MAX77620_IRQ_LVL2_GPIO_EDGE3),
|
||||
+ REGMAP_IRQ_REG(4, 0, MAX77620_IRQ_LVL2_GPIO_EDGE4),
|
||||
+ REGMAP_IRQ_REG(5, 0, MAX77620_IRQ_LVL2_GPIO_EDGE5),
|
||||
+ REGMAP_IRQ_REG(6, 0, MAX77620_IRQ_LVL2_GPIO_EDGE6),
|
||||
+ REGMAP_IRQ_REG(7, 0, MAX77620_IRQ_LVL2_GPIO_EDGE7),
|
||||
+};
|
||||
+
|
||||
+static struct regmap_irq_chip max77620_gpio_irq_chip = {
|
||||
+ .name = "max77620-gpio",
|
||||
+ .irqs = max77620_gpio_irqs,
|
||||
+ .num_irqs = ARRAY_SIZE(max77620_gpio_irqs),
|
||||
+ .num_regs = 1,
|
||||
+ .irq_reg_stride = 1,
|
||||
+ .status_base = MAX77620_REG_IRQ_LVL2_GPIO,
|
||||
+};
|
||||
+
|
||||
+static int max77620_gpio_dir_input(struct gpio_chip *gc, unsigned int offset)
|
||||
+{
|
||||
+ struct max77620_gpio *mgpio = gpiochip_get_data(gc);
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
|
||||
+ MAX77620_CNFG_GPIO_DIR_MASK,
|
||||
+ MAX77620_CNFG_GPIO_DIR_INPUT);
|
||||
+ if (ret < 0)
|
||||
+ dev_err(mgpio->dev, "CNFG_GPIOx dir update failed: %d\n", ret);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int max77620_gpio_get(struct gpio_chip *gc, unsigned int offset)
|
||||
+{
|
||||
+ struct max77620_gpio *mgpio = gpiochip_get_data(gc);
|
||||
+ unsigned int val;
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = regmap_read(mgpio->rmap, GPIO_REG_ADDR(offset), &val);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(mgpio->dev, "CNFG_GPIOx read failed: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ return !!(val & MAX77620_CNFG_GPIO_INPUT_VAL_MASK);
|
||||
+}
|
||||
+
|
||||
+static int max77620_gpio_dir_output(struct gpio_chip *gc, unsigned int offset,
|
||||
+ int value)
|
||||
+{
|
||||
+ struct max77620_gpio *mgpio = gpiochip_get_data(gc);
|
||||
+ u8 val;
|
||||
+ int ret;
|
||||
+
|
||||
+ val = (value) ? MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH :
|
||||
+ MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW;
|
||||
+
|
||||
+ ret = regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
|
||||
+ MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK, val);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(mgpio->dev, "CNFG_GPIOx val update failed: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ret = regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
|
||||
+ MAX77620_CNFG_GPIO_DIR_MASK,
|
||||
+ MAX77620_CNFG_GPIO_DIR_OUTPUT);
|
||||
+ if (ret < 0)
|
||||
+ dev_err(mgpio->dev, "CNFG_GPIOx dir update failed: %d\n", ret);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int max77620_gpio_set_debounce(struct gpio_chip *gc,
|
||||
+ unsigned int offset,
|
||||
+ unsigned int debounce)
|
||||
+{
|
||||
+ struct max77620_gpio *mgpio = gpiochip_get_data(gc);
|
||||
+ u8 val;
|
||||
+ int ret;
|
||||
+
|
||||
+ switch (debounce) {
|
||||
+ case 0:
|
||||
+ val = MAX77620_CNFG_GPIO_DBNC_None;
|
||||
+ break;
|
||||
+ case 1 ... 8:
|
||||
+ val = MAX77620_CNFG_GPIO_DBNC_8ms;
|
||||
+ break;
|
||||
+ case 9 ... 16:
|
||||
+ val = MAX77620_CNFG_GPIO_DBNC_16ms;
|
||||
+ break;
|
||||
+ case 17 ... 32:
|
||||
+ val = MAX77620_CNFG_GPIO_DBNC_32ms;
|
||||
+ break;
|
||||
+ default:
|
||||
+ dev_err(mgpio->dev, "Illegal value %u\n", debounce);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ ret = regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
|
||||
+ MAX77620_CNFG_GPIO_DBNC_MASK, val);
|
||||
+ if (ret < 0)
|
||||
+ dev_err(mgpio->dev, "CNFG_GPIOx_DBNC update failed: %d\n", ret);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static void max77620_gpio_set(struct gpio_chip *gc, unsigned int offset,
|
||||
+ int value)
|
||||
+{
|
||||
+ struct max77620_gpio *mgpio = gpiochip_get_data(gc);
|
||||
+ u8 val;
|
||||
+ int ret;
|
||||
+
|
||||
+ val = (value) ? MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH :
|
||||
+ MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW;
|
||||
+
|
||||
+ ret = regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
|
||||
+ MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK, val);
|
||||
+ if (ret < 0)
|
||||
+ dev_err(mgpio->dev, "CNFG_GPIO_OUT update failed: %d\n", ret);
|
||||
+}
|
||||
+
|
||||
+static int max77620_gpio_to_irq(struct gpio_chip *gc, unsigned int offset)
|
||||
+{
|
||||
+ struct max77620_gpio *mgpio = gpiochip_get_data(gc);
|
||||
+ struct max77620_chip *chip = dev_get_drvdata(mgpio->dev->parent);
|
||||
+
|
||||
+ return regmap_irq_get_virq(chip->gpio_irq_data, offset);
|
||||
+}
|
||||
+
|
||||
+static int max77620_gpio_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct max77620_chip *chip = dev_get_drvdata(pdev->dev.parent);
|
||||
+ struct max77620_gpio *mgpio;
|
||||
+ int gpio_irq;
|
||||
+ int ret;
|
||||
+
|
||||
+ gpio_irq = platform_get_irq(pdev, 0);
|
||||
+ if (gpio_irq <= 0) {
|
||||
+ dev_err(&pdev->dev, "GPIO irq not available %d\n", gpio_irq);
|
||||
+ return -ENODEV;
|
||||
+ }
|
||||
+
|
||||
+ mgpio = devm_kzalloc(&pdev->dev, sizeof(*mgpio), GFP_KERNEL);
|
||||
+ if (!mgpio)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ mgpio->rmap = chip->rmap;
|
||||
+ mgpio->dev = &pdev->dev;
|
||||
+ mgpio->gpio_irq = gpio_irq;
|
||||
+
|
||||
+ mgpio->gpio_chip.label = pdev->name;
|
||||
+ mgpio->gpio_chip.parent = &pdev->dev;
|
||||
+ mgpio->gpio_chip.direction_input = max77620_gpio_dir_input;
|
||||
+ mgpio->gpio_chip.get = max77620_gpio_get;
|
||||
+ mgpio->gpio_chip.direction_output = max77620_gpio_dir_output;
|
||||
+ mgpio->gpio_chip.set_debounce = max77620_gpio_set_debounce;
|
||||
+ mgpio->gpio_chip.set = max77620_gpio_set;
|
||||
+ mgpio->gpio_chip.to_irq = max77620_gpio_to_irq;
|
||||
+ mgpio->gpio_chip.ngpio = MAX77620_GPIO_NR;
|
||||
+ mgpio->gpio_chip.can_sleep = 1;
|
||||
+ mgpio->gpio_chip.base = -1;
|
||||
+ mgpio->irq_base = -1;
|
||||
+#ifdef CONFIG_OF_GPIO
|
||||
+ mgpio->gpio_chip.of_node = pdev->dev.parent->of_node;
|
||||
+#endif
|
||||
+
|
||||
+ platform_set_drvdata(pdev, mgpio);
|
||||
+
|
||||
+ ret = devm_gpiochip_add_data(&pdev->dev, &mgpio->gpio_chip, mgpio);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(&pdev->dev, "gpio_init: Failed to add max77620_gpio\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ mgpio->gpio_base = mgpio->gpio_chip.base;
|
||||
+ ret = devm_regmap_add_irq_chip(&pdev->dev, chip->rmap, mgpio->gpio_irq,
|
||||
+ IRQF_ONESHOT, mgpio->irq_base,
|
||||
+ &max77620_gpio_irq_chip,
|
||||
+ &chip->gpio_irq_data);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(&pdev->dev, "Failed to add gpio irq_chip %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct platform_device_id max77620_gpio_devtype[] = {
|
||||
+ { .name = "max77620-gpio", },
|
||||
+ {},
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(platform, max77620_gpio_devtype);
|
||||
+
|
||||
+static struct platform_driver max77620_gpio_driver = {
|
||||
+ .driver.name = "max77620-gpio",
|
||||
+ .probe = max77620_gpio_probe,
|
||||
+ .id_table = max77620_gpio_devtype,
|
||||
+};
|
||||
+
|
||||
+module_platform_driver(max77620_gpio_driver);
|
||||
+
|
||||
+MODULE_DESCRIPTION("GPIO interface for MAX77620 and MAX20024 PMIC");
|
||||
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
|
||||
+MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
|
||||
+MODULE_ALIAS("platform:max77620-gpio");
|
||||
+MODULE_LICENSE("GPL v2");
|
|
@ -1,106 +0,0 @@
|
|||
|
||||
Patch has been accepted for 4.8-rc1
|
||||
|
||||
|
||||
commit ff93ec74966a84538a8129d7d8303a7f841a69c4
|
||||
Author: Laxman Dewangan <ldewangan@nvidia.com>
|
||||
Date: Tue May 24 18:43:44 2016 +0530
|
||||
|
||||
gpio: max77620: Configure interrupt trigger level
|
||||
|
||||
The GPIO sub modules of MAX77620 offers to configure the GPIO
|
||||
interrupt trigger level as RISING and FALLING edge.
|
||||
|
||||
Pass this information to regmap-irg when registering for GPIO
|
||||
interrupts.
|
||||
|
||||
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
diff --git a/drivers/gpio/gpio-max77620.c b/drivers/gpio/gpio-max77620.c
|
||||
index d927562..35f365c 100644
|
||||
--- a/drivers/gpio/gpio-max77620.c
|
||||
+++ b/drivers/gpio/gpio-max77620.c
|
||||
@@ -27,14 +27,62 @@ struct max77620_gpio {
|
||||
};
|
||||
|
||||
static const struct regmap_irq max77620_gpio_irqs[] = {
|
||||
- REGMAP_IRQ_REG(0, 0, MAX77620_IRQ_LVL2_GPIO_EDGE0),
|
||||
- REGMAP_IRQ_REG(1, 0, MAX77620_IRQ_LVL2_GPIO_EDGE1),
|
||||
- REGMAP_IRQ_REG(2, 0, MAX77620_IRQ_LVL2_GPIO_EDGE2),
|
||||
- REGMAP_IRQ_REG(3, 0, MAX77620_IRQ_LVL2_GPIO_EDGE3),
|
||||
- REGMAP_IRQ_REG(4, 0, MAX77620_IRQ_LVL2_GPIO_EDGE4),
|
||||
- REGMAP_IRQ_REG(5, 0, MAX77620_IRQ_LVL2_GPIO_EDGE5),
|
||||
- REGMAP_IRQ_REG(6, 0, MAX77620_IRQ_LVL2_GPIO_EDGE6),
|
||||
- REGMAP_IRQ_REG(7, 0, MAX77620_IRQ_LVL2_GPIO_EDGE7),
|
||||
+ [0] = {
|
||||
+ .mask = MAX77620_IRQ_LVL2_GPIO_EDGE0,
|
||||
+ .type_rising_mask = MAX77620_CNFG_GPIO_INT_RISING,
|
||||
+ .type_falling_mask = MAX77620_CNFG_GPIO_INT_FALLING,
|
||||
+ .reg_offset = 0,
|
||||
+ .type_reg_offset = 0,
|
||||
+ },
|
||||
+ [1] = {
|
||||
+ .mask = MAX77620_IRQ_LVL2_GPIO_EDGE1,
|
||||
+ .type_rising_mask = MAX77620_CNFG_GPIO_INT_RISING,
|
||||
+ .type_falling_mask = MAX77620_CNFG_GPIO_INT_FALLING,
|
||||
+ .reg_offset = 0,
|
||||
+ .type_reg_offset = 1,
|
||||
+ },
|
||||
+ [2] = {
|
||||
+ .mask = MAX77620_IRQ_LVL2_GPIO_EDGE2,
|
||||
+ .type_rising_mask = MAX77620_CNFG_GPIO_INT_RISING,
|
||||
+ .type_falling_mask = MAX77620_CNFG_GPIO_INT_FALLING,
|
||||
+ .reg_offset = 0,
|
||||
+ .type_reg_offset = 2,
|
||||
+ },
|
||||
+ [3] = {
|
||||
+ .mask = MAX77620_IRQ_LVL2_GPIO_EDGE3,
|
||||
+ .type_rising_mask = MAX77620_CNFG_GPIO_INT_RISING,
|
||||
+ .type_falling_mask = MAX77620_CNFG_GPIO_INT_FALLING,
|
||||
+ .reg_offset = 0,
|
||||
+ .type_reg_offset = 3,
|
||||
+ },
|
||||
+ [4] = {
|
||||
+ .mask = MAX77620_IRQ_LVL2_GPIO_EDGE4,
|
||||
+ .type_rising_mask = MAX77620_CNFG_GPIO_INT_RISING,
|
||||
+ .type_falling_mask = MAX77620_CNFG_GPIO_INT_FALLING,
|
||||
+ .reg_offset = 0,
|
||||
+ .type_reg_offset = 4,
|
||||
+ },
|
||||
+ [5] = {
|
||||
+ .mask = MAX77620_IRQ_LVL2_GPIO_EDGE5,
|
||||
+ .type_rising_mask = MAX77620_CNFG_GPIO_INT_RISING,
|
||||
+ .type_falling_mask = MAX77620_CNFG_GPIO_INT_FALLING,
|
||||
+ .reg_offset = 0,
|
||||
+ .type_reg_offset = 5,
|
||||
+ },
|
||||
+ [6] = {
|
||||
+ .mask = MAX77620_IRQ_LVL2_GPIO_EDGE6,
|
||||
+ .type_rising_mask = MAX77620_CNFG_GPIO_INT_RISING,
|
||||
+ .type_falling_mask = MAX77620_CNFG_GPIO_INT_FALLING,
|
||||
+ .reg_offset = 0,
|
||||
+ .type_reg_offset = 6,
|
||||
+ },
|
||||
+ [7] = {
|
||||
+ .mask = MAX77620_IRQ_LVL2_GPIO_EDGE7,
|
||||
+ .type_rising_mask = MAX77620_CNFG_GPIO_INT_RISING,
|
||||
+ .type_falling_mask = MAX77620_CNFG_GPIO_INT_FALLING,
|
||||
+ .reg_offset = 0,
|
||||
+ .type_reg_offset = 7,
|
||||
+ },
|
||||
};
|
||||
|
||||
static struct regmap_irq_chip max77620_gpio_irq_chip = {
|
||||
@@ -42,8 +90,11 @@ static struct regmap_irq_chip max77620_gpio_irq_chip = {
|
||||
.irqs = max77620_gpio_irqs,
|
||||
.num_irqs = ARRAY_SIZE(max77620_gpio_irqs),
|
||||
.num_regs = 1,
|
||||
+ .num_type_reg = 8,
|
||||
.irq_reg_stride = 1,
|
||||
+ .type_reg_stride = 1,
|
||||
.status_base = MAX77620_REG_IRQ_LVL2_GPIO,
|
||||
+ .type_base = MAX77620_REG_GPIO0,
|
||||
};
|
||||
|
||||
static int max77620_gpio_dir_input(struct gpio_chip *gc, unsigned int offset)
|
|
@ -1,34 +0,0 @@
|
|||
|
||||
Patch has been accepted for 4.8-rc1
|
||||
|
||||
|
||||
commit 1941b4419a24e026ce8354a2fd40c9387577697e
|
||||
Author: Venkat Reddy Talla <vreddytalla@nvidia.com>
|
||||
Date: Mon Jun 27 16:26:24 2016 +0530
|
||||
|
||||
gpio: max77620: get gpio value based on direction
|
||||
|
||||
Gpio direction is determined by DIRx bit of GPIO
|
||||
configuration register, return max77620 gpio value
|
||||
based on direction in or out.
|
||||
|
||||
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
|
||||
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
diff --git a/drivers/gpio/gpio-max77620.c b/drivers/gpio/gpio-max77620.c
|
||||
index 8658c32..b46b436 100644
|
||||
--- a/drivers/gpio/gpio-max77620.c
|
||||
+++ b/drivers/gpio/gpio-max77620.c
|
||||
@@ -123,7 +123,10 @@ static int max77620_gpio_get(struct gpio_chip *gc, unsigned int offset)
|
||||
return ret;
|
||||
}
|
||||
|
||||
- return !!(val & MAX77620_CNFG_GPIO_INPUT_VAL_MASK);
|
||||
+ if (val & MAX77620_CNFG_GPIO_DIR_MASK)
|
||||
+ return !!(val & MAX77620_CNFG_GPIO_INPUT_VAL_MASK);
|
||||
+ else
|
||||
+ return !!(val & MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK);
|
||||
}
|
||||
|
||||
static int max77620_gpio_dir_output(struct gpio_chip *gc, unsigned int offset,
|
|
@ -1,59 +0,0 @@
|
|||
|
||||
Patch has been accepted for 4.8-rc1
|
||||
|
||||
|
||||
commit 23087a05006057bbaa2c1f42163e45586dd77094
|
||||
Author: Laxman Dewangan <ldewangan@nvidia.com>
|
||||
Date: Tue May 24 18:43:46 2016 +0530
|
||||
|
||||
gpio: max77620: use the new open drain callback
|
||||
|
||||
The MAX77620 have a GPIO pins which can act as open drain or
|
||||
push pull mode. Implement support for controlling this from GPIO
|
||||
descriptor tables or other hardware descriptions such as
|
||||
device tree by implementing the .set_single_ended() callback.
|
||||
|
||||
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
diff --git a/drivers/gpio/gpio-max77620.c b/drivers/gpio/gpio-max77620.c
|
||||
index 35f365c..8658c32 100644
|
||||
--- a/drivers/gpio/gpio-max77620.c
|
||||
+++ b/drivers/gpio/gpio-max77620.c
|
||||
@@ -202,6 +202,28 @@ static void max77620_gpio_set(struct gpio_chip *gc, unsigned int offset,
|
||||
dev_err(mgpio->dev, "CNFG_GPIO_OUT update failed: %d\n", ret);
|
||||
}
|
||||
|
||||
+static int max77620_gpio_set_single_ended(struct gpio_chip *gc,
|
||||
+ unsigned int offset,
|
||||
+ enum single_ended_mode mode)
|
||||
+{
|
||||
+ struct max77620_gpio *mgpio = gpiochip_get_data(gc);
|
||||
+
|
||||
+ switch (mode) {
|
||||
+ case LINE_MODE_OPEN_DRAIN:
|
||||
+ return regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
|
||||
+ MAX77620_CNFG_GPIO_DRV_MASK,
|
||||
+ MAX77620_CNFG_GPIO_DRV_OPENDRAIN);
|
||||
+ case LINE_MODE_PUSH_PULL:
|
||||
+ return regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
|
||||
+ MAX77620_CNFG_GPIO_DRV_MASK,
|
||||
+ MAX77620_CNFG_GPIO_DRV_PUSHPULL);
|
||||
+ default:
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ return -ENOTSUPP;
|
||||
+}
|
||||
+
|
||||
static int max77620_gpio_to_irq(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
struct max77620_gpio *mgpio = gpiochip_get_data(gc);
|
||||
@@ -238,6 +260,7 @@ static int max77620_gpio_probe(struct platform_device *pdev)
|
||||
mgpio->gpio_chip.direction_output = max77620_gpio_dir_output;
|
||||
mgpio->gpio_chip.set_debounce = max77620_gpio_set_debounce;
|
||||
mgpio->gpio_chip.set = max77620_gpio_set;
|
||||
+ mgpio->gpio_chip.set_single_ended = max77620_gpio_set_single_ended;
|
||||
mgpio->gpio_chip.to_irq = max77620_gpio_to_irq;
|
||||
mgpio->gpio_chip.ngpio = MAX77620_GPIO_NR;
|
||||
mgpio->gpio_chip.can_sleep = 1;
|
|
@ -1,738 +0,0 @@
|
|||
|
||||
Patch has been accepted for 4.8-rc1
|
||||
|
||||
commit 2df723d49cdafb6ea97bf7768879c5197666d300
|
||||
Author: Laxman Dewangan <ldewangan@nvidia.com>
|
||||
Date: Fri May 13 10:49:15 2016 +0530
|
||||
|
||||
pinctrl: max77620: add pincontrol driver for MAX77620/MAX20024
|
||||
|
||||
MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO pins
|
||||
which also act as the special function in alternate mode. Also
|
||||
there is configuration like push-pull, open drain, FPS timing
|
||||
etc for these pins.
|
||||
|
||||
Add pin control driver to configure these parameters through
|
||||
pin control APIs.
|
||||
|
||||
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
|
||||
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
|
||||
index f06589c..ea25eee 100644
|
||||
--- a/drivers/pinctrl/Kconfig
|
||||
+++ b/drivers/pinctrl/Kconfig
|
||||
@@ -196,6 +196,16 @@ config PINCTRL_COH901
|
||||
COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
|
||||
ports of 8 GPIO pins each.
|
||||
|
||||
+config PINCTRL_MAX77620
|
||||
+ tristate "MAX77620/MAX20024 Pincontrol support"
|
||||
+ depends on MFD_MAX77620
|
||||
+ select GENERIC_PINCONF
|
||||
+ help
|
||||
+ Say Yes here to enable Pin control support for Maxim PMIC MAX77620.
|
||||
+ This PMIC has 8 GPIO pins that work as GPIO as well as special
|
||||
+ function in alternate mode. This driver also configure push-pull,
|
||||
+ open drain, FPS slots etc.
|
||||
+
|
||||
config PINCTRL_PALMAS
|
||||
bool "Pinctrl driver for the PALMAS Series MFD devices"
|
||||
depends on OF && MFD_PALMAS
|
||||
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
|
||||
index f678343..2ed0b3f 100644
|
||||
--- a/drivers/pinctrl/Makefile
|
||||
+++ b/drivers/pinctrl/Makefile
|
||||
@@ -16,6 +16,7 @@ obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o
|
||||
obj-$(CONFIG_PINCTRL_AMD) += pinctrl-amd.o
|
||||
obj-$(CONFIG_PINCTRL_DIGICOLOR) += pinctrl-digicolor.o
|
||||
obj-$(CONFIG_PINCTRL_FALCON) += pinctrl-falcon.o
|
||||
+obj-$(CONFIG_PINCTRL_MAX77620) += pinctrl-max77620.o
|
||||
obj-$(CONFIG_PINCTRL_MESON) += meson/
|
||||
obj-$(CONFIG_PINCTRL_PALMAS) += pinctrl-palmas.o
|
||||
obj-$(CONFIG_PINCTRL_PIC32) += pinctrl-pic32.o
|
||||
diff --git a/drivers/pinctrl/pinctrl-max77620.c b/drivers/pinctrl/pinctrl-max77620.c
|
||||
new file mode 100644
|
||||
index 0000000..19005a0
|
||||
--- /dev/null
|
||||
+++ b/drivers/pinctrl/pinctrl-max77620.c
|
||||
@@ -0,0 +1,678 @@
|
||||
+/*
|
||||
+ * MAX77620 pin control driver.
|
||||
+ *
|
||||
+ * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
|
||||
+ *
|
||||
+ * Author:
|
||||
+ * Chaitanya Bandi <bandik@nvidia.com>
|
||||
+ * Laxman Dewangan <ldewangan@nvidia.com>
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify it
|
||||
+ * under the terms and conditions of the GNU General Public License,
|
||||
+ * version 2, as published by the Free Software Foundation.
|
||||
+ */
|
||||
+
|
||||
+#include <linux/mfd/max77620.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/of.h>
|
||||
+#include <linux/pinctrl/pinctrl.h>
|
||||
+#include <linux/pinctrl/pinconf-generic.h>
|
||||
+#include <linux/pinctrl/pinconf.h>
|
||||
+#include <linux/pinctrl/pinmux.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/regmap.h>
|
||||
+
|
||||
+#include "core.h"
|
||||
+#include "pinconf.h"
|
||||
+#include "pinctrl-utils.h"
|
||||
+
|
||||
+#define MAX77620_PIN_NUM 8
|
||||
+
|
||||
+enum max77620_pin_ppdrv {
|
||||
+ MAX77620_PIN_UNCONFIG_DRV,
|
||||
+ MAX77620_PIN_OD_DRV,
|
||||
+ MAX77620_PIN_PP_DRV,
|
||||
+};
|
||||
+
|
||||
+enum max77620_pinconf_param {
|
||||
+ MAX77620_ACTIVE_FPS_SOURCE = PIN_CONFIG_END + 1,
|
||||
+ MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
|
||||
+ MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS,
|
||||
+ MAX77620_SUSPEND_FPS_SOURCE,
|
||||
+ MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
|
||||
+ MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS,
|
||||
+};
|
||||
+
|
||||
+struct max77620_pin_function {
|
||||
+ const char *name;
|
||||
+ const char * const *groups;
|
||||
+ unsigned int ngroups;
|
||||
+ int mux_option;
|
||||
+};
|
||||
+
|
||||
+struct max77620_cfg_param {
|
||||
+ const char *property;
|
||||
+ enum max77620_pinconf_param param;
|
||||
+};
|
||||
+
|
||||
+static const struct pinconf_generic_params max77620_cfg_params[] = {
|
||||
+ {
|
||||
+ .property = "maxim,active-fps-source",
|
||||
+ .param = MAX77620_ACTIVE_FPS_SOURCE,
|
||||
+ }, {
|
||||
+ .property = "maxim,active-fps-power-up-slot",
|
||||
+ .param = MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
|
||||
+ }, {
|
||||
+ .property = "maxim,active-fps-power-down-slot",
|
||||
+ .param = MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS,
|
||||
+ }, {
|
||||
+ .property = "maxim,suspend-fps-source",
|
||||
+ .param = MAX77620_SUSPEND_FPS_SOURCE,
|
||||
+ }, {
|
||||
+ .property = "maxim,suspend-fps-power-up-slot",
|
||||
+ .param = MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
|
||||
+ }, {
|
||||
+ .property = "maxim,suspend-fps-power-down-slot",
|
||||
+ .param = MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+enum max77620_alternate_pinmux_option {
|
||||
+ MAX77620_PINMUX_GPIO = 0,
|
||||
+ MAX77620_PINMUX_LOW_POWER_MODE_CONTROL_IN = 1,
|
||||
+ MAX77620_PINMUX_FLEXIBLE_POWER_SEQUENCER_OUT = 2,
|
||||
+ MAX77620_PINMUX_32K_OUT1 = 3,
|
||||
+ MAX77620_PINMUX_SD0_DYNAMIC_VOLTAGE_SCALING_IN = 4,
|
||||
+ MAX77620_PINMUX_SD1_DYNAMIC_VOLTAGE_SCALING_IN = 5,
|
||||
+ MAX77620_PINMUX_REFERENCE_OUT = 6,
|
||||
+};
|
||||
+
|
||||
+struct max77620_pingroup {
|
||||
+ const char *name;
|
||||
+ const unsigned int pins[1];
|
||||
+ unsigned int npins;
|
||||
+ enum max77620_alternate_pinmux_option alt_option;
|
||||
+};
|
||||
+
|
||||
+struct max77620_pin_info {
|
||||
+ enum max77620_pin_ppdrv drv_type;
|
||||
+ int pull_config;
|
||||
+};
|
||||
+
|
||||
+struct max77620_fps_config {
|
||||
+ int active_fps_src;
|
||||
+ int active_power_up_slots;
|
||||
+ int active_power_down_slots;
|
||||
+ int suspend_fps_src;
|
||||
+ int suspend_power_up_slots;
|
||||
+ int suspend_power_down_slots;
|
||||
+};
|
||||
+
|
||||
+struct max77620_pctrl_info {
|
||||
+ struct device *dev;
|
||||
+ struct pinctrl_dev *pctl;
|
||||
+ struct regmap *rmap;
|
||||
+ int pins_current_opt[MAX77620_GPIO_NR];
|
||||
+ const struct max77620_pin_function *functions;
|
||||
+ unsigned int num_functions;
|
||||
+ const struct max77620_pingroup *pin_groups;
|
||||
+ int num_pin_groups;
|
||||
+ const struct pinctrl_pin_desc *pins;
|
||||
+ unsigned int num_pins;
|
||||
+ struct max77620_pin_info pin_info[MAX77620_PIN_NUM];
|
||||
+ struct max77620_fps_config fps_config[MAX77620_PIN_NUM];
|
||||
+};
|
||||
+
|
||||
+static const struct pinctrl_pin_desc max77620_pins_desc[] = {
|
||||
+ PINCTRL_PIN(MAX77620_GPIO0, "gpio0"),
|
||||
+ PINCTRL_PIN(MAX77620_GPIO1, "gpio1"),
|
||||
+ PINCTRL_PIN(MAX77620_GPIO2, "gpio2"),
|
||||
+ PINCTRL_PIN(MAX77620_GPIO3, "gpio3"),
|
||||
+ PINCTRL_PIN(MAX77620_GPIO4, "gpio4"),
|
||||
+ PINCTRL_PIN(MAX77620_GPIO5, "gpio5"),
|
||||
+ PINCTRL_PIN(MAX77620_GPIO6, "gpio6"),
|
||||
+ PINCTRL_PIN(MAX77620_GPIO7, "gpio7"),
|
||||
+};
|
||||
+
|
||||
+static const char * const gpio_groups[] = {
|
||||
+ "gpio0",
|
||||
+ "gpio1",
|
||||
+ "gpio2",
|
||||
+ "gpio3",
|
||||
+ "gpio4",
|
||||
+ "gpio5",
|
||||
+ "gpio6",
|
||||
+ "gpio7",
|
||||
+};
|
||||
+
|
||||
+#define FUNCTION_GROUP(fname, mux) \
|
||||
+ { \
|
||||
+ .name = fname, \
|
||||
+ .groups = gpio_groups, \
|
||||
+ .ngroups = ARRAY_SIZE(gpio_groups), \
|
||||
+ .mux_option = MAX77620_PINMUX_##mux, \
|
||||
+ }
|
||||
+
|
||||
+static const struct max77620_pin_function max77620_pin_function[] = {
|
||||
+ FUNCTION_GROUP("gpio", GPIO),
|
||||
+ FUNCTION_GROUP("lpm-control-in", LOW_POWER_MODE_CONTROL_IN),
|
||||
+ FUNCTION_GROUP("fps-out", FLEXIBLE_POWER_SEQUENCER_OUT),
|
||||
+ FUNCTION_GROUP("32k-out1", 32K_OUT1),
|
||||
+ FUNCTION_GROUP("sd0-dvs-in", SD0_DYNAMIC_VOLTAGE_SCALING_IN),
|
||||
+ FUNCTION_GROUP("sd1-dvs-in", SD1_DYNAMIC_VOLTAGE_SCALING_IN),
|
||||
+ FUNCTION_GROUP("reference-out", REFERENCE_OUT),
|
||||
+};
|
||||
+
|
||||
+#define MAX77620_PINGROUP(pg_name, pin_id, option) \
|
||||
+ { \
|
||||
+ .name = #pg_name, \
|
||||
+ .pins = {MAX77620_##pin_id}, \
|
||||
+ .npins = 1, \
|
||||
+ .alt_option = MAX77620_PINMUX_##option, \
|
||||
+ }
|
||||
+
|
||||
+static const struct max77620_pingroup max77620_pingroups[] = {
|
||||
+ MAX77620_PINGROUP(gpio0, GPIO0, LOW_POWER_MODE_CONTROL_IN),
|
||||
+ MAX77620_PINGROUP(gpio1, GPIO1, FLEXIBLE_POWER_SEQUENCER_OUT),
|
||||
+ MAX77620_PINGROUP(gpio2, GPIO2, FLEXIBLE_POWER_SEQUENCER_OUT),
|
||||
+ MAX77620_PINGROUP(gpio3, GPIO3, FLEXIBLE_POWER_SEQUENCER_OUT),
|
||||
+ MAX77620_PINGROUP(gpio4, GPIO4, 32K_OUT1),
|
||||
+ MAX77620_PINGROUP(gpio5, GPIO5, SD0_DYNAMIC_VOLTAGE_SCALING_IN),
|
||||
+ MAX77620_PINGROUP(gpio6, GPIO6, SD1_DYNAMIC_VOLTAGE_SCALING_IN),
|
||||
+ MAX77620_PINGROUP(gpio7, GPIO7, REFERENCE_OUT),
|
||||
+};
|
||||
+
|
||||
+static int max77620_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
|
||||
+{
|
||||
+ struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
|
||||
+
|
||||
+ return mpci->num_pin_groups;
|
||||
+}
|
||||
+
|
||||
+static const char *max77620_pinctrl_get_group_name(
|
||||
+ struct pinctrl_dev *pctldev, unsigned int group)
|
||||
+{
|
||||
+ struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
|
||||
+
|
||||
+ return mpci->pin_groups[group].name;
|
||||
+}
|
||||
+
|
||||
+static int max77620_pinctrl_get_group_pins(
|
||||
+ struct pinctrl_dev *pctldev, unsigned int group,
|
||||
+ const unsigned int **pins, unsigned int *num_pins)
|
||||
+{
|
||||
+ struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
|
||||
+
|
||||
+ *pins = mpci->pin_groups[group].pins;
|
||||
+ *num_pins = mpci->pin_groups[group].npins;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct pinctrl_ops max77620_pinctrl_ops = {
|
||||
+ .get_groups_count = max77620_pinctrl_get_groups_count,
|
||||
+ .get_group_name = max77620_pinctrl_get_group_name,
|
||||
+ .get_group_pins = max77620_pinctrl_get_group_pins,
|
||||
+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
|
||||
+ .dt_free_map = pinctrl_utils_free_map,
|
||||
+};
|
||||
+
|
||||
+static int max77620_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
|
||||
+{
|
||||
+ struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
|
||||
+
|
||||
+ return mpci->num_functions;
|
||||
+}
|
||||
+
|
||||
+static const char *max77620_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
|
||||
+ unsigned int function)
|
||||
+{
|
||||
+ struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
|
||||
+
|
||||
+ return mpci->functions[function].name;
|
||||
+}
|
||||
+
|
||||
+static int max77620_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
|
||||
+ unsigned int function,
|
||||
+ const char * const **groups,
|
||||
+ unsigned int * const num_groups)
|
||||
+{
|
||||
+ struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
|
||||
+
|
||||
+ *groups = mpci->functions[function].groups;
|
||||
+ *num_groups = mpci->functions[function].ngroups;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int max77620_pinctrl_enable(struct pinctrl_dev *pctldev,
|
||||
+ unsigned int function, unsigned int group)
|
||||
+{
|
||||
+ struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
|
||||
+ u8 val;
|
||||
+ int ret;
|
||||
+
|
||||
+ if (function == MAX77620_PINMUX_GPIO) {
|
||||
+ val = 0;
|
||||
+ } else if (function == mpci->pin_groups[group].alt_option) {
|
||||
+ val = 1 << group;
|
||||
+ } else {
|
||||
+ dev_err(mpci->dev, "GPIO %u doesn't have function %u\n",
|
||||
+ group, function);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+ ret = regmap_update_bits(mpci->rmap, MAX77620_REG_AME_GPIO,
|
||||
+ BIT(group), val);
|
||||
+ if (ret < 0)
|
||||
+ dev_err(mpci->dev, "REG AME GPIO update failed: %d\n", ret);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static const struct pinmux_ops max77620_pinmux_ops = {
|
||||
+ .get_functions_count = max77620_pinctrl_get_funcs_count,
|
||||
+ .get_function_name = max77620_pinctrl_get_func_name,
|
||||
+ .get_function_groups = max77620_pinctrl_get_func_groups,
|
||||
+ .set_mux = max77620_pinctrl_enable,
|
||||
+};
|
||||
+
|
||||
+static int max77620_pinconf_get(struct pinctrl_dev *pctldev,
|
||||
+ unsigned int pin, unsigned long *config)
|
||||
+{
|
||||
+ struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
|
||||
+ struct device *dev = mpci->dev;
|
||||
+ enum pin_config_param param = pinconf_to_config_param(*config);
|
||||
+ unsigned int val;
|
||||
+ int arg = 0;
|
||||
+ int ret;
|
||||
+
|
||||
+ switch (param) {
|
||||
+ case PIN_CONFIG_DRIVE_OPEN_DRAIN:
|
||||
+ if (mpci->pin_info[pin].drv_type == MAX77620_PIN_OD_DRV)
|
||||
+ arg = 1;
|
||||
+ break;
|
||||
+
|
||||
+ case PIN_CONFIG_DRIVE_PUSH_PULL:
|
||||
+ if (mpci->pin_info[pin].drv_type == MAX77620_PIN_PP_DRV)
|
||||
+ arg = 1;
|
||||
+ break;
|
||||
+
|
||||
+ case PIN_CONFIG_BIAS_PULL_UP:
|
||||
+ ret = regmap_read(mpci->rmap, MAX77620_REG_PUE_GPIO, &val);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(dev, "Reg PUE_GPIO read failed: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+ if (val & BIT(pin))
|
||||
+ arg = 1;
|
||||
+ break;
|
||||
+
|
||||
+ case PIN_CONFIG_BIAS_PULL_DOWN:
|
||||
+ ret = regmap_read(mpci->rmap, MAX77620_REG_PDE_GPIO, &val);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(dev, "Reg PDE_GPIO read failed: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+ if (val & BIT(pin))
|
||||
+ arg = 1;
|
||||
+ break;
|
||||
+
|
||||
+ default:
|
||||
+ dev_err(dev, "Properties not supported\n");
|
||||
+ return -ENOTSUPP;
|
||||
+ }
|
||||
+
|
||||
+ *config = pinconf_to_config_packed(param, (u16)arg);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int max77620_get_default_fps(struct max77620_pctrl_info *mpci,
|
||||
+ int addr, int *fps)
|
||||
+{
|
||||
+ unsigned int val;
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = regmap_read(mpci->rmap, addr, &val);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(mpci->dev, "Reg PUE_GPIO read failed: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+ *fps = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int max77620_set_fps_param(struct max77620_pctrl_info *mpci,
|
||||
+ int pin, int param)
|
||||
+{
|
||||
+ struct max77620_fps_config *fps_config = &mpci->fps_config[pin];
|
||||
+ int addr, ret;
|
||||
+ int param_val;
|
||||
+ int mask, shift;
|
||||
+
|
||||
+ if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
|
||||
+ return 0;
|
||||
+
|
||||
+ addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
|
||||
+ switch (param) {
|
||||
+ case MAX77620_ACTIVE_FPS_SOURCE:
|
||||
+ case MAX77620_SUSPEND_FPS_SOURCE:
|
||||
+ mask = MAX77620_FPS_SRC_MASK;
|
||||
+ shift = MAX77620_FPS_SRC_SHIFT;
|
||||
+ param_val = fps_config->active_fps_src;
|
||||
+ if (param == MAX77620_SUSPEND_FPS_SOURCE)
|
||||
+ param_val = fps_config->suspend_fps_src;
|
||||
+ break;
|
||||
+
|
||||
+ case MAX77620_ACTIVE_FPS_POWER_ON_SLOTS:
|
||||
+ case MAX77620_SUSPEND_FPS_POWER_ON_SLOTS:
|
||||
+ mask = MAX77620_FPS_PU_PERIOD_MASK;
|
||||
+ shift = MAX77620_FPS_PU_PERIOD_SHIFT;
|
||||
+ param_val = fps_config->active_power_up_slots;
|
||||
+ if (param == MAX77620_SUSPEND_FPS_POWER_ON_SLOTS)
|
||||
+ param_val = fps_config->suspend_power_up_slots;
|
||||
+ break;
|
||||
+
|
||||
+ case MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS:
|
||||
+ case MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS:
|
||||
+ mask = MAX77620_FPS_PD_PERIOD_MASK;
|
||||
+ shift = MAX77620_FPS_PD_PERIOD_SHIFT;
|
||||
+ param_val = fps_config->active_power_down_slots;
|
||||
+ if (param == MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS)
|
||||
+ param_val = fps_config->suspend_power_down_slots;
|
||||
+ break;
|
||||
+
|
||||
+ default:
|
||||
+ dev_err(mpci->dev, "Invalid parameter %d for pin %d\n",
|
||||
+ param, pin);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ if (param_val < 0)
|
||||
+ return 0;
|
||||
+
|
||||
+ ret = regmap_update_bits(mpci->rmap, addr, mask, param_val << shift);
|
||||
+ if (ret < 0)
|
||||
+ dev_err(mpci->dev, "Reg 0x%02x update failed %d\n", addr, ret);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int max77620_pinconf_set(struct pinctrl_dev *pctldev,
|
||||
+ unsigned int pin, unsigned long *configs,
|
||||
+ unsigned int num_configs)
|
||||
+{
|
||||
+ struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
|
||||
+ struct device *dev = mpci->dev;
|
||||
+ struct max77620_fps_config *fps_config;
|
||||
+ int param;
|
||||
+ u16 param_val;
|
||||
+ unsigned int val;
|
||||
+ unsigned int pu_val;
|
||||
+ unsigned int pd_val;
|
||||
+ int addr, ret;
|
||||
+ int i;
|
||||
+
|
||||
+ for (i = 0; i < num_configs; i++) {
|
||||
+ param = pinconf_to_config_param(configs[i]);
|
||||
+ param_val = pinconf_to_config_argument(configs[i]);
|
||||
+
|
||||
+ switch (param) {
|
||||
+ case PIN_CONFIG_DRIVE_OPEN_DRAIN:
|
||||
+ val = param_val ? 0 : 1;
|
||||
+ ret = regmap_update_bits(mpci->rmap,
|
||||
+ MAX77620_REG_GPIO0 + pin,
|
||||
+ MAX77620_CNFG_GPIO_DRV_MASK,
|
||||
+ val);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(dev, "Reg 0x%02x update failed %d\n",
|
||||
+ MAX77620_REG_GPIO0 + pin, ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+ mpci->pin_info[pin].drv_type = val ?
|
||||
+ MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV;
|
||||
+ break;
|
||||
+
|
||||
+ case PIN_CONFIG_DRIVE_PUSH_PULL:
|
||||
+ val = param_val ? 1 : 0;
|
||||
+ ret = regmap_update_bits(mpci->rmap,
|
||||
+ MAX77620_REG_GPIO0 + pin,
|
||||
+ MAX77620_CNFG_GPIO_DRV_MASK,
|
||||
+ val);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(dev, "Reg 0x%02x update failed %d\n",
|
||||
+ MAX77620_REG_GPIO0 + pin, ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+ mpci->pin_info[pin].drv_type = val ?
|
||||
+ MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV;
|
||||
+ break;
|
||||
+
|
||||
+ case MAX77620_ACTIVE_FPS_SOURCE:
|
||||
+ case MAX77620_ACTIVE_FPS_POWER_ON_SLOTS:
|
||||
+ case MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS:
|
||||
+ if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ fps_config = &mpci->fps_config[pin];
|
||||
+
|
||||
+ if ((param == MAX77620_ACTIVE_FPS_SOURCE) &&
|
||||
+ (param_val == MAX77620_FPS_SRC_DEF)) {
|
||||
+ addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
|
||||
+ ret = max77620_get_default_fps(
|
||||
+ mpci, addr,
|
||||
+ &fps_config->active_fps_src);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ if (param == MAX77620_ACTIVE_FPS_SOURCE)
|
||||
+ fps_config->active_fps_src = param_val;
|
||||
+ else if (param == MAX77620_ACTIVE_FPS_POWER_ON_SLOTS)
|
||||
+ fps_config->active_power_up_slots = param_val;
|
||||
+ else
|
||||
+ fps_config->active_power_down_slots = param_val;
|
||||
+
|
||||
+ ret = max77620_set_fps_param(mpci, pin, param);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+ break;
|
||||
+
|
||||
+ case MAX77620_SUSPEND_FPS_SOURCE:
|
||||
+ case MAX77620_SUSPEND_FPS_POWER_ON_SLOTS:
|
||||
+ case MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS:
|
||||
+ if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ fps_config = &mpci->fps_config[pin];
|
||||
+
|
||||
+ if ((param == MAX77620_SUSPEND_FPS_SOURCE) &&
|
||||
+ (param_val == MAX77620_FPS_SRC_DEF)) {
|
||||
+ addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
|
||||
+ ret = max77620_get_default_fps(
|
||||
+ mpci, addr,
|
||||
+ &fps_config->suspend_fps_src);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ if (param == MAX77620_SUSPEND_FPS_SOURCE)
|
||||
+ fps_config->suspend_fps_src = param_val;
|
||||
+ else if (param == MAX77620_SUSPEND_FPS_POWER_ON_SLOTS)
|
||||
+ fps_config->suspend_power_up_slots = param_val;
|
||||
+ else
|
||||
+ fps_config->suspend_power_down_slots =
|
||||
+ param_val;
|
||||
+ break;
|
||||
+
|
||||
+ case PIN_CONFIG_BIAS_PULL_UP:
|
||||
+ case PIN_CONFIG_BIAS_PULL_DOWN:
|
||||
+ pu_val = (param == PIN_CONFIG_BIAS_PULL_UP) ?
|
||||
+ BIT(pin) : 0;
|
||||
+ pd_val = (param == PIN_CONFIG_BIAS_PULL_DOWN) ?
|
||||
+ BIT(pin) : 0;
|
||||
+
|
||||
+ ret = regmap_update_bits(mpci->rmap,
|
||||
+ MAX77620_REG_PUE_GPIO,
|
||||
+ BIT(pin), pu_val);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(dev, "PUE_GPIO update failed: %d\n",
|
||||
+ ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ret = regmap_update_bits(mpci->rmap,
|
||||
+ MAX77620_REG_PDE_GPIO,
|
||||
+ BIT(pin), pd_val);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(dev, "PDE_GPIO update failed: %d\n",
|
||||
+ ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+ break;
|
||||
+
|
||||
+ default:
|
||||
+ dev_err(dev, "Properties not supported\n");
|
||||
+ return -ENOTSUPP;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct pinconf_ops max77620_pinconf_ops = {
|
||||
+ .pin_config_get = max77620_pinconf_get,
|
||||
+ .pin_config_set = max77620_pinconf_set,
|
||||
+};
|
||||
+
|
||||
+static struct pinctrl_desc max77620_pinctrl_desc = {
|
||||
+ .pctlops = &max77620_pinctrl_ops,
|
||||
+ .pmxops = &max77620_pinmux_ops,
|
||||
+ .confops = &max77620_pinconf_ops,
|
||||
+};
|
||||
+
|
||||
+static int max77620_pinctrl_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct max77620_chip *max77620 = dev_get_drvdata(pdev->dev.parent);
|
||||
+ struct max77620_pctrl_info *mpci;
|
||||
+ int i;
|
||||
+
|
||||
+ mpci = devm_kzalloc(&pdev->dev, sizeof(*mpci), GFP_KERNEL);
|
||||
+ if (!mpci)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ mpci->dev = &pdev->dev;
|
||||
+ mpci->dev->of_node = pdev->dev.parent->of_node;
|
||||
+ mpci->rmap = max77620->rmap;
|
||||
+
|
||||
+ mpci->pins = max77620_pins_desc;
|
||||
+ mpci->num_pins = ARRAY_SIZE(max77620_pins_desc);
|
||||
+ mpci->functions = max77620_pin_function;
|
||||
+ mpci->num_functions = ARRAY_SIZE(max77620_pin_function);
|
||||
+ mpci->pin_groups = max77620_pingroups;
|
||||
+ mpci->num_pin_groups = ARRAY_SIZE(max77620_pingroups);
|
||||
+ platform_set_drvdata(pdev, mpci);
|
||||
+
|
||||
+ max77620_pinctrl_desc.name = dev_name(&pdev->dev);
|
||||
+ max77620_pinctrl_desc.pins = max77620_pins_desc;
|
||||
+ max77620_pinctrl_desc.npins = ARRAY_SIZE(max77620_pins_desc);
|
||||
+ max77620_pinctrl_desc.num_custom_params =
|
||||
+ ARRAY_SIZE(max77620_cfg_params);
|
||||
+ max77620_pinctrl_desc.custom_params = max77620_cfg_params;
|
||||
+
|
||||
+ for (i = 0; i < MAX77620_PIN_NUM; ++i) {
|
||||
+ mpci->fps_config[i].active_fps_src = -1;
|
||||
+ mpci->fps_config[i].active_power_up_slots = -1;
|
||||
+ mpci->fps_config[i].active_power_down_slots = -1;
|
||||
+ mpci->fps_config[i].suspend_fps_src = -1;
|
||||
+ mpci->fps_config[i].suspend_power_up_slots = -1;
|
||||
+ mpci->fps_config[i].suspend_power_down_slots = -1;
|
||||
+ }
|
||||
+
|
||||
+ mpci->pctl = devm_pinctrl_register(&pdev->dev, &max77620_pinctrl_desc,
|
||||
+ mpci);
|
||||
+ if (IS_ERR(mpci->pctl)) {
|
||||
+ dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
|
||||
+ return PTR_ERR(mpci->pctl);
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+#ifdef CONFIG_PM_SLEEP
|
||||
+static int max77620_suspend_fps_param[] = {
|
||||
+ MAX77620_SUSPEND_FPS_SOURCE,
|
||||
+ MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
|
||||
+ MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS,
|
||||
+};
|
||||
+
|
||||
+static int max77620_active_fps_param[] = {
|
||||
+ MAX77620_ACTIVE_FPS_SOURCE,
|
||||
+ MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
|
||||
+ MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS,
|
||||
+};
|
||||
+
|
||||
+static int max77620_pinctrl_suspend(struct device *dev)
|
||||
+{
|
||||
+ struct max77620_pctrl_info *mpci = dev_get_drvdata(dev);
|
||||
+ int pin, p;
|
||||
+
|
||||
+ for (pin = 0; pin < MAX77620_PIN_NUM; ++pin) {
|
||||
+ if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
|
||||
+ continue;
|
||||
+ for (p = 0; p < 3; ++p)
|
||||
+ max77620_set_fps_param(
|
||||
+ mpci, pin, max77620_suspend_fps_param[p]);
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+};
|
||||
+
|
||||
+static int max77620_pinctrl_resume(struct device *dev)
|
||||
+{
|
||||
+ struct max77620_pctrl_info *mpci = dev_get_drvdata(dev);
|
||||
+ int pin, p;
|
||||
+
|
||||
+ for (pin = 0; pin < MAX77620_PIN_NUM; ++pin) {
|
||||
+ if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
|
||||
+ continue;
|
||||
+ for (p = 0; p < 3; ++p)
|
||||
+ max77620_set_fps_param(
|
||||
+ mpci, pin, max77620_active_fps_param[p]);
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+#endif
|
||||
+
|
||||
+static const struct dev_pm_ops max77620_pinctrl_pm_ops = {
|
||||
+ SET_SYSTEM_SLEEP_PM_OPS(
|
||||
+ max77620_pinctrl_suspend, max77620_pinctrl_resume)
|
||||
+};
|
||||
+
|
||||
+static const struct platform_device_id max77620_pinctrl_devtype[] = {
|
||||
+ { .name = "max77620-pinctrl", },
|
||||
+ { .name = "max20024-pinctrl", },
|
||||
+ {},
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(platform, max77620_pinctrl_devtype);
|
||||
+
|
||||
+static struct platform_driver max77620_pinctrl_driver = {
|
||||
+ .driver = {
|
||||
+ .name = "max77620-pinctrl",
|
||||
+ .pm = &max77620_pinctrl_pm_ops,
|
||||
+ },
|
||||
+ .probe = max77620_pinctrl_probe,
|
||||
+ .id_table = max77620_pinctrl_devtype,
|
||||
+};
|
||||
+
|
||||
+module_platform_driver(max77620_pinctrl_driver);
|
||||
+
|
||||
+MODULE_DESCRIPTION("MAX77620/MAX20024 pin control driver");
|
||||
+MODULE_AUTHOR("Chaitanya Bandi<bandik@nvidia.com>");
|
||||
+MODULE_AUTHOR("Laxman Dewangan<ldewangan@nvidia.com>");
|
||||
+MODULE_ALIAS("platform:max77620-pinctrl");
|
||||
+MODULE_LICENSE("GPL v2");
|
|
@ -21,20 +21,20 @@ Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
|
|||
return -1;
|
||||
+ case CVMX_BOARD_TYPE_UBNT_E200:
|
||||
+ return -1;
|
||||
case CVMX_BOARD_TYPE_CUST_DSR1000N:
|
||||
/*
|
||||
* Port 2 connects to Broadcom PHY (B5081). Other ports (0-1)
|
||||
@@ -765,6 +767,7 @@ enum cvmx_helper_board_usb_clock_types _
|
||||
case CVMX_BOARD_TYPE_KONTRON_S1901:
|
||||
if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT)
|
||||
return 1;
|
||||
@@ -744,6 +746,7 @@ enum cvmx_helper_board_usb_clock_types _
|
||||
case CVMX_BOARD_TYPE_LANAI2_G:
|
||||
case CVMX_BOARD_TYPE_NIC10E_66:
|
||||
case CVMX_BOARD_TYPE_UBNT_E100:
|
||||
+ case CVMX_BOARD_TYPE_UBNT_E200:
|
||||
case CVMX_BOARD_TYPE_CUST_DSR1000N:
|
||||
return USB_CLOCK_TYPE_CRYSTAL_12;
|
||||
case CVMX_BOARD_TYPE_NIC10E:
|
||||
return USB_CLOCK_TYPE_REF_12;
|
||||
--- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h
|
||||
+++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
|
||||
@@ -283,6 +283,7 @@ enum cvmx_board_types_enum {
|
||||
@@ -295,6 +295,7 @@ enum cvmx_board_types_enum {
|
||||
*/
|
||||
CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001,
|
||||
CVMX_BOARD_TYPE_UBNT_E100 = 20002,
|
||||
|
@ -42,7 +42,7 @@ Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
|
|||
CVMX_BOARD_TYPE_CUST_DSR1000N = 20006,
|
||||
CVMX_BOARD_TYPE_KONTRON_S1901 = 21901,
|
||||
CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000,
|
||||
@@ -384,6 +385,7 @@ static inline const char *cvmx_board_typ
|
||||
@@ -396,6 +397,7 @@ static inline const char *cvmx_board_typ
|
||||
/* Customer private range */
|
||||
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN)
|
||||
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E100)
|
||||
|
|
|
@ -1,97 +0,0 @@
|
|||
From 36f79151e74bbca512cac092c2c56c5cbc5f2f03 Mon Sep 17 00:00:00 2001
|
||||
From: Kees Cook <keescook@chromium.org>
|
||||
Date: Mon, 13 Jun 2016 15:10:02 -0700
|
||||
Subject: [PATCH] x86/KASLR, x86/power: Remove x86 hibernation restrictions
|
||||
|
||||
With the following fix:
|
||||
|
||||
70595b479ce1 ("x86/power/64: Fix crash whan the hibernation code passes control to the image kernel")
|
||||
|
||||
... there is no longer a problem with hibernation resuming a
|
||||
KASLR-booted kernel image, so remove the restriction.
|
||||
|
||||
Signed-off-by: Kees Cook <keescook@chromium.org>
|
||||
Cc: Andy Lutomirski <luto@kernel.org>
|
||||
Cc: Baoquan He <bhe@redhat.com>
|
||||
Cc: Borislav Petkov <bp@alien8.de>
|
||||
Cc: Brian Gerst <brgerst@gmail.com>
|
||||
Cc: Denys Vlasenko <dvlasenk@redhat.com>
|
||||
Cc: H. Peter Anvin <hpa@zytor.com>
|
||||
Cc: Jonathan Corbet <corbet@lwn.net>
|
||||
Cc: Len Brown <len.brown@intel.com>
|
||||
Cc: Linus Torvalds <torvalds@linux-foundation.org>
|
||||
Cc: Linux PM list <linux-pm@vger.kernel.org>
|
||||
Cc: Logan Gunthorpe <logang@deltatee.com>
|
||||
Cc: Pavel Machek <pavel@ucw.cz>
|
||||
Cc: Peter Zijlstra <peterz@infradead.org>
|
||||
Cc: Stephen Smalley <sds@tycho.nsa.gov>
|
||||
Cc: Thomas Gleixner <tglx@linutronix.de>
|
||||
Cc: Yinghai Lu <yinghai@kernel.org>
|
||||
Cc: linux-doc@vger.kernel.org
|
||||
Link: http://lkml.kernel.org/r/20160613221002.GA29719@www.outflux.net
|
||||
Signed-off-by: Ingo Molnar <mingo@kernel.org>
|
||||
---
|
||||
Documentation/kernel-parameters.txt | 10 ++++------
|
||||
arch/x86/boot/compressed/kaslr.c | 7 -------
|
||||
kernel/power/hibernate.c | 6 ------
|
||||
3 files changed, 4 insertions(+), 19 deletions(-)
|
||||
|
||||
--- a/Documentation/kernel-parameters.txt
|
||||
+++ b/Documentation/kernel-parameters.txt
|
||||
@@ -1803,12 +1803,10 @@ bytes respectively. Such letter suffixes
|
||||
js= [HW,JOY] Analog joystick
|
||||
See Documentation/input/joystick.txt.
|
||||
|
||||
- kaslr/nokaslr [X86]
|
||||
- Enable/disable kernel and module base offset ASLR
|
||||
- (Address Space Layout Randomization) if built into
|
||||
- the kernel. When CONFIG_HIBERNATION is selected,
|
||||
- kASLR is disabled by default. When kASLR is enabled,
|
||||
- hibernation will be disabled.
|
||||
+ nokaslr [KNL]
|
||||
+ When CONFIG_RANDOMIZE_BASE is set, this disables
|
||||
+ kernel and module base offset ASLR (Address Space
|
||||
+ Layout Randomization).
|
||||
|
||||
keepinitrd [HW,ARM]
|
||||
|
||||
--- a/arch/x86/boot/compressed/kaslr.c
|
||||
+++ b/arch/x86/boot/compressed/kaslr.c
|
||||
@@ -471,17 +471,10 @@ unsigned char *choose_random_location(un
|
||||
unsigned long choice = output;
|
||||
unsigned long random_addr;
|
||||
|
||||
-#ifdef CONFIG_HIBERNATION
|
||||
- if (!cmdline_find_option_bool("kaslr")) {
|
||||
- warn("KASLR disabled: 'kaslr' not on cmdline (hibernation selected).");
|
||||
- goto out;
|
||||
- }
|
||||
-#else
|
||||
if (cmdline_find_option_bool("nokaslr")) {
|
||||
warn("KASLR disabled: 'nokaslr' on cmdline.");
|
||||
goto out;
|
||||
}
|
||||
-#endif
|
||||
|
||||
boot_params->hdr.loadflags |= KASLR_FLAG;
|
||||
|
||||
--- a/kernel/power/hibernate.c
|
||||
+++ b/kernel/power/hibernate.c
|
||||
@@ -1155,11 +1155,6 @@ static int __init nohibernate_setup(char
|
||||
return 1;
|
||||
}
|
||||
|
||||
-static int __init kaslr_nohibernate_setup(char *str)
|
||||
-{
|
||||
- return nohibernate_setup(str);
|
||||
-}
|
||||
-
|
||||
static int __init page_poison_nohibernate_setup(char *str)
|
||||
{
|
||||
#ifdef CONFIG_PAGE_POISONING_ZERO
|
||||
@@ -1183,5 +1178,4 @@ __setup("hibernate=", hibernate_setup);
|
||||
__setup("resumewait", resumewait_setup);
|
||||
__setup("resumedelay=", resumedelay_setup);
|
||||
__setup("nohibernate", nohibernate_setup);
|
||||
-__setup("kaslr", kaslr_nohibernate_setup);
|
||||
__setup("page_poison=", page_poison_nohibernate_setup);
|
|
@ -45,8 +45,6 @@ bugfix/x86/viafb-autoload-on-olpc-xo1.5-only.patch
|
|||
debian/fanotify-taint-on-use-of-fanotify_access_permissions.patch
|
||||
|
||||
# Arch bug fixes
|
||||
bugfix/parisc/parisc-fix-automatic-selection-of-cr16-clocksource.patch
|
||||
bugfix/parisc/parisc-fix-order-of-erefused-define-in-errno.h.patch
|
||||
|
||||
# Arch features
|
||||
features/mips/MIPS-increase-MAX-PHYSMEM-BITS-on-Loongson-3-only.patch
|
||||
|
@ -54,20 +52,8 @@ features/mips/MIPS-Loongson-3-Add-Loongson-LS3A-RS780E-1-way-machi.patch
|
|||
features/mips/MIPS-octeon-Add-support-for-the-UBNT-E200-board.patch
|
||||
features/x86/x86-memtest-WARN-if-bad-RAM-found.patch
|
||||
features/x86/x86-make-x32-syscall-support-conditional.patch
|
||||
features/x86/x86-kaslr-x86-power-remove-x86-hibernation-restricti.patch
|
||||
# USB for Jetson TX1: is in 4.8-rc1
|
||||
features/arm/pinctrl-max77620-add-pincontrol-driver.patch
|
||||
features/arm/gpio-max77620-add-gpio-driver.patch
|
||||
features/arm/gpio-max77620-configure-interrupt-trigger-level.patch
|
||||
features/arm/gpio-max77620-use-the-new-open-drain-callback.patch
|
||||
features/arm/gpio-max77620-get-gpio-value-based-on-direction.patch
|
||||
features/arm/arm64-tegra-add-pmic-support-on-jetson-tx1.patch
|
||||
features/arm/arm64-tegra-p2597-add-sdmmc-power-supplies.patch
|
||||
features/arm/arm64-tegra-add-dsi-panel-on-jetson-tx1.patch
|
||||
features/arm/arm64-tegra-add-tegra210-xusb-pad-controller.patch
|
||||
features/arm/arm64-tegra-add-tegra210-xusb-controller.patch
|
||||
features/arm/arm64-tegra-enable-debug-serial-on-jetson-tx1.patch
|
||||
features/arm/arm64-tegra-enable-xusb-controller-on-jetson-tx1.patch
|
||||
features/arm/arm64-tegra-correct-tegra210-xusb-mailbox-interrupt.patch
|
||||
|
||||
# Miscellaneous bug fixes
|
||||
|
@ -112,7 +98,6 @@ features/all/securelevel/arm64-add-kernel-config-option-to-set-securelevel-wh.pa
|
|||
bugfix/all/ptrace-being-capable-wrt-a-process-requires-mapped-uids-gids.patch
|
||||
debian/i386-686-pae-pci-set-pci-nobios-by-default.patch
|
||||
bugfix/all/tcp-fix-use-after-free-in-tcp_xmit_retransmit_queue.patch
|
||||
bugfix/all/aacraid-check-size-values-after-double-fetch-from-us.patch
|
||||
|
||||
# ABI maintenance
|
||||
|
||||
|
@ -128,10 +113,8 @@ bugfix/all/tools-lib-lockdep-use-ldflags.patch
|
|||
bugfix/x86/tools-hv-fix-fortify-format-warning.patch
|
||||
bugfix/x86/revert-perf-build-fix-libunwind-feature-detection-on.patch
|
||||
bugfix/alpha/alpha-uapi-add-support-for-__sane_userspace_types__.patch
|
||||
bugfix/x86/revert-perf-tools-x86-build-perf-on-older-user-space.patch
|
||||
bugfix/all/tools-build-remove-bpf-run-time-check-at-build-time.patch
|
||||
bugfix/all/tools-lib-traceevent-fix-use-of-uninitialized-variables.patch
|
||||
bugfix/all/scripts-fix-x.509-pem-support-in-sign-file.patch
|
||||
bugfix/all/cpupower-bump-soname-version.patch
|
||||
bugfix/all/liblockdep-fix-undefined-symbol-prandom_u32.patch
|
||||
bugfix/all/liblockdep-reduce-max_lock_depth-to-avoid-overflowin.patch
|
||||
|
@ -140,10 +123,3 @@ bugfix/all/liblockdep-enable-wall-by-default.patch
|
|||
bugfix/all/liblockdep-fix-unused-value-warnings.patch
|
||||
bugfix/all/liblockdep-fix-set-but-not-used-warnings.patch
|
||||
bugfix/all/liblockdep-fix-defined-but-not-used-warning-for-init.patch
|
||||
bugfix/all/perf-symbols-Use-proper-dso-name-for-is_regular_file.patch
|
||||
|
||||
# Debian bug #794266
|
||||
bugfix/all/rtc-initialize-output-parameter-for-read-alarm-to-un.patch
|
||||
bugfix/all/rtc-s35390a-fix-reading-out-alarm.patch
|
||||
bugfix/all/rtc-s35390a-implement-reset-routine-as-suggested-by-.patch
|
||||
bugfix/all/rtc-s35390a-improve-irq-handling.patch
|
||||
|
|
Loading…
Reference in New Issue