keep the part of mips-gettimeofday.patch we need
svn path=/dists/sid/linux-2.6/; revision=6235
This commit is contained in:
parent
47bd921ba4
commit
42d44a4b1d
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@ -1,329 +1,50 @@
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# DP: Fix for gettimeofday jumping backwards, then forwards.
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# DP: Avoid linker error on 1480 because sb1250_hpt_setup() is not defined
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# DP: Patch author: Dave Johnson <djohnson+linuxmips@sw.starentnetworks.com>
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# DP: Patch author: Martin Michlmayr <tbm@cyrius.com>
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# DP: Upstream status: merged into linux-mips as 4 separate patches;
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# DP: Upstream status: not the ideal solution, but will work for now. Ralf
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# one small fix (defined(CONFIG_SIBYTE_SB1250) ||
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# Baechle will hopefully write a better fix, but this is needed for 2.6.16
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# defined(CONFIG_SIBYTE_BCM112X for sb1250_hpt_setup) is missing in git
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# to link on 1480.
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From: Dave Johnson <djohnson+linuxmips@sw.starentnetworks.com>
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[MIPS] Fix for gettimeofday jumping backwards, then forwards.
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Date: Thu, 16 Mar 2006 14:11:27 +0000
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From: Martin Michlmayr <tbm@cyrius.com>
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To: linux-mips@linux-mips.org
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Subject: Re: [MIPS] Sibyte: Fix race in sb1250_gettimeoffset().
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Below are 2 fixes to do with time jumping around as reported by
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* linux-mips@linux-mips.org <linux-mips@linux-mips.org> [2006-03-16 12:57]:
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gettimeofday(). One is SB1250 specific and one appears generic.
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> Commit: 186326fa1e0360450b927ee5b21fb8db028fe7ba
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>
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> +void __init swarm_time_init(void)
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> +{
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> + /* Setup HPT */
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> + sb1250_hpt_setup();
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> +}
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The symptom is revealed by running multile copies (1 per cpu) of a
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This leads to compiler errors on 1480 because sb1250_hpt_setup() is
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simple test program that calls gettimeofday() as fast as possible
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not defined. We need something like the patch below (or possibly a
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looking for time to go backwards.
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proper fix?):
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When a jump is detected the program outputs a few samples before and
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after each jump:
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value delta
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[MIPS] don't call sb1250_hpt_setup on 1480
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1121781527.912525: 1
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1121781527.912525: 0
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1121781527.912526: 1
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1121781527.912526: 0
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1121781527.912527: 1
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1121781527.912527: 0
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1121781527.912527: 0
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1121781527.912527: 0
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1121781527.911528: -999
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1121781527.911529: 1
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1121781527.911530: 1
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1121781527.912532: 1002
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1121781527.912533: 1
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1121781527.912533: 0
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1121781527.912534: 1
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1121781527.912534: 0
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1121781527.912535: 1
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1121781527.912536: 1
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value delta
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sb1250_hpt_setup() should not be called on the 1480 board since it's
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1121781545.635524: 1
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note defined there, leading to a linking error.
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1121781545.635524: 0
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1121781545.635525: 1
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1121781545.635525: 0
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1121781545.635526: 1
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1121781545.635526: 0
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1121781545.635527: 1
|
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1121781545.635527: 0
|
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1121781545.634527: -1000
|
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1121781545.635527: 1000
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1121781545.635528: 1
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1121781545.635529: 1
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1121781545.635529: 0
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1121781545.635530: 1
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1121781545.635530: 0
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1121781545.635531: 1
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1121781545.635531: 0
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1121781545.635532: 1
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1121781545.635533: 1
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Time jumps backwards 1msec then forwards 1msec a few usec
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later. Usually lasts < 2us but I've seen it as long as 5us if the
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system is under load.
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First problem I found is that sb1250_gettimeoffset() simply reads the
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current cpu 0 timer remaining value, however once this counter reaches
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0 and the interrupt is raised, it immediately resets and begins to
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count down again.
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If sb1250_gettimeoffset() is called on cpu 1 via do_gettimeofday()
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after the timer has reset but prior to cpu 0 processing the interrupt
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and taking write_seqlock() in timer_interrupt() it will return a
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full value (or close to it) causing time to jump backwards 1ms. Once
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cpu 0 handles the interrupt and timer_interrupt() gets far enough
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along it will jump forward 1ms.
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To fix this problem I implemented mips_hpt_*() on sb1250 using a spare
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timer unrelated to the existing periodic interrupt timers. It runs at
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1Mhz with a full 23bit counter. This eliminated the custom
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do_gettimeoffset() for sb1250 and allowed use of the generic
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fixed_rate_gettimeoffset() using mips_hpt_*() and timerhi/timerlo.
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The second problem is that more of timer_interrupt() needs to be
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protected by xtime_lock:
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* do_timer() expects the arch-specific handler to take the lock as it
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modifies jiffies[_64] and xtime.
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* writing timerhi/lo in timer_interrupt() will mess up
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fixed_rate_gettimeoffset() which reads timerhi/lo.
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With both changes do_gettimeofday() works correctly on both cpu 0 and
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cpu 1.
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Other changes/cleanups:
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The existing sb1250 periodic timers were slow by 999ppm (given a
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perfect 100mhz reference). The timers need to be loaded with 1 less
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than the desired interval not the interval itself.
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M_SCD_TIMER_INIT and M_SCD_TIMER_CNT had the wrong field width (should
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be 23 bits not 20 bits)
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Signed-off-by: Dave Johnson <djohnson+linuxmips@sw.starentnetworks.com>
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Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
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Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
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---
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arch/mips/kernel/time.c | 6 +-
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diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c
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arch/mips/sibyte/sb1250/time.c | 77 ++++++++++++++++++++++++++---------
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index b661d24..4a93f1d 100644
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arch/mips/sibyte/swarm/setup.c | 7 +++
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include/asm-mips/sibyte/sb1250.h | 2
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include/asm-mips/sibyte/sb1250_scd.h | 5 +-
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5 files changed, 73 insertions(+), 24 deletions(-)
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--- a/arch/mips/kernel/time.c
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+++ b/arch/mips/kernel/time.c
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@@ -424,6 +424,8 @@ irqreturn_t timer_interrupt(int irq, voi
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unsigned long j;
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unsigned int count;
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+ write_seqlock(&xtime_lock);
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+
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count = mips_hpt_read();
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mips_timer_ack();
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@@ -441,7 +443,6 @@ irqreturn_t timer_interrupt(int irq, voi
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* CMOS clock accordingly every ~11 minutes. rtc_set_time() has to be
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* called as close as possible to 500 ms before the new second starts.
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*/
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- write_seqlock(&xtime_lock);
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if (ntp_synced() &&
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xtime.tv_sec > last_rtc_update + 660 &&
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(xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
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@@ -453,7 +454,6 @@ irqreturn_t timer_interrupt(int irq, voi
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last_rtc_update = xtime.tv_sec - 600;
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}
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}
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- write_sequnlock(&xtime_lock);
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/*
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* If jiffies has overflown in this timer_interrupt, we must
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@@ -496,6 +496,8 @@ irqreturn_t timer_interrupt(int irq, voi
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}
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}
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+ write_sequnlock(&xtime_lock);
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+
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/*
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* In UP mode, we call local_timer_interrupt() to do profiling
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* and process accouting.
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--- a/arch/mips/sibyte/sb1250/time.c
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+++ b/arch/mips/sibyte/sb1250/time.c
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@@ -47,23 +47,51 @@
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#define IMR_IP3_VAL K_INT_MAP_I1
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#define IMR_IP4_VAL K_INT_MAP_I2
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+#define SB1250_HPT_NUM 3
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+#define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */
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+#define SB1250_HPT_SHIFT ((sizeof(unsigned int)*8)-V_SCD_TIMER_WIDTH)
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+
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+
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extern int sb1250_steal_irq(int irq);
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+static unsigned int sb1250_hpt_read(void);
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+static void sb1250_hpt_init(unsigned int);
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+
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+static unsigned int hpt_offset;
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+
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+void __init sb1250_hpt_setup(void)
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+{
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+ int cpu = smp_processor_id();
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+
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+ if (!cpu) {
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+ /* Setup hpt using timer #3 but do not enable irq for it */
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+ __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG)));
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+ __raw_writeq(SB1250_HPT_VALUE,
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+ IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_INIT)));
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+ __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
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+ IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG)));
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+
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+ /*
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+ * we need to fill 32 bits, so just use the upper 23 bits and pretend
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+ * the timer is going 512Mhz instead of 1Mhz
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+ */
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+ mips_hpt_frequency = V_SCD_TIMER_FREQ << SB1250_HPT_SHIFT;
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+ mips_hpt_init = sb1250_hpt_init;
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+ mips_hpt_read = sb1250_hpt_read;
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+ }
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+}
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+
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+
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void sb1250_time_init(void)
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{
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int cpu = smp_processor_id();
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int irq = K_INT_TIMER_0+cpu;
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- /* Only have 4 general purpose timers */
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- if (cpu > 3) {
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+ /* Only have 4 general purpose timers, and we use last one as hpt */
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+ if (cpu > 2) {
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BUG();
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}
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- if (!cpu) {
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- /* Use our own gettimeoffset() routine */
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- do_gettimeoffset = sb1250_gettimeoffset;
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- }
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-
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sb1250_mask_irq(cpu, irq);
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/* Map the timer interrupt to ip[4] of this cpu */
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@@ -75,10 +103,10 @@ void sb1250_time_init(void)
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/* Disable the timer and set up the count */
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__raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
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#ifdef CONFIG_SIMULATION
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- __raw_writeq(50000 / HZ,
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+ __raw_writeq((50000 / HZ) - 1,
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IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
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#else
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- __raw_writeq(1000000 / HZ,
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+ __raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1,
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IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
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#endif
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@@ -103,7 +131,7 @@ void sb1250_timer_interrupt(struct pt_re
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int cpu = smp_processor_id();
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int irq = K_INT_TIMER_0 + cpu;
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- /* Reset the timer */
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+ /* ACK interrupt */
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____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
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IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
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@@ -122,15 +150,26 @@ void sb1250_timer_interrupt(struct pt_re
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}
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/*
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- * We use our own do_gettimeoffset() instead of the generic one,
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- * because the generic one does not work for SMP case.
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- * In addition, since we use general timer 0 for system time,
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- * we can get accurate intra-jiffy offset without calibration.
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+ * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over
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+ * again. There's no easy way to set to a specific value so store init value
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+ * in hpt_offset and subtract each time.
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+ *
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+ * Note: Timer isn't full 32bits so shift it into the upper part making
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+ * it appear to run at a higher frequency.
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*/
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-unsigned long sb1250_gettimeoffset(void)
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+static unsigned int sb1250_hpt_read(void)
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{
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- unsigned long count =
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- __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT)));
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+ unsigned int count;
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- return 1000000/HZ - count;
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- }
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+ count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT))));
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+
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+ count = (SB1250_HPT_VALUE - count) << SB1250_HPT_SHIFT;
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+
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+ return count - hpt_offset;
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+}
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+
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+static void sb1250_hpt_init(unsigned int count)
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+{
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+ hpt_offset = count;
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+ return;
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+}
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--- a/arch/mips/sibyte/swarm/setup.c
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--- a/arch/mips/sibyte/swarm/setup.c
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+++ b/arch/mips/sibyte/swarm/setup.c
|
+++ b/arch/mips/sibyte/swarm/setup.c
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@@ -70,6 +70,14 @@ const char *get_system_type(void)
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@@ -72,8 +72,10 @@ const char *get_system_type(void)
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return "SiByte " SIBYTE_BOARD_NAME;
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void __init swarm_time_init(void)
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|
{
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+#if defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
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/* Setup HPT */
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|
sb1250_hpt_setup();
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+#endif
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}
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}
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+void __init swarm_time_init(void)
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+{
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+#if defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
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+ /* Setup HPT */
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+ sb1250_hpt_setup();
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+#endif
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+}
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+
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void __init swarm_timer_setup(struct irqaction *irq)
|
void __init swarm_timer_setup(struct irqaction *irq)
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{
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/*
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@@ -109,6 +117,7 @@ void __init plat_setup(void)
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panic_timeout = 5; /* For debug. */
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+ board_time_init = swarm_time_init;
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board_timer_setup = swarm_timer_setup;
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board_be_handler = swarm_be_handler;
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--- a/include/asm-mips/sibyte/sb1250.h
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+++ b/include/asm-mips/sibyte/sb1250.h
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@@ -45,8 +45,8 @@ extern unsigned int soc_type;
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extern unsigned int periph_rev;
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extern unsigned int zbbus_mhz;
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+extern void sb1250_hpt_setup(void);
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extern void sb1250_time_init(void);
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-extern unsigned long sb1250_gettimeoffset(void);
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extern void sb1250_mask_irq(int cpu, int irq);
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extern void sb1250_unmask_irq(int cpu, int irq);
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extern void sb1250_smp_finish(void);
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--- a/include/asm-mips/sibyte/sb1250_scd.h
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+++ b/include/asm-mips/sibyte/sb1250_scd.h
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|
||||||
@@ -359,14 +359,15 @@
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define V_SCD_TIMER_FREQ 1000000
|
|
||||||
+#define V_SCD_TIMER_WIDTH 23
|
|
||||||
|
|
||||||
#define S_SCD_TIMER_INIT 0
|
|
||||||
-#define M_SCD_TIMER_INIT _SB_MAKEMASK(20,S_SCD_TIMER_INIT)
|
|
||||||
+#define M_SCD_TIMER_INIT _SB_MAKEMASK(V_SCD_TIMER_WIDTH,S_SCD_TIMER_INIT)
|
|
||||||
#define V_SCD_TIMER_INIT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_INIT)
|
|
||||||
#define G_SCD_TIMER_INIT(x) _SB_GETVALUE(x,S_SCD_TIMER_INIT,M_SCD_TIMER_INIT)
|
|
||||||
|
|
||||||
#define S_SCD_TIMER_CNT 0
|
|
||||||
-#define M_SCD_TIMER_CNT _SB_MAKEMASK(20,S_SCD_TIMER_CNT)
|
|
||||||
+#define M_SCD_TIMER_CNT _SB_MAKEMASK(V_SCD_TIMER_WIDTH,S_SCD_TIMER_CNT)
|
|
||||||
#define V_SCD_TIMER_CNT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_CNT)
|
|
||||||
#define G_SCD_TIMER_CNT(x) _SB_GETVALUE(x,S_SCD_TIMER_CNT,M_SCD_TIMER_CNT)
|
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -16,7 +16,7 @@
|
||||||
+ sparc64-atyfb-xl-gr.patch
|
+ sparc64-atyfb-xl-gr.patch
|
||||||
+ mips-makefile.patch
|
+ mips-makefile.patch
|
||||||
+ mips-arch-makefile.patch
|
+ mips-arch-makefile.patch
|
||||||
#FIXME + mips-gettimeofday.patch
|
+ mips-gettimeofday.patch
|
||||||
#FIXME + mips-ide-scan.patch
|
#FIXME + mips-ide-scan.patch
|
||||||
+ mips-sb1-probe-ide.patch
|
+ mips-sb1-probe-ide.patch
|
||||||
#FIXME + mips-sb1-irq-hazard.patch
|
#FIXME + mips-sb1-irq-hazard.patch
|
||||||
|
|
Loading…
Reference in New Issue