From 446ee644db049edbbb8bcdf43a0bc5732e221546 Mon Sep 17 00:00:00 2001 From: Martin Michlmayr Date: Thu, 3 Jul 2008 10:16:01 +0000 Subject: [PATCH] ip32: Enable FAST-20 for onboard scsi svn path=/dists/trunk/linux-2.6/; revision=11747 --- debian/changelog | 1 + .../bugfix/mips/ip32_enable_fast_20.patch | 29 +++++++++++++++++++ debian/patches/series/1~experimental.1 | 1 + 3 files changed, 31 insertions(+) create mode 100644 debian/patches/bugfix/mips/ip32_enable_fast_20.patch diff --git a/debian/changelog b/debian/changelog index f3c7be014..9f6640823 100644 --- a/debian/changelog +++ b/debian/changelog @@ -86,6 +86,7 @@ linux-2.6 (2.6.26~rc8-1~experimental.1) UNRELEASED; urgency=low - IP22: Set MIPS_L1_CACHE_SHIFT to 7 - IP32: fix unexpected irq 71 - gbefb: fix cmap FIFO timeout (closes: #487257) + - Enable FAST-20 for onboard scsi * [arm/ixp4xx] Add support for Freecom FSG-3 (Rod Whitby). * [arm/ixp4xx] Enable CONFIG_MACH_DSMG600. * [arm/iop32x] Unset NET_DMA since it actually leads to worse network diff --git a/debian/patches/bugfix/mips/ip32_enable_fast_20.patch b/debian/patches/bugfix/mips/ip32_enable_fast_20.patch new file mode 100644 index 000000000..a10bdae21 --- /dev/null +++ b/debian/patches/bugfix/mips/ip32_enable_fast_20.patch @@ -0,0 +1,29 @@ +Both onboard controller of the O2 support FAST-20 transfer speeds, +but the bit, which signals that to the aic driver, isn't set. Instead +of adding detection code to the scsi driver, we just fake the missing +bit in the PCI config space of the scsi chips. + +Signed-off-by: Thomas Bogendoerfer +--- + + arch/mips/pci/ops-mace.c | 7 +++++++ + 1 files changed, 7 insertions(+), 0 deletions(-) + +diff --git a/arch/mips/pci/ops-mace.c b/arch/mips/pci/ops-mace.c +index e958818..1cfb558 100644 +--- a/arch/mips/pci/ops-mace.c ++++ b/arch/mips/pci/ops-mace.c +@@ -61,6 +61,13 @@ mace_pci_read_config(struct pci_bus *bus, unsigned int devfn, + /* ack possible master abort */ + mace->pci.error &= ~MACEPCI_ERROR_MASTER_ABORT; + mace->pci.control = control; ++ /* ++ * someone forgot to set the ultra bit for the onboard ++ * scsi chips; we fake it here ++ */ ++ if (bus->number == 0 && reg == 0x40 && size == 4 && ++ (devfn == (1 << 3) || devfn == (2 << 3))) ++ *val |= 0x1000; + + DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val); + diff --git a/debian/patches/series/1~experimental.1 b/debian/patches/series/1~experimental.1 index 88c5ec4ad..fc38a5206 100644 --- a/debian/patches/series/1~experimental.1 +++ b/debian/patches/series/1~experimental.1 @@ -25,6 +25,7 @@ + bugfix/mips/ip32_fix_unexpected_irq_71.patch + bugfix/mips/ip22_cache_shift.patch + bugfix/mips/gbefb_fix_cmap_fifo_timeout.patch ++ bugfix/mips/ip32_enable_fast_20.patch + bugfix/arm/disable-dvb_b2c2_flexcop.patch + bugfix/arm/disable-dvb_budget.patch + bugfix/arm/disable-netxen_nic.patch