[armhf] Add device-tree patches from linux-next to support USB and
Ethernet on meson8b.
This commit is contained in:
parent
75177c7c40
commit
6b6dc95db7
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@ -27,6 +27,8 @@ linux (4.16~rc5-1~exp2) UNRELEASED; urgency=medium
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[ Vagrant Cascadian ]
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[ Vagrant Cascadian ]
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* [armhf] Enable ARCH_MESON and related drivers.
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* [armhf] Enable ARCH_MESON and related drivers.
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* [armhf] Add device-tree patches from linux-next to support USB and
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Ethernet on meson8b.
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-- Ben Hutchings <ben@decadent.org.uk> Tue, 13 Mar 2018 16:12:54 +0000
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-- Ben Hutchings <ben@decadent.org.uk> Tue, 13 Mar 2018 16:12:54 +0000
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@ -0,0 +1,37 @@
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From a2730ed3e0f39c528014673cb96807bb16a8ce35 Mon Sep 17 00:00:00 2001
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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Date: Sun, 21 Jan 2018 23:14:12 +0100
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Subject: [PATCH 1/6] ARM: dts: meson8b: grow the reset controller memory zone
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The reset controller in the Meson8b SoCs also supports level resets.
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These use the same defines (from
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dt-bindings/reset/amlogic,meson8b-reset.h) as the reset pulses.
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The reset-meson driver internally handles the difference if a consumer
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requests a reset pulse or a level reset. However, for this to work we
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must extend the memory zone of the reset controller.
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Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
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Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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---
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arch/arm/boot/dts/meson8b.dtsi | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
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index 7cd03ed3742e..4c1ac3a44357 100644
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--- a/arch/arm/boot/dts/meson8b.dtsi
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+++ b/arch/arm/boot/dts/meson8b.dtsi
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@@ -152,7 +152,7 @@
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reset: reset-controller@4404 {
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compatible = "amlogic,meson8b-reset";
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- reg = <0x4404 0x20>;
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+ reg = <0x4404 0x9c>;
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#reset-cells = <1>;
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};
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--
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2.11.0
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44
debian/patches/features/armhf/meson8/0002-ARM-dts-meson8-add-the-reset-controller.patch
vendored
Normal file
44
debian/patches/features/armhf/meson8/0002-ARM-dts-meson8-add-the-reset-controller.patch
vendored
Normal file
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@ -0,0 +1,44 @@
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From e3087187e5f18231e48450e602220eb65c409b59 Mon Sep 17 00:00:00 2001
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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Date: Sun, 21 Jan 2018 23:14:13 +0100
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Subject: [PATCH 2/6] ARM: dts: meson8: add the reset controller
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Meson8 uses the same reset controller as Meson8b. Add the node along
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with the #include for the reset lines to meson8.dtsi so we can use it
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from there as well.
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
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Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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---
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arch/arm/boot/dts/meson8.dtsi | 7 +++++++
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1 file changed, 7 insertions(+)
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diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
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index d2e3eeaa1a5f..f48e89a7f7b4 100644
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--- a/arch/arm/boot/dts/meson8.dtsi
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+++ b/arch/arm/boot/dts/meson8.dtsi
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@@ -46,6 +46,7 @@
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#include <dt-bindings/clock/meson8b-clkc.h>
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#include <dt-bindings/gpio/meson8-gpio.h>
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#include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
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+#include <dt-bindings/reset/amlogic,meson8b-reset.h>
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#include "meson.dtsi"
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/ {
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@@ -187,6 +188,12 @@
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reg = <0x8000 0x4>, <0x4000 0x460>;
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};
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+ reset: reset-controller@4404 {
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+ compatible = "amlogic,meson8b-reset";
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+ reg = <0x4404 0x9c>;
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+ #reset-cells = <1>;
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+ };
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+
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analog_top: analog-top@81a8 {
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compatible = "amlogic,meson8-analog-top", "syscon";
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reg = <0x81a8 0x14>;
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--
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2.11.0
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35
debian/patches/features/armhf/meson8/0003-ARM-dts-meson8-add-the-USB-reset-line.patch
vendored
Normal file
35
debian/patches/features/armhf/meson8/0003-ARM-dts-meson8-add-the-USB-reset-line.patch
vendored
Normal file
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@ -0,0 +1,35 @@
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From e1fa57dfd7e28b30d6419b7c309b4a890ff4410a Mon Sep 17 00:00:00 2001
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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Date: Sun, 21 Jan 2018 23:14:14 +0100
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Subject: [PATCH 3/6] ARM: dts: meson8: add the USB reset line
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Now that we support the reset controller on Meson8 we can add the reset
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line to the USB PHYs (just like on Meson8b).
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
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Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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---
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arch/arm/boot/dts/meson8.dtsi | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
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index f48e89a7f7b4..dcc9292d2ffa 100644
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--- a/arch/arm/boot/dts/meson8.dtsi
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+++ b/arch/arm/boot/dts/meson8.dtsi
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@@ -390,10 +390,12 @@
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compatible = "amlogic,meson8-usb2-phy", "amlogic,meson-mx-usb2-phy";
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clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
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clock-names = "usb_general", "usb";
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+ resets = <&reset RESET_USB_OTG>;
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};
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&usb1_phy {
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compatible = "amlogic,meson8-usb2-phy", "amlogic,meson-mx-usb2-phy";
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clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
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clock-names = "usb_general", "usb";
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+ resets = <&reset RESET_USB_OTG>;
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};
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--
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2.11.0
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@ -0,0 +1,83 @@
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From b96446541d8390ec22e6dc579282770453ec98a4 Mon Sep 17 00:00:00 2001
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From: Emiliano Ingrassia <ingrassia@epigenesys.com>
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Date: Fri, 19 Jan 2018 02:48:00 +0100
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Subject: [PATCH 4/6] ARM: dts: meson8b: extend ethernet controller description
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Enable S805 (aka Meson8b) ethernet pin multiplexing and
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extend the controller description.
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The programmable ethernet (PRG_ETHERNET) register address
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value (0xc1108108), contained in meson.dtsi, is overridden
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according to the value found in S805 SoC manual.
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This also required to switch to "amlogic,meson8b-dwmac" compatible
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to correctly configure that register.
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The two clock sources "clkin0" and "clkin1" are both equals
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to MPLL2 because, as reported in bit 9-7 register description,
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that is the only Meson8b ethernet clock source.
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Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
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Tested-by: Linus Lüssing <linus.luessing@c0d3.blue>
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Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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---
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arch/arm/boot/dts/meson8b.dtsi | 35 +++++++++++++++++++++++++++++++++--
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1 file changed, 33 insertions(+), 2 deletions(-)
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diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
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index 4c1ac3a44357..1a7c16640ea5 100644
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--- a/arch/arm/boot/dts/meson8b.dtsi
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+++ b/arch/arm/boot/dts/meson8b.dtsi
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@@ -185,6 +185,27 @@
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl_cbus 0 0 130>;
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};
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+
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+ eth_rgmii_pins: eth-rgmii {
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+ mux {
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+ groups = "eth_tx_clk",
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+ "eth_tx_en",
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+ "eth_txd1_0",
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+ "eth_txd1_1",
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+ "eth_txd0_0",
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+ "eth_txd0_1",
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+ "eth_rx_clk",
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+ "eth_rx_dv",
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+ "eth_rxd1",
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+ "eth_rxd0",
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+ "eth_mdio_en",
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+ "eth_mdc",
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+ "eth_ref_clk",
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+ "eth_txd2",
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+ "eth_txd3";
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+ function = "ethernet";
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+ };
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+ };
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};
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};
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@@ -203,8 +224,18 @@
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};
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ðmac {
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- clocks = <&clkc CLKID_ETH>;
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- clock-names = "stmmaceth";
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+ compatible = "amlogic,meson8b-dwmac", "snps,dwmac-3.70a", "snps,dwmac";
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+
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+ reg = <0xc9410000 0x10000
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+ 0xc1108140 0x4>;
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+
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+ clocks = <&clkc CLKID_ETH>,
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+ <&clkc CLKID_MPLL2>,
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+ <&clkc CLKID_MPLL2>;
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+ clock-names = "stmmaceth", "clkin0", "clkin1";
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+
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+ resets = <&reset RESET_ETHERNET>;
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+ reset-names = "stmmaceth";
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};
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&gpio_intc {
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--
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2.11.0
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65
debian/patches/features/armhf/meson8/0005-ARM-dts-meson8b-odroidc1-ethernet-support.patch
vendored
Normal file
65
debian/patches/features/armhf/meson8/0005-ARM-dts-meson8b-odroidc1-ethernet-support.patch
vendored
Normal file
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@ -0,0 +1,65 @@
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From 9c15795a4f96cb4f82a0e1503b46621251644bc2 Mon Sep 17 00:00:00 2001
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From: Emiliano Ingrassia <ingrassia@epigenesys.com>
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Date: Fri, 19 Jan 2018 02:49:17 +0100
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Subject: [PATCH 5/6] ARM: dts: meson8b-odroidc1: ethernet support
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The Odroid-C1+ board is equipped with an RTL8211F ethernet PHY
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which supports 10/100/1000 Mbps ethernet.
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The PHY reset and interrupt lines are controlled by the SoC via
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two GPIO lines (GPIOH_4 and GPIOH_3 respectively).
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The PHY energy efficient ethernet (eee) mode is marked as broken
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using "eee-broken-1000t" because, during tests, high packet losses
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were experienced without it.
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Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
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Tested-by: Linus Lüssing <linus.luessing@c0d3.blue>
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Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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---
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arch/arm/boot/dts/meson8b-odroidc1.dts | 30 ++++++++++++++++++++++++++++++
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1 file changed, 30 insertions(+)
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diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
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index 9ff6ca4e20d0..d5e83051bb54 100644
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--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
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+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
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@@ -99,3 +99,33 @@
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&usb1 {
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status = "okay";
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|
};
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+
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+ðmac {
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+ status = "okay";
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|
+
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+ snps,reset-gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>;
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+ snps,reset-active-low;
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+ snps,reset-delays-us = <0 10000 30000>;
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|
+
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|
+ pinctrl-0 = <ð_rgmii_pins>;
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|
+ pinctrl-names = "default";
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+
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|
+ phy-mode = "rgmii";
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+ phy-handle = <ð_phy>;
|
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|
+ amlogic,tx-delay-ns = <4>;
|
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|
+
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+ mdio {
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+ compatible = "snps,dwmac-mdio";
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|
+ #address-cells = <1>;
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|
+ #size-cells = <0>;
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|
+
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+ /* Realtek RTL8211F (0x001cc916) */
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|
+ eth_phy: ethernet-phy@0 {
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|
+ reg = <0>;
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|
+ eee-broken-1000t;
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|
+ interrupt-parent = <&gpio_intc>;
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|
+ /* GPIOH_3 */
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|
+ interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
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|
+ };
|
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|
+ };
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+};
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--
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|
2.11.0
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|
|
42
debian/patches/features/armhf/meson8/0006-ARM-dts-meson8b-add-the-I2C-clocks.patch
vendored
Normal file
42
debian/patches/features/armhf/meson8/0006-ARM-dts-meson8b-add-the-I2C-clocks.patch
vendored
Normal file
|
@ -0,0 +1,42 @@
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From 7a6cc8be3938c322964065312d57439a92584488 Mon Sep 17 00:00:00 2001
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|
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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|
Date: Sat, 17 Feb 2018 17:06:50 +0100
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Subject: [PATCH 6/6] ARM: dts: meson8b: add the I2C clocks
|
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|
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Add the I2C clocks so the I2C busses can be used. The clock input is not
|
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|
device specific (the AO I2C bus uses clk81 as input, while the two I2C
|
||||||
|
busses in CBUS have a separate "CLKID_I2C" gate, provided by the clock
|
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|
controller.
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|
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|
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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|
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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|
---
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||||||
|
arch/arm/boot/dts/meson8b.dtsi | 12 ++++++++++++
|
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|
1 file changed, 12 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
|
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|
index 1a7c16640ea5..5f7841b2d163 100644
|
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|
--- a/arch/arm/boot/dts/meson8b.dtsi
|
||||||
|
+++ b/arch/arm/boot/dts/meson8b.dtsi
|
||||||
|
@@ -250,6 +250,18 @@
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|
clock-names = "core";
|
||||||
|
};
|
||||||
|
|
||||||
|
+&i2c_AO {
|
||||||
|
+ clocks = <&clkc CLKID_CLK81>;
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&i2c_A {
|
||||||
|
+ clocks = <&clkc CLKID_I2C>;
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&i2c_B {
|
||||||
|
+ clocks = <&clkc CLKID_I2C>;
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&L2 {
|
||||||
|
arm,data-latency = <3 3 3>;
|
||||||
|
arm,tag-latency = <2 2 2>;
|
||||||
|
--
|
||||||
|
2.11.0
|
||||||
|
|
|
@ -71,6 +71,13 @@ features/mips/MIPS-increase-MAX-PHYSMEM-BITS-on-Loongson-3-only.patch
|
||||||
features/mips/MIPS-Loongson-3-Add-Loongson-LS3A-RS780E-1-way-machi.patch
|
features/mips/MIPS-Loongson-3-Add-Loongson-LS3A-RS780E-1-way-machi.patch
|
||||||
features/x86/x86-memtest-WARN-if-bad-RAM-found.patch
|
features/x86/x86-memtest-WARN-if-bad-RAM-found.patch
|
||||||
features/x86/x86-make-x32-syscall-support-conditional.patch
|
features/x86/x86-make-x32-syscall-support-conditional.patch
|
||||||
|
# meson8b device-tree updates from next-20180316 to enable USB and Ethernet.
|
||||||
|
features/armhf/meson8/0001-ARM-dts-meson8b-grow-the-reset-controller-memory-zon.patch
|
||||||
|
features/armhf/meson8/0002-ARM-dts-meson8-add-the-reset-controller.patch
|
||||||
|
features/armhf/meson8/0003-ARM-dts-meson8-add-the-USB-reset-line.patch
|
||||||
|
features/armhf/meson8/0004-ARM-dts-meson8b-extend-ethernet-controller-descripti.patch
|
||||||
|
features/armhf/meson8/0005-ARM-dts-meson8b-odroidc1-ethernet-support.patch
|
||||||
|
features/armhf/meson8/0006-ARM-dts-meson8b-add-the-I2C-clocks.patch
|
||||||
|
|
||||||
# Miscellaneous bug fixes
|
# Miscellaneous bug fixes
|
||||||
bugfix/all/kbuild-use-nostdinc-in-compile-tests.patch
|
bugfix/all/kbuild-use-nostdinc-in-compile-tests.patch
|
||||||
|
|
Loading…
Reference in New Issue