From b64db222fa7108e20805cb21a7133e565e4a2c02 Mon Sep 17 00:00:00 2001
From: Aurelien Jarno <aurel32@debian.org>
Date: Tue, 8 Jun 2010 16:11:18 +0000
Subject: [PATCH]   * [mips] backport mips/swarm: fix M3 TLB exception handler.

svn path=/dists/sid/linux-2.6/; revision=15844
---
 debian/changelog                              |  1 +
 .../bugfix/mips/sibyte-m3-tlb-exception.patch | 59 -------------------
 debian/patches/series/16                      |  1 +
 3 files changed, 2 insertions(+), 59 deletions(-)

diff --git a/debian/changelog b/debian/changelog
index ec5d7eaad..f1e1e7ec5 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -19,6 +19,7 @@ linux-2.6 (2.6.32-16) UNRELEASED; urgency=low
 
   [ Aurelien Jarno ]
   * [sh4] fix sh_tmu clocksource following recent nohz changes.
+  * [mips] backport mips/swarm: fix M3 TLB exception handler.
 
   [ Moritz Muehlenhoff ]
   * Enable X86 board specific fixups for reboot (Closes: #536537)
diff --git a/debian/patches/bugfix/mips/sibyte-m3-tlb-exception.patch b/debian/patches/bugfix/mips/sibyte-m3-tlb-exception.patch
index bf67ba425..42723f5ba 100644
--- a/debian/patches/bugfix/mips/sibyte-m3-tlb-exception.patch
+++ b/debian/patches/bugfix/mips/sibyte-m3-tlb-exception.patch
@@ -1,62 +1,3 @@
-commit 8d9df29db273ab9a330828f4f4f6669d293a730a
-Author: Ralf Baechle <ralf@linux-mips.org>
-Date:   Tue Mar 23 00:02:43 2010 +0100
-
-    MIPS: Sibyte: Apply M3 workaround only on affected chip types and versions.
-    
-    Previously it was unconditionally used on all Sibyte family SOCs.  The
-    M3 bug has to be handled in the TLB exception handler which is extremly
-    performance sensitive, so this modification is expected to deliver around
-    2-3% performance improvment.  This is important as required changes to the
-    M3 workaround will make it more costly.
-    
-    Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
-diff --git a/arch/mips/include/asm/mach-sibyte/war.h b/arch/mips/include/asm/mach-sibyte/war.h
-index 7950ef4..743385d 100644
---- a/arch/mips/include/asm/mach-sibyte/war.h
-+++ b/arch/mips/include/asm/mach-sibyte/war.h
-@@ -16,7 +16,11 @@
- #if defined(CONFIG_SB1_PASS_1_WORKAROUNDS) || \
-     defined(CONFIG_SB1_PASS_2_WORKAROUNDS)
- 
--#define BCM1250_M3_WAR	1
-+#ifndef __ASSEMBLY__
-+extern int sb1250_m3_workaround_needed(void);
-+#endif
-+
-+#define BCM1250_M3_WAR	sb1250_m3_workaround_needed()
- #define SIBYTE_1956_WAR	1
- 
- #else
-diff --git a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c
-index 0444da1..92da315 100644
---- a/arch/mips/sibyte/sb1250/setup.c
-+++ b/arch/mips/sibyte/sb1250/setup.c
-@@ -87,6 +87,21 @@ static int __init setup_bcm1250(void)
- 	return ret;
- }
- 
-+int sb1250_m3_workaround_needed(void)
-+{
-+	switch (soc_type) {
-+	case K_SYS_SOC_TYPE_BCM1250:
-+	case K_SYS_SOC_TYPE_BCM1250_ALT:
-+	case K_SYS_SOC_TYPE_BCM1250_ALT2:
-+	case K_SYS_SOC_TYPE_BCM1125:
-+	case K_SYS_SOC_TYPE_BCM1125H:
-+		return soc_pass < K_SYS_REVISION_BCM1250_C0;
-+
-+	default:
-+		return 0;
-+	}
-+}
-+
- static int __init setup_bcm112x(void)
- {
- 	int ret = 0;
-
-
 commit 5808184f1b2fe06ef8a54a2b7fb1596d58098acf
 Author: Ralf Baechle <ralf@linux-mips.org>
 Date:   Tue Mar 23 15:54:50 2010 +0100
diff --git a/debian/patches/series/16 b/debian/patches/series/16
index 6e3e91afd..8258b3096 100644
--- a/debian/patches/series/16
+++ b/debian/patches/series/16
@@ -126,3 +126,4 @@
 + features/all/revert-ipv4-Make-INET_LRO-a-bool-instead-of-tristate.patch
 - bugfix/all/thinkpad-acpi-add-x100e.patch
 + bugfix/all/sctp-fix-append-error-cause-to-ERROR-chunk-correctly.patch
++ bugfix/mips/sibyte-m3-tlb-exception.patch