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Update patches URL now that they are in Linus tree

This commit is contained in:
Aurelien Jarno 2016-05-20 11:23:49 +02:00
parent 9a3028f2d4
commit d961748cbb
5 changed files with 5 additions and 5 deletions
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2
debian/patches/bugfix/mips/MIPS-Allow-emulation-for-unaligned-LSDXC1-instructions.patch vendored
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@ -1,7 +1,7 @@
From: Paul Burton <paul.burton@imgtec.com>
Date: Thu, 21 Apr 2016 12:25:38 +0100
Subject: MIPS: Allow emulation for unaligned [LS]DXC1 instructions
Origin: https://patchwork.linux-mips.org/patch/13143/
Origin: https://git.kernel.org/linus/e70ac023f9515c70cf2b291a294f0f250df29847
If an address error exception occurs for a LDXC1 or SDXC1 instruction,
within the cop1x opcode space, allow it to be passed through to the FPU

2
debian/patches/bugfix/mips/MIPS-Disable-preemption-during-prctl-PR_SET_FP_MODE.patch vendored
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@ -1,7 +1,7 @@
From: Paul Burton <paul.burton@imgtec.com>
Date: Thu, 21 Apr 2016 12:43:57 +0100
Subject: [1/2] MIPS: Disable preemption during prctl(PR_SET_FP_MODE, ...)
Origin: https://patchwork.linux-mips.org/patch/13144/
Origin: https://git.kernel.org/linus/bd239f1e1429e7781096bf3884bdb1b2b1bb4f28
Whilst a PR_SET_FP_MODE prctl is performed there are decisions made
based upon whether the task is executing on the current CPU. This may

2
debian/patches/bugfix/mips/MIPS-Force-CPUs-to-lose-FP-context-during-mode-switc.patch vendored
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@ -1,7 +1,7 @@
From: Paul Burton <paul.burton@imgtec.com>
Date: Thu, 21 Apr 2016 12:43:58 +0100
Subject: [2/2] MIPS: Force CPUs to lose FP context during mode switches
Origin: https://patchwork.linux-mips.org/patch/13145/
Origin: https://git.kernel.org/linus/6b8322576e9d325b65c54fbef64e4e8690ad70ce
Commit 9791554b45a2 ("MIPS,prctl: add PR_[GS]ET_FP_MODE prctl options
for MIPS") added support for the PR_SET_FP_MODE prctl, which allows a

2
debian/patches/features/mips/MIPS-Octeon-Add-Octeon-III-CN7xxx-interface-detection.patch vendored
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@ -1,7 +1,7 @@
From: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Date: Wed, 3 Feb 2016 18:01:36 +0000
Subject: MIPS: Octeon: Add Octeon III CN7xxx interface detection
Origin: https://patchwork.linux-mips.org/patch/12376/
Origin: https://git.kernel.org/linus/885872b722b73b2026a48bdff4621f289be2b044
Add basic CN7XXX interface detection.

2
debian/patches/features/mips/MIPS-Octeon-detect-and-fix-byte-swapped-initramfs.patch vendored
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@ -1,7 +1,7 @@
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Wed, 11 May 2016 00:37:42 +0200
Subject: MIPS: Octeon: detect and fix byte swapped initramfs
Origin: https://patchwork.linux-mips.org/patch/13219/
Origin: https://git.kernel.org/linus/8f4703aa4df758def78e9a39cc5d1ff73c3ef51f
Octeon machines support running in little endian mode. U-Boot usually
runs in big endian-mode. Therefore the initramfs is loaded in big endian