316 lines
9.1 KiB
Diff
316 lines
9.1 KiB
Diff
From: Arnd Bergmann <arnd@arndb.de>
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Date: Wed, 2 Dec 2015 22:27:04 +0100
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Subject: ARM: orion: always use MULTI_IRQ_HANDLER
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Origin: https://git.kernel.org/linus/b8cd337c8e0330f4a29b3d1f69b7c73b324b1f8d
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As a preparation for multiplatform support, this enables
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the MULTI_IRQ_HANDLER code unconditionally on dove and
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orion5x, and introduces the respective code on mv78xx0,
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which did not have it so far. The classic entry-macro.S
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files are removed as they are now obsolete.
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Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Acked-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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[bwh: Adjust to apply on top of 4.4]
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---
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arch/arm/Kconfig | 3 ++
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arch/arm/mach-dove/include/mach/entry-macro.S | 33 -------------------
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arch/arm/mach-dove/irq.c | 12 +------
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arch/arm/mach-mv78xx0/include/mach/entry-macro.S | 41 ------------------------
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arch/arm/mach-mv78xx0/irq.c | 33 +++++++++++++++++++
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arch/arm/mach-orion5x/include/mach/entry-macro.S | 25 ---------------
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arch/arm/mach-orion5x/irq.c | 11 -------
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arch/arm/plat-orion/irq.c | 1 -
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arch/arm/plat-orion/mpp.c | 1 -
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9 files changed, 37 insertions(+), 123 deletions(-)
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delete mode 100644 arch/arm/mach-dove/include/mach/entry-macro.S
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delete mode 100644 arch/arm/mach-mv78xx0/include/mach/entry-macro.S
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delete mode 100644 arch/arm/mach-orion5x/include/mach/entry-macro.S
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--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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@@ -512,6 +512,7 @@ config ARCH_DOVE
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select CPU_PJ4
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select GENERIC_CLOCKEVENTS
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select MIGHT_HAVE_PCI
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+ select MULTI_IRQ_HANDLER
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select MVEBU_MBUS
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select PINCTRL
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select PINCTRL_DOVE
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@@ -525,6 +526,7 @@ config ARCH_MV78XX0
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select CPU_FEROCEON
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select GENERIC_CLOCKEVENTS
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select MVEBU_MBUS
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+ select MULTI_IRQ_HANDLER
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select PCI
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select PLAT_ORION_LEGACY
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help
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@@ -538,6 +540,7 @@ config ARCH_ORION5X
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select CPU_FEROCEON
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select GENERIC_CLOCKEVENTS
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select MVEBU_MBUS
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+ select MULTI_IRQ_HANDLER
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select PCI
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select PLAT_ORION_LEGACY
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select MULTI_IRQ_HANDLER
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--- a/arch/arm/mach-dove/include/mach/entry-macro.S
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+++ /dev/null
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@@ -1,33 +0,0 @@
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-/*
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- * arch/arm/mach-dove/include/mach/entry-macro.S
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- *
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- * Low-level IRQ helper macros for Marvell Dove platforms
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- *
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- * This file is licensed under the terms of the GNU General Public
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- * License version 2. This program is licensed "as is" without any
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- * warranty of any kind, whether express or implied.
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- */
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-
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-#include <mach/bridge-regs.h>
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-
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- .macro get_irqnr_preamble, base, tmp
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- ldr \base, =IRQ_VIRT_BASE
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- .endm
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-
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- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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- @ check low interrupts
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- ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF]
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- ldr \tmp, [\base, #IRQ_MASK_LOW_OFF]
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- mov \irqnr, #32
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- ands \irqstat, \irqstat, \tmp
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-
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- @ if no low interrupts set, check high interrupts
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- ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
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- ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF]
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- moveq \irqnr, #64
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- andeqs \irqstat, \irqstat, \tmp
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-
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- @ find first active interrupt source
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- clzne \irqstat, \irqstat
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- subne \irqnr, \irqnr, \irqstat
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- .endm
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--- a/arch/arm/mach-dove/irq.c
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+++ b/arch/arm/mach-dove/irq.c
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@@ -13,6 +13,7 @@
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <linux/io.h>
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+#include <asm/exception.h>
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#include <asm/mach/arch.h>
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#include <plat/irq.h>
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#include <asm/mach/irq.h>
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@@ -109,14 +110,6 @@ static int __initdata gpio2_irqs[4] = {
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0,
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};
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-#ifdef CONFIG_MULTI_IRQ_HANDLER
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-/*
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- * Compiling with both non-DT and DT support enabled, will
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- * break asm irq handler used by non-DT boards. Therefore,
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- * we provide a C-style irq handler even for non-DT boards,
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- * if MULTI_IRQ_HANDLER is set.
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- */
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-
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static void __iomem *dove_irq_base = IRQ_VIRT_BASE;
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static asmlinkage void
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@@ -139,7 +132,6 @@ __exception_irq_entry dove_legacy_handle
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return;
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}
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}
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-#endif
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void __init dove_init_irq(void)
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{
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@@ -148,9 +140,7 @@ void __init dove_init_irq(void)
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orion_irq_init(1, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
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orion_irq_init(33, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
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-#ifdef CONFIG_MULTI_IRQ_HANDLER
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set_handle_irq(dove_legacy_handle_irq);
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-#endif
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/*
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* Initialize gpiolib for GPIOs 0-71.
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--- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
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+++ /dev/null
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@@ -1,41 +0,0 @@
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-/*
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- * arch/arm/mach-mv78xx0/include/mach/entry-macro.S
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- *
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- * Low-level IRQ helper macros for Marvell MV78xx0 platforms
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- *
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- * This file is licensed under the terms of the GNU General Public
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- * License version 2. This program is licensed "as is" without any
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- * warranty of any kind, whether express or implied.
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- */
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-
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-#include <mach/bridge-regs.h>
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-
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- .macro get_irqnr_preamble, base, tmp
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- ldr \base, =IRQ_VIRT_BASE
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- .endm
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-
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- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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- @ check low interrupts
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- ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF]
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- ldr \tmp, [\base, #IRQ_MASK_LOW_OFF]
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- mov \irqnr, #31
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- ands \irqstat, \irqstat, \tmp
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- bne 1001f
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-
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- @ if no low interrupts set, check high interrupts
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- ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
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- ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF]
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- mov \irqnr, #63
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- ands \irqstat, \irqstat, \tmp
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- bne 1001f
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-
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- @ if no high interrupts set, check error interrupts
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- ldr \irqstat, [\base, #IRQ_CAUSE_ERR_OFF]
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- ldr \tmp, [\base, #IRQ_MASK_ERR_OFF]
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- mov \irqnr, #95
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- ands \irqstat, \irqstat, \tmp
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-
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- @ find first active interrupt source
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-1001: clzne \irqstat, \irqstat
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- subne \irqnr, \irqnr, \irqstat
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- .endm
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--- a/arch/arm/mach-mv78xx0/irq.c
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+++ b/arch/arm/mach-mv78xx0/irq.c
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@@ -11,6 +11,7 @@
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#include <linux/kernel.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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+#include <asm/exception.h>
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#include <mach/bridge-regs.h>
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#include <plat/orion-gpio.h>
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#include <plat/irq.h>
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@@ -23,12 +24,44 @@ static int __initdata gpio0_irqs[4] = {
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IRQ_MV78XX0_GPIO_24_31,
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};
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+static void __iomem *mv78xx0_irq_base = IRQ_VIRT_BASE;
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+
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+static asmlinkage void
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+__exception_irq_entry mv78xx0_legacy_handle_irq(struct pt_regs *regs)
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+{
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+ u32 stat;
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+
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+ stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_LOW_OFF);
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+ stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_LOW_OFF);
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+ if (stat) {
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+ unsigned int hwirq = __fls(stat);
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+ handle_IRQ(hwirq, regs);
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+ return;
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+ }
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+ stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_HIGH_OFF);
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+ stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_HIGH_OFF);
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+ if (stat) {
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+ unsigned int hwirq = 32 + __fls(stat);
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+ handle_IRQ(hwirq, regs);
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+ return;
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+ }
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+ stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_ERR_OFF);
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+ stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_ERR_OFF);
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+ if (stat) {
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+ unsigned int hwirq = 64 + __fls(stat);
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+ handle_IRQ(hwirq, regs);
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+ return;
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+ }
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+}
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+
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void __init mv78xx0_init_irq(void)
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{
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orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
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orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
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orion_irq_init(64, IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF);
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+ set_handle_irq(mv78xx0_legacy_handle_irq);
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+
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/*
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* Initialize gpiolib for GPIOs 0-31. (The GPIO interrupt mask
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* registers for core #1 are at an offset of 0x18 from those of
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--- a/arch/arm/mach-orion5x/include/mach/entry-macro.S
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+++ /dev/null
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@@ -1,25 +0,0 @@
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-/*
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- * arch/arm/mach-orion5x/include/mach/entry-macro.S
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- *
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- * Low-level IRQ helper macros for Orion platforms
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- *
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- * This file is licensed under the terms of the GNU General Public
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- * License version 2. This program is licensed "as is" without any
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- * warranty of any kind, whether express or implied.
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- */
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-
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-#include <mach/bridge-regs.h>
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-
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- .macro get_irqnr_preamble, base, tmp
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- ldr \base, =MAIN_IRQ_CAUSE
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- .endm
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-
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- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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- ldr \irqstat, [\base, #0] @ main cause
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- ldr \tmp, [\base, #(MAIN_IRQ_MASK - MAIN_IRQ_CAUSE)] @ main mask
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- mov \irqnr, #0 @ default irqnr
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- @ find cause bits that are unmasked
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- ands \irqstat, \irqstat, \tmp @ clear Z flag if any
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- clzne \irqnr, \irqstat @ calc irqnr
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- rsbne \irqnr, \irqnr, #32
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- .endm
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--- a/arch/arm/mach-orion5x/irq.c
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+++ b/arch/arm/mach-orion5x/irq.c
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@@ -26,14 +26,6 @@ static int __initdata gpio0_irqs[4] = {
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IRQ_ORION5X_GPIO_24_31,
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};
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-#ifdef CONFIG_MULTI_IRQ_HANDLER
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-/*
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- * Compiling with both non-DT and DT support enabled, will
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- * break asm irq handler used by non-DT boards. Therefore,
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- * we provide a C-style irq handler even for non-DT boards,
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- * if MULTI_IRQ_HANDLER is set.
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- */
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-
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asmlinkage void
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__exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs)
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{
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@@ -47,15 +39,12 @@ __exception_irq_entry orion5x_legacy_han
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return;
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}
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}
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-#endif
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void __init orion5x_init_irq(void)
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{
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orion_irq_init(1, MAIN_IRQ_MASK);
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-#ifdef CONFIG_MULTI_IRQ_HANDLER
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set_handle_irq(orion5x_legacy_handle_irq);
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-#endif
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/*
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* Initialize gpiolib for GPIOs 0-31.
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--- a/arch/arm/plat-orion/irq.c
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+++ b/arch/arm/plat-orion/irq.c
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@@ -18,7 +18,6 @@
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#include <asm/exception.h>
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#include <plat/irq.h>
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#include <plat/orion-gpio.h>
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-#include <mach/bridge-regs.h>
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void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
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{
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--- a/arch/arm/plat-orion/mpp.c
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+++ b/arch/arm/plat-orion/mpp.c
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@@ -13,7 +13,6 @@
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#include <linux/mbus.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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-#include <mach/hardware.h>
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#include <plat/orion-gpio.h>
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#include <plat/mpp.h>
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