175 lines
5.4 KiB
Diff
175 lines
5.4 KiB
Diff
From 0b822e3b084ef66097cc19d9fcd35ee4ab6eccbc Mon Sep 17 00:00:00 2001
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Message-Id: <0b822e3b084ef66097cc19d9fcd35ee4ab6eccbc.1594742966.git.zanussi@kernel.org>
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In-Reply-To: <832f7d97d6b989a5b4860dd2dbec58ad6ad5ab81.1594742966.git.zanussi@kernel.org>
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References: <832f7d97d6b989a5b4860dd2dbec58ad6ad5ab81.1594742966.git.zanussi@kernel.org>
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From: Marc Zyngier <marc.zyngier@arm.com>
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Date: Fri, 27 Jul 2018 13:38:54 +0100
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Subject: [PATCH 008/329] irqchip/gic-v3-its: Move pending table allocation to
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init time
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Origin: https://www.kernel.org/pub/linux/kernel/projects/rt/4.19/older/patches-4.19.132-rt59.tar.xz
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Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
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---
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drivers/irqchip/irq-gic-v3-its.c | 80 +++++++++++++++++++-----------
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include/linux/irqchip/arm-gic-v3.h | 1 +
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2 files changed, 53 insertions(+), 28 deletions(-)
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diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
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index fe7d63cdfb1d..937c94625c36 100644
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--- a/drivers/irqchip/irq-gic-v3-its.c
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+++ b/drivers/irqchip/irq-gic-v3-its.c
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@@ -179,6 +179,7 @@ static DEFINE_RAW_SPINLOCK(vmovp_lock);
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static DEFINE_IDA(its_vpeid_ida);
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#define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist))
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+#define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu))
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#define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base)
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#define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K)
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@@ -1659,7 +1660,7 @@ static void its_free_prop_table(struct page *prop_page)
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get_order(LPI_PROPBASE_SZ));
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}
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-static int __init its_alloc_lpi_tables(void)
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+static int __init its_alloc_lpi_prop_table(void)
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{
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phys_addr_t paddr;
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@@ -2007,30 +2008,47 @@ static u64 its_clear_vpend_valid(void __iomem *vlpi_base)
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return val;
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}
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-static void its_cpu_init_lpis(void)
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+static int __init allocate_lpi_tables(void)
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{
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- void __iomem *rbase = gic_data_rdist_rd_base();
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- struct page *pend_page;
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- u64 val, tmp;
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+ int err, cpu;
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- /* If we didn't allocate the pending table yet, do it now */
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- pend_page = gic_data_rdist()->pend_page;
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- if (!pend_page) {
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- phys_addr_t paddr;
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+ err = its_alloc_lpi_prop_table();
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+ if (err)
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+ return err;
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+
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+ /*
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+ * We allocate all the pending tables anyway, as we may have a
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+ * mix of RDs that have had LPIs enabled, and some that
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+ * don't. We'll free the unused ones as each CPU comes online.
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+ */
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+ for_each_possible_cpu(cpu) {
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+ struct page *pend_page;
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pend_page = its_allocate_pending_table(GFP_NOWAIT);
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if (!pend_page) {
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- pr_err("Failed to allocate PENDBASE for CPU%d\n",
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- smp_processor_id());
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- return;
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+ pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu);
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+ return -ENOMEM;
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}
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- paddr = page_to_phys(pend_page);
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- pr_info("CPU%d: using LPI pending table @%pa\n",
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- smp_processor_id(), &paddr);
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- gic_data_rdist()->pend_page = pend_page;
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+ gic_data_rdist_cpu(cpu)->pend_page = pend_page;
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}
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+ return 0;
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+}
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+
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+static void its_cpu_init_lpis(void)
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+{
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+ void __iomem *rbase = gic_data_rdist_rd_base();
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+ struct page *pend_page;
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+ phys_addr_t paddr;
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+ u64 val, tmp;
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+
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+ if (gic_data_rdist()->lpi_enabled)
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+ return;
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+
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+ pend_page = gic_data_rdist()->pend_page;
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+ paddr = page_to_phys(pend_page);
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+
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/* set PROPBASE */
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val = (page_to_phys(gic_rdists->prop_page) |
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GICR_PROPBASER_InnerShareable |
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@@ -2106,6 +2124,10 @@ static void its_cpu_init_lpis(void)
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/* Make sure the GIC has seen the above */
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dsb(sy);
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+ gic_data_rdist()->lpi_enabled = true;
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+ pr_info("GICv3: CPU%d: using LPI pending table @%pa\n",
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+ smp_processor_id(),
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+ &paddr);
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}
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static void its_cpu_init_collection(struct its_node *its)
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@@ -3591,16 +3613,6 @@ static int redist_disable_lpis(void)
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u64 timeout = USEC_PER_SEC;
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u64 val;
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- /*
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- * If coming via a CPU hotplug event, we don't need to disable
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- * LPIs before trying to re-enable them. They are already
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- * configured and all is well in the world. Detect this case
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- * by checking the allocation of the pending table for the
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- * current CPU.
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- */
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- if (gic_data_rdist()->pend_page)
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- return 0;
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-
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if (!gic_rdists_supports_plpis()) {
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pr_info("CPU%d: LPIs not supported\n", smp_processor_id());
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return -ENXIO;
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@@ -3610,7 +3622,18 @@ static int redist_disable_lpis(void)
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if (!(val & GICR_CTLR_ENABLE_LPIS))
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return 0;
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- pr_warn("CPU%d: Booted with LPIs enabled, memory probably corrupted\n",
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+ /*
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+ * If coming via a CPU hotplug event, we don't need to disable
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+ * LPIs before trying to re-enable them. They are already
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+ * configured and all is well in the world.
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+ */
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+ if (gic_data_rdist()->lpi_enabled)
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+ return 0;
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+
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+ /*
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+ * From that point on, we only try to do some damage control.
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+ */
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+ pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n",
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smp_processor_id());
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add_taint(TAINT_CRAP, LOCKDEP_STILL_OK);
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@@ -3866,7 +3889,8 @@ int __init its_init(struct fwnode_handle *handle, struct rdists *rdists,
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}
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gic_rdists = rdists;
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- err = its_alloc_lpi_tables();
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+
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+ err = allocate_lpi_tables();
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if (err)
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return err;
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diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
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index 1d21e98d6854..fdddead7e307 100644
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--- a/include/linux/irqchip/arm-gic-v3.h
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+++ b/include/linux/irqchip/arm-gic-v3.h
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@@ -585,6 +585,7 @@ struct rdists {
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void __iomem *rd_base;
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struct page *pend_page;
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phys_addr_t phys_base;
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+ bool lpi_enabled;
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} __percpu *rdist;
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struct page *prop_page;
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u64 flags;
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--
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2.17.1
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