9776 lines
297 KiB
Diff
9776 lines
297 KiB
Diff
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/Documentation/parisc/todo CVS2_6_15_RC7_PA0/Documentation/parisc/todo
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|
--- LINUS_2_6_15_RC7/Documentation/parisc/todo 1969-12-31 17:00:00.000000000 -0700
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+++ CVS2_6_15_RC7_PA0/Documentation/parisc/todo 2005-10-28 19:28:34.000000000 -0600
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@@ -0,0 +1,82 @@
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+Status 2005-10-28 :
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+-------------------
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|
+ - Merged to 2.6.15
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+
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+Todo:
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+-----
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+
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+ - Review and eliminate all warnings for io accesses with an eye to
|
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+ turning on ioremap
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+ - 2005-02-04 (Carlos) Review the gettimeofday
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+ implementation, possibly use a light-weight-syscall and
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+ rely on cr16 and cpu speed for more accurate timing?
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+ This requires adding some backwards compatibility code in
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+ userspace since the LWS might not be available on the
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+ booted kernel. Detecting LWS is a problem.
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+ - PREEMPT support
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+ - CPU hotplug: we cannot bring up cpus after init, and we don't know if we can
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+ shutdown cpus
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+ - task_struct/thread_info split -- task_struct should not be visible in
|
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+ entry.S, we need to move some items into thread_info -- this includes
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+ pt_regs and maybe some of the flags (ptrace, etc)
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+ - flush_tlb_kernel_range is horribly inefficient. this has been merged
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+ with the userspace tlb flush, but it has a magic constant that needs
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+ tuning
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+ - Superdome support
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+ - our PDC early debug console hacks need to be cleaned up somehow
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+ - CPU IRQ affinity (willy)
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+ - Allow more than BITS_PER_LONG cpu interrupts to be allocated (willy)
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+ - 64-bit userspace (Leandro)
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+ - syscall signal return path needs work, we don't loop on signal
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+ delivery like other archs.
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+ = 2005-02-04 (Carlos) This entry should be more specific,
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+ we recently fixed do_signal such that it always
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+ loops forcing the signal. If this was the bug then it was
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+ fixed.
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+
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+
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+Drivers
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|
+-------
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+
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+ - write Lasi floppy driver
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+ - write Suckyio floppy driver
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+ - write spifi driver (rbrad)
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|
+ - modify ncr53c8xx driver for Outfield (735 & 755)
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+ - write GSC FDDI driver
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|
+ - write Timi ASIC (74x) support
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+ - EISA DMA support
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+
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+
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+Started and in progress:
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|
+------------------------
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+ - 2004-08-16 (Carlos)
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|
+ 64-bit binutils needs to be fixed to get multiple stub
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+ section support.
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|
+ - port hil_kbd.c to new input layer
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+ - port hil_ptr.c to new input layer
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+
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+
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+CONFIG options without help:
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|
+-----------------------------
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+ - REVIEW THESE ENTRIES!
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+
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+ _USB_OHCI_HCD (add parisc info?)
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+ _HP_SDC_RTC
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+ _HIL_MLC
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+ _HIL_KBD (to improve)
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+ _HIL_PTR (to improve)
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+
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+
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+Review all the todo entries below!
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+----------------------------------
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+
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+ - the fix for do_fork needs checking
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+ - ns87415 dma doesn't work reliably on suckyio-systems
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+ - (ab)use kmap/kunmap on 64-bit to eliminate flush_dcache calls.
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+ - cp_new_stat32 for sys_parisc32.c is inefficient; maybe it's better
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+ to fill in a tmp stat32 and just do copy_to_user in one go at the end?
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+ - investigate not putting in extable entries for put_kernel_asm; will
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+ probably reduce kernel size
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+ - fix HIL problem: ksoftirqd/0 eats 56% cpu (kernel 2.4 & kernel 2.6)
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+ - NPTL kernel support (CLONE_*TID flags need to be correctly handled by
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+ sys_clone() and friends)
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|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/ia64/ia32/ia32_signal.c CVS2_6_15_RC7_PA0/arch/ia64/ia32/ia32_signal.c
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--- LINUS_2_6_15_RC7/arch/ia64/ia32/ia32_signal.c 2005-12-27 13:25:34.000000000 -0700
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+++ CVS2_6_15_RC7_PA0/arch/ia64/ia32/ia32_signal.c 2005-09-14 06:54:22.000000000 -0600
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@@ -24,6 +24,7 @@
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#include <linux/unistd.h>
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#include <linux/wait.h>
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#include <linux/compat.h>
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+#include <linux/compat_siginfo.h>
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#include <asm/intrinsics.h>
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#include <asm/uaccess.h>
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diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/ia64/ia32/ia32priv.h CVS2_6_15_RC7_PA0/arch/ia64/ia32/ia32priv.h
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--- LINUS_2_6_15_RC7/arch/ia64/ia32/ia32priv.h 2005-12-27 13:25:34.000000000 -0700
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+++ CVS2_6_15_RC7_PA0/arch/ia64/ia32/ia32priv.h 2005-12-19 05:42:13.000000000 -0700
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@@ -225,58 +225,6 @@
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unsigned int st_ino_hi;
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};
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-typedef struct compat_siginfo {
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- int si_signo;
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- int si_errno;
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- int si_code;
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-
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- union {
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- int _pad[((128/sizeof(int)) - 3)];
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-
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- /* kill() */
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- struct {
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- unsigned int _pid; /* sender's pid */
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- unsigned int _uid; /* sender's uid */
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- } _kill;
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-
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- /* POSIX.1b timers */
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- struct {
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- compat_timer_t _tid; /* timer id */
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- int _overrun; /* overrun count */
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- char _pad[sizeof(unsigned int) - sizeof(int)];
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- compat_sigval_t _sigval; /* same as below */
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- int _sys_private; /* not to be passed to user */
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- } _timer;
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-
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- /* POSIX.1b signals */
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- struct {
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- unsigned int _pid; /* sender's pid */
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- unsigned int _uid; /* sender's uid */
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- compat_sigval_t _sigval;
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- } _rt;
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-
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- /* SIGCHLD */
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- struct {
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- unsigned int _pid; /* which child */
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- unsigned int _uid; /* sender's uid */
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- int _status; /* exit code */
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- compat_clock_t _utime;
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- compat_clock_t _stime;
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- } _sigchld;
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-
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- /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
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- struct {
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- unsigned int _addr; /* faulting insn/memory ref. */
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- } _sigfault;
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-
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- /* SIGPOLL */
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- struct {
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- int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
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- int _fd;
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- } _sigpoll;
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- } _sifields;
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-} compat_siginfo_t;
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-
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struct old_linux32_dirent {
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u32 d_ino;
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u32 d_offset;
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diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/cache.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/cache.c
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--- LINUS_2_6_15_RC7/arch/parisc/kernel/cache.c 2005-12-27 13:25:34.000000000 -0700
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+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/cache.c 2005-12-17 10:21:16.000000000 -0700
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@@ -29,9 +29,9 @@
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#include <asm/processor.h>
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#include <asm/sections.h>
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-int split_tlb;
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-int dcache_stride;
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-int icache_stride;
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+int split_tlb __read_mostly;
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+int dcache_stride __read_mostly;
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+int icache_stride __read_mostly;
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EXPORT_SYMBOL(dcache_stride);
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|
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@@ -45,29 +45,29 @@
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EXPORT_SYMBOL(pa_tlb_lock);
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#endif
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-struct pdc_cache_info cache_info;
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+struct pdc_cache_info cache_info __read_mostly;
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#ifndef CONFIG_PA20
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-static struct pdc_btlb_info btlb_info;
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+static struct pdc_btlb_info btlb_info __read_mostly;
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#endif
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#ifdef CONFIG_SMP
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void
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flush_data_cache(void)
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{
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- on_each_cpu((void (*)(void *))flush_data_cache_local, NULL, 1, 1);
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+ on_each_cpu(flush_data_cache_local, NULL, 1, 1);
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}
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void
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flush_instruction_cache(void)
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|
{
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- on_each_cpu((void (*)(void *))flush_instruction_cache_local, NULL, 1, 1);
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+ on_each_cpu(flush_instruction_cache_local, NULL, 1, 1);
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}
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#endif
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void
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flush_cache_all_local(void)
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{
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- flush_instruction_cache_local();
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- flush_data_cache_local();
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+ flush_instruction_cache_local(NULL);
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+ flush_data_cache_local(NULL);
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}
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EXPORT_SYMBOL(flush_cache_all_local);
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@@ -332,7 +332,7 @@
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}
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#define FLUSH_THRESHOLD 0x80000 /* 0.5MB */
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-int parisc_cache_flush_threshold = FLUSH_THRESHOLD;
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+int parisc_cache_flush_threshold __read_mostly = FLUSH_THRESHOLD;
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|
|
void parisc_setup_cache_timing(void)
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|
{
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|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/drivers.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/drivers.c
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--- LINUS_2_6_15_RC7/arch/parisc/kernel/drivers.c 2005-12-27 13:25:34.000000000 -0700
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+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/drivers.c 2005-12-17 11:18:59.000000000 -0700
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@@ -39,7 +39,7 @@
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#include <asm/parisc-device.h>
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|
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/* See comments in include/asm-parisc/pci.h */
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-struct hppa_dma_ops *hppa_dma_ops;
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+struct hppa_dma_ops *hppa_dma_ops __read_mostly;
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EXPORT_SYMBOL(hppa_dma_ops);
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|
|
static struct device root = {
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diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/firmware.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/firmware.c
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--- LINUS_2_6_15_RC7/arch/parisc/kernel/firmware.c 2005-12-27 13:25:34.000000000 -0700
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+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/firmware.c 2005-12-17 10:21:16.000000000 -0700
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@@ -80,7 +80,7 @@
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/* Firmware needs to be initially set to narrow to determine the
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* actual firmware width. */
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-int parisc_narrow_firmware = 1;
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+int parisc_narrow_firmware __read_mostly = 1;
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#endif
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|
|
/* On most currently-supported platforms, IODC I/O calls are 32-bit calls
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diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/inventory.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/inventory.c
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--- LINUS_2_6_15_RC7/arch/parisc/kernel/inventory.c 2005-12-27 13:25:34.000000000 -0700
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+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/inventory.c 2005-12-17 10:54:41.000000000 -0700
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@@ -38,7 +38,7 @@
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*/
|
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#undef DEBUG_PAT
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|
|
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-int pdc_type = PDC_TYPE_ILLEGAL;
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+int pdc_type __read_mostly = PDC_TYPE_ILLEGAL;
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|
|
void __init setup_pdc(void)
|
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{
|
|
@@ -120,8 +120,8 @@
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* pdc info is bad in this case).
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*/
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|
|
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- if ( ((start & (PAGE_SIZE - 1)) != 0)
|
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- || ((pages4k & ((1UL << PDC_PAGE_ADJ_SHIFT) - 1)) != 0) ) {
|
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+ if (unlikely( ((start & (PAGE_SIZE - 1)) != 0)
|
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+ || ((pages4k & ((1UL << PDC_PAGE_ADJ_SHIFT) - 1)) != 0) )) {
|
|
|
|
panic("Memory range doesn't align with page size!\n");
|
|
}
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/pci-dma.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/pci-dma.c
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|
--- LINUS_2_6_15_RC7/arch/parisc/kernel/pci-dma.c 2005-12-27 13:25:34.000000000 -0700
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+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/pci-dma.c 2005-12-17 10:54:41.000000000 -0700
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@@ -33,10 +33,10 @@
|
|
#include <asm/uaccess.h>
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|
#include <asm/tlbflush.h> /* for purge_tlb_*() macros */
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|
|
|
-static struct proc_dir_entry * proc_gsc_root = NULL;
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+static struct proc_dir_entry * proc_gsc_root __read_mostly = NULL;
|
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static int pcxl_proc_info(char *buffer, char **start, off_t offset, int length);
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-static unsigned long pcxl_used_bytes = 0;
|
|
-static unsigned long pcxl_used_pages = 0;
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+static unsigned long pcxl_used_bytes __read_mostly = 0;
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+static unsigned long pcxl_used_pages __read_mostly = 0;
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|
|
|
extern unsigned long pcxl_dma_start; /* Start of pcxl dma mapping area */
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static spinlock_t pcxl_res_lock;
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diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/pdc_chassis.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/pdc_chassis.c
|
|
--- LINUS_2_6_15_RC7/arch/parisc/kernel/pdc_chassis.c 2005-12-27 13:25:34.000000000 -0700
|
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+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/pdc_chassis.c 2005-12-17 11:18:59.000000000 -0700
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@@ -30,6 +30,7 @@
|
|
#include <linux/kernel.h>
|
|
#include <linux/reboot.h>
|
|
#include <linux/notifier.h>
|
|
+#include <linux/cache.h>
|
|
|
|
#include <asm/pdc_chassis.h>
|
|
#include <asm/processor.h>
|
|
@@ -38,8 +39,8 @@
|
|
|
|
|
|
#ifdef CONFIG_PDC_CHASSIS
|
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-static int pdc_chassis_old = 0;
|
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-static unsigned int pdc_chassis_enabled = 1;
|
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+static int pdc_chassis_old __read_mostly = 0;
|
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+static unsigned int pdc_chassis_enabled __read_mostly = 1;
|
|
|
|
|
|
/**
|
|
@@ -132,7 +133,7 @@
|
|
{
|
|
#ifdef CONFIG_PDC_CHASSIS
|
|
int handle = 0;
|
|
- if (pdc_chassis_enabled) {
|
|
+ if (likely(pdc_chassis_enabled)) {
|
|
DPRINTK(KERN_DEBUG "%s: parisc_pdc_chassis_init()\n", __FILE__);
|
|
|
|
/* Let see if we have something to handle... */
|
|
@@ -142,7 +143,7 @@
|
|
printk(KERN_INFO "Enabling PDC_PAT chassis codes support.\n");
|
|
handle = 1;
|
|
}
|
|
- else if (pdc_chassis_old) {
|
|
+ else if (unlikely(pdc_chassis_old)) {
|
|
printk(KERN_INFO "Enabling old style chassis LED panel support.\n");
|
|
handle = 1;
|
|
}
|
|
@@ -178,7 +179,7 @@
|
|
/* Maybe we should do that in an other way ? */
|
|
int retval = 0;
|
|
#ifdef CONFIG_PDC_CHASSIS
|
|
- if (pdc_chassis_enabled) {
|
|
+ if (likely(pdc_chassis_enabled)) {
|
|
|
|
DPRINTK(KERN_DEBUG "%s: pdc_chassis_send_status(%d)\n", __FILE__, message);
|
|
|
|
@@ -214,7 +215,7 @@
|
|
}
|
|
} else retval = -1;
|
|
#else
|
|
- if (pdc_chassis_old) {
|
|
+ if (unlikely(pdc_chassis_old)) {
|
|
switch (message) {
|
|
case PDC_CHASSIS_DIRECT_BSTART:
|
|
case PDC_CHASSIS_DIRECT_BCOMPLETE:
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/perf.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/perf.c
|
|
--- LINUS_2_6_15_RC7/arch/parisc/kernel/perf.c 2005-12-27 13:25:34.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/perf.c 2005-12-17 10:54:41.000000000 -0700
|
|
@@ -66,10 +66,10 @@
|
|
uint8_t write_control;
|
|
};
|
|
|
|
-static int perf_processor_interface = UNKNOWN_INTF;
|
|
-static int perf_enabled = 0;
|
|
+static int perf_processor_interface __read_mostly = UNKNOWN_INTF;
|
|
+static int perf_enabled __read_mostly = 0;
|
|
static spinlock_t perf_lock;
|
|
-struct parisc_device *cpu_device = NULL;
|
|
+struct parisc_device *cpu_device __read_mostly = NULL;
|
|
|
|
/* RDRs to write for PCX-W */
|
|
static int perf_rdrs_W[] =
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/process.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/process.c
|
|
--- LINUS_2_6_15_RC7/arch/parisc/kernel/process.c 2005-12-27 13:25:34.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/process.c 2005-12-17 10:54:41.000000000 -0700
|
|
@@ -54,7 +54,7 @@
|
|
#include <asm/uaccess.h>
|
|
#include <asm/unwind.h>
|
|
|
|
-static int hlt_counter;
|
|
+static int hlt_counter __read_mostly;
|
|
|
|
/*
|
|
* Power off function, if any
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/processor.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/processor.c
|
|
--- LINUS_2_6_15_RC7/arch/parisc/kernel/processor.c 2005-12-27 13:25:34.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/processor.c 2005-12-17 10:21:16.000000000 -0700
|
|
@@ -44,10 +44,10 @@
|
|
#include <asm/irq.h> /* for struct irq_region */
|
|
#include <asm/parisc-device.h>
|
|
|
|
-struct system_cpuinfo_parisc boot_cpu_data;
|
|
+struct system_cpuinfo_parisc boot_cpu_data __read_mostly;
|
|
EXPORT_SYMBOL(boot_cpu_data);
|
|
|
|
-struct cpuinfo_parisc cpu_data[NR_CPUS];
|
|
+struct cpuinfo_parisc cpu_data[NR_CPUS] __read_mostly;
|
|
|
|
/*
|
|
** PARISC CPU driver - claim "device" and initialize CPU data structures.
|
|
@@ -378,12 +378,12 @@
|
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return 0;
|
|
}
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|
|
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-static struct parisc_device_id processor_tbl[] = {
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+static struct parisc_device_id processor_tbl[] __read_mostly = {
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{ HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
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{ 0, }
|
|
};
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|
|
|
-static struct parisc_driver cpu_driver = {
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|
+static struct parisc_driver cpu_driver __read_mostly = {
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|
.name = "CPU",
|
|
.id_table = processor_tbl,
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|
.probe = processor_probe
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|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/setup.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/setup.c
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--- LINUS_2_6_15_RC7/arch/parisc/kernel/setup.c 2005-12-27 13:25:34.000000000 -0700
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+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/setup.c 2005-12-17 10:54:41.000000000 -0700
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@@ -46,15 +46,15 @@
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#include <asm/io.h>
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#include <asm/setup.h>
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-char command_line[COMMAND_LINE_SIZE];
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+char command_line[COMMAND_LINE_SIZE] __read_mostly;
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/* Intended for ccio/sba/cpu statistics under /proc/bus/{runway|gsc} */
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-struct proc_dir_entry * proc_runway_root = NULL;
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-struct proc_dir_entry * proc_gsc_root = NULL;
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-struct proc_dir_entry * proc_mckinley_root = NULL;
|
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+struct proc_dir_entry * proc_runway_root __read_mostly = NULL;
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+struct proc_dir_entry * proc_gsc_root __read_mostly = NULL;
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+struct proc_dir_entry * proc_mckinley_root __read_mostly = NULL;
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|
|
|
#if !defined(CONFIG_PA20) && (defined(CONFIG_IOMMU_CCIO) || defined(CONFIG_IOMMU_SBA))
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-int parisc_bus_is_phys = 1; /* Assume no IOMMU is present */
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|
+int parisc_bus_is_phys __read_mostly = 1; /* Assume no IOMMU is present */
|
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EXPORT_SYMBOL(parisc_bus_is_phys);
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#endif
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|
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/smp.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/smp.c
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--- LINUS_2_6_15_RC7/arch/parisc/kernel/smp.c 2005-12-27 13:25:35.000000000 -0700
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+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/smp.c 2005-12-17 10:54:41.000000000 -0700
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@@ -39,7 +39,7 @@
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#include <asm/atomic.h>
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#include <asm/current.h>
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#include <asm/delay.h>
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-#include <asm/pgalloc.h> /* for flush_tlb_all() proto/macro */
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+#include <asm/tlbflush.h>
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|
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#include <asm/io.h>
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#include <asm/irq.h> /* for CPU_IRQ_REGION and friends */
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@@ -58,9 +58,9 @@
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volatile struct task_struct *smp_init_current_idle_task;
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-static volatile int cpu_now_booting = 0; /* track which CPU is booting */
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+static volatile int cpu_now_booting __read_mostly = 0; /* track which CPU is booting */
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|
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-static int parisc_max_cpus = 1;
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+static int parisc_max_cpus __read_mostly = 1;
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|
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/* online cpus are ones that we've managed to bring up completely
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* possible cpus are all valid cpu
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@@ -71,8 +71,8 @@
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* empty in the beginning.
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*/
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|
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-cpumask_t cpu_online_map = CPU_MASK_NONE; /* Bitmap of online CPUs */
|
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-cpumask_t cpu_possible_map = CPU_MASK_ALL; /* Bitmap of Present CPUs */
|
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+cpumask_t cpu_online_map __read_mostly = CPU_MASK_NONE; /* Bitmap of online CPUs */
|
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+cpumask_t cpu_possible_map __read_mostly = CPU_MASK_ALL; /* Bitmap of Present CPUs */
|
|
|
|
EXPORT_SYMBOL(cpu_online_map);
|
|
EXPORT_SYMBOL(cpu_possible_map);
|
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@@ -406,12 +406,10 @@
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* as we want to ensure all TLB's flushed before proceeding.
|
|
*/
|
|
|
|
-extern void flush_tlb_all_local(void);
|
|
-
|
|
void
|
|
smp_flush_tlb_all(void)
|
|
{
|
|
- on_each_cpu((void (*)(void *))flush_tlb_all_local, NULL, 1, 1);
|
|
+ on_each_cpu(flush_tlb_all_local, NULL, 1, 1);
|
|
}
|
|
|
|
|
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@@ -487,7 +485,7 @@
|
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#endif
|
|
|
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flush_cache_all_local(); /* start with known state */
|
|
- flush_tlb_all_local();
|
|
+ flush_tlb_all_local(NULL);
|
|
|
|
local_irq_enable(); /* Interrupts have been off until now */
|
|
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/time.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/time.c
|
|
--- LINUS_2_6_15_RC7/arch/parisc/kernel/time.c 2005-12-27 13:25:35.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/time.c 2005-12-17 10:21:16.000000000 -0700
|
|
@@ -36,8 +36,8 @@
|
|
/* xtime and wall_jiffies keep wall-clock time */
|
|
extern unsigned long wall_jiffies;
|
|
|
|
-static long clocktick; /* timer cycles per tick */
|
|
-static long halftick;
|
|
+static long clocktick __read_mostly; /* timer cycles per tick */
|
|
+static long halftick __read_mostly;
|
|
|
|
#ifdef CONFIG_SMP
|
|
extern void smp_do_timer(struct pt_regs *regs);
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/topology.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/topology.c
|
|
--- LINUS_2_6_15_RC7/arch/parisc/kernel/topology.c 2005-12-27 13:25:35.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/topology.c 2005-12-17 11:18:59.000000000 -0700
|
|
@@ -20,8 +20,9 @@
|
|
#include <linux/init.h>
|
|
#include <linux/smp.h>
|
|
#include <linux/cpu.h>
|
|
+#include <linux/cache.h>
|
|
|
|
-static struct cpu cpu_devices[NR_CPUS];
|
|
+static struct cpu cpu_devices[NR_CPUS] __read_mostly;
|
|
|
|
static int __init topology_init(void)
|
|
{
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/unaligned.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/unaligned.c
|
|
--- LINUS_2_6_15_RC7/arch/parisc/kernel/unaligned.c 2005-12-27 13:25:35.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/unaligned.c 2005-12-17 10:21:16.000000000 -0700
|
|
@@ -122,7 +122,7 @@
|
|
#define ERR_NOTHANDLED -1
|
|
#define ERR_PAGEFAULT -2
|
|
|
|
-int unaligned_enabled = 1;
|
|
+int unaligned_enabled __read_mostly = 1;
|
|
|
|
void die_if_kernel (char *str, struct pt_regs *regs, long err);
|
|
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/unwind.c CVS2_6_15_RC7_PA0/arch/parisc/kernel/unwind.c
|
|
--- LINUS_2_6_15_RC7/arch/parisc/kernel/unwind.c 2005-12-27 13:25:35.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/unwind.c 2005-12-17 10:54:41.000000000 -0700
|
|
@@ -35,7 +35,7 @@
|
|
* we can call unwind_init as early in the bootup process as
|
|
* possible (before the slab allocator is initialized)
|
|
*/
|
|
-static struct unwind_table kernel_unwind_table;
|
|
+static struct unwind_table kernel_unwind_table __read_mostly;
|
|
static LIST_HEAD(unwind_tables);
|
|
|
|
static inline const struct unwind_table_entry *
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/kernel/vmlinux.lds.S CVS2_6_15_RC7_PA0/arch/parisc/kernel/vmlinux.lds.S
|
|
--- LINUS_2_6_15_RC7/arch/parisc/kernel/vmlinux.lds.S 2005-12-27 13:25:35.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/arch/parisc/kernel/vmlinux.lds.S 2005-12-19 08:10:07.000000000 -0700
|
|
@@ -68,7 +68,7 @@
|
|
RODATA
|
|
|
|
/* writeable */
|
|
- . = ALIGN(4096); /* Make sure this is paged aligned so
|
|
+ . = ALIGN(4096); /* Make sure this is page aligned so
|
|
that we can properly leave these
|
|
as writable */
|
|
data_start = .;
|
|
@@ -105,6 +105,10 @@
|
|
. = ALIGN(16);
|
|
.data.lock_aligned : { *(.data.lock_aligned) }
|
|
|
|
+ /* rarely changed data like cpu maps */
|
|
+ . = ALIGN(16);
|
|
+ .data.read_mostly : { *(.data.read_mostly) }
|
|
+
|
|
_edata = .; /* End of data section */
|
|
|
|
. = ALIGN(16384); /* init_task */
|
|
@@ -194,14 +198,7 @@
|
|
#endif
|
|
}
|
|
|
|
- /* Stabs debugging sections. */
|
|
- .stab 0 : { *(.stab) }
|
|
- .stabstr 0 : { *(.stabstr) }
|
|
- .stab.excl 0 : { *(.stab.excl) }
|
|
- .stab.exclstr 0 : { *(.stab.exclstr) }
|
|
- .stab.index 0 : { *(.stab.index) }
|
|
- .stab.indexstr 0 : { *(.stab.indexstr) }
|
|
- .comment 0 : { *(.comment) }
|
|
+ STABS_DEBUG
|
|
.note 0 : { *(.note) }
|
|
|
|
}
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/mm/init.c CVS2_6_15_RC7_PA0/arch/parisc/mm/init.c
|
|
--- LINUS_2_6_15_RC7/arch/parisc/mm/init.c 2005-12-27 13:25:35.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/arch/parisc/mm/init.c 2005-12-17 11:04:12.000000000 -0700
|
|
@@ -36,9 +36,9 @@
|
|
extern char __init_begin, __init_end;
|
|
|
|
#ifdef CONFIG_DISCONTIGMEM
|
|
-struct node_map_data node_data[MAX_NUMNODES];
|
|
-bootmem_data_t bmem_data[MAX_NUMNODES];
|
|
-unsigned char pfnnid_map[PFNNID_MAP_MAX];
|
|
+struct node_map_data node_data[MAX_NUMNODES] __read_mostly;
|
|
+bootmem_data_t bmem_data[MAX_NUMNODES] __read_mostly;
|
|
+unsigned char pfnnid_map[PFNNID_MAP_MAX] __read_mostly;
|
|
#endif
|
|
|
|
static struct resource data_resource = {
|
|
@@ -58,14 +58,14 @@
|
|
.flags = IORESOURCE_BUSY | IORESOURCE_MEM,
|
|
};
|
|
|
|
-static struct resource sysram_resources[MAX_PHYSMEM_RANGES];
|
|
+static struct resource sysram_resources[MAX_PHYSMEM_RANGES] __read_mostly;
|
|
|
|
/* The following array is initialized from the firmware specific
|
|
* information retrieved in kernel/inventory.c.
|
|
*/
|
|
|
|
-physmem_range_t pmem_ranges[MAX_PHYSMEM_RANGES];
|
|
-int npmem_ranges;
|
|
+physmem_range_t pmem_ranges[MAX_PHYSMEM_RANGES] __read_mostly;
|
|
+int npmem_ranges __read_mostly;
|
|
|
|
#ifdef __LP64__
|
|
#define MAX_MEM (~0UL)
|
|
@@ -73,7 +73,7 @@
|
|
#define MAX_MEM (3584U*1024U*1024U)
|
|
#endif /* !__LP64__ */
|
|
|
|
-static unsigned long mem_limit = MAX_MEM;
|
|
+static unsigned long mem_limit __read_mostly = MAX_MEM;
|
|
|
|
static void __init mem_limit_func(void)
|
|
{
|
|
@@ -300,6 +300,13 @@
|
|
max_pfn = start_pfn + npages;
|
|
}
|
|
|
|
+ /* IOMMU is always used to access "high mem" on those boxes
|
|
+ * that can support enough mem that a PCI device couldn't
|
|
+ * directly DMA to any physical addresses.
|
|
+ * ISA DMA support will need to revisit this.
|
|
+ */
|
|
+ max_low_pfn = max_pfn;
|
|
+
|
|
if ((bootmap_pfn - bootmap_start_pfn) != bootmap_pages) {
|
|
printk(KERN_WARNING "WARNING! bootmap sizing is messed up!\n");
|
|
BUG();
|
|
@@ -431,11 +438,11 @@
|
|
#define SET_MAP_OFFSET(x) ((void *)(((unsigned long)(x) + VM_MAP_OFFSET) \
|
|
& ~(VM_MAP_OFFSET-1)))
|
|
|
|
-void *vmalloc_start;
|
|
+void *vmalloc_start __read_mostly;
|
|
EXPORT_SYMBOL(vmalloc_start);
|
|
|
|
#ifdef CONFIG_PA11
|
|
-unsigned long pcxl_dma_start;
|
|
+unsigned long pcxl_dma_start __read_mostly;
|
|
#endif
|
|
|
|
void __init mem_init(void)
|
|
@@ -475,7 +482,7 @@
|
|
return 0;
|
|
}
|
|
|
|
-unsigned long *empty_zero_page;
|
|
+unsigned long *empty_zero_page __read_mostly;
|
|
|
|
void show_mem(void)
|
|
{
|
|
@@ -785,8 +792,6 @@
|
|
EXPORT_SYMBOL(map_hpux_gateway_page);
|
|
#endif
|
|
|
|
-extern void flush_tlb_all_local(void);
|
|
-
|
|
void __init paging_init(void)
|
|
{
|
|
int i;
|
|
@@ -795,7 +800,7 @@
|
|
pagetable_init();
|
|
gateway_init();
|
|
flush_cache_all_local(); /* start with known state */
|
|
- flush_tlb_all_local();
|
|
+ flush_tlb_all_local(NULL);
|
|
|
|
for (i = 0; i < npmem_ranges; i++) {
|
|
unsigned long zones_size[MAX_NR_ZONES] = { 0, 0, 0 };
|
|
@@ -986,7 +991,7 @@
|
|
do_recycle++;
|
|
}
|
|
spin_unlock(&sid_lock);
|
|
- on_each_cpu((void (*)(void *))flush_tlb_all_local, NULL, 1, 1);
|
|
+ on_each_cpu(flush_tlb_all_local, NULL, 1, 1);
|
|
if (do_recycle) {
|
|
spin_lock(&sid_lock);
|
|
recycle_sids(recycle_ndirty,recycle_dirty_array);
|
|
@@ -998,7 +1003,7 @@
|
|
void flush_tlb_all(void)
|
|
{
|
|
spin_lock(&sid_lock);
|
|
- flush_tlb_all_local();
|
|
+ flush_tlb_all_local(NULL);
|
|
recycle_sids();
|
|
spin_unlock(&sid_lock);
|
|
}
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/parisc/mm/ioremap.c CVS2_6_15_RC7_PA0/arch/parisc/mm/ioremap.c
|
|
--- LINUS_2_6_15_RC7/arch/parisc/mm/ioremap.c 2005-12-27 13:25:35.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/arch/parisc/mm/ioremap.c 2005-12-23 18:30:19.000000000 -0700
|
|
@@ -1,12 +1,9 @@
|
|
/*
|
|
* arch/parisc/mm/ioremap.c
|
|
*
|
|
- * Re-map IO memory to kernel address space so that we can access it.
|
|
- * This is needed for high PCI addresses that aren't mapped in the
|
|
- * 640k-1MB IO memory area on PC's
|
|
- *
|
|
* (C) Copyright 1995 1996 Linus Torvalds
|
|
* (C) Copyright 2001 Helge Deller <deller@gmx.de>
|
|
+ * (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
|
|
*/
|
|
|
|
#include <linux/vmalloc.h>
|
|
@@ -14,81 +11,107 @@
|
|
#include <linux/module.h>
|
|
#include <asm/io.h>
|
|
#include <asm/pgalloc.h>
|
|
+#include <asm/tlbflush.h>
|
|
+#include <asm/cacheflush.h>
|
|
|
|
-static inline void remap_area_pte(pte_t * pte, unsigned long address, unsigned long size,
|
|
- unsigned long phys_addr, unsigned long flags)
|
|
-{
|
|
- unsigned long end;
|
|
+static inline void
|
|
+remap_area_pte(pte_t *pte, unsigned long address, unsigned long size,
|
|
+ unsigned long phys_addr, unsigned long flags)
|
|
+{
|
|
+ unsigned long end, pfn;
|
|
+ pgprot_t pgprot = __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY |
|
|
+ _PAGE_ACCESSED | flags);
|
|
|
|
address &= ~PMD_MASK;
|
|
+
|
|
end = address + size;
|
|
if (end > PMD_SIZE)
|
|
end = PMD_SIZE;
|
|
- if (address >= end)
|
|
- BUG();
|
|
+
|
|
+ BUG_ON(address >= end);
|
|
+
|
|
+ pfn = phys_addr >> PAGE_SHIFT;
|
|
do {
|
|
- if (!pte_none(*pte)) {
|
|
- printk(KERN_ERR "remap_area_pte: page already exists\n");
|
|
- BUG();
|
|
- }
|
|
- set_pte(pte, mk_pte_phys(phys_addr, __pgprot(_PAGE_PRESENT | _PAGE_RW |
|
|
- _PAGE_DIRTY | _PAGE_ACCESSED | flags)));
|
|
+ BUG_ON(!pte_none(*pte));
|
|
+
|
|
+ set_pte(pte, pfn_pte(pfn, pgprot));
|
|
+
|
|
address += PAGE_SIZE;
|
|
- phys_addr += PAGE_SIZE;
|
|
+ pfn++;
|
|
pte++;
|
|
} while (address && (address < end));
|
|
}
|
|
|
|
-static inline int remap_area_pmd(pmd_t * pmd, unsigned long address, unsigned long size,
|
|
- unsigned long phys_addr, unsigned long flags)
|
|
+static inline int
|
|
+remap_area_pmd(pmd_t *pmd, unsigned long address, unsigned long size,
|
|
+ unsigned long phys_addr, unsigned long flags)
|
|
{
|
|
unsigned long end;
|
|
|
|
address &= ~PGDIR_MASK;
|
|
+
|
|
end = address + size;
|
|
if (end > PGDIR_SIZE)
|
|
end = PGDIR_SIZE;
|
|
+
|
|
+ BUG_ON(address >= end);
|
|
+
|
|
phys_addr -= address;
|
|
- if (address >= end)
|
|
- BUG();
|
|
do {
|
|
- pte_t * pte = pte_alloc_kernel(pmd, address);
|
|
+ pte_t *pte = pte_alloc_kernel(pmd, address);
|
|
if (!pte)
|
|
return -ENOMEM;
|
|
- remap_area_pte(pte, address, end - address, address + phys_addr, flags);
|
|
+
|
|
+ remap_area_pte(pte, address, end - address,
|
|
+ address + phys_addr, flags);
|
|
+
|
|
address = (address + PMD_SIZE) & PMD_MASK;
|
|
pmd++;
|
|
} while (address && (address < end));
|
|
+
|
|
return 0;
|
|
}
|
|
|
|
-#if (USE_HPPA_IOREMAP)
|
|
-static int remap_area_pages(unsigned long address, unsigned long phys_addr,
|
|
- unsigned long size, unsigned long flags)
|
|
+#if USE_HPPA_IOREMAP
|
|
+static int
|
|
+remap_area_pages(unsigned long address, unsigned long phys_addr,
|
|
+ unsigned long size, unsigned long flags)
|
|
{
|
|
- int error;
|
|
- pgd_t * dir;
|
|
+ pgd_t *dir;
|
|
+ int error = 0;
|
|
unsigned long end = address + size;
|
|
|
|
+ BUG_ON(address >= end);
|
|
+
|
|
phys_addr -= address;
|
|
- dir = pgd_offset(&init_mm, address);
|
|
+ dir = pgd_offset_k(address);
|
|
+
|
|
flush_cache_all();
|
|
- if (address >= end)
|
|
- BUG();
|
|
+
|
|
do {
|
|
+ pud_t *pud;
|
|
pmd_t *pmd;
|
|
- pmd = pmd_alloc(&init_mm, dir, address);
|
|
+
|
|
error = -ENOMEM;
|
|
+ pud = pud_alloc(&init_mm, dir, address);
|
|
+ if (!pud)
|
|
+ break;
|
|
+
|
|
+ pmd = pmd_alloc(&init_mm, pud, address);
|
|
if (!pmd)
|
|
break;
|
|
+
|
|
if (remap_area_pmd(pmd, address, end - address,
|
|
- phys_addr + address, flags))
|
|
+ phys_addr + address, flags))
|
|
break;
|
|
+
|
|
error = 0;
|
|
address = (address + PGDIR_SIZE) & PGDIR_MASK;
|
|
dir++;
|
|
} while (address && (address < end));
|
|
+
|
|
flush_tlb_all();
|
|
+
|
|
return error;
|
|
}
|
|
#endif /* USE_HPPA_IOREMAP */
|
|
@@ -123,8 +146,7 @@
|
|
|
|
/*
|
|
* Remap an arbitrary physical address space into the kernel virtual
|
|
- * address space. Needed when the kernel wants to access high addresses
|
|
- * directly.
|
|
+ * address space.
|
|
*
|
|
* NOTE! We need to allow non-page-aligned mappings too: we will obviously
|
|
* have to convert them into an offset in a page-aligned mapping, but the
|
|
@@ -148,8 +170,8 @@
|
|
#endif
|
|
|
|
#else
|
|
- void * addr;
|
|
- struct vm_struct * area;
|
|
+ void *addr;
|
|
+ struct vm_struct *area;
|
|
unsigned long offset, last_addr;
|
|
|
|
/* Don't allow wraparound or zero size */
|
|
@@ -167,9 +189,11 @@
|
|
t_addr = __va(phys_addr);
|
|
t_end = t_addr + (size - 1);
|
|
|
|
- for(page = virt_to_page(t_addr); page <= virt_to_page(t_end); page++)
|
|
+ for (page = virt_to_page(t_addr);
|
|
+ page <= virt_to_page(t_end); page++) {
|
|
if(!PageReserved(page))
|
|
return NULL;
|
|
+ }
|
|
}
|
|
|
|
/*
|
|
@@ -185,11 +209,13 @@
|
|
area = get_vm_area(size, VM_IOREMAP);
|
|
if (!area)
|
|
return NULL;
|
|
+
|
|
addr = area->addr;
|
|
if (remap_area_pages((unsigned long) addr, phys_addr, size, flags)) {
|
|
vfree(addr);
|
|
return NULL;
|
|
}
|
|
+
|
|
return (void __iomem *) (offset + (char *)addr);
|
|
#endif
|
|
}
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/arch/x86_64/ia32/ia32_signal.c CVS2_6_15_RC7_PA0/arch/x86_64/ia32/ia32_signal.c
|
|
--- LINUS_2_6_15_RC7/arch/x86_64/ia32/ia32_signal.c 2005-12-27 13:25:38.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/arch/x86_64/ia32/ia32_signal.c 2005-11-12 20:29:21.000000000 -0700
|
|
@@ -23,6 +23,7 @@
|
|
#include <linux/stddef.h>
|
|
#include <linux/personality.h>
|
|
#include <linux/compat.h>
|
|
+#include <linux/compat_siginfo.h>
|
|
#include <asm/ucontext.h>
|
|
#include <asm/uaccess.h>
|
|
#include <asm/i387.h>
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/net/tulip/media.c CVS2_6_15_RC7_PA0/drivers/net/tulip/media.c
|
|
--- LINUS_2_6_15_RC7/drivers/net/tulip/media.c 2005-12-27 13:25:46.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/net/tulip/media.c 2005-09-14 06:56:25.000000000 -0600
|
|
@@ -44,8 +44,10 @@
|
|
|
|
/* MII transceiver control section.
|
|
Read and write the MII registers using software-generated serial
|
|
- MDIO protocol. See the MII specifications or DP83840A data sheet
|
|
- for details. */
|
|
+ MDIO protocol.
|
|
+ See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management functions")
|
|
+ or DP83840A data sheet for more details.
|
|
+ */
|
|
|
|
int tulip_mdio_read(struct net_device *dev, int phy_id, int location)
|
|
{
|
|
@@ -261,24 +263,56 @@
|
|
u16 *reset_sequence = &((u16*)(p+3))[init_length];
|
|
int reset_length = p[2 + init_length*2];
|
|
misc_info = reset_sequence + reset_length;
|
|
- if (startup)
|
|
+ if (startup) {
|
|
+ int timeout = 10; /* max 1 ms */
|
|
for (i = 0; i < reset_length; i++)
|
|
iowrite32(get_u16(&reset_sequence[i]) << 16, ioaddr + CSR15);
|
|
+
|
|
+ /* flush posted writes */
|
|
+ ioread32(ioaddr + CSR15);
|
|
+
|
|
+ /* Sect 3.10.3 in DP83840A.pdf (p39) */
|
|
+ udelay(500);
|
|
+
|
|
+ /* Section 4.2 in DP83840A.pdf (p43) */
|
|
+ /* and IEEE 802.3 "22.2.4.1.1 Reset" */
|
|
+ while (timeout-- &&
|
|
+ (tulip_mdio_read (dev, phy_num, MII_BMCR) & BMCR_RESET))
|
|
+ udelay(100);
|
|
+ }
|
|
for (i = 0; i < init_length; i++)
|
|
iowrite32(get_u16(&init_sequence[i]) << 16, ioaddr + CSR15);
|
|
+
|
|
+ ioread32(ioaddr + CSR15); /* flush posted writes */
|
|
} else {
|
|
u8 *init_sequence = p + 2;
|
|
u8 *reset_sequence = p + 3 + init_length;
|
|
int reset_length = p[2 + init_length];
|
|
misc_info = (u16*)(reset_sequence + reset_length);
|
|
if (startup) {
|
|
+ int timeout = 10; /* max 1 ms */
|
|
iowrite32(mtable->csr12dir | 0x100, ioaddr + CSR12);
|
|
for (i = 0; i < reset_length; i++)
|
|
iowrite32(reset_sequence[i], ioaddr + CSR12);
|
|
+
|
|
+ /* flush posted writes */
|
|
+ ioread32(ioaddr + CSR12);
|
|
+
|
|
+ /* Sect 3.10.3 in DP83840A.pdf (p39) */
|
|
+ udelay(500);
|
|
+
|
|
+ /* Section 4.2 in DP83840A.pdf (p43) */
|
|
+ /* and IEEE 802.3 "22.2.4.1.1 Reset" */
|
|
+ while (timeout-- &&
|
|
+ (tulip_mdio_read (dev, phy_num, MII_BMCR) & BMCR_RESET))
|
|
+ udelay(100);
|
|
}
|
|
for (i = 0; i < init_length; i++)
|
|
iowrite32(init_sequence[i], ioaddr + CSR12);
|
|
+
|
|
+ ioread32(ioaddr + CSR12); /* flush posted writes */
|
|
}
|
|
+
|
|
tmp_info = get_u16(&misc_info[1]);
|
|
if (tmp_info)
|
|
tp->advertising[phy_num] = tmp_info | 1;
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/net/tulip/tulip.h CVS2_6_15_RC7_PA0/drivers/net/tulip/tulip.h
|
|
--- LINUS_2_6_15_RC7/drivers/net/tulip/tulip.h 2005-12-27 13:25:46.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/net/tulip/tulip.h 2005-09-14 06:56:25.000000000 -0600
|
|
@@ -474,8 +474,11 @@
|
|
udelay(10);
|
|
|
|
if (!i)
|
|
- printk(KERN_DEBUG "%s: tulip_stop_rxtx() failed\n",
|
|
- pci_name(tp->pdev));
|
|
+ printk(KERN_DEBUG "%s: tulip_stop_rxtx() failed"
|
|
+ " (CSR5 0x%x CSR6 0x%x)\n",
|
|
+ pci_name(tp->pdev),
|
|
+ ioread32(ioaddr + CSR5),
|
|
+ ioread32(ioaddr + CSR6));
|
|
}
|
|
}
|
|
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/net/tulip/tulip_core.c CVS2_6_15_RC7_PA0/drivers/net/tulip/tulip_core.c
|
|
--- LINUS_2_6_15_RC7/drivers/net/tulip/tulip_core.c 2005-12-27 13:25:46.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/net/tulip/tulip_core.c 2005-11-11 21:07:59.000000000 -0700
|
|
@@ -22,7 +22,7 @@
|
|
#else
|
|
#define DRV_VERSION "1.1.13"
|
|
#endif
|
|
-#define DRV_RELDATE "May 11, 2002"
|
|
+#define DRV_RELDATE "December 15, 2004"
|
|
|
|
|
|
#include <linux/module.h>
|
|
@@ -148,7 +148,7 @@
|
|
HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_PCI_MWI, tulip_timer },
|
|
|
|
/* DC21142, DC21143 */
|
|
- { "Digital DS21143 Tulip", 128, 0x0801fbff,
|
|
+ { "Digital DS21142/DS21143 Tulip", 128, 0x0801fbff,
|
|
HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI | HAS_NWAY
|
|
| HAS_INTR_MITIGATION | HAS_PCI_MWI, t21142_timer },
|
|
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/parisc/dino.c CVS2_6_15_RC7_PA0/drivers/parisc/dino.c
|
|
--- LINUS_2_6_15_RC7/drivers/parisc/dino.c 2005-12-27 13:25:46.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/parisc/dino.c 2005-12-14 00:49:15.000000000 -0700
|
|
@@ -124,6 +124,7 @@
|
|
|
|
#define DINO_IRQS 11 /* bits 0-10 are architected */
|
|
#define DINO_IRR_MASK 0x5ff /* only 10 bits are implemented */
|
|
+#define DINO_LOCAL_IRQS (DINO_IRQS+1)
|
|
|
|
#define DINO_MASK_IRQ(x) (1<<(x))
|
|
|
|
@@ -146,7 +147,7 @@
|
|
unsigned long txn_addr; /* EIR addr to generate interrupt */
|
|
u32 txn_data; /* EIR data assign to each dino */
|
|
u32 imr; /* IRQ's which are enabled */
|
|
- int global_irq[12]; /* map IMR bit to global irq */
|
|
+ int global_irq[DINO_LOCAL_IRQS]; /* map IMR bit to global irq */
|
|
#ifdef DINO_DEBUG
|
|
unsigned int dino_irr0; /* save most recent IRQ line stat */
|
|
#endif
|
|
@@ -297,7 +298,7 @@
|
|
static void dino_disable_irq(unsigned int irq)
|
|
{
|
|
struct dino_device *dino_dev = irq_desc[irq].handler_data;
|
|
- int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, irq);
|
|
+ int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
|
|
|
|
DBG(KERN_WARNING "%s(0x%p, %d)\n", __FUNCTION__, dino_dev, irq);
|
|
|
|
@@ -309,7 +310,7 @@
|
|
static void dino_enable_irq(unsigned int irq)
|
|
{
|
|
struct dino_device *dino_dev = irq_desc[irq].handler_data;
|
|
- int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, irq);
|
|
+ int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
|
|
u32 tmp;
|
|
|
|
DBG(KERN_WARNING "%s(0x%p, %d)\n", __FUNCTION__, dino_dev, irq);
|
|
@@ -435,6 +436,21 @@
|
|
dino_assign_irq(dino, irq, &dev->irq);
|
|
}
|
|
|
|
+
|
|
+/*
|
|
+ * Cirrus 6832 Cardbus reports wrong irq on RDI Tadpole PARISC Laptop (deller@gmx.de)
|
|
+ * (the irqs are off-by-one, not sure yet if this is a cirrus, dino-hardware or dino-driver problem...)
|
|
+ */
|
|
+static void __devinit quirk_cirrus_cardbus(struct pci_dev *dev)
|
|
+{
|
|
+ u8 new_irq = dev->irq - 1;
|
|
+ printk(KERN_INFO "PCI: Cirrus Cardbus IRQ fixup for %s, from %d to %d\n",
|
|
+ pci_name(dev), dev->irq, new_irq);
|
|
+ dev->irq = new_irq;
|
|
+}
|
|
+DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_6832, quirk_cirrus_cardbus );
|
|
+
|
|
+
|
|
static void __init
|
|
dino_bios_init(void)
|
|
{
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/parisc/eisa.c CVS2_6_15_RC7_PA0/drivers/parisc/eisa.c
|
|
--- LINUS_2_6_15_RC7/drivers/parisc/eisa.c 2005-12-27 13:25:46.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/parisc/eisa.c 2005-12-19 06:48:41.000000000 -0700
|
|
@@ -57,7 +57,7 @@
|
|
|
|
static DEFINE_SPINLOCK(eisa_irq_lock);
|
|
|
|
-void __iomem *eisa_eeprom_addr;
|
|
+void __iomem *eisa_eeprom_addr __read_mostly;
|
|
|
|
/* We can only have one EISA adapter in the system because neither
|
|
* implementation can be flexed.
|
|
@@ -141,7 +141,7 @@
|
|
* in the furure.
|
|
*/
|
|
/* irq 13,8,2,1,0 must be edge */
|
|
-static unsigned int eisa_irq_level; /* default to edge triggered */
|
|
+static unsigned int eisa_irq_level __read_mostly; /* default to edge triggered */
|
|
|
|
|
|
/* called by free irq */
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/parisc/eisa_eeprom.c CVS2_6_15_RC7_PA0/drivers/parisc/eisa_eeprom.c
|
|
--- LINUS_2_6_15_RC7/drivers/parisc/eisa_eeprom.c 2005-12-27 13:25:46.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/parisc/eisa_eeprom.c 2005-12-23 19:04:41.000000000 -0700
|
|
@@ -48,7 +48,7 @@
|
|
}
|
|
|
|
static ssize_t eisa_eeprom_read(struct file * file,
|
|
- char *buf, size_t count, loff_t *ppos )
|
|
+ char __user *buf, size_t count, loff_t *ppos )
|
|
{
|
|
unsigned char *tmp;
|
|
ssize_t ret;
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/parisc/lasi.c CVS2_6_15_RC7_PA0/drivers/parisc/lasi.c
|
|
--- LINUS_2_6_15_RC7/drivers/parisc/lasi.c 2005-12-27 13:25:46.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/parisc/lasi.c 2005-12-19 06:48:41.000000000 -0700
|
|
@@ -150,7 +150,7 @@
|
|
*
|
|
*/
|
|
|
|
-static unsigned long lasi_power_off_hpa;
|
|
+static unsigned long lasi_power_off_hpa __read_mostly;
|
|
|
|
static void lasi_power_off(void)
|
|
{
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/parisc/lba_pci.c CVS2_6_15_RC7_PA0/drivers/parisc/lba_pci.c
|
|
--- LINUS_2_6_15_RC7/drivers/parisc/lba_pci.c 2005-12-27 13:25:46.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/parisc/lba_pci.c 2005-12-19 06:48:41.000000000 -0700
|
|
@@ -167,7 +167,7 @@
|
|
|
|
/* non-postable I/O port space, densely packed */
|
|
#define LBA_PORT_BASE (PCI_F_EXTEND | 0xfee00000UL)
|
|
-static void __iomem *astro_iop_base;
|
|
+static void __iomem *astro_iop_base __read_mostly;
|
|
|
|
#define ELROY_HVERS 0x782
|
|
#define MERCURY_HVERS 0x783
|
|
@@ -695,11 +695,71 @@
|
|
}
|
|
}
|
|
}
|
|
+
|
|
+
|
|
+/*
|
|
+ * truncate_pat_collision: Deal with overlaps or outright collisions
|
|
+ * between PAT PDC reported ranges.
|
|
+ *
|
|
+ * Broken PA8800 firmware will report lmmio range that
|
|
+ * overlaps with CPU HPA. Just truncate the lmmio range.
|
|
+ *
|
|
+ * BEWARE: conflicts with this lmmio range may be an
|
|
+ * elmmio range which is pointing down another rope.
|
|
+ *
|
|
+ * FIXME: only deals with one collision per range...theoretically we
|
|
+ * could have several. Supporting more than one collision will get messy.
|
|
+ */
|
|
+static unsigned long
|
|
+truncate_pat_collision(struct resource *root, struct resource *new)
|
|
+{
|
|
+ unsigned long start = new->start;
|
|
+ unsigned long end = new->end;
|
|
+ struct resource *tmp = root->child;
|
|
+
|
|
+ if (end <= start || start < root->start || !tmp)
|
|
+ return 0;
|
|
+
|
|
+ /* find first overlap */
|
|
+ while (tmp && tmp->end < start)
|
|
+ tmp = tmp->sibling;
|
|
+
|
|
+ /* no entries overlap */
|
|
+ if (!tmp) return 0;
|
|
+
|
|
+ /* found one that starts behind the new one
|
|
+ ** Don't need to do anything.
|
|
+ */
|
|
+ if (tmp->start >= end) return 0;
|
|
+
|
|
+ if (tmp->start <= start) {
|
|
+ /* "front" of new one overlaps */
|
|
+ new->start = tmp->end + 1;
|
|
+
|
|
+ if (tmp->end >= end) {
|
|
+ /* AACCKK! totally overlaps! drop this range. */
|
|
+ return 1;
|
|
+ }
|
|
+ }
|
|
+
|
|
+ if (tmp->end < end ) {
|
|
+ /* "end" of new one overlaps */
|
|
+ new->end = tmp->start - 1;
|
|
+ }
|
|
+
|
|
+ printk(KERN_WARNING "LBA: Truncating lmmio_space [%lx/%lx] "
|
|
+ "to [%lx,%lx]\n",
|
|
+ start, end,
|
|
+ new->start, new->end );
|
|
+
|
|
+ return 0; /* truncation successful */
|
|
+}
|
|
+
|
|
#else
|
|
-#define lba_claim_dev_resources(dev)
|
|
+#define lba_claim_dev_resources(dev) do { } while (0)
|
|
+#define truncate_pat_collision(r,n) (0)
|
|
#endif
|
|
|
|
-
|
|
/*
|
|
** The algorithm is generic code.
|
|
** But it needs to access local data structures to get the IRQ base.
|
|
@@ -747,6 +807,9 @@
|
|
lba_dump_res(&ioport_resource, 2);
|
|
BUG();
|
|
}
|
|
+ /* advertize Host bridge resources to PCI bus */
|
|
+ bus->resource[0] = &(ldev->hba.io_space);
|
|
+ i = 1;
|
|
|
|
if (ldev->hba.elmmio_space.start) {
|
|
err = request_resource(&iomem_resource,
|
|
@@ -760,23 +823,35 @@
|
|
|
|
/* lba_dump_res(&iomem_resource, 2); */
|
|
/* BUG(); */
|
|
- }
|
|
+ } else
|
|
+ bus->resource[i++] = &(ldev->hba.elmmio_space);
|
|
}
|
|
|
|
- err = request_resource(&iomem_resource, &(ldev->hba.lmmio_space));
|
|
- if (err < 0) {
|
|
- /* FIXME overlaps with elmmio will fail here.
|
|
- * Need to prune (or disable) the distributed range.
|
|
- *
|
|
- * BEWARE: conflicts with this lmmio range may be
|
|
- * elmmio range which is pointing down another rope.
|
|
- */
|
|
|
|
- printk("FAILED: lba_fixup_bus() request for "
|
|
+ /* Overlaps with elmmio can (and should) fail here.
|
|
+ * We will prune (or ignore) the distributed range.
|
|
+ *
|
|
+ * FIXME: SBA code should register all elmmio ranges first.
|
|
+ * that would take care of elmmio ranges routed
|
|
+ * to a different rope (already discovered) from
|
|
+ * getting registered *after* LBA code has already
|
|
+ * registered it's distributed lmmio range.
|
|
+ */
|
|
+ if (truncate_pat_collision(&iomem_resource,
|
|
+ &(ldev->hba.lmmio_space))) {
|
|
+
|
|
+ printk(KERN_WARNING "LBA: lmmio_space [%lx/%lx] duplicate!\n",
|
|
+ ldev->hba.lmmio_space.start,
|
|
+ ldev->hba.lmmio_space.end);
|
|
+ } else {
|
|
+ err = request_resource(&iomem_resource, &(ldev->hba.lmmio_space));
|
|
+ if (err < 0) {
|
|
+ printk(KERN_ERR "FAILED: lba_fixup_bus() request for "
|
|
"lmmio_space [%lx/%lx]\n",
|
|
ldev->hba.lmmio_space.start,
|
|
ldev->hba.lmmio_space.end);
|
|
- /* lba_dump_res(&iomem_resource, 2); */
|
|
+ } else
|
|
+ bus->resource[i++] = &(ldev->hba.lmmio_space);
|
|
}
|
|
|
|
#ifdef CONFIG_64BIT
|
|
@@ -791,18 +866,10 @@
|
|
lba_dump_res(&iomem_resource, 2);
|
|
BUG();
|
|
}
|
|
+ bus->resource[i++] = &(ldev->hba.gmmio_space);
|
|
}
|
|
#endif
|
|
|
|
- /* advertize Host bridge resources to PCI bus */
|
|
- bus->resource[0] = &(ldev->hba.io_space);
|
|
- bus->resource[1] = &(ldev->hba.lmmio_space);
|
|
- i=2;
|
|
- if (ldev->hba.elmmio_space.start)
|
|
- bus->resource[i++] = &(ldev->hba.elmmio_space);
|
|
- if (ldev->hba.gmmio_space.start)
|
|
- bus->resource[i++] = &(ldev->hba.gmmio_space);
|
|
-
|
|
}
|
|
|
|
list_for_each(ln, &bus->devices) {
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/parisc/led.c CVS2_6_15_RC7_PA0/drivers/parisc/led.c
|
|
--- LINUS_2_6_15_RC7/drivers/parisc/led.c 2005-12-27 13:25:46.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/parisc/led.c 2005-12-19 06:48:41.000000000 -0700
|
|
@@ -3,7 +3,7 @@
|
|
*
|
|
* (c) Copyright 2000 Red Hat Software
|
|
* (c) Copyright 2000 Helge Deller <hdeller@redhat.com>
|
|
- * (c) Copyright 2001-2004 Helge Deller <deller@gmx.de>
|
|
+ * (c) Copyright 2001-2005 Helge Deller <deller@gmx.de>
|
|
* (c) Copyright 2001 Randolph Chung <tausq@debian.org>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
@@ -56,13 +56,13 @@
|
|
relatively large amount of CPU time, some of the calculations can be
|
|
turned off with the following variables (controlled via procfs) */
|
|
|
|
-static int led_type = -1;
|
|
+static int led_type __read_mostly = -1;
|
|
static unsigned char lastleds; /* LED state from most recent update */
|
|
-static unsigned int led_heartbeat = 1;
|
|
-static unsigned int led_diskio = 1;
|
|
-static unsigned int led_lanrxtx = 1;
|
|
-static char lcd_text[32];
|
|
-static char lcd_text_default[32];
|
|
+static unsigned int led_heartbeat __read_mostly = 1;
|
|
+static unsigned int led_diskio __read_mostly = 1;
|
|
+static unsigned int led_lanrxtx __read_mostly = 1;
|
|
+static char lcd_text[32] __read_mostly;
|
|
+static char lcd_text_default[32] __read_mostly;
|
|
|
|
|
|
static struct workqueue_struct *led_wq;
|
|
@@ -108,7 +108,7 @@
|
|
/* lcd_info is pre-initialized to the values needed to program KittyHawk LCD's
|
|
* HP seems to have used Sharp/Hitachi HD44780 LCDs most of the time. */
|
|
static struct pdc_chassis_lcd_info_ret_block
|
|
-lcd_info __attribute__((aligned(8))) =
|
|
+lcd_info __attribute__((aligned(8))) __read_mostly =
|
|
{
|
|
.model = DISPLAY_MODEL_LCD,
|
|
.lcd_width = 16,
|
|
@@ -144,7 +144,7 @@
|
|
device_initcall(start_task);
|
|
|
|
/* ptr to LCD/LED-specific function */
|
|
-static void (*led_func_ptr) (unsigned char);
|
|
+static void (*led_func_ptr) (unsigned char) __read_mostly;
|
|
|
|
#ifdef CONFIG_PROC_FS
|
|
static int led_proc_read(char *page, char **start, off_t off, int count,
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/parisc/pdc_stable.c CVS2_6_15_RC7_PA0/drivers/parisc/pdc_stable.c
|
|
--- LINUS_2_6_15_RC7/drivers/parisc/pdc_stable.c 2005-12-27 13:25:46.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/parisc/pdc_stable.c 2005-12-19 06:48:41.000000000 -0700
|
|
@@ -56,7 +56,7 @@
|
|
#include <asm/uaccess.h>
|
|
#include <asm/hardware.h>
|
|
|
|
-#define PDCS_VERSION "0.09"
|
|
+#define PDCS_VERSION "0.10"
|
|
|
|
#define PDCS_ADDR_PPRI 0x00
|
|
#define PDCS_ADDR_OSID 0x40
|
|
@@ -70,7 +70,7 @@
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_VERSION(PDCS_VERSION);
|
|
|
|
-static unsigned long pdcs_size = 0;
|
|
+static unsigned long pdcs_size __read_mostly;
|
|
|
|
/* This struct defines what we need to deal with a parisc pdc path entry */
|
|
struct pdcspath_entry {
|
|
@@ -194,7 +194,8 @@
|
|
return -EIO;
|
|
}
|
|
|
|
- entry->ready = 1;
|
|
+ /* kobject is already registered */
|
|
+ entry->ready = 2;
|
|
|
|
DPRINTK("%s: device: 0x%p\n", __func__, entry->dev);
|
|
|
|
@@ -653,15 +654,21 @@
|
|
{
|
|
unsigned short i;
|
|
struct pdcspath_entry *entry;
|
|
+ int err;
|
|
|
|
for (i = 0; (entry = pdcspath_entries[i]); i++) {
|
|
if (pdcspath_fetch(entry) < 0)
|
|
continue;
|
|
|
|
- kobject_set_name(&entry->kobj, "%s", entry->name);
|
|
+ if ((err = kobject_set_name(&entry->kobj, "%s", entry->name)))
|
|
+ return err;
|
|
kobj_set_kset_s(entry, paths_subsys);
|
|
- kobject_register(&entry->kobj);
|
|
-
|
|
+ if ((err = kobject_register(&entry->kobj)))
|
|
+ return err;
|
|
+
|
|
+ /* kobject is now registered */
|
|
+ entry->ready = 2;
|
|
+
|
|
if (!entry->dev)
|
|
continue;
|
|
|
|
@@ -675,14 +682,14 @@
|
|
/**
|
|
* pdcs_unregister_pathentries - Routine called when unregistering the module.
|
|
*/
|
|
-static inline void __exit
|
|
+static inline void
|
|
pdcs_unregister_pathentries(void)
|
|
{
|
|
unsigned short i;
|
|
struct pdcspath_entry *entry;
|
|
|
|
for (i = 0; (entry = pdcspath_entries[i]); i++)
|
|
- if (entry->ready)
|
|
+ if (entry->ready >= 2)
|
|
kobject_unregister(&entry->kobj);
|
|
}
|
|
|
|
@@ -704,7 +711,7 @@
|
|
|
|
/* For now we'll register the pdc subsys within this driver */
|
|
if ((rc = firmware_register(&pdc_subsys)))
|
|
- return rc;
|
|
+ goto fail_firmreg;
|
|
|
|
/* Don't forget the info entry */
|
|
for (i = 0; (attr = pdcs_subsys_attrs[i]) && !error; i++)
|
|
@@ -713,12 +720,25 @@
|
|
|
|
/* register the paths subsys as a subsystem of pdc subsys */
|
|
kset_set_kset_s(&paths_subsys, pdc_subsys);
|
|
- subsystem_register(&paths_subsys);
|
|
+ if ((rc= subsystem_register(&paths_subsys)))
|
|
+ goto fail_subsysreg;
|
|
|
|
/* now we create all "files" for the paths subsys */
|
|
- pdcs_register_pathentries();
|
|
+ if ((rc = pdcs_register_pathentries()))
|
|
+ goto fail_pdcsreg;
|
|
+
|
|
+ return rc;
|
|
|
|
- return 0;
|
|
+fail_pdcsreg:
|
|
+ pdcs_unregister_pathentries();
|
|
+ subsystem_unregister(&paths_subsys);
|
|
+
|
|
+fail_subsysreg:
|
|
+ firmware_unregister(&pdc_subsys);
|
|
+
|
|
+fail_firmreg:
|
|
+ printk(KERN_INFO "PDC Stable Storage bailing out\n");
|
|
+ return rc;
|
|
}
|
|
|
|
static void __exit
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/parisc/power.c CVS2_6_15_RC7_PA0/drivers/parisc/power.c
|
|
--- LINUS_2_6_15_RC7/drivers/parisc/power.c 2005-12-27 13:25:46.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/parisc/power.c 2005-12-19 06:48:41.000000000 -0700
|
|
@@ -2,7 +2,7 @@
|
|
* linux/arch/parisc/kernel/power.c
|
|
* HP PARISC soft power switch support driver
|
|
*
|
|
- * Copyright (c) 2001-2002 Helge Deller <deller@gmx.de>
|
|
+ * Copyright (c) 2001-2005 Helge Deller <deller@gmx.de>
|
|
* All rights reserved.
|
|
*
|
|
*
|
|
@@ -102,7 +102,7 @@
|
|
|
|
static void poweroff(void)
|
|
{
|
|
- static int powering_off;
|
|
+ static int powering_off __read_mostly;
|
|
|
|
if (powering_off)
|
|
return;
|
|
@@ -113,7 +113,7 @@
|
|
|
|
|
|
/* local time-counter for shutdown */
|
|
-static int shutdown_timer;
|
|
+static int shutdown_timer __read_mostly;
|
|
|
|
/* check, give feedback and start shutdown after one second */
|
|
static void process_shutdown(void)
|
|
@@ -139,7 +139,7 @@
|
|
DECLARE_TASKLET_DISABLED(power_tasklet, NULL, 0);
|
|
|
|
/* soft power switch enabled/disabled */
|
|
-int pwrsw_enabled = 1;
|
|
+int pwrsw_enabled __read_mostly = 1;
|
|
|
|
/*
|
|
* On gecko style machines (e.g. 712/xx and 715/xx)
|
|
@@ -149,7 +149,7 @@
|
|
*/
|
|
static void gecko_tasklet_func(unsigned long unused)
|
|
{
|
|
- if (!pwrsw_enabled)
|
|
+ if (unlikely(!pwrsw_enabled))
|
|
return;
|
|
|
|
if (__getDIAG(25) & 0x80000000) {
|
|
@@ -173,7 +173,7 @@
|
|
{
|
|
unsigned long current_status;
|
|
|
|
- if (!pwrsw_enabled)
|
|
+ if (unlikely(!pwrsw_enabled))
|
|
return;
|
|
|
|
current_status = gsc_readl(soft_power_reg);
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/parport/Kconfig CVS2_6_15_RC7_PA0/drivers/parport/Kconfig
|
|
--- LINUS_2_6_15_RC7/drivers/parport/Kconfig 2005-12-27 13:25:47.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/parport/Kconfig 2005-12-07 14:28:17.000000000 -0700
|
|
@@ -121,6 +121,7 @@
|
|
tristate
|
|
default GSC
|
|
depends on PARPORT
|
|
+ select PARPORT_NOT_PC
|
|
|
|
config PARPORT_SUNBPP
|
|
tristate "Sparc hardware (EXPERIMENTAL)"
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/pcmcia/Kconfig CVS2_6_15_RC7_PA0/drivers/pcmcia/Kconfig
|
|
--- LINUS_2_6_15_RC7/drivers/pcmcia/Kconfig 2005-12-27 13:25:47.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/pcmcia/Kconfig 2005-12-11 10:56:12.000000000 -0700
|
|
@@ -200,7 +200,7 @@
|
|
|
|
config PCMCIA_PROBE
|
|
bool
|
|
- default y if ISA && !ARCH_SA1100 && !ARCH_CLPS711X
|
|
+ default y if ISA && !ARCH_SA1100 && !ARCH_CLPS711XS && !PARISC
|
|
|
|
config M32R_PCC
|
|
bool "M32R PCMCIA I/F"
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/53c700.c CVS2_6_15_RC7_PA0/drivers/scsi/53c700.c
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/53c700.c 2005-12-27 13:25:48.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/53c700.c 2005-11-11 21:08:09.000000000 -0700
|
|
@@ -302,6 +302,7 @@
|
|
__u8 *memory;
|
|
__u32 *script;
|
|
struct Scsi_Host *host;
|
|
+ const char *chipname;
|
|
static int banner = 0;
|
|
int j;
|
|
|
|
@@ -402,11 +403,11 @@
|
|
printk(KERN_NOTICE "53c700: Version " NCR_700_VERSION " By James.Bottomley@HansenPartnership.com\n");
|
|
banner = 1;
|
|
}
|
|
+ chipname = hostdata->chip710 ? "53c710" : \
|
|
+ (hostdata->fast ? "53c700-66" : "53c700");
|
|
printk(KERN_NOTICE "scsi%d: %s rev %d %s\n", host->host_no,
|
|
- hostdata->chip710 ? "53c710" :
|
|
- (hostdata->fast ? "53c700-66" : "53c700"),
|
|
- hostdata->rev, hostdata->differential ?
|
|
- "(Differential)" : "");
|
|
+ chipname, hostdata->rev,
|
|
+ hostdata->differential ? "(Differential)" : "");
|
|
/* reset the chip */
|
|
NCR_700_chip_reset(host);
|
|
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/Kconfig CVS2_6_15_RC7_PA0/drivers/scsi/Kconfig
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/Kconfig 2005-12-27 13:25:48.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/Kconfig 2005-12-12 09:35:31.000000000 -0700
|
|
@@ -1066,7 +1066,7 @@
|
|
memory using PCI DAC cycles.
|
|
|
|
config SCSI_SYM53C8XX_DEFAULT_TAGS
|
|
- int "default tagged command queue depth"
|
|
+ int "Default tagged command queue depth"
|
|
depends on SCSI_SYM53C8XX_2
|
|
default "16"
|
|
help
|
|
@@ -1077,7 +1077,7 @@
|
|
exceed CONFIG_SCSI_SYM53C8XX_MAX_TAGS.
|
|
|
|
config SCSI_SYM53C8XX_MAX_TAGS
|
|
- int "maximum number of queued commands"
|
|
+ int "Maximum number of queued commands"
|
|
depends on SCSI_SYM53C8XX_2
|
|
default "64"
|
|
help
|
|
@@ -1086,13 +1086,14 @@
|
|
possible. The driver supports up to 256 queued commands per device.
|
|
This value is used as a compiled-in hard limit.
|
|
|
|
-config SCSI_SYM53C8XX_IOMAPPED
|
|
- bool "use port IO"
|
|
+config SCSI_SYM53C8XX_MMIO
|
|
+ bool "Use memory mapped IO"
|
|
depends on SCSI_SYM53C8XX_2
|
|
+ default y
|
|
help
|
|
- If you say Y here, the driver will use port IO to access
|
|
- the card. This is significantly slower then using memory
|
|
- mapped IO. Most people should answer N.
|
|
+ Memory mapped IO is faster than Port IO. Most people should
|
|
+ answer Y here, but some machines may have problems. If you have
|
|
+ to answer N here, please report the problem to the maintainer.
|
|
|
|
config SCSI_IPR
|
|
tristate "IBM Power Linux RAID adapter support"
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/constants.c CVS2_6_15_RC7_PA0/drivers/scsi/constants.c
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/constants.c 2005-12-27 13:25:48.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/constants.c 2005-12-12 17:01:16.000000000 -0700
|
|
@@ -114,8 +114,7 @@
|
|
{0xd, "Report supported task management functions"},
|
|
{0xe, "Report priority"},
|
|
};
|
|
-#define MAINT_IN_SZ \
|
|
- (int)(sizeof(maint_in_arr) / sizeof(maint_in_arr[0]))
|
|
+#define MAINT_IN_SZ (int)ARRAY_SIZE(maint_in_arr)
|
|
|
|
static const struct value_name_pair maint_out_arr[] = {
|
|
{0x6, "Set device identifier"},
|
|
@@ -123,34 +122,29 @@
|
|
{0xb, "Change aliases"},
|
|
{0xe, "Set priority"},
|
|
};
|
|
-#define MAINT_OUT_SZ \
|
|
- (int)(sizeof(maint_out_arr) / sizeof(maint_out_arr[0]))
|
|
+#define MAINT_OUT_SZ (int)ARRAY_SIZE(maint_out_arr)
|
|
|
|
static const struct value_name_pair serv_in12_arr[] = {
|
|
{0x1, "Read media serial number"},
|
|
};
|
|
-#define SERV_IN12_SZ \
|
|
- (int)(sizeof(serv_in12_arr) / sizeof(serv_in12_arr[0]))
|
|
+#define SERV_IN12_SZ (int)ARRAY_SIZE(serv_in12_arr)
|
|
|
|
static const struct value_name_pair serv_out12_arr[] = {
|
|
{-1, "dummy entry"},
|
|
};
|
|
-#define SERV_OUT12_SZ \
|
|
- (int)(sizeof(serv_out12_arr) / sizeof(serv_in12_arr[0]))
|
|
+#define SERV_OUT12_SZ (int)ARRAY_SIZE(serv_out12_arr)
|
|
|
|
static const struct value_name_pair serv_in16_arr[] = {
|
|
{0x10, "Read capacity(16)"},
|
|
{0x11, "Read long(16)"},
|
|
};
|
|
-#define SERV_IN16_SZ \
|
|
- (int)(sizeof(serv_in16_arr) / sizeof(serv_in16_arr[0]))
|
|
+#define SERV_IN16_SZ (int)ARRAY_SIZE(serv_in16_arr)
|
|
|
|
static const struct value_name_pair serv_out16_arr[] = {
|
|
{0x11, "Write long(16)"},
|
|
{0x1f, "Notify data transfer device(16)"},
|
|
};
|
|
-#define SERV_OUT16_SZ \
|
|
- (int)(sizeof(serv_out16_arr) / sizeof(serv_in16_arr[0]))
|
|
+#define SERV_OUT16_SZ (int)ARRAY_SIZE(serv_out16_arr)
|
|
|
|
static const struct value_name_pair variable_length_arr[] = {
|
|
{0x1, "Rebuild(32)"},
|
|
@@ -190,8 +184,7 @@
|
|
{0x8f7e, "Perform SCSI command (osd)"},
|
|
{0x8f7f, "Perform task management function (osd)"},
|
|
};
|
|
-#define VARIABLE_LENGTH_SZ \
|
|
- (int)(sizeof(variable_length_arr) / sizeof(variable_length_arr[0]))
|
|
+#define VARIABLE_LENGTH_SZ (int)ARRAY_SIZE(variable_length_arr)
|
|
|
|
static const char * get_sa_name(const struct value_name_pair * arr,
|
|
int arr_sz, int service_action)
|
|
@@ -1287,19 +1280,20 @@
|
|
/* 0x0c */ "Bus device reset", "Abort Tag", "Clear Queue",
|
|
/* 0x0f */ "Initiate Recovery", "Release Recovery"
|
|
};
|
|
-#define NO_ONE_BYTE_MSGS (sizeof(one_byte_msgs) / sizeof (const char *))
|
|
+#define NO_ONE_BYTE_MSGS ARRAY_SIZE(one_byte_msgs)
|
|
|
|
static const char *two_byte_msgs[] = {
|
|
-/* 0x20 */ "Simple Queue Tag", "Head of Queue Tag", "Ordered Queue Tag"
|
|
+/* 0x20 */ "Simple Queue Tag", "Head of Queue Tag", "Ordered Queue Tag",
|
|
/* 0x23 */ "Ignore Wide Residue"
|
|
};
|
|
-#define NO_TWO_BYTE_MSGS (sizeof(two_byte_msgs) / sizeof (const char *))
|
|
+#define NO_TWO_BYTE_MSGS ARRAY_SIZE(two_byte_msgs)
|
|
|
|
static const char *extended_msgs[] = {
|
|
/* 0x00 */ "Modify Data Pointer", "Synchronous Data Transfer Request",
|
|
-/* 0x02 */ "SCSI-I Extended Identify", "Wide Data Transfer Request"
|
|
+/* 0x02 */ "SCSI-I Extended Identify", "Wide Data Transfer Request",
|
|
+/* 0x04 */ "Parallel Protocol Request"
|
|
};
|
|
-#define NO_EXTENDED_MSGS (sizeof(two_byte_msgs) / sizeof (const char *))
|
|
+#define NO_EXTENDED_MSGS ARRAY_SIZE(extended_msgs)
|
|
|
|
|
|
int scsi_print_msg (const unsigned char *msg)
|
|
@@ -1324,6 +1318,10 @@
|
|
case EXTENDED_WDTR:
|
|
printk("width = 2^%d bytes", msg[3]);
|
|
break;
|
|
+ case EXTENDED_PPR:
|
|
+ printk("period = %d ns, offset = %d, width = %d",
|
|
+ (int) msg[3] * 4, (int) msg[5], 1 << msg[6]);
|
|
+ break;
|
|
default:
|
|
for (i = 2; i < len; ++i)
|
|
printk("%02x ", msg[i]);
|
|
@@ -1401,7 +1399,7 @@
|
|
"DID_OK", "DID_NO_CONNECT", "DID_BUS_BUSY", "DID_TIME_OUT", "DID_BAD_TARGET",
|
|
"DID_ABORT", "DID_PARITY", "DID_ERROR", "DID_RESET", "DID_BAD_INTR",
|
|
"DID_PASSTHROUGH", "DID_SOFT_ERROR", "DID_IMM_RETRY"};
|
|
-#define NUM_HOSTBYTE_STRS (sizeof(hostbyte_table) / sizeof(const char *))
|
|
+#define NUM_HOSTBYTE_STRS ARRAY_SIZE(hostbyte_table)
|
|
|
|
void scsi_print_hostbyte(int scsiresult)
|
|
{
|
|
@@ -1425,12 +1423,12 @@
|
|
static const char * driverbyte_table[]={
|
|
"DRIVER_OK", "DRIVER_BUSY", "DRIVER_SOFT", "DRIVER_MEDIA", "DRIVER_ERROR",
|
|
"DRIVER_INVALID", "DRIVER_TIMEOUT", "DRIVER_HARD", "DRIVER_SENSE"};
|
|
-#define NUM_DRIVERBYTE_STRS (sizeof(driverbyte_table) / sizeof(const char *))
|
|
+#define NUM_DRIVERBYTE_STRS ARRAY_SIZE(driverbyte_table)
|
|
|
|
static const char * driversuggest_table[]={"SUGGEST_OK",
|
|
"SUGGEST_RETRY", "SUGGEST_ABORT", "SUGGEST_REMAP", "SUGGEST_DIE",
|
|
"SUGGEST_5", "SUGGEST_6", "SUGGEST_7", "SUGGEST_SENSE"};
|
|
-#define NUM_SUGGEST_STRS (sizeof(driversuggest_table) / sizeof(const char *))
|
|
+#define NUM_SUGGEST_STRS ARRAY_SIZE(driversuggest_table)
|
|
|
|
void scsi_print_driverbyte(int scsiresult)
|
|
{
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/ncr53c8xx.c CVS2_6_15_RC7_PA0/drivers/scsi/ncr53c8xx.c
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/ncr53c8xx.c 2005-12-27 13:25:48.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/ncr53c8xx.c 2005-12-12 12:01:54.000000000 -0700
|
|
@@ -69,6 +69,10 @@
|
|
** Low PCI traffic for command handling when on-chip RAM is present.
|
|
** Aggressive SCSI SCRIPTS optimizations.
|
|
**
|
|
+** 2005 by Matthew Wilcox and James Bottomley
|
|
+** PCI-ectomy. This driver now supports only the 720 chip (see the
|
|
+** NCR_Q720 and zalon drivers for the bus probe logic).
|
|
+**
|
|
*******************************************************************************
|
|
*/
|
|
|
|
@@ -90,13 +94,6 @@
|
|
|
|
#define SCSI_NCR_DEBUG_FLAGS (0)
|
|
|
|
-/*==========================================================
|
|
-**
|
|
-** Include files
|
|
-**
|
|
-**==========================================================
|
|
-*/
|
|
-
|
|
#include <linux/blkdev.h>
|
|
#include <linux/delay.h>
|
|
#include <linux/dma-mapping.h>
|
|
@@ -121,6 +118,7 @@
|
|
|
|
#include <scsi/scsi.h>
|
|
#include <scsi/scsi_cmnd.h>
|
|
+#include <scsi/scsi_dbg.h>
|
|
#include <scsi/scsi_device.h>
|
|
#include <scsi/scsi_tcq.h>
|
|
#include <scsi/scsi_transport.h>
|
|
@@ -128,10 +126,740 @@
|
|
|
|
#include "ncr53c8xx.h"
|
|
|
|
-#define NAME53C "ncr53c"
|
|
#define NAME53C8XX "ncr53c8xx"
|
|
|
|
-#include "sym53c8xx_comm.h"
|
|
+/*==========================================================
|
|
+**
|
|
+** Debugging tags
|
|
+**
|
|
+**==========================================================
|
|
+*/
|
|
+
|
|
+#define DEBUG_ALLOC (0x0001)
|
|
+#define DEBUG_PHASE (0x0002)
|
|
+#define DEBUG_QUEUE (0x0008)
|
|
+#define DEBUG_RESULT (0x0010)
|
|
+#define DEBUG_POINTER (0x0020)
|
|
+#define DEBUG_SCRIPT (0x0040)
|
|
+#define DEBUG_TINY (0x0080)
|
|
+#define DEBUG_TIMING (0x0100)
|
|
+#define DEBUG_NEGO (0x0200)
|
|
+#define DEBUG_TAGS (0x0400)
|
|
+#define DEBUG_SCATTER (0x0800)
|
|
+#define DEBUG_IC (0x1000)
|
|
+
|
|
+/*
|
|
+** Enable/Disable debug messages.
|
|
+** Can be changed at runtime too.
|
|
+*/
|
|
+
|
|
+#ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
|
|
+static int ncr_debug = SCSI_NCR_DEBUG_FLAGS;
|
|
+ #define DEBUG_FLAGS ncr_debug
|
|
+#else
|
|
+ #define DEBUG_FLAGS SCSI_NCR_DEBUG_FLAGS
|
|
+#endif
|
|
+
|
|
+static inline struct list_head *ncr_list_pop(struct list_head *head)
|
|
+{
|
|
+ if (!list_empty(head)) {
|
|
+ struct list_head *elem = head->next;
|
|
+
|
|
+ list_del(elem);
|
|
+ return elem;
|
|
+ }
|
|
+
|
|
+ return NULL;
|
|
+}
|
|
+
|
|
+/*==========================================================
|
|
+**
|
|
+** Simple power of two buddy-like allocator.
|
|
+**
|
|
+** This simple code is not intended to be fast, but to
|
|
+** provide power of 2 aligned memory allocations.
|
|
+** Since the SCRIPTS processor only supplies 8 bit
|
|
+** arithmetic, this allocator allows simple and fast
|
|
+** address calculations from the SCRIPTS code.
|
|
+** In addition, cache line alignment is guaranteed for
|
|
+** power of 2 cache line size.
|
|
+** Enhanced in linux-2.3.44 to provide a memory pool
|
|
+** per pcidev to support dynamic dma mapping. (I would
|
|
+** have preferred a real bus astraction, btw).
|
|
+**
|
|
+**==========================================================
|
|
+*/
|
|
+
|
|
+#define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
|
|
+#if PAGE_SIZE >= 8192
|
|
+#define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
|
|
+#else
|
|
+#define MEMO_PAGE_ORDER 1 /* 2 PAGES maximum */
|
|
+#endif
|
|
+#define MEMO_FREE_UNUSED /* Free unused pages immediately */
|
|
+#define MEMO_WARN 1
|
|
+#define MEMO_GFP_FLAGS GFP_ATOMIC
|
|
+#define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
|
|
+#define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
|
|
+#define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
|
|
+
|
|
+typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
|
|
+typedef struct device *m_bush_t; /* Something that addresses DMAable */
|
|
+
|
|
+typedef struct m_link { /* Link between free memory chunks */
|
|
+ struct m_link *next;
|
|
+} m_link_s;
|
|
+
|
|
+typedef struct m_vtob { /* Virtual to Bus address translation */
|
|
+ struct m_vtob *next;
|
|
+ m_addr_t vaddr;
|
|
+ m_addr_t baddr;
|
|
+} m_vtob_s;
|
|
+#define VTOB_HASH_SHIFT 5
|
|
+#define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
|
|
+#define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
|
|
+#define VTOB_HASH_CODE(m) \
|
|
+ ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
|
|
+
|
|
+typedef struct m_pool { /* Memory pool of a given kind */
|
|
+ m_bush_t bush;
|
|
+ m_addr_t (*getp)(struct m_pool *);
|
|
+ void (*freep)(struct m_pool *, m_addr_t);
|
|
+ int nump;
|
|
+ m_vtob_s *(vtob[VTOB_HASH_SIZE]);
|
|
+ struct m_pool *next;
|
|
+ struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1];
|
|
+} m_pool_s;
|
|
+
|
|
+static void *___m_alloc(m_pool_s *mp, int size)
|
|
+{
|
|
+ int i = 0;
|
|
+ int s = (1 << MEMO_SHIFT);
|
|
+ int j;
|
|
+ m_addr_t a;
|
|
+ m_link_s *h = mp->h;
|
|
+
|
|
+ if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
|
|
+ return NULL;
|
|
+
|
|
+ while (size > s) {
|
|
+ s <<= 1;
|
|
+ ++i;
|
|
+ }
|
|
+
|
|
+ j = i;
|
|
+ while (!h[j].next) {
|
|
+ if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
|
|
+ h[j].next = (m_link_s *)mp->getp(mp);
|
|
+ if (h[j].next)
|
|
+ h[j].next->next = NULL;
|
|
+ break;
|
|
+ }
|
|
+ ++j;
|
|
+ s <<= 1;
|
|
+ }
|
|
+ a = (m_addr_t) h[j].next;
|
|
+ if (a) {
|
|
+ h[j].next = h[j].next->next;
|
|
+ while (j > i) {
|
|
+ j -= 1;
|
|
+ s >>= 1;
|
|
+ h[j].next = (m_link_s *) (a+s);
|
|
+ h[j].next->next = NULL;
|
|
+ }
|
|
+ }
|
|
+#ifdef DEBUG
|
|
+ printk("___m_alloc(%d) = %p\n", size, (void *) a);
|
|
+#endif
|
|
+ return (void *) a;
|
|
+}
|
|
+
|
|
+static void ___m_free(m_pool_s *mp, void *ptr, int size)
|
|
+{
|
|
+ int i = 0;
|
|
+ int s = (1 << MEMO_SHIFT);
|
|
+ m_link_s *q;
|
|
+ m_addr_t a, b;
|
|
+ m_link_s *h = mp->h;
|
|
+
|
|
+#ifdef DEBUG
|
|
+ printk("___m_free(%p, %d)\n", ptr, size);
|
|
+#endif
|
|
+
|
|
+ if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
|
|
+ return;
|
|
+
|
|
+ while (size > s) {
|
|
+ s <<= 1;
|
|
+ ++i;
|
|
+ }
|
|
+
|
|
+ a = (m_addr_t) ptr;
|
|
+
|
|
+ while (1) {
|
|
+#ifdef MEMO_FREE_UNUSED
|
|
+ if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
|
|
+ mp->freep(mp, a);
|
|
+ break;
|
|
+ }
|
|
+#endif
|
|
+ b = a ^ s;
|
|
+ q = &h[i];
|
|
+ while (q->next && q->next != (m_link_s *) b) {
|
|
+ q = q->next;
|
|
+ }
|
|
+ if (!q->next) {
|
|
+ ((m_link_s *) a)->next = h[i].next;
|
|
+ h[i].next = (m_link_s *) a;
|
|
+ break;
|
|
+ }
|
|
+ q->next = q->next->next;
|
|
+ a = a & b;
|
|
+ s <<= 1;
|
|
+ ++i;
|
|
+ }
|
|
+}
|
|
+
|
|
+static DEFINE_SPINLOCK(ncr53c8xx_lock);
|
|
+
|
|
+static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags)
|
|
+{
|
|
+ void *p;
|
|
+
|
|
+ p = ___m_alloc(mp, size);
|
|
+
|
|
+ if (DEBUG_FLAGS & DEBUG_ALLOC)
|
|
+ printk ("new %-10s[%4d] @%p.\n", name, size, p);
|
|
+
|
|
+ if (p)
|
|
+ memset(p, 0, size);
|
|
+ else if (uflags & MEMO_WARN)
|
|
+ printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size);
|
|
+
|
|
+ return p;
|
|
+}
|
|
+
|
|
+#define __m_calloc(mp, s, n) __m_calloc2(mp, s, n, MEMO_WARN)
|
|
+
|
|
+static void __m_free(m_pool_s *mp, void *ptr, int size, char *name)
|
|
+{
|
|
+ if (DEBUG_FLAGS & DEBUG_ALLOC)
|
|
+ printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
|
|
+
|
|
+ ___m_free(mp, ptr, size);
|
|
+
|
|
+}
|
|
+
|
|
+/*
|
|
+ * With pci bus iommu support, we use a default pool of unmapped memory
|
|
+ * for memory we donnot need to DMA from/to and one pool per pcidev for
|
|
+ * memory accessed by the PCI chip. `mp0' is the default not DMAable pool.
|
|
+ */
|
|
+
|
|
+static m_addr_t ___mp0_getp(m_pool_s *mp)
|
|
+{
|
|
+ m_addr_t m = __get_free_pages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER);
|
|
+ if (m)
|
|
+ ++mp->nump;
|
|
+ return m;
|
|
+}
|
|
+
|
|
+static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
|
|
+{
|
|
+ free_pages(m, MEMO_PAGE_ORDER);
|
|
+ --mp->nump;
|
|
+}
|
|
+
|
|
+static m_pool_s mp0 = {NULL, ___mp0_getp, ___mp0_freep};
|
|
+
|
|
+/*
|
|
+ * DMAable pools.
|
|
+ */
|
|
+
|
|
+/*
|
|
+ * With pci bus iommu support, we maintain one pool per pcidev and a
|
|
+ * hashed reverse table for virtual to bus physical address translations.
|
|
+ */
|
|
+static m_addr_t ___dma_getp(m_pool_s *mp)
|
|
+{
|
|
+ m_addr_t vp;
|
|
+ m_vtob_s *vbp;
|
|
+
|
|
+ vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB");
|
|
+ if (vbp) {
|
|
+ dma_addr_t daddr;
|
|
+ vp = (m_addr_t) dma_alloc_coherent(mp->bush,
|
|
+ PAGE_SIZE<<MEMO_PAGE_ORDER,
|
|
+ &daddr, GFP_ATOMIC);
|
|
+ if (vp) {
|
|
+ int hc = VTOB_HASH_CODE(vp);
|
|
+ vbp->vaddr = vp;
|
|
+ vbp->baddr = daddr;
|
|
+ vbp->next = mp->vtob[hc];
|
|
+ mp->vtob[hc] = vbp;
|
|
+ ++mp->nump;
|
|
+ return vp;
|
|
+ }
|
|
+ }
|
|
+ if (vbp)
|
|
+ __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static void ___dma_freep(m_pool_s *mp, m_addr_t m)
|
|
+{
|
|
+ m_vtob_s **vbpp, *vbp;
|
|
+ int hc = VTOB_HASH_CODE(m);
|
|
+
|
|
+ vbpp = &mp->vtob[hc];
|
|
+ while (*vbpp && (*vbpp)->vaddr != m)
|
|
+ vbpp = &(*vbpp)->next;
|
|
+ if (*vbpp) {
|
|
+ vbp = *vbpp;
|
|
+ *vbpp = (*vbpp)->next;
|
|
+ dma_free_coherent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER,
|
|
+ (void *)vbp->vaddr, (dma_addr_t)vbp->baddr);
|
|
+ __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
|
|
+ --mp->nump;
|
|
+ }
|
|
+}
|
|
+
|
|
+static inline m_pool_s *___get_dma_pool(m_bush_t bush)
|
|
+{
|
|
+ m_pool_s *mp;
|
|
+ for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next);
|
|
+ return mp;
|
|
+}
|
|
+
|
|
+static m_pool_s *___cre_dma_pool(m_bush_t bush)
|
|
+{
|
|
+ m_pool_s *mp;
|
|
+ mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL");
|
|
+ if (mp) {
|
|
+ memset(mp, 0, sizeof(*mp));
|
|
+ mp->bush = bush;
|
|
+ mp->getp = ___dma_getp;
|
|
+ mp->freep = ___dma_freep;
|
|
+ mp->next = mp0.next;
|
|
+ mp0.next = mp;
|
|
+ }
|
|
+ return mp;
|
|
+}
|
|
+
|
|
+static void ___del_dma_pool(m_pool_s *p)
|
|
+{
|
|
+ struct m_pool **pp = &mp0.next;
|
|
+
|
|
+ while (*pp && *pp != p)
|
|
+ pp = &(*pp)->next;
|
|
+ if (*pp) {
|
|
+ *pp = (*pp)->next;
|
|
+ __m_free(&mp0, p, sizeof(*p), "MPOOL");
|
|
+ }
|
|
+}
|
|
+
|
|
+static void *__m_calloc_dma(m_bush_t bush, int size, char *name)
|
|
+{
|
|
+ u_long flags;
|
|
+ struct m_pool *mp;
|
|
+ void *m = NULL;
|
|
+
|
|
+ spin_lock_irqsave(&ncr53c8xx_lock, flags);
|
|
+ mp = ___get_dma_pool(bush);
|
|
+ if (!mp)
|
|
+ mp = ___cre_dma_pool(bush);
|
|
+ if (mp)
|
|
+ m = __m_calloc(mp, size, name);
|
|
+ if (mp && !mp->nump)
|
|
+ ___del_dma_pool(mp);
|
|
+ spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
|
|
+
|
|
+ return m;
|
|
+}
|
|
+
|
|
+static void __m_free_dma(m_bush_t bush, void *m, int size, char *name)
|
|
+{
|
|
+ u_long flags;
|
|
+ struct m_pool *mp;
|
|
+
|
|
+ spin_lock_irqsave(&ncr53c8xx_lock, flags);
|
|
+ mp = ___get_dma_pool(bush);
|
|
+ if (mp)
|
|
+ __m_free(mp, m, size, name);
|
|
+ if (mp && !mp->nump)
|
|
+ ___del_dma_pool(mp);
|
|
+ spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
|
|
+}
|
|
+
|
|
+static m_addr_t __vtobus(m_bush_t bush, void *m)
|
|
+{
|
|
+ u_long flags;
|
|
+ m_pool_s *mp;
|
|
+ int hc = VTOB_HASH_CODE(m);
|
|
+ m_vtob_s *vp = NULL;
|
|
+ m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
|
|
+
|
|
+ spin_lock_irqsave(&ncr53c8xx_lock, flags);
|
|
+ mp = ___get_dma_pool(bush);
|
|
+ if (mp) {
|
|
+ vp = mp->vtob[hc];
|
|
+ while (vp && (m_addr_t) vp->vaddr != a)
|
|
+ vp = vp->next;
|
|
+ }
|
|
+ spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
|
|
+ return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
|
|
+}
|
|
+
|
|
+#define _m_calloc_dma(np, s, n) __m_calloc_dma(np->dev, s, n)
|
|
+#define _m_free_dma(np, p, s, n) __m_free_dma(np->dev, p, s, n)
|
|
+#define m_calloc_dma(s, n) _m_calloc_dma(np, s, n)
|
|
+#define m_free_dma(p, s, n) _m_free_dma(np, p, s, n)
|
|
+#define _vtobus(np, p) __vtobus(np->dev, p)
|
|
+#define vtobus(p) _vtobus(np, p)
|
|
+
|
|
+/*
|
|
+ * Deal with DMA mapping/unmapping.
|
|
+ */
|
|
+
|
|
+/* To keep track of the dma mapping (sg/single) that has been set */
|
|
+#define __data_mapped SCp.phase
|
|
+#define __data_mapping SCp.have_data_in
|
|
+
|
|
+static void __unmap_scsi_data(struct device *dev, struct scsi_cmnd *cmd)
|
|
+{
|
|
+ switch(cmd->__data_mapped) {
|
|
+ case 2:
|
|
+ dma_unmap_sg(dev, cmd->buffer, cmd->use_sg,
|
|
+ cmd->sc_data_direction);
|
|
+ break;
|
|
+ case 1:
|
|
+ dma_unmap_single(dev, cmd->__data_mapping,
|
|
+ cmd->request_bufflen,
|
|
+ cmd->sc_data_direction);
|
|
+ break;
|
|
+ }
|
|
+ cmd->__data_mapped = 0;
|
|
+}
|
|
+
|
|
+static u_long __map_scsi_single_data(struct device *dev, struct scsi_cmnd *cmd)
|
|
+{
|
|
+ dma_addr_t mapping;
|
|
+
|
|
+ if (cmd->request_bufflen == 0)
|
|
+ return 0;
|
|
+
|
|
+ mapping = dma_map_single(dev, cmd->request_buffer,
|
|
+ cmd->request_bufflen,
|
|
+ cmd->sc_data_direction);
|
|
+ cmd->__data_mapped = 1;
|
|
+ cmd->__data_mapping = mapping;
|
|
+
|
|
+ return mapping;
|
|
+}
|
|
+
|
|
+static int __map_scsi_sg_data(struct device *dev, struct scsi_cmnd *cmd)
|
|
+{
|
|
+ int use_sg;
|
|
+
|
|
+ if (cmd->use_sg == 0)
|
|
+ return 0;
|
|
+
|
|
+ use_sg = dma_map_sg(dev, cmd->buffer, cmd->use_sg,
|
|
+ cmd->sc_data_direction);
|
|
+ cmd->__data_mapped = 2;
|
|
+ cmd->__data_mapping = use_sg;
|
|
+
|
|
+ return use_sg;
|
|
+}
|
|
+
|
|
+#define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->dev, cmd)
|
|
+#define map_scsi_single_data(np, cmd) __map_scsi_single_data(np->dev, cmd)
|
|
+#define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->dev, cmd)
|
|
+
|
|
+/*==========================================================
|
|
+**
|
|
+** Driver setup.
|
|
+**
|
|
+** This structure is initialized from linux config
|
|
+** options. It can be overridden at boot-up by the boot
|
|
+** command line.
|
|
+**
|
|
+**==========================================================
|
|
+*/
|
|
+static struct ncr_driver_setup
|
|
+ driver_setup = SCSI_NCR_DRIVER_SETUP;
|
|
+
|
|
+#ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
|
|
+static struct ncr_driver_setup
|
|
+ driver_safe_setup __initdata = SCSI_NCR_DRIVER_SAFE_SETUP;
|
|
+#endif
|
|
+
|
|
+#define initverbose (driver_setup.verbose)
|
|
+#define bootverbose (np->verbose)
|
|
+
|
|
+
|
|
+/*===================================================================
|
|
+**
|
|
+** Driver setup from the boot command line
|
|
+**
|
|
+**===================================================================
|
|
+*/
|
|
+
|
|
+#ifdef MODULE
|
|
+#define ARG_SEP ' '
|
|
+#else
|
|
+#define ARG_SEP ','
|
|
+#endif
|
|
+
|
|
+#define OPT_TAGS 1
|
|
+#define OPT_MASTER_PARITY 2
|
|
+#define OPT_SCSI_PARITY 3
|
|
+#define OPT_DISCONNECTION 4
|
|
+#define OPT_SPECIAL_FEATURES 5
|
|
+#define OPT_UNUSED_1 6
|
|
+#define OPT_FORCE_SYNC_NEGO 7
|
|
+#define OPT_REVERSE_PROBE 8
|
|
+#define OPT_DEFAULT_SYNC 9
|
|
+#define OPT_VERBOSE 10
|
|
+#define OPT_DEBUG 11
|
|
+#define OPT_BURST_MAX 12
|
|
+#define OPT_LED_PIN 13
|
|
+#define OPT_MAX_WIDE 14
|
|
+#define OPT_SETTLE_DELAY 15
|
|
+#define OPT_DIFF_SUPPORT 16
|
|
+#define OPT_IRQM 17
|
|
+#define OPT_PCI_FIX_UP 18
|
|
+#define OPT_BUS_CHECK 19
|
|
+#define OPT_OPTIMIZE 20
|
|
+#define OPT_RECOVERY 21
|
|
+#define OPT_SAFE_SETUP 22
|
|
+#define OPT_USE_NVRAM 23
|
|
+#define OPT_EXCLUDE 24
|
|
+#define OPT_HOST_ID 25
|
|
+
|
|
+#ifdef SCSI_NCR_IARB_SUPPORT
|
|
+#define OPT_IARB 26
|
|
+#endif
|
|
+
|
|
+static char setup_token[] __initdata =
|
|
+ "tags:" "mpar:"
|
|
+ "spar:" "disc:"
|
|
+ "specf:" "ultra:"
|
|
+ "fsn:" "revprob:"
|
|
+ "sync:" "verb:"
|
|
+ "debug:" "burst:"
|
|
+ "led:" "wide:"
|
|
+ "settle:" "diff:"
|
|
+ "irqm:" "pcifix:"
|
|
+ "buschk:" "optim:"
|
|
+ "recovery:"
|
|
+ "safe:" "nvram:"
|
|
+ "excl:" "hostid:"
|
|
+#ifdef SCSI_NCR_IARB_SUPPORT
|
|
+ "iarb:"
|
|
+#endif
|
|
+ ; /* DONNOT REMOVE THIS ';' */
|
|
+
|
|
+#ifdef MODULE
|
|
+#define ARG_SEP ' '
|
|
+#else
|
|
+#define ARG_SEP ','
|
|
+#endif
|
|
+
|
|
+static int __init get_setup_token(char *p)
|
|
+{
|
|
+ char *cur = setup_token;
|
|
+ char *pc;
|
|
+ int i = 0;
|
|
+
|
|
+ while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
|
|
+ ++pc;
|
|
+ ++i;
|
|
+ if (!strncmp(p, cur, pc - cur))
|
|
+ return i;
|
|
+ cur = pc;
|
|
+ }
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+
|
|
+static int __init sym53c8xx__setup(char *str)
|
|
+{
|
|
+#ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
|
|
+ char *cur = str;
|
|
+ char *pc, *pv;
|
|
+ int i, val, c;
|
|
+ int xi = 0;
|
|
+
|
|
+ while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
|
|
+ char *pe;
|
|
+
|
|
+ val = 0;
|
|
+ pv = pc;
|
|
+ c = *++pv;
|
|
+
|
|
+ if (c == 'n')
|
|
+ val = 0;
|
|
+ else if (c == 'y')
|
|
+ val = 1;
|
|
+ else
|
|
+ val = (int) simple_strtoul(pv, &pe, 0);
|
|
+
|
|
+ switch (get_setup_token(cur)) {
|
|
+ case OPT_TAGS:
|
|
+ driver_setup.default_tags = val;
|
|
+ if (pe && *pe == '/') {
|
|
+ i = 0;
|
|
+ while (*pe && *pe != ARG_SEP &&
|
|
+ i < sizeof(driver_setup.tag_ctrl)-1) {
|
|
+ driver_setup.tag_ctrl[i++] = *pe++;
|
|
+ }
|
|
+ driver_setup.tag_ctrl[i] = '\0';
|
|
+ }
|
|
+ break;
|
|
+ case OPT_MASTER_PARITY:
|
|
+ driver_setup.master_parity = val;
|
|
+ break;
|
|
+ case OPT_SCSI_PARITY:
|
|
+ driver_setup.scsi_parity = val;
|
|
+ break;
|
|
+ case OPT_DISCONNECTION:
|
|
+ driver_setup.disconnection = val;
|
|
+ break;
|
|
+ case OPT_SPECIAL_FEATURES:
|
|
+ driver_setup.special_features = val;
|
|
+ break;
|
|
+ case OPT_FORCE_SYNC_NEGO:
|
|
+ driver_setup.force_sync_nego = val;
|
|
+ break;
|
|
+ case OPT_REVERSE_PROBE:
|
|
+ driver_setup.reverse_probe = val;
|
|
+ break;
|
|
+ case OPT_DEFAULT_SYNC:
|
|
+ driver_setup.default_sync = val;
|
|
+ break;
|
|
+ case OPT_VERBOSE:
|
|
+ driver_setup.verbose = val;
|
|
+ break;
|
|
+ case OPT_DEBUG:
|
|
+ driver_setup.debug = val;
|
|
+ break;
|
|
+ case OPT_BURST_MAX:
|
|
+ driver_setup.burst_max = val;
|
|
+ break;
|
|
+ case OPT_LED_PIN:
|
|
+ driver_setup.led_pin = val;
|
|
+ break;
|
|
+ case OPT_MAX_WIDE:
|
|
+ driver_setup.max_wide = val? 1:0;
|
|
+ break;
|
|
+ case OPT_SETTLE_DELAY:
|
|
+ driver_setup.settle_delay = val;
|
|
+ break;
|
|
+ case OPT_DIFF_SUPPORT:
|
|
+ driver_setup.diff_support = val;
|
|
+ break;
|
|
+ case OPT_IRQM:
|
|
+ driver_setup.irqm = val;
|
|
+ break;
|
|
+ case OPT_PCI_FIX_UP:
|
|
+ driver_setup.pci_fix_up = val;
|
|
+ break;
|
|
+ case OPT_BUS_CHECK:
|
|
+ driver_setup.bus_check = val;
|
|
+ break;
|
|
+ case OPT_OPTIMIZE:
|
|
+ driver_setup.optimize = val;
|
|
+ break;
|
|
+ case OPT_RECOVERY:
|
|
+ driver_setup.recovery = val;
|
|
+ break;
|
|
+ case OPT_USE_NVRAM:
|
|
+ driver_setup.use_nvram = val;
|
|
+ break;
|
|
+ case OPT_SAFE_SETUP:
|
|
+ memcpy(&driver_setup, &driver_safe_setup,
|
|
+ sizeof(driver_setup));
|
|
+ break;
|
|
+ case OPT_EXCLUDE:
|
|
+ if (xi < SCSI_NCR_MAX_EXCLUDES)
|
|
+ driver_setup.excludes[xi++] = val;
|
|
+ break;
|
|
+ case OPT_HOST_ID:
|
|
+ driver_setup.host_id = val;
|
|
+ break;
|
|
+#ifdef SCSI_NCR_IARB_SUPPORT
|
|
+ case OPT_IARB:
|
|
+ driver_setup.iarb = val;
|
|
+ break;
|
|
+#endif
|
|
+ default:
|
|
+ printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur);
|
|
+ break;
|
|
+ }
|
|
+
|
|
+ if ((cur = strchr(cur, ARG_SEP)) != NULL)
|
|
+ ++cur;
|
|
+ }
|
|
+#endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */
|
|
+ return 1;
|
|
+}
|
|
+
|
|
+/*===================================================================
|
|
+**
|
|
+** Get device queue depth from boot command line.
|
|
+**
|
|
+**===================================================================
|
|
+*/
|
|
+#define DEF_DEPTH (driver_setup.default_tags)
|
|
+#define ALL_TARGETS -2
|
|
+#define NO_TARGET -1
|
|
+#define ALL_LUNS -2
|
|
+#define NO_LUN -1
|
|
+
|
|
+static int device_queue_depth(int unit, int target, int lun)
|
|
+{
|
|
+ int c, h, t, u, v;
|
|
+ char *p = driver_setup.tag_ctrl;
|
|
+ char *ep;
|
|
+
|
|
+ h = -1;
|
|
+ t = NO_TARGET;
|
|
+ u = NO_LUN;
|
|
+ while ((c = *p++) != 0) {
|
|
+ v = simple_strtoul(p, &ep, 0);
|
|
+ switch(c) {
|
|
+ case '/':
|
|
+ ++h;
|
|
+ t = ALL_TARGETS;
|
|
+ u = ALL_LUNS;
|
|
+ break;
|
|
+ case 't':
|
|
+ if (t != target)
|
|
+ t = (target == v) ? v : NO_TARGET;
|
|
+ u = ALL_LUNS;
|
|
+ break;
|
|
+ case 'u':
|
|
+ if (u != lun)
|
|
+ u = (lun == v) ? v : NO_LUN;
|
|
+ break;
|
|
+ case 'q':
|
|
+ if (h == unit &&
|
|
+ (t == ALL_TARGETS || t == target) &&
|
|
+ (u == ALL_LUNS || u == lun))
|
|
+ return v;
|
|
+ break;
|
|
+ case '-':
|
|
+ t = ALL_TARGETS;
|
|
+ u = ALL_LUNS;
|
|
+ break;
|
|
+ default:
|
|
+ break;
|
|
+ }
|
|
+ p = ep;
|
|
+ }
|
|
+ return DEF_DEPTH;
|
|
+}
|
|
|
|
|
|
/*==========================================================
|
|
@@ -1379,7 +2107,7 @@
|
|
*/
|
|
|
|
/*
|
|
- ** The M_REJECT problem seems to be due to a selection
|
|
+ ** The MESSAGE_REJECT problem seems to be due to a selection
|
|
** timing problem.
|
|
** Wait immediately for the selection to complete.
|
|
** (2.5x behaves so)
|
|
@@ -1430,7 +2158,7 @@
|
|
/*
|
|
** Selection complete.
|
|
** Send the IDENTIFY and SIMPLE_TAG messages
|
|
- ** (and the M_X_SYNC_REQ message)
|
|
+ ** (and the EXTENDED_SDTR message)
|
|
*/
|
|
SCR_MOVE_TBL ^ SCR_MSG_OUT,
|
|
offsetof (struct dsb, smsg),
|
|
@@ -1459,7 +2187,7 @@
|
|
/*
|
|
** Initialize the msgout buffer with a NOOP message.
|
|
*/
|
|
- SCR_LOAD_REG (scratcha, M_NOOP),
|
|
+ SCR_LOAD_REG (scratcha, NOP),
|
|
0,
|
|
SCR_COPY (1),
|
|
RADDR (scratcha),
|
|
@@ -1611,21 +2339,21 @@
|
|
/*
|
|
** Handle this message.
|
|
*/
|
|
- SCR_JUMP ^ IFTRUE (DATA (M_COMPLETE)),
|
|
+ SCR_JUMP ^ IFTRUE (DATA (COMMAND_COMPLETE)),
|
|
PADDR (complete),
|
|
- SCR_JUMP ^ IFTRUE (DATA (M_DISCONNECT)),
|
|
+ SCR_JUMP ^ IFTRUE (DATA (DISCONNECT)),
|
|
PADDR (disconnect),
|
|
- SCR_JUMP ^ IFTRUE (DATA (M_SAVE_DP)),
|
|
+ SCR_JUMP ^ IFTRUE (DATA (SAVE_POINTERS)),
|
|
PADDR (save_dp),
|
|
- SCR_JUMP ^ IFTRUE (DATA (M_RESTORE_DP)),
|
|
+ SCR_JUMP ^ IFTRUE (DATA (RESTORE_POINTERS)),
|
|
PADDR (restore_dp),
|
|
- SCR_JUMP ^ IFTRUE (DATA (M_EXTENDED)),
|
|
+ SCR_JUMP ^ IFTRUE (DATA (EXTENDED_MESSAGE)),
|
|
PADDRH (msg_extended),
|
|
- SCR_JUMP ^ IFTRUE (DATA (M_NOOP)),
|
|
+ SCR_JUMP ^ IFTRUE (DATA (NOP)),
|
|
PADDR (clrack),
|
|
- SCR_JUMP ^ IFTRUE (DATA (M_REJECT)),
|
|
+ SCR_JUMP ^ IFTRUE (DATA (MESSAGE_REJECT)),
|
|
PADDRH (msg_reject),
|
|
- SCR_JUMP ^ IFTRUE (DATA (M_IGN_RESIDUE)),
|
|
+ SCR_JUMP ^ IFTRUE (DATA (IGNORE_WIDE_RESIDUE)),
|
|
PADDRH (msg_ign_residue),
|
|
/*
|
|
** Rest of the messages left as
|
|
@@ -1640,7 +2368,7 @@
|
|
*/
|
|
SCR_INT,
|
|
SIR_REJECT_SENT,
|
|
- SCR_LOAD_REG (scratcha, M_REJECT),
|
|
+ SCR_LOAD_REG (scratcha, MESSAGE_REJECT),
|
|
0,
|
|
}/*-------------------------< SETMSG >----------------------*/,{
|
|
SCR_COPY (1),
|
|
@@ -1832,7 +2560,7 @@
|
|
/*
|
|
** If it was no ABORT message ...
|
|
*/
|
|
- SCR_JUMP ^ IFTRUE (DATA (M_ABORT)),
|
|
+ SCR_JUMP ^ IFTRUE (DATA (ABORT_TASK_SET)),
|
|
PADDRH (msg_out_abort),
|
|
/*
|
|
** ... wait for the next phase
|
|
@@ -1844,7 +2572,7 @@
|
|
/*
|
|
** ... else clear the message ...
|
|
*/
|
|
- SCR_LOAD_REG (scratcha, M_NOOP),
|
|
+ SCR_LOAD_REG (scratcha, NOP),
|
|
0,
|
|
SCR_COPY (4),
|
|
RADDR (scratcha),
|
|
@@ -2303,7 +3031,7 @@
|
|
*/
|
|
SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
|
|
NADDR (msgin[2]),
|
|
- SCR_JUMP ^ IFTRUE (DATA (M_X_WIDE_REQ)),
|
|
+ SCR_JUMP ^ IFTRUE (DATA (EXTENDED_WDTR)),
|
|
PADDRH (msg_wdtr),
|
|
/*
|
|
** unknown extended message
|
|
@@ -2337,7 +3065,7 @@
|
|
|
|
}/*-------------------------< SEND_WDTR >----------------*/,{
|
|
/*
|
|
- ** Send the M_X_WIDE_REQ
|
|
+ ** Send the EXTENDED_WDTR
|
|
*/
|
|
SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
|
|
NADDR (msgout),
|
|
@@ -2357,7 +3085,7 @@
|
|
*/
|
|
SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
|
|
NADDR (msgin[2]),
|
|
- SCR_JUMP ^ IFTRUE (DATA (M_X_SYNC_REQ)),
|
|
+ SCR_JUMP ^ IFTRUE (DATA (EXTENDED_SDTR)),
|
|
PADDRH (msg_sdtr),
|
|
/*
|
|
** unknown extended message
|
|
@@ -2392,7 +3120,7 @@
|
|
|
|
}/*-------------------------< SEND_SDTR >-------------*/,{
|
|
/*
|
|
- ** Send the M_X_SYNC_REQ
|
|
+ ** Send the EXTENDED_SDTR
|
|
*/
|
|
SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
|
|
NADDR (msgout),
|
|
@@ -2470,10 +3198,10 @@
|
|
|
|
}/*-------------------------< RESET >----------------------*/,{
|
|
/*
|
|
- ** Send a M_RESET message if bad IDENTIFY
|
|
+ ** Send a TARGET_RESET message if bad IDENTIFY
|
|
** received on reselection.
|
|
*/
|
|
- SCR_LOAD_REG (scratcha, M_ABORT_TAG),
|
|
+ SCR_LOAD_REG (scratcha, ABORT_TASK),
|
|
0,
|
|
SCR_JUMP,
|
|
PADDRH (abort_resel),
|
|
@@ -2481,7 +3209,7 @@
|
|
/*
|
|
** Abort a wrong tag received on reselection.
|
|
*/
|
|
- SCR_LOAD_REG (scratcha, M_ABORT_TAG),
|
|
+ SCR_LOAD_REG (scratcha, ABORT_TASK),
|
|
0,
|
|
SCR_JUMP,
|
|
PADDRH (abort_resel),
|
|
@@ -2489,7 +3217,7 @@
|
|
/*
|
|
** Abort a reselection when no active CCB.
|
|
*/
|
|
- SCR_LOAD_REG (scratcha, M_ABORT),
|
|
+ SCR_LOAD_REG (scratcha, ABORT_TASK_SET),
|
|
0,
|
|
}/*-------------------------< ABORT_RESEL >----------------*/,{
|
|
SCR_COPY (1),
|
|
@@ -2601,7 +3329,7 @@
|
|
** Read the message, since we got it directly
|
|
** from the SCSI BUS data lines.
|
|
** Signal problem to C code for logging the event.
|
|
- ** Send a M_ABORT to clear all pending tasks.
|
|
+ ** Send an ABORT_TASK_SET to clear all pending tasks.
|
|
*/
|
|
SCR_INT,
|
|
SIR_RESEL_BAD_LUN,
|
|
@@ -2613,7 +3341,7 @@
|
|
/*
|
|
** We donnot have a task for that I_T_L.
|
|
** Signal problem to C code for logging the event.
|
|
- ** Send a M_ABORT message.
|
|
+ ** Send an ABORT_TASK_SET message.
|
|
*/
|
|
SCR_INT,
|
|
SIR_RESEL_BAD_I_T_L,
|
|
@@ -2623,7 +3351,7 @@
|
|
/*
|
|
** We donnot have a task that matches the tag.
|
|
** Signal problem to C code for logging the event.
|
|
- ** Send a M_ABORTTAG message.
|
|
+ ** Send an ABORT_TASK message.
|
|
*/
|
|
SCR_INT,
|
|
SIR_RESEL_BAD_I_T_L_Q,
|
|
@@ -2634,7 +3362,7 @@
|
|
** We donnot know the target that reselected us.
|
|
** Grab the first message if any (IDENTIFY).
|
|
** Signal problem to C code for logging the event.
|
|
- ** M_RESET message.
|
|
+ ** TARGET_RESET message.
|
|
*/
|
|
SCR_INT,
|
|
SIR_RESEL_BAD_TARGET,
|
|
@@ -2971,21 +3699,10 @@
|
|
|
|
static void ncr_print_msg(struct ccb *cp, char *label, u_char *msg)
|
|
{
|
|
- int i;
|
|
PRINT_ADDR(cp->cmd, "%s: ", label);
|
|
|
|
- printk ("%x",*msg);
|
|
- if (*msg == M_EXTENDED) {
|
|
- for (i = 1; i < 8; i++) {
|
|
- if (i - 1 > msg[1])
|
|
- break;
|
|
- printk ("-%x",msg[i]);
|
|
- }
|
|
- } else if ((*msg & 0xf0) == 0x20) {
|
|
- printk ("-%x",msg[1]);
|
|
- }
|
|
-
|
|
- printk(".\n");
|
|
+ scsi_print_msg(msg);
|
|
+ printk("\n");
|
|
}
|
|
|
|
/*==========================================================
|
|
@@ -3388,16 +4105,16 @@
|
|
|
|
switch (nego) {
|
|
case NS_SYNC:
|
|
- msgptr[msglen++] = M_EXTENDED;
|
|
+ msgptr[msglen++] = EXTENDED_MESSAGE;
|
|
msgptr[msglen++] = 3;
|
|
- msgptr[msglen++] = M_X_SYNC_REQ;
|
|
+ msgptr[msglen++] = EXTENDED_SDTR;
|
|
msgptr[msglen++] = tp->maxoffs ? tp->minsync : 0;
|
|
msgptr[msglen++] = tp->maxoffs;
|
|
break;
|
|
case NS_WIDE:
|
|
- msgptr[msglen++] = M_EXTENDED;
|
|
+ msgptr[msglen++] = EXTENDED_MESSAGE;
|
|
msgptr[msglen++] = 2;
|
|
- msgptr[msglen++] = M_X_WIDE_REQ;
|
|
+ msgptr[msglen++] = EXTENDED_WDTR;
|
|
msgptr[msglen++] = tp->usrwide;
|
|
break;
|
|
}
|
|
@@ -3499,7 +4216,7 @@
|
|
**----------------------------------------------------
|
|
*/
|
|
|
|
- idmsg = M_IDENTIFY | sdev->lun;
|
|
+ idmsg = IDENTIFY(0, sdev->lun);
|
|
|
|
if (cp ->tag != NO_TAG ||
|
|
(cp != np->ccb && np->disc && !(tp->usrflag & UF_NODISC)))
|
|
@@ -3518,7 +4235,7 @@
|
|
*/
|
|
if (lp && time_after(jiffies, lp->tags_stime)) {
|
|
if (lp->tags_smap) {
|
|
- order = M_ORDERED_TAG;
|
|
+ order = ORDERED_QUEUE_TAG;
|
|
if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>2){
|
|
PRINT_ADDR(cmd,
|
|
"ordered tag forced.\n");
|
|
@@ -3536,10 +4253,10 @@
|
|
case 0x08: /* READ_SMALL (6) */
|
|
case 0x28: /* READ_BIG (10) */
|
|
case 0xa8: /* READ_HUGE (12) */
|
|
- order = M_SIMPLE_TAG;
|
|
+ order = SIMPLE_QUEUE_TAG;
|
|
break;
|
|
default:
|
|
- order = M_ORDERED_TAG;
|
|
+ order = ORDERED_QUEUE_TAG;
|
|
}
|
|
}
|
|
msgptr[msglen++] = order;
|
|
@@ -5508,9 +6225,9 @@
|
|
if (!(dbc & 0xc0000000))
|
|
phase = (dbc >> 24) & 7;
|
|
if (phase == 7)
|
|
- msg = M_PARITY;
|
|
+ msg = MSG_PARITY_ERROR;
|
|
else
|
|
- msg = M_ID_ERROR;
|
|
+ msg = INITIATOR_ERROR;
|
|
|
|
|
|
/*
|
|
@@ -6074,6 +6791,8 @@
|
|
/*-----------------------------------------------------------------------------
|
|
**
|
|
** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
|
|
+** ("Everything you've always wanted to know about transfer mode
|
|
+** negotiation")
|
|
**
|
|
** We try to negotiate sync and wide transfer only after
|
|
** a successful inquire command. We look at byte 7 of the
|
|
@@ -6175,8 +6894,8 @@
|
|
break;
|
|
|
|
}
|
|
- np->msgin [0] = M_NOOP;
|
|
- np->msgout[0] = M_NOOP;
|
|
+ np->msgin [0] = NOP;
|
|
+ np->msgout[0] = NOP;
|
|
cp->nego_status = 0;
|
|
break;
|
|
|
|
@@ -6270,9 +6989,9 @@
|
|
spi_offset(starget) = ofs;
|
|
ncr_setsync(np, cp, scntl3, (fak<<5)|ofs);
|
|
|
|
- np->msgout[0] = M_EXTENDED;
|
|
+ np->msgout[0] = EXTENDED_MESSAGE;
|
|
np->msgout[1] = 3;
|
|
- np->msgout[2] = M_X_SYNC_REQ;
|
|
+ np->msgout[2] = EXTENDED_SDTR;
|
|
np->msgout[3] = per;
|
|
np->msgout[4] = ofs;
|
|
|
|
@@ -6286,7 +7005,7 @@
|
|
OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad));
|
|
return;
|
|
}
|
|
- np->msgin [0] = M_NOOP;
|
|
+ np->msgin [0] = NOP;
|
|
|
|
break;
|
|
|
|
@@ -6362,12 +7081,12 @@
|
|
spi_width(starget) = wide;
|
|
ncr_setwide(np, cp, wide, 1);
|
|
|
|
- np->msgout[0] = M_EXTENDED;
|
|
+ np->msgout[0] = EXTENDED_MESSAGE;
|
|
np->msgout[1] = 2;
|
|
- np->msgout[2] = M_X_WIDE_REQ;
|
|
+ np->msgout[2] = EXTENDED_WDTR;
|
|
np->msgout[3] = wide;
|
|
|
|
- np->msgin [0] = M_NOOP;
|
|
+ np->msgin [0] = NOP;
|
|
|
|
cp->nego_status = NS_WIDE;
|
|
|
|
@@ -6386,12 +7105,12 @@
|
|
case SIR_REJECT_RECEIVED:
|
|
/*-----------------------------------------------
|
|
**
|
|
- ** We received a M_REJECT message.
|
|
+ ** We received a MESSAGE_REJECT.
|
|
**
|
|
**-----------------------------------------------
|
|
*/
|
|
|
|
- PRINT_ADDR(cp->cmd, "M_REJECT received (%x:%x).\n",
|
|
+ PRINT_ADDR(cp->cmd, "MESSAGE_REJECT received (%x:%x).\n",
|
|
(unsigned)scr_to_cpu(np->lastmsg), np->msgout[0]);
|
|
break;
|
|
|
|
@@ -6403,7 +7122,7 @@
|
|
**-----------------------------------------------
|
|
*/
|
|
|
|
- ncr_print_msg(cp, "M_REJECT sent for", np->msgin);
|
|
+ ncr_print_msg(cp, "MESSAGE_REJECT sent for", np->msgin);
|
|
break;
|
|
|
|
/*--------------------------------------------------------------------
|
|
@@ -6422,7 +7141,7 @@
|
|
**-----------------------------------------------
|
|
*/
|
|
|
|
- PRINT_ADDR(cp->cmd, "M_IGN_RESIDUE received, but not yet "
|
|
+ PRINT_ADDR(cp->cmd, "IGNORE_WIDE_RESIDUE received, but not yet "
|
|
"implemented.\n");
|
|
break;
|
|
#if 0
|
|
@@ -6435,7 +7154,7 @@
|
|
**-----------------------------------------------
|
|
*/
|
|
|
|
- PRINT_ADDR(cp->cmd, "M_DISCONNECT received, but datapointer "
|
|
+ PRINT_ADDR(cp->cmd, "DISCONNECT received, but datapointer "
|
|
"not saved: data=%x save=%x goal=%x.\n",
|
|
(unsigned) INL (nc_temp),
|
|
(unsigned) scr_to_cpu(np->header.savep),
|
|
@@ -7141,7 +7860,7 @@
|
|
**==========================================================
|
|
**
|
|
** Note: we have to return the correct value.
|
|
-** THERE IS NO SAVE DEFAULT VALUE.
|
|
+** THERE IS NO SAFE DEFAULT VALUE.
|
|
**
|
|
** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
|
|
** 53C860 and 53C875 rev. 1 support fast20 transfers but
|
|
@@ -7841,7 +8560,7 @@
|
|
|
|
/* use SIMPLE TAG messages by default */
|
|
#ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG
|
|
- np->order = M_SIMPLE_TAG;
|
|
+ np->order = SIMPLE_QUEUE_TAG;
|
|
#endif
|
|
|
|
spin_unlock_irqrestore(&np->smp_lock, flags);
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/ncr53c8xx.h CVS2_6_15_RC7_PA0/drivers/scsi/ncr53c8xx.h
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/ncr53c8xx.h 2005-12-27 13:25:48.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/ncr53c8xx.h 2005-12-12 12:01:54.000000000 -0700
|
|
@@ -36,6 +36,13 @@
|
|
** And has been ported to NetBSD by
|
|
** Charles M. Hannum <mycroft@gnu.ai.mit.edu>
|
|
**
|
|
+** Added support for MIPS big endian systems.
|
|
+** Carsten Langgaard, carstenl@mips.com
|
|
+** Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
|
|
+**
|
|
+** Added support for HP PARISC big endian systems.
|
|
+** Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
|
|
+**
|
|
*******************************************************************************
|
|
*/
|
|
|
|
@@ -44,7 +51,1225 @@
|
|
|
|
#include <scsi/scsi_host.h>
|
|
|
|
-#include "sym53c8xx_defs.h"
|
|
+#include <linux/config.h>
|
|
+
|
|
+/*
|
|
+** If you want a driver as small as possible, donnot define the
|
|
+** following options.
|
|
+*/
|
|
+#define SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
|
|
+#define SCSI_NCR_DEBUG_INFO_SUPPORT
|
|
+
|
|
+/*
|
|
+** To disable integrity checking, do not define the
|
|
+** following option.
|
|
+*/
|
|
+#ifdef CONFIG_SCSI_NCR53C8XX_INTEGRITY_CHECK
|
|
+# define SCSI_NCR_ENABLE_INTEGRITY_CHECK
|
|
+#endif
|
|
+
|
|
+/* ---------------------------------------------------------------------
|
|
+** Take into account kernel configured parameters.
|
|
+** Most of these options can be overridden at startup by a command line.
|
|
+** ---------------------------------------------------------------------
|
|
+*/
|
|
+
|
|
+/*
|
|
+ * For Ultra2 and Ultra3 SCSI support option, use special features.
|
|
+ *
|
|
+ * Value (default) means:
|
|
+ * bit 0 : all features enabled, except:
|
|
+ * bit 1 : PCI Write And Invalidate.
|
|
+ * bit 2 : Data Phase Mismatch handling from SCRIPTS.
|
|
+ *
|
|
+ * Use boot options ncr53c8xx=specf:1 if you want all chip features to be
|
|
+ * enabled by the driver.
|
|
+ */
|
|
+#define SCSI_NCR_SETUP_SPECIAL_FEATURES (3)
|
|
+
|
|
+#define SCSI_NCR_MAX_SYNC (80)
|
|
+
|
|
+/*
|
|
+ * Allow tags from 2 to 256, default 8
|
|
+ */
|
|
+#ifdef CONFIG_SCSI_NCR53C8XX_MAX_TAGS
|
|
+#if CONFIG_SCSI_NCR53C8XX_MAX_TAGS < 2
|
|
+#define SCSI_NCR_MAX_TAGS (2)
|
|
+#elif CONFIG_SCSI_NCR53C8XX_MAX_TAGS > 256
|
|
+#define SCSI_NCR_MAX_TAGS (256)
|
|
+#else
|
|
+#define SCSI_NCR_MAX_TAGS CONFIG_SCSI_NCR53C8XX_MAX_TAGS
|
|
+#endif
|
|
+#else
|
|
+#define SCSI_NCR_MAX_TAGS (8)
|
|
+#endif
|
|
+
|
|
+/*
|
|
+ * Allow tagged command queuing support if configured with default number
|
|
+ * of tags set to max (see above).
|
|
+ */
|
|
+#ifdef CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS
|
|
+#define SCSI_NCR_SETUP_DEFAULT_TAGS CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS
|
|
+#elif defined CONFIG_SCSI_NCR53C8XX_TAGGED_QUEUE
|
|
+#define SCSI_NCR_SETUP_DEFAULT_TAGS SCSI_NCR_MAX_TAGS
|
|
+#else
|
|
+#define SCSI_NCR_SETUP_DEFAULT_TAGS (0)
|
|
+#endif
|
|
+
|
|
+/*
|
|
+ * Immediate arbitration
|
|
+ */
|
|
+#if defined(CONFIG_SCSI_NCR53C8XX_IARB)
|
|
+#define SCSI_NCR_IARB_SUPPORT
|
|
+#endif
|
|
+
|
|
+/*
|
|
+ * Sync transfer frequency at startup.
|
|
+ * Allow from 5Mhz to 80Mhz default 20 Mhz.
|
|
+ */
|
|
+#ifndef CONFIG_SCSI_NCR53C8XX_SYNC
|
|
+#define CONFIG_SCSI_NCR53C8XX_SYNC (20)
|
|
+#elif CONFIG_SCSI_NCR53C8XX_SYNC > SCSI_NCR_MAX_SYNC
|
|
+#undef CONFIG_SCSI_NCR53C8XX_SYNC
|
|
+#define CONFIG_SCSI_NCR53C8XX_SYNC SCSI_NCR_MAX_SYNC
|
|
+#endif
|
|
+
|
|
+#if CONFIG_SCSI_NCR53C8XX_SYNC == 0
|
|
+#define SCSI_NCR_SETUP_DEFAULT_SYNC (255)
|
|
+#elif CONFIG_SCSI_NCR53C8XX_SYNC <= 5
|
|
+#define SCSI_NCR_SETUP_DEFAULT_SYNC (50)
|
|
+#elif CONFIG_SCSI_NCR53C8XX_SYNC <= 20
|
|
+#define SCSI_NCR_SETUP_DEFAULT_SYNC (250/(CONFIG_SCSI_NCR53C8XX_SYNC))
|
|
+#elif CONFIG_SCSI_NCR53C8XX_SYNC <= 33
|
|
+#define SCSI_NCR_SETUP_DEFAULT_SYNC (11)
|
|
+#elif CONFIG_SCSI_NCR53C8XX_SYNC <= 40
|
|
+#define SCSI_NCR_SETUP_DEFAULT_SYNC (10)
|
|
+#else
|
|
+#define SCSI_NCR_SETUP_DEFAULT_SYNC (9)
|
|
+#endif
|
|
+
|
|
+/*
|
|
+ * Disallow disconnections at boot-up
|
|
+ */
|
|
+#ifdef CONFIG_SCSI_NCR53C8XX_NO_DISCONNECT
|
|
+#define SCSI_NCR_SETUP_DISCONNECTION (0)
|
|
+#else
|
|
+#define SCSI_NCR_SETUP_DISCONNECTION (1)
|
|
+#endif
|
|
+
|
|
+/*
|
|
+ * Force synchronous negotiation for all targets
|
|
+ */
|
|
+#ifdef CONFIG_SCSI_NCR53C8XX_FORCE_SYNC_NEGO
|
|
+#define SCSI_NCR_SETUP_FORCE_SYNC_NEGO (1)
|
|
+#else
|
|
+#define SCSI_NCR_SETUP_FORCE_SYNC_NEGO (0)
|
|
+#endif
|
|
+
|
|
+/*
|
|
+ * Disable master parity checking (flawed hardwares need that)
|
|
+ */
|
|
+#ifdef CONFIG_SCSI_NCR53C8XX_DISABLE_MPARITY_CHECK
|
|
+#define SCSI_NCR_SETUP_MASTER_PARITY (0)
|
|
+#else
|
|
+#define SCSI_NCR_SETUP_MASTER_PARITY (1)
|
|
+#endif
|
|
+
|
|
+/*
|
|
+ * Disable scsi parity checking (flawed devices may need that)
|
|
+ */
|
|
+#ifdef CONFIG_SCSI_NCR53C8XX_DISABLE_PARITY_CHECK
|
|
+#define SCSI_NCR_SETUP_SCSI_PARITY (0)
|
|
+#else
|
|
+#define SCSI_NCR_SETUP_SCSI_PARITY (1)
|
|
+#endif
|
|
+
|
|
+/*
|
|
+ * Settle time after reset at boot-up
|
|
+ */
|
|
+#define SCSI_NCR_SETUP_SETTLE_TIME (2)
|
|
+
|
|
+/*
|
|
+** Bridge quirks work-around option defaulted to 1.
|
|
+*/
|
|
+#ifndef SCSI_NCR_PCIQ_WORK_AROUND_OPT
|
|
+#define SCSI_NCR_PCIQ_WORK_AROUND_OPT 1
|
|
+#endif
|
|
+
|
|
+/*
|
|
+** Work-around common bridge misbehaviour.
|
|
+**
|
|
+** - Do not flush posted writes in the opposite
|
|
+** direction on read.
|
|
+** - May reorder DMA writes to memory.
|
|
+**
|
|
+** This option should not affect performances
|
|
+** significantly, so it is the default.
|
|
+*/
|
|
+#if SCSI_NCR_PCIQ_WORK_AROUND_OPT == 1
|
|
+#define SCSI_NCR_PCIQ_MAY_NOT_FLUSH_PW_UPSTREAM
|
|
+#define SCSI_NCR_PCIQ_MAY_REORDER_WRITES
|
|
+#define SCSI_NCR_PCIQ_MAY_MISS_COMPLETIONS
|
|
+
|
|
+/*
|
|
+** Same as option 1, but also deal with
|
|
+** misconfigured interrupts.
|
|
+**
|
|
+** - Edge triggerred instead of level sensitive.
|
|
+** - No interrupt line connected.
|
|
+** - IRQ number misconfigured.
|
|
+**
|
|
+** If no interrupt is delivered, the driver will
|
|
+** catch the interrupt conditions 10 times per
|
|
+** second. No need to say that this option is
|
|
+** not recommended.
|
|
+*/
|
|
+#elif SCSI_NCR_PCIQ_WORK_AROUND_OPT == 2
|
|
+#define SCSI_NCR_PCIQ_MAY_NOT_FLUSH_PW_UPSTREAM
|
|
+#define SCSI_NCR_PCIQ_MAY_REORDER_WRITES
|
|
+#define SCSI_NCR_PCIQ_MAY_MISS_COMPLETIONS
|
|
+#define SCSI_NCR_PCIQ_BROKEN_INTR
|
|
+
|
|
+/*
|
|
+** Some bridge designers decided to flush
|
|
+** everything prior to deliver the interrupt.
|
|
+** This option tries to deal with such a
|
|
+** behaviour.
|
|
+*/
|
|
+#elif SCSI_NCR_PCIQ_WORK_AROUND_OPT == 3
|
|
+#define SCSI_NCR_PCIQ_SYNC_ON_INTR
|
|
+#endif
|
|
+
|
|
+/*
|
|
+** Other parameters not configurable with "make config"
|
|
+** Avoid to change these constants, unless you know what you are doing.
|
|
+*/
|
|
+
|
|
+#define SCSI_NCR_ALWAYS_SIMPLE_TAG
|
|
+#define SCSI_NCR_MAX_SCATTER (127)
|
|
+#define SCSI_NCR_MAX_TARGET (16)
|
|
+
|
|
+/*
|
|
+** Compute some desirable value for CAN_QUEUE
|
|
+** and CMD_PER_LUN.
|
|
+** The driver will use lower values if these
|
|
+** ones appear to be too large.
|
|
+*/
|
|
+#define SCSI_NCR_CAN_QUEUE (8*SCSI_NCR_MAX_TAGS + 2*SCSI_NCR_MAX_TARGET)
|
|
+#define SCSI_NCR_CMD_PER_LUN (SCSI_NCR_MAX_TAGS)
|
|
+
|
|
+#define SCSI_NCR_SG_TABLESIZE (SCSI_NCR_MAX_SCATTER)
|
|
+#define SCSI_NCR_TIMER_INTERVAL (HZ)
|
|
+
|
|
+#if 1 /* defined CONFIG_SCSI_MULTI_LUN */
|
|
+#define SCSI_NCR_MAX_LUN (16)
|
|
+#else
|
|
+#define SCSI_NCR_MAX_LUN (1)
|
|
+#endif
|
|
+
|
|
+/*
|
|
+ * IO functions definition for big/little endian CPU support.
|
|
+ * For now, the NCR is only supported in little endian addressing mode,
|
|
+ */
|
|
+
|
|
+#ifdef __BIG_ENDIAN
|
|
+
|
|
+#define inw_l2b inw
|
|
+#define inl_l2b inl
|
|
+#define outw_b2l outw
|
|
+#define outl_b2l outl
|
|
+
|
|
+#define readb_raw readb
|
|
+#define writeb_raw writeb
|
|
+
|
|
+#if defined(SCSI_NCR_BIG_ENDIAN)
|
|
+#define readw_l2b __raw_readw
|
|
+#define readl_l2b __raw_readl
|
|
+#define writew_b2l __raw_writew
|
|
+#define writel_b2l __raw_writel
|
|
+#define readw_raw __raw_readw
|
|
+#define readl_raw __raw_readl
|
|
+#define writew_raw __raw_writew
|
|
+#define writel_raw __raw_writel
|
|
+#else /* Other big-endian */
|
|
+#define readw_l2b readw
|
|
+#define readl_l2b readl
|
|
+#define writew_b2l writew
|
|
+#define writel_b2l writel
|
|
+#define readw_raw readw
|
|
+#define readl_raw readl
|
|
+#define writew_raw writew
|
|
+#define writel_raw writel
|
|
+#endif
|
|
+
|
|
+#else /* little endian */
|
|
+
|
|
+#define inw_raw inw
|
|
+#define inl_raw inl
|
|
+#define outw_raw outw
|
|
+#define outl_raw outl
|
|
+
|
|
+#define readb_raw readb
|
|
+#define readw_raw readw
|
|
+#define readl_raw readl
|
|
+#define writeb_raw writeb
|
|
+#define writew_raw writew
|
|
+#define writel_raw writel
|
|
+
|
|
+#endif
|
|
+
|
|
+#if !defined(__hppa__) && !defined(__mips__)
|
|
+#ifdef SCSI_NCR_BIG_ENDIAN
|
|
+#error "The NCR in BIG ENDIAN addressing mode is not (yet) supported"
|
|
+#endif
|
|
+#endif
|
|
+
|
|
+#define MEMORY_BARRIER() mb()
|
|
+
|
|
+
|
|
+/*
|
|
+ * If the NCR uses big endian addressing mode over the
|
|
+ * PCI, actual io register addresses for byte and word
|
|
+ * accesses must be changed according to lane routing.
|
|
+ * Btw, ncr_offb() and ncr_offw() macros only apply to
|
|
+ * constants and so donnot generate bloated code.
|
|
+ */
|
|
+
|
|
+#if defined(SCSI_NCR_BIG_ENDIAN)
|
|
+
|
|
+#define ncr_offb(o) (((o)&~3)+((~((o)&3))&3))
|
|
+#define ncr_offw(o) (((o)&~3)+((~((o)&3))&2))
|
|
+
|
|
+#else
|
|
+
|
|
+#define ncr_offb(o) (o)
|
|
+#define ncr_offw(o) (o)
|
|
+
|
|
+#endif
|
|
+
|
|
+/*
|
|
+ * If the CPU and the NCR use same endian-ness addressing,
|
|
+ * no byte reordering is needed for script patching.
|
|
+ * Macro cpu_to_scr() is to be used for script patching.
|
|
+ * Macro scr_to_cpu() is to be used for getting a DWORD
|
|
+ * from the script.
|
|
+ */
|
|
+
|
|
+#if defined(__BIG_ENDIAN) && !defined(SCSI_NCR_BIG_ENDIAN)
|
|
+
|
|
+#define cpu_to_scr(dw) cpu_to_le32(dw)
|
|
+#define scr_to_cpu(dw) le32_to_cpu(dw)
|
|
+
|
|
+#elif defined(__LITTLE_ENDIAN) && defined(SCSI_NCR_BIG_ENDIAN)
|
|
+
|
|
+#define cpu_to_scr(dw) cpu_to_be32(dw)
|
|
+#define scr_to_cpu(dw) be32_to_cpu(dw)
|
|
+
|
|
+#else
|
|
+
|
|
+#define cpu_to_scr(dw) (dw)
|
|
+#define scr_to_cpu(dw) (dw)
|
|
+
|
|
+#endif
|
|
+
|
|
+/*
|
|
+ * Access to the controller chip.
|
|
+ *
|
|
+ * If the CPU and the NCR use same endian-ness addressing,
|
|
+ * no byte reordering is needed for accessing chip io
|
|
+ * registers. Functions suffixed by '_raw' are assumed
|
|
+ * to access the chip over the PCI without doing byte
|
|
+ * reordering. Functions suffixed by '_l2b' are
|
|
+ * assumed to perform little-endian to big-endian byte
|
|
+ * reordering, those suffixed by '_b2l' blah, blah,
|
|
+ * blah, ...
|
|
+ */
|
|
+
|
|
+/*
|
|
+ * MEMORY mapped IO input / output
|
|
+ */
|
|
+
|
|
+#define INB_OFF(o) readb_raw((char __iomem *)np->reg + ncr_offb(o))
|
|
+#define OUTB_OFF(o, val) writeb_raw((val), (char __iomem *)np->reg + ncr_offb(o))
|
|
+
|
|
+#if defined(__BIG_ENDIAN) && !defined(SCSI_NCR_BIG_ENDIAN)
|
|
+
|
|
+#define INW_OFF(o) readw_l2b((char __iomem *)np->reg + ncr_offw(o))
|
|
+#define INL_OFF(o) readl_l2b((char __iomem *)np->reg + (o))
|
|
+
|
|
+#define OUTW_OFF(o, val) writew_b2l((val), (char __iomem *)np->reg + ncr_offw(o))
|
|
+#define OUTL_OFF(o, val) writel_b2l((val), (char __iomem *)np->reg + (o))
|
|
+
|
|
+#elif defined(__LITTLE_ENDIAN) && defined(SCSI_NCR_BIG_ENDIAN)
|
|
+
|
|
+#define INW_OFF(o) readw_b2l((char __iomem *)np->reg + ncr_offw(o))
|
|
+#define INL_OFF(o) readl_b2l((char __iomem *)np->reg + (o))
|
|
+
|
|
+#define OUTW_OFF(o, val) writew_l2b((val), (char __iomem *)np->reg + ncr_offw(o))
|
|
+#define OUTL_OFF(o, val) writel_l2b((val), (char __iomem *)np->reg + (o))
|
|
+
|
|
+#else
|
|
+
|
|
+#ifdef CONFIG_SCSI_NCR53C8XX_NO_WORD_TRANSFERS
|
|
+/* Only 8 or 32 bit transfers allowed */
|
|
+#define INW_OFF(o) (readb((char __iomem *)np->reg + ncr_offw(o)) << 8 | readb((char __iomem *)np->reg + ncr_offw(o) + 1))
|
|
+#else
|
|
+#define INW_OFF(o) readw_raw((char __iomem *)np->reg + ncr_offw(o))
|
|
+#endif
|
|
+#define INL_OFF(o) readl_raw((char __iomem *)np->reg + (o))
|
|
+
|
|
+#ifdef CONFIG_SCSI_NCR53C8XX_NO_WORD_TRANSFERS
|
|
+/* Only 8 or 32 bit transfers allowed */
|
|
+#define OUTW_OFF(o, val) do { writeb((char)((val) >> 8), (char __iomem *)np->reg + ncr_offw(o)); writeb((char)(val), (char __iomem *)np->reg + ncr_offw(o) + 1); } while (0)
|
|
+#else
|
|
+#define OUTW_OFF(o, val) writew_raw((val), (char __iomem *)np->reg + ncr_offw(o))
|
|
+#endif
|
|
+#define OUTL_OFF(o, val) writel_raw((val), (char __iomem *)np->reg + (o))
|
|
+
|
|
+#endif
|
|
+
|
|
+#define INB(r) INB_OFF (offsetof(struct ncr_reg,r))
|
|
+#define INW(r) INW_OFF (offsetof(struct ncr_reg,r))
|
|
+#define INL(r) INL_OFF (offsetof(struct ncr_reg,r))
|
|
+
|
|
+#define OUTB(r, val) OUTB_OFF (offsetof(struct ncr_reg,r), (val))
|
|
+#define OUTW(r, val) OUTW_OFF (offsetof(struct ncr_reg,r), (val))
|
|
+#define OUTL(r, val) OUTL_OFF (offsetof(struct ncr_reg,r), (val))
|
|
+
|
|
+/*
|
|
+ * Set bit field ON, OFF
|
|
+ */
|
|
+
|
|
+#define OUTONB(r, m) OUTB(r, INB(r) | (m))
|
|
+#define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
|
|
+#define OUTONW(r, m) OUTW(r, INW(r) | (m))
|
|
+#define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
|
|
+#define OUTONL(r, m) OUTL(r, INL(r) | (m))
|
|
+#define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
|
|
+
|
|
+/*
|
|
+ * We normally want the chip to have a consistent view
|
|
+ * of driver internal data structures when we restart it.
|
|
+ * Thus these macros.
|
|
+ */
|
|
+#define OUTL_DSP(v) \
|
|
+ do { \
|
|
+ MEMORY_BARRIER(); \
|
|
+ OUTL (nc_dsp, (v)); \
|
|
+ } while (0)
|
|
+
|
|
+#define OUTONB_STD() \
|
|
+ do { \
|
|
+ MEMORY_BARRIER(); \
|
|
+ OUTONB (nc_dcntl, (STD|NOCOM)); \
|
|
+ } while (0)
|
|
+
|
|
+
|
|
+/*
|
|
+** NCR53C8XX devices features table.
|
|
+*/
|
|
+struct ncr_chip {
|
|
+ unsigned short revision_id;
|
|
+ unsigned char burst_max; /* log-base-2 of max burst */
|
|
+ unsigned char offset_max;
|
|
+ unsigned char nr_divisor;
|
|
+ unsigned int features;
|
|
+#define FE_LED0 (1<<0)
|
|
+#define FE_WIDE (1<<1) /* Wide data transfers */
|
|
+#define FE_ULTRA (1<<2) /* Ultra speed 20Mtrans/sec */
|
|
+#define FE_DBLR (1<<4) /* Clock doubler present */
|
|
+#define FE_QUAD (1<<5) /* Clock quadrupler present */
|
|
+#define FE_ERL (1<<6) /* Enable read line */
|
|
+#define FE_CLSE (1<<7) /* Cache line size enable */
|
|
+#define FE_WRIE (1<<8) /* Write & Invalidate enable */
|
|
+#define FE_ERMP (1<<9) /* Enable read multiple */
|
|
+#define FE_BOF (1<<10) /* Burst opcode fetch */
|
|
+#define FE_DFS (1<<11) /* DMA fifo size */
|
|
+#define FE_PFEN (1<<12) /* Prefetch enable */
|
|
+#define FE_LDSTR (1<<13) /* Load/Store supported */
|
|
+#define FE_RAM (1<<14) /* On chip RAM present */
|
|
+#define FE_VARCLK (1<<15) /* SCSI clock may vary */
|
|
+#define FE_RAM8K (1<<16) /* On chip RAM sized 8Kb */
|
|
+#define FE_64BIT (1<<17) /* Have a 64-bit PCI interface */
|
|
+#define FE_IO256 (1<<18) /* Requires full 256 bytes in PCI space */
|
|
+#define FE_NOPM (1<<19) /* Scripts handles phase mismatch */
|
|
+#define FE_LEDC (1<<20) /* Hardware control of LED */
|
|
+#define FE_DIFF (1<<21) /* Support Differential SCSI */
|
|
+#define FE_66MHZ (1<<23) /* 66MHz PCI Support */
|
|
+#define FE_DAC (1<<24) /* Support DAC cycles (64 bit addressing) */
|
|
+#define FE_ISTAT1 (1<<25) /* Have ISTAT1, MBOX0, MBOX1 registers */
|
|
+#define FE_DAC_IN_USE (1<<26) /* Platform does DAC cycles */
|
|
+#define FE_EHP (1<<27) /* 720: Even host parity */
|
|
+#define FE_MUX (1<<28) /* 720: Multiplexed bus */
|
|
+#define FE_EA (1<<29) /* 720: Enable Ack */
|
|
+
|
|
+#define FE_CACHE_SET (FE_ERL|FE_CLSE|FE_WRIE|FE_ERMP)
|
|
+#define FE_SCSI_SET (FE_WIDE|FE_ULTRA|FE_DBLR|FE_QUAD|F_CLK80)
|
|
+#define FE_SPECIAL_SET (FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM)
|
|
+};
|
|
+
|
|
+
|
|
+/*
|
|
+** Driver setup structure.
|
|
+**
|
|
+** This structure is initialized from linux config options.
|
|
+** It can be overridden at boot-up by the boot command line.
|
|
+*/
|
|
+#define SCSI_NCR_MAX_EXCLUDES 8
|
|
+struct ncr_driver_setup {
|
|
+ u8 master_parity;
|
|
+ u8 scsi_parity;
|
|
+ u8 disconnection;
|
|
+ u8 special_features;
|
|
+ u8 force_sync_nego;
|
|
+ u8 reverse_probe;
|
|
+ u8 pci_fix_up;
|
|
+ u8 use_nvram;
|
|
+ u8 verbose;
|
|
+ u8 default_tags;
|
|
+ u16 default_sync;
|
|
+ u16 debug;
|
|
+ u8 burst_max;
|
|
+ u8 led_pin;
|
|
+ u8 max_wide;
|
|
+ u8 settle_delay;
|
|
+ u8 diff_support;
|
|
+ u8 irqm;
|
|
+ u8 bus_check;
|
|
+ u8 optimize;
|
|
+ u8 recovery;
|
|
+ u8 host_id;
|
|
+ u16 iarb;
|
|
+ u32 excludes[SCSI_NCR_MAX_EXCLUDES];
|
|
+ char tag_ctrl[100];
|
|
+};
|
|
+
|
|
+/*
|
|
+** Initial setup.
|
|
+** Can be overriden at startup by a command line.
|
|
+*/
|
|
+#define SCSI_NCR_DRIVER_SETUP \
|
|
+{ \
|
|
+ SCSI_NCR_SETUP_MASTER_PARITY, \
|
|
+ SCSI_NCR_SETUP_SCSI_PARITY, \
|
|
+ SCSI_NCR_SETUP_DISCONNECTION, \
|
|
+ SCSI_NCR_SETUP_SPECIAL_FEATURES, \
|
|
+ SCSI_NCR_SETUP_FORCE_SYNC_NEGO, \
|
|
+ 0, \
|
|
+ 0, \
|
|
+ 1, \
|
|
+ 0, \
|
|
+ SCSI_NCR_SETUP_DEFAULT_TAGS, \
|
|
+ SCSI_NCR_SETUP_DEFAULT_SYNC, \
|
|
+ 0x00, \
|
|
+ 7, \
|
|
+ 0, \
|
|
+ 1, \
|
|
+ SCSI_NCR_SETUP_SETTLE_TIME, \
|
|
+ 0, \
|
|
+ 0, \
|
|
+ 1, \
|
|
+ 0, \
|
|
+ 0, \
|
|
+ 255, \
|
|
+ 0x00 \
|
|
+}
|
|
+
|
|
+/*
|
|
+** Boot fail safe setup.
|
|
+** Override initial setup from boot command line:
|
|
+** ncr53c8xx=safe:y
|
|
+*/
|
|
+#define SCSI_NCR_DRIVER_SAFE_SETUP \
|
|
+{ \
|
|
+ 0, \
|
|
+ 1, \
|
|
+ 0, \
|
|
+ 0, \
|
|
+ 0, \
|
|
+ 0, \
|
|
+ 0, \
|
|
+ 1, \
|
|
+ 2, \
|
|
+ 0, \
|
|
+ 255, \
|
|
+ 0x00, \
|
|
+ 255, \
|
|
+ 0, \
|
|
+ 0, \
|
|
+ 10, \
|
|
+ 1, \
|
|
+ 1, \
|
|
+ 1, \
|
|
+ 0, \
|
|
+ 0, \
|
|
+ 255 \
|
|
+}
|
|
+
|
|
+/**************** ORIGINAL CONTENT of ncrreg.h from FreeBSD ******************/
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+
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+/*-----------------------------------------------------------------
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+**
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+** The ncr 53c810 register structure.
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+**
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+**-----------------------------------------------------------------
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+*/
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+
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+struct ncr_reg {
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+/*00*/ u8 nc_scntl0; /* full arb., ena parity, par->ATN */
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+
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+/*01*/ u8 nc_scntl1; /* no reset */
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+ #define ISCON 0x10 /* connected to scsi */
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+ #define CRST 0x08 /* force reset */
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+ #define IARB 0x02 /* immediate arbitration */
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+
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+/*02*/ u8 nc_scntl2; /* no disconnect expected */
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+ #define SDU 0x80 /* cmd: disconnect will raise error */
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+ #define CHM 0x40 /* sta: chained mode */
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+ #define WSS 0x08 /* sta: wide scsi send [W]*/
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+ #define WSR 0x01 /* sta: wide scsi received [W]*/
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+
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+/*03*/ u8 nc_scntl3; /* cnf system clock dependent */
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+ #define EWS 0x08 /* cmd: enable wide scsi [W]*/
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+ #define ULTRA 0x80 /* cmd: ULTRA enable */
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+ /* bits 0-2, 7 rsvd for C1010 */
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+
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+/*04*/ u8 nc_scid; /* cnf host adapter scsi address */
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+ #define RRE 0x40 /* r/w:e enable response to resel. */
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+ #define SRE 0x20 /* r/w:e enable response to select */
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+
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+/*05*/ u8 nc_sxfer; /* ### Sync speed and count */
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+ /* bits 6-7 rsvd for C1010 */
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+
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+/*06*/ u8 nc_sdid; /* ### Destination-ID */
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+
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+/*07*/ u8 nc_gpreg; /* ??? IO-Pins */
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+
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+/*08*/ u8 nc_sfbr; /* ### First byte in phase */
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+
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+/*09*/ u8 nc_socl;
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+ #define CREQ 0x80 /* r/w: SCSI-REQ */
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+ #define CACK 0x40 /* r/w: SCSI-ACK */
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+ #define CBSY 0x20 /* r/w: SCSI-BSY */
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+ #define CSEL 0x10 /* r/w: SCSI-SEL */
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+ #define CATN 0x08 /* r/w: SCSI-ATN */
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+ #define CMSG 0x04 /* r/w: SCSI-MSG */
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+ #define CC_D 0x02 /* r/w: SCSI-C_D */
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+ #define CI_O 0x01 /* r/w: SCSI-I_O */
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+
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+/*0a*/ u8 nc_ssid;
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+
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+/*0b*/ u8 nc_sbcl;
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+
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+/*0c*/ u8 nc_dstat;
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+ #define DFE 0x80 /* sta: dma fifo empty */
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+ #define MDPE 0x40 /* int: master data parity error */
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+ #define BF 0x20 /* int: script: bus fault */
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+ #define ABRT 0x10 /* int: script: command aborted */
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+ #define SSI 0x08 /* int: script: single step */
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+ #define SIR 0x04 /* int: script: interrupt instruct. */
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+ #define IID 0x01 /* int: script: illegal instruct. */
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+
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+/*0d*/ u8 nc_sstat0;
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+ #define ILF 0x80 /* sta: data in SIDL register lsb */
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+ #define ORF 0x40 /* sta: data in SODR register lsb */
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+ #define OLF 0x20 /* sta: data in SODL register lsb */
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+ #define AIP 0x10 /* sta: arbitration in progress */
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+ #define LOA 0x08 /* sta: arbitration lost */
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+ #define WOA 0x04 /* sta: arbitration won */
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+ #define IRST 0x02 /* sta: scsi reset signal */
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+ #define SDP 0x01 /* sta: scsi parity signal */
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+
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+/*0e*/ u8 nc_sstat1;
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+ #define FF3210 0xf0 /* sta: bytes in the scsi fifo */
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+
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+/*0f*/ u8 nc_sstat2;
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+ #define ILF1 0x80 /* sta: data in SIDL register msb[W]*/
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+ #define ORF1 0x40 /* sta: data in SODR register msb[W]*/
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+ #define OLF1 0x20 /* sta: data in SODL register msb[W]*/
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+ #define DM 0x04 /* sta: DIFFSENS mismatch (895/6 only) */
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+ #define LDSC 0x02 /* sta: disconnect & reconnect */
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+
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+/*10*/ u8 nc_dsa; /* --> Base page */
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+/*11*/ u8 nc_dsa1;
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+/*12*/ u8 nc_dsa2;
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+/*13*/ u8 nc_dsa3;
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+
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+/*14*/ u8 nc_istat; /* --> Main Command and status */
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+ #define CABRT 0x80 /* cmd: abort current operation */
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+ #define SRST 0x40 /* mod: reset chip */
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+ #define SIGP 0x20 /* r/w: message from host to ncr */
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+ #define SEM 0x10 /* r/w: message between host + ncr */
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+ #define CON 0x08 /* sta: connected to scsi */
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+ #define INTF 0x04 /* sta: int on the fly (reset by wr)*/
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+ #define SIP 0x02 /* sta: scsi-interrupt */
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+ #define DIP 0x01 /* sta: host/script interrupt */
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+
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+/*15*/ u8 nc_istat1; /* 896 and later cores only */
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+ #define FLSH 0x04 /* sta: chip is flushing */
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+ #define SRUN 0x02 /* sta: scripts are running */
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+ #define SIRQD 0x01 /* r/w: disable INT pin */
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+
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+/*16*/ u8 nc_mbox0; /* 896 and later cores only */
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+/*17*/ u8 nc_mbox1; /* 896 and later cores only */
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+
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+/*18*/ u8 nc_ctest0;
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+ #define EHP 0x04 /* 720 even host parity */
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+/*19*/ u8 nc_ctest1;
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+
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+/*1a*/ u8 nc_ctest2;
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+ #define CSIGP 0x40
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+ /* bits 0-2,7 rsvd for C1010 */
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+
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+/*1b*/ u8 nc_ctest3;
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+ #define FLF 0x08 /* cmd: flush dma fifo */
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+ #define CLF 0x04 /* cmd: clear dma fifo */
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+ #define FM 0x02 /* mod: fetch pin mode */
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+ #define WRIE 0x01 /* mod: write and invalidate enable */
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+ /* bits 4-7 rsvd for C1010 */
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+
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+/*1c*/ u32 nc_temp; /* ### Temporary stack */
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+
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+/*20*/ u8 nc_dfifo;
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+/*21*/ u8 nc_ctest4;
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+ #define MUX 0x80 /* 720 host bus multiplex mode */
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+ #define BDIS 0x80 /* mod: burst disable */
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+ #define MPEE 0x08 /* mod: master parity error enable */
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+
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+/*22*/ u8 nc_ctest5;
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+ #define DFS 0x20 /* mod: dma fifo size */
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+ /* bits 0-1, 3-7 rsvd for C1010 */
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+/*23*/ u8 nc_ctest6;
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+
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+/*24*/ u32 nc_dbc; /* ### Byte count and command */
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+/*28*/ u32 nc_dnad; /* ### Next command register */
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+/*2c*/ u32 nc_dsp; /* --> Script Pointer */
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+/*30*/ u32 nc_dsps; /* --> Script pointer save/opcode#2 */
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+
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+/*34*/ u8 nc_scratcha; /* Temporary register a */
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+/*35*/ u8 nc_scratcha1;
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+/*36*/ u8 nc_scratcha2;
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+/*37*/ u8 nc_scratcha3;
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+
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+/*38*/ u8 nc_dmode;
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+ #define BL_2 0x80 /* mod: burst length shift value +2 */
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+ #define BL_1 0x40 /* mod: burst length shift value +1 */
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+ #define ERL 0x08 /* mod: enable read line */
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+ #define ERMP 0x04 /* mod: enable read multiple */
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+ #define BOF 0x02 /* mod: burst op code fetch */
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+
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+/*39*/ u8 nc_dien;
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+/*3a*/ u8 nc_sbr;
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+
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+/*3b*/ u8 nc_dcntl; /* --> Script execution control */
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+ #define CLSE 0x80 /* mod: cache line size enable */
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+ #define PFF 0x40 /* cmd: pre-fetch flush */
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+ #define PFEN 0x20 /* mod: pre-fetch enable */
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+ #define EA 0x20 /* mod: 720 enable-ack */
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+ #define SSM 0x10 /* mod: single step mode */
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+ #define IRQM 0x08 /* mod: irq mode (1 = totem pole !) */
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+ #define STD 0x04 /* cmd: start dma mode */
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+ #define IRQD 0x02 /* mod: irq disable */
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+ #define NOCOM 0x01 /* cmd: protect sfbr while reselect */
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+ /* bits 0-1 rsvd for C1010 */
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+
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+/*3c*/ u32 nc_adder;
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+
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+/*40*/ u16 nc_sien; /* -->: interrupt enable */
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+/*42*/ u16 nc_sist; /* <--: interrupt status */
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+ #define SBMC 0x1000/* sta: SCSI Bus Mode Change (895/6 only) */
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+ #define STO 0x0400/* sta: timeout (select) */
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+ #define GEN 0x0200/* sta: timeout (general) */
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+ #define HTH 0x0100/* sta: timeout (handshake) */
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+ #define MA 0x80 /* sta: phase mismatch */
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+ #define CMP 0x40 /* sta: arbitration complete */
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+ #define SEL 0x20 /* sta: selected by another device */
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+ #define RSL 0x10 /* sta: reselected by another device*/
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+ #define SGE 0x08 /* sta: gross error (over/underflow)*/
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+ #define UDC 0x04 /* sta: unexpected disconnect */
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+ #define RST 0x02 /* sta: scsi bus reset detected */
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+ #define PAR 0x01 /* sta: scsi parity error */
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+
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+/*44*/ u8 nc_slpar;
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+/*45*/ u8 nc_swide;
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+/*46*/ u8 nc_macntl;
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+/*47*/ u8 nc_gpcntl;
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+/*48*/ u8 nc_stime0; /* cmd: timeout for select&handshake*/
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+/*49*/ u8 nc_stime1; /* cmd: timeout user defined */
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+/*4a*/ u16 nc_respid; /* sta: Reselect-IDs */
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+
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+/*4c*/ u8 nc_stest0;
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+
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+/*4d*/ u8 nc_stest1;
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+ #define SCLK 0x80 /* Use the PCI clock as SCSI clock */
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+ #define DBLEN 0x08 /* clock doubler running */
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+ #define DBLSEL 0x04 /* clock doubler selected */
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+
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+
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+/*4e*/ u8 nc_stest2;
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+ #define ROF 0x40 /* reset scsi offset (after gross error!) */
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+ #define DIF 0x20 /* 720 SCSI differential mode */
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+ #define EXT 0x02 /* extended filtering */
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+
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+/*4f*/ u8 nc_stest3;
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+ #define TE 0x80 /* c: tolerAnt enable */
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+ #define HSC 0x20 /* c: Halt SCSI Clock */
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+ #define CSF 0x02 /* c: clear scsi fifo */
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+
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+/*50*/ u16 nc_sidl; /* Lowlevel: latched from scsi data */
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+/*52*/ u8 nc_stest4;
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+ #define SMODE 0xc0 /* SCSI bus mode (895/6 only) */
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+ #define SMODE_HVD 0x40 /* High Voltage Differential */
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+ #define SMODE_SE 0x80 /* Single Ended */
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+ #define SMODE_LVD 0xc0 /* Low Voltage Differential */
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+ #define LCKFRQ 0x20 /* Frequency Lock (895/6 only) */
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+ /* bits 0-5 rsvd for C1010 */
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+
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+/*53*/ u8 nc_53_;
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+/*54*/ u16 nc_sodl; /* Lowlevel: data out to scsi data */
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+/*56*/ u8 nc_ccntl0; /* Chip Control 0 (896) */
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+ #define ENPMJ 0x80 /* Enable Phase Mismatch Jump */
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+ #define PMJCTL 0x40 /* Phase Mismatch Jump Control */
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+ #define ENNDJ 0x20 /* Enable Non Data PM Jump */
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+ #define DISFC 0x10 /* Disable Auto FIFO Clear */
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+ #define DILS 0x02 /* Disable Internal Load/Store */
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+ #define DPR 0x01 /* Disable Pipe Req */
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+
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+/*57*/ u8 nc_ccntl1; /* Chip Control 1 (896) */
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+ #define ZMOD 0x80 /* High Impedance Mode */
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+ #define DIC 0x10 /* Disable Internal Cycles */
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+ #define DDAC 0x08 /* Disable Dual Address Cycle */
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+ #define XTIMOD 0x04 /* 64-bit Table Ind. Indexing Mode */
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+ #define EXTIBMV 0x02 /* Enable 64-bit Table Ind. BMOV */
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+ #define EXDBMV 0x01 /* Enable 64-bit Direct BMOV */
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+
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+/*58*/ u16 nc_sbdl; /* Lowlevel: data from scsi data */
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+/*5a*/ u16 nc_5a_;
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+
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+/*5c*/ u8 nc_scr0; /* Working register B */
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+/*5d*/ u8 nc_scr1; /* */
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+/*5e*/ u8 nc_scr2; /* */
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+/*5f*/ u8 nc_scr3; /* */
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+
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+/*60*/ u8 nc_scrx[64]; /* Working register C-R */
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+/*a0*/ u32 nc_mmrs; /* Memory Move Read Selector */
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+/*a4*/ u32 nc_mmws; /* Memory Move Write Selector */
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+/*a8*/ u32 nc_sfs; /* Script Fetch Selector */
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+/*ac*/ u32 nc_drs; /* DSA Relative Selector */
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+/*b0*/ u32 nc_sbms; /* Static Block Move Selector */
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+/*b4*/ u32 nc_dbms; /* Dynamic Block Move Selector */
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+/*b8*/ u32 nc_dnad64; /* DMA Next Address 64 */
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+/*bc*/ u16 nc_scntl4; /* C1010 only */
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+ #define U3EN 0x80 /* Enable Ultra 3 */
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+ #define AIPEN 0x40 /* Allow check upper byte lanes */
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+ #define XCLKH_DT 0x08 /* Extra clock of data hold on DT
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+ transfer edge */
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+ #define XCLKH_ST 0x04 /* Extra clock of data hold on ST
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+ transfer edge */
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+
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+/*be*/ u8 nc_aipcntl0; /* Epat Control 1 C1010 only */
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+/*bf*/ u8 nc_aipcntl1; /* AIP Control C1010_66 Only */
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+
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+/*c0*/ u32 nc_pmjad1; /* Phase Mismatch Jump Address 1 */
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+/*c4*/ u32 nc_pmjad2; /* Phase Mismatch Jump Address 2 */
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+/*c8*/ u8 nc_rbc; /* Remaining Byte Count */
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+/*c9*/ u8 nc_rbc1; /* */
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+/*ca*/ u8 nc_rbc2; /* */
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+/*cb*/ u8 nc_rbc3; /* */
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+
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+/*cc*/ u8 nc_ua; /* Updated Address */
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+/*cd*/ u8 nc_ua1; /* */
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+/*ce*/ u8 nc_ua2; /* */
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+/*cf*/ u8 nc_ua3; /* */
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+/*d0*/ u32 nc_esa; /* Entry Storage Address */
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+/*d4*/ u8 nc_ia; /* Instruction Address */
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+/*d5*/ u8 nc_ia1;
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+/*d6*/ u8 nc_ia2;
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+/*d7*/ u8 nc_ia3;
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+/*d8*/ u32 nc_sbc; /* SCSI Byte Count (3 bytes only) */
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+/*dc*/ u32 nc_csbc; /* Cumulative SCSI Byte Count */
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+
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+ /* Following for C1010 only */
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+/*e0*/ u16 nc_crcpad; /* CRC Value */
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+/*e2*/ u8 nc_crccntl0; /* CRC control register */
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+ #define SNDCRC 0x10 /* Send CRC Request */
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+/*e3*/ u8 nc_crccntl1; /* CRC control register */
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+/*e4*/ u32 nc_crcdata; /* CRC data register */
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+/*e8*/ u32 nc_e8_; /* rsvd */
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+/*ec*/ u32 nc_ec_; /* rsvd */
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+/*f0*/ u16 nc_dfbc; /* DMA FIFO byte count */
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+
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+};
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+
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+/*-----------------------------------------------------------
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+**
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+** Utility macros for the script.
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+**
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+**-----------------------------------------------------------
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+*/
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+
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+#define REGJ(p,r) (offsetof(struct ncr_reg, p ## r))
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+#define REG(r) REGJ (nc_, r)
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+
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+typedef u32 ncrcmd;
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+
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+/*-----------------------------------------------------------
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+**
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+** SCSI phases
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+**
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+** DT phases illegal for ncr driver.
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+**
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+**-----------------------------------------------------------
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+*/
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+
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+#define SCR_DATA_OUT 0x00000000
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+#define SCR_DATA_IN 0x01000000
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+#define SCR_COMMAND 0x02000000
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+#define SCR_STATUS 0x03000000
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+#define SCR_DT_DATA_OUT 0x04000000
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+#define SCR_DT_DATA_IN 0x05000000
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+#define SCR_MSG_OUT 0x06000000
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+#define SCR_MSG_IN 0x07000000
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+
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+#define SCR_ILG_OUT 0x04000000
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+#define SCR_ILG_IN 0x05000000
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+
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+/*-----------------------------------------------------------
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+**
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+** Data transfer via SCSI.
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+**
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+**-----------------------------------------------------------
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+**
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+** MOVE_ABS (LEN)
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+** <<start address>>
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+**
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+** MOVE_IND (LEN)
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+** <<dnad_offset>>
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+**
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+** MOVE_TBL
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+** <<dnad_offset>>
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+**
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+**-----------------------------------------------------------
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+*/
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+
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+#define OPC_MOVE 0x08000000
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+
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+#define SCR_MOVE_ABS(l) ((0x00000000 | OPC_MOVE) | (l))
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+#define SCR_MOVE_IND(l) ((0x20000000 | OPC_MOVE) | (l))
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+#define SCR_MOVE_TBL (0x10000000 | OPC_MOVE)
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+
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+#define SCR_CHMOV_ABS(l) ((0x00000000) | (l))
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+#define SCR_CHMOV_IND(l) ((0x20000000) | (l))
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+#define SCR_CHMOV_TBL (0x10000000)
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+
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+struct scr_tblmove {
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+ u32 size;
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+ u32 addr;
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+};
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+
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+/*-----------------------------------------------------------
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+**
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+** Selection
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+**
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+**-----------------------------------------------------------
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+**
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+** SEL_ABS | SCR_ID (0..15) [ | REL_JMP]
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+** <<alternate_address>>
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+**
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+** SEL_TBL | << dnad_offset>> [ | REL_JMP]
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+** <<alternate_address>>
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+**
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+**-----------------------------------------------------------
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+*/
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+
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+#define SCR_SEL_ABS 0x40000000
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+#define SCR_SEL_ABS_ATN 0x41000000
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+#define SCR_SEL_TBL 0x42000000
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+#define SCR_SEL_TBL_ATN 0x43000000
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+
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+
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+#ifdef SCSI_NCR_BIG_ENDIAN
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+struct scr_tblsel {
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+ u8 sel_scntl3;
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+ u8 sel_id;
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+ u8 sel_sxfer;
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+ u8 sel_scntl4;
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+};
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+#else
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+struct scr_tblsel {
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+ u8 sel_scntl4;
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+ u8 sel_sxfer;
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+ u8 sel_id;
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+ u8 sel_scntl3;
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+};
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+#endif
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+
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+#define SCR_JMP_REL 0x04000000
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+#define SCR_ID(id) (((u32)(id)) << 16)
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+
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+/*-----------------------------------------------------------
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+**
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+** Waiting for Disconnect or Reselect
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+**
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+**-----------------------------------------------------------
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+**
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+** WAIT_DISC
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+** dummy: <<alternate_address>>
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+**
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+** WAIT_RESEL
|
|
+** <<alternate_address>>
|
|
+**
|
|
+**-----------------------------------------------------------
|
|
+*/
|
|
+
|
|
+#define SCR_WAIT_DISC 0x48000000
|
|
+#define SCR_WAIT_RESEL 0x50000000
|
|
+
|
|
+/*-----------------------------------------------------------
|
|
+**
|
|
+** Bit Set / Reset
|
|
+**
|
|
+**-----------------------------------------------------------
|
|
+**
|
|
+** SET (flags {|.. })
|
|
+**
|
|
+** CLR (flags {|.. })
|
|
+**
|
|
+**-----------------------------------------------------------
|
|
+*/
|
|
+
|
|
+#define SCR_SET(f) (0x58000000 | (f))
|
|
+#define SCR_CLR(f) (0x60000000 | (f))
|
|
+
|
|
+#define SCR_CARRY 0x00000400
|
|
+#define SCR_TRG 0x00000200
|
|
+#define SCR_ACK 0x00000040
|
|
+#define SCR_ATN 0x00000008
|
|
+
|
|
+
|
|
+
|
|
+
|
|
+/*-----------------------------------------------------------
|
|
+**
|
|
+** Memory to memory move
|
|
+**
|
|
+**-----------------------------------------------------------
|
|
+**
|
|
+** COPY (bytecount)
|
|
+** << source_address >>
|
|
+** << destination_address >>
|
|
+**
|
|
+** SCR_COPY sets the NO FLUSH option by default.
|
|
+** SCR_COPY_F does not set this option.
|
|
+**
|
|
+** For chips which do not support this option,
|
|
+** ncr_copy_and_bind() will remove this bit.
|
|
+**-----------------------------------------------------------
|
|
+*/
|
|
+
|
|
+#define SCR_NO_FLUSH 0x01000000
|
|
+
|
|
+#define SCR_COPY(n) (0xc0000000 | SCR_NO_FLUSH | (n))
|
|
+#define SCR_COPY_F(n) (0xc0000000 | (n))
|
|
+
|
|
+/*-----------------------------------------------------------
|
|
+**
|
|
+** Register move and binary operations
|
|
+**
|
|
+**-----------------------------------------------------------
|
|
+**
|
|
+** SFBR_REG (reg, op, data) reg = SFBR op data
|
|
+** << 0 >>
|
|
+**
|
|
+** REG_SFBR (reg, op, data) SFBR = reg op data
|
|
+** << 0 >>
|
|
+**
|
|
+** REG_REG (reg, op, data) reg = reg op data
|
|
+** << 0 >>
|
|
+**
|
|
+**-----------------------------------------------------------
|
|
+** On 810A, 860, 825A, 875, 895 and 896 chips the content
|
|
+** of SFBR register can be used as data (SCR_SFBR_DATA).
|
|
+** The 896 has additionnal IO registers starting at
|
|
+** offset 0x80. Bit 7 of register offset is stored in
|
|
+** bit 7 of the SCRIPTS instruction first DWORD.
|
|
+**-----------------------------------------------------------
|
|
+*/
|
|
+
|
|
+#define SCR_REG_OFS(ofs) ((((ofs) & 0x7f) << 16ul) + ((ofs) & 0x80))
|
|
+
|
|
+#define SCR_SFBR_REG(reg,op,data) \
|
|
+ (0x68000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
|
|
+
|
|
+#define SCR_REG_SFBR(reg,op,data) \
|
|
+ (0x70000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
|
|
+
|
|
+#define SCR_REG_REG(reg,op,data) \
|
|
+ (0x78000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
|
|
+
|
|
+
|
|
+#define SCR_LOAD 0x00000000
|
|
+#define SCR_SHL 0x01000000
|
|
+#define SCR_OR 0x02000000
|
|
+#define SCR_XOR 0x03000000
|
|
+#define SCR_AND 0x04000000
|
|
+#define SCR_SHR 0x05000000
|
|
+#define SCR_ADD 0x06000000
|
|
+#define SCR_ADDC 0x07000000
|
|
+
|
|
+#define SCR_SFBR_DATA (0x00800000>>8ul) /* Use SFBR as data */
|
|
+
|
|
+/*-----------------------------------------------------------
|
|
+**
|
|
+** FROM_REG (reg) SFBR = reg
|
|
+** << 0 >>
|
|
+**
|
|
+** TO_REG (reg) reg = SFBR
|
|
+** << 0 >>
|
|
+**
|
|
+** LOAD_REG (reg, data) reg = <data>
|
|
+** << 0 >>
|
|
+**
|
|
+** LOAD_SFBR(data) SFBR = <data>
|
|
+** << 0 >>
|
|
+**
|
|
+**-----------------------------------------------------------
|
|
+*/
|
|
+
|
|
+#define SCR_FROM_REG(reg) \
|
|
+ SCR_REG_SFBR(reg,SCR_OR,0)
|
|
+
|
|
+#define SCR_TO_REG(reg) \
|
|
+ SCR_SFBR_REG(reg,SCR_OR,0)
|
|
+
|
|
+#define SCR_LOAD_REG(reg,data) \
|
|
+ SCR_REG_REG(reg,SCR_LOAD,data)
|
|
+
|
|
+#define SCR_LOAD_SFBR(data) \
|
|
+ (SCR_REG_SFBR (gpreg, SCR_LOAD, data))
|
|
+
|
|
+/*-----------------------------------------------------------
|
|
+**
|
|
+** LOAD from memory to register.
|
|
+** STORE from register to memory.
|
|
+**
|
|
+** Only supported by 810A, 860, 825A, 875, 895 and 896.
|
|
+**
|
|
+**-----------------------------------------------------------
|
|
+**
|
|
+** LOAD_ABS (LEN)
|
|
+** <<start address>>
|
|
+**
|
|
+** LOAD_REL (LEN) (DSA relative)
|
|
+** <<dsa_offset>>
|
|
+**
|
|
+**-----------------------------------------------------------
|
|
+*/
|
|
+
|
|
+#define SCR_REG_OFS2(ofs) (((ofs) & 0xff) << 16ul)
|
|
+#define SCR_NO_FLUSH2 0x02000000
|
|
+#define SCR_DSA_REL2 0x10000000
|
|
+
|
|
+#define SCR_LOAD_R(reg, how, n) \
|
|
+ (0xe1000000 | how | (SCR_REG_OFS2(REG(reg))) | (n))
|
|
+
|
|
+#define SCR_STORE_R(reg, how, n) \
|
|
+ (0xe0000000 | how | (SCR_REG_OFS2(REG(reg))) | (n))
|
|
+
|
|
+#define SCR_LOAD_ABS(reg, n) SCR_LOAD_R(reg, SCR_NO_FLUSH2, n)
|
|
+#define SCR_LOAD_REL(reg, n) SCR_LOAD_R(reg, SCR_NO_FLUSH2|SCR_DSA_REL2, n)
|
|
+#define SCR_LOAD_ABS_F(reg, n) SCR_LOAD_R(reg, 0, n)
|
|
+#define SCR_LOAD_REL_F(reg, n) SCR_LOAD_R(reg, SCR_DSA_REL2, n)
|
|
+
|
|
+#define SCR_STORE_ABS(reg, n) SCR_STORE_R(reg, SCR_NO_FLUSH2, n)
|
|
+#define SCR_STORE_REL(reg, n) SCR_STORE_R(reg, SCR_NO_FLUSH2|SCR_DSA_REL2,n)
|
|
+#define SCR_STORE_ABS_F(reg, n) SCR_STORE_R(reg, 0, n)
|
|
+#define SCR_STORE_REL_F(reg, n) SCR_STORE_R(reg, SCR_DSA_REL2, n)
|
|
+
|
|
+
|
|
+/*-----------------------------------------------------------
|
|
+**
|
|
+** Waiting for Disconnect or Reselect
|
|
+**
|
|
+**-----------------------------------------------------------
|
|
+**
|
|
+** JUMP [ | IFTRUE/IFFALSE ( ... ) ]
|
|
+** <<address>>
|
|
+**
|
|
+** JUMPR [ | IFTRUE/IFFALSE ( ... ) ]
|
|
+** <<distance>>
|
|
+**
|
|
+** CALL [ | IFTRUE/IFFALSE ( ... ) ]
|
|
+** <<address>>
|
|
+**
|
|
+** CALLR [ | IFTRUE/IFFALSE ( ... ) ]
|
|
+** <<distance>>
|
|
+**
|
|
+** RETURN [ | IFTRUE/IFFALSE ( ... ) ]
|
|
+** <<dummy>>
|
|
+**
|
|
+** INT [ | IFTRUE/IFFALSE ( ... ) ]
|
|
+** <<ident>>
|
|
+**
|
|
+** INT_FLY [ | IFTRUE/IFFALSE ( ... ) ]
|
|
+** <<ident>>
|
|
+**
|
|
+** Conditions:
|
|
+** WHEN (phase)
|
|
+** IF (phase)
|
|
+** CARRYSET
|
|
+** DATA (data, mask)
|
|
+**
|
|
+**-----------------------------------------------------------
|
|
+*/
|
|
+
|
|
+#define SCR_NO_OP 0x80000000
|
|
+#define SCR_JUMP 0x80080000
|
|
+#define SCR_JUMP64 0x80480000
|
|
+#define SCR_JUMPR 0x80880000
|
|
+#define SCR_CALL 0x88080000
|
|
+#define SCR_CALLR 0x88880000
|
|
+#define SCR_RETURN 0x90080000
|
|
+#define SCR_INT 0x98080000
|
|
+#define SCR_INT_FLY 0x98180000
|
|
+
|
|
+#define IFFALSE(arg) (0x00080000 | (arg))
|
|
+#define IFTRUE(arg) (0x00000000 | (arg))
|
|
+
|
|
+#define WHEN(phase) (0x00030000 | (phase))
|
|
+#define IF(phase) (0x00020000 | (phase))
|
|
+
|
|
+#define DATA(D) (0x00040000 | ((D) & 0xff))
|
|
+#define MASK(D,M) (0x00040000 | (((M ^ 0xff) & 0xff) << 8ul)|((D) & 0xff))
|
|
+
|
|
+#define CARRYSET (0x00200000)
|
|
+
|
|
+/*-----------------------------------------------------------
|
|
+**
|
|
+** SCSI constants.
|
|
+**
|
|
+**-----------------------------------------------------------
|
|
+*/
|
|
+
|
|
+/*
|
|
+** Status
|
|
+*/
|
|
+
|
|
+#define S_GOOD (0x00)
|
|
+#define S_CHECK_COND (0x02)
|
|
+#define S_COND_MET (0x04)
|
|
+#define S_BUSY (0x08)
|
|
+#define S_INT (0x10)
|
|
+#define S_INT_COND_MET (0x14)
|
|
+#define S_CONFLICT (0x18)
|
|
+#define S_TERMINATED (0x20)
|
|
+#define S_QUEUE_FULL (0x28)
|
|
+#define S_ILLEGAL (0xff)
|
|
+#define S_SENSE (0x80)
|
|
+
|
|
+/*
|
|
+ * End of ncrreg from FreeBSD
|
|
+ */
|
|
|
|
/*
|
|
Build a scatter/gather entry.
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_defs.h CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_defs.h
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_defs.h 2005-12-27 13:25:49.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_defs.h 2005-12-12 09:00:09.000000000 -0700
|
|
@@ -40,7 +40,7 @@
|
|
#ifndef SYM_DEFS_H
|
|
#define SYM_DEFS_H
|
|
|
|
-#define SYM_VERSION "2.2.1"
|
|
+#define SYM_VERSION "2.2.2"
|
|
#define SYM_DRIVER_NAME "sym-" SYM_VERSION
|
|
|
|
/*
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_fw.c CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_fw.c
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_fw.c 2005-12-27 13:25:49.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_fw.c 2005-09-27 08:18:02.000000000 -0600
|
|
@@ -37,11 +37,7 @@
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
|
*/
|
|
|
|
-#ifdef __FreeBSD__
|
|
-#include <dev/sym/sym_glue.h>
|
|
-#else
|
|
#include "sym_glue.h"
|
|
-#endif
|
|
|
|
/*
|
|
* Macros used for all firmwares.
|
|
@@ -60,19 +56,12 @@
|
|
#define SYM_FWA_SCR sym_fw1a_scr
|
|
#define SYM_FWB_SCR sym_fw1b_scr
|
|
#define SYM_FWZ_SCR sym_fw1z_scr
|
|
-#ifdef __FreeBSD__
|
|
-#include <dev/sym/sym_fw1.h>
|
|
-#else
|
|
#include "sym_fw1.h"
|
|
-#endif
|
|
static struct sym_fwa_ofs sym_fw1a_ofs = {
|
|
SYM_GEN_FW_A(struct SYM_FWA_SCR)
|
|
};
|
|
static struct sym_fwb_ofs sym_fw1b_ofs = {
|
|
SYM_GEN_FW_B(struct SYM_FWB_SCR)
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
- SYM_GEN_B(struct SYM_FWB_SCR, data_io)
|
|
-#endif
|
|
};
|
|
static struct sym_fwz_ofs sym_fw1z_ofs = {
|
|
SYM_GEN_FW_Z(struct SYM_FWZ_SCR)
|
|
@@ -88,19 +77,12 @@
|
|
#define SYM_FWA_SCR sym_fw2a_scr
|
|
#define SYM_FWB_SCR sym_fw2b_scr
|
|
#define SYM_FWZ_SCR sym_fw2z_scr
|
|
-#ifdef __FreeBSD__
|
|
-#include <dev/sym/sym_fw2.h>
|
|
-#else
|
|
#include "sym_fw2.h"
|
|
-#endif
|
|
static struct sym_fwa_ofs sym_fw2a_ofs = {
|
|
SYM_GEN_FW_A(struct SYM_FWA_SCR)
|
|
};
|
|
static struct sym_fwb_ofs sym_fw2b_ofs = {
|
|
SYM_GEN_FW_B(struct SYM_FWB_SCR)
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
- SYM_GEN_B(struct SYM_FWB_SCR, data_io)
|
|
-#endif
|
|
SYM_GEN_B(struct SYM_FWB_SCR, start64)
|
|
SYM_GEN_B(struct SYM_FWB_SCR, pm_handle)
|
|
};
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_fw.h CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_fw.h
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_fw.h 2005-12-27 13:25:49.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_fw.h 2005-09-27 08:18:02.000000000 -0600
|
|
@@ -92,9 +92,6 @@
|
|
};
|
|
struct sym_fwb_ofs {
|
|
SYM_GEN_FW_B(u_short)
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
- SYM_GEN_B(u_short, data_io)
|
|
-#endif
|
|
SYM_GEN_B(u_short, start64)
|
|
SYM_GEN_B(u_short, pm_handle)
|
|
};
|
|
@@ -111,9 +108,6 @@
|
|
};
|
|
struct sym_fwb_ba {
|
|
SYM_GEN_FW_B(u32)
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
- SYM_GEN_B(u32, data_io)
|
|
-#endif
|
|
SYM_GEN_B(u32, start64);
|
|
SYM_GEN_B(u32, pm_handle);
|
|
};
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_fw1.h CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_fw1.h
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_fw1.h 2005-12-27 13:25:49.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_fw1.h 2005-09-27 08:18:02.000000000 -0600
|
|
@@ -197,12 +197,6 @@
|
|
u32 bad_status [ 7];
|
|
u32 wsr_ma_helper [ 4];
|
|
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
- /* Unknown direction handling */
|
|
- u32 data_io [ 2];
|
|
- u32 data_io_com [ 8];
|
|
- u32 data_io_out [ 7];
|
|
-#endif
|
|
/* Data area */
|
|
u32 zero [ 1];
|
|
u32 scratch [ 1];
|
|
@@ -1747,48 +1741,6 @@
|
|
SCR_JUMP,
|
|
PADDR_A (dispatch),
|
|
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
-}/*-------------------------< DATA_IO >--------------------------*/,{
|
|
- /*
|
|
- * We jump here if the data direction was unknown at the
|
|
- * time we had to queue the command to the scripts processor.
|
|
- * Pointers had been set as follow in this situation:
|
|
- * savep --> DATA_IO
|
|
- * lastp --> start pointer when DATA_IN
|
|
- * wlastp --> start pointer when DATA_OUT
|
|
- * This script sets savep and lastp according to the
|
|
- * direction chosen by the target.
|
|
- */
|
|
- SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_OUT)),
|
|
- PADDR_B (data_io_out),
|
|
-}/*-------------------------< DATA_IO_COM >----------------------*/,{
|
|
- /*
|
|
- * Direction is DATA IN.
|
|
- */
|
|
- SCR_COPY (4),
|
|
- HADDR_1 (ccb_head.lastp),
|
|
- HADDR_1 (ccb_head.savep),
|
|
- /*
|
|
- * Jump to the SCRIPTS according to actual direction.
|
|
- */
|
|
- SCR_COPY (4),
|
|
- HADDR_1 (ccb_head.savep),
|
|
- RADDR_1 (temp),
|
|
- SCR_RETURN,
|
|
- 0,
|
|
-}/*-------------------------< DATA_IO_OUT >----------------------*/,{
|
|
- /*
|
|
- * Direction is DATA OUT.
|
|
- */
|
|
- SCR_REG_REG (HF_REG, SCR_AND, (~HF_DATA_IN)),
|
|
- 0,
|
|
- SCR_COPY (4),
|
|
- HADDR_1 (ccb_head.wlastp),
|
|
- HADDR_1 (ccb_head.lastp),
|
|
- SCR_JUMP,
|
|
- PADDR_B(data_io_com),
|
|
-#endif /* SYM_OPT_HANDLE_DIR_UNKNOWN */
|
|
-
|
|
}/*-------------------------< ZERO >-----------------------------*/,{
|
|
SCR_DATA_ZERO,
|
|
}/*-------------------------< SCRATCH >--------------------------*/,{
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_fw2.h CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_fw2.h
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_fw2.h 2005-12-27 13:25:49.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_fw2.h 2005-09-27 08:18:02.000000000 -0600
|
|
@@ -191,13 +191,6 @@
|
|
u32 pm_wsr_handle [ 38];
|
|
u32 wsr_ma_helper [ 4];
|
|
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
- /* Unknown direction handling */
|
|
- u32 data_io [ 2];
|
|
- u32 data_io_in [ 2];
|
|
- u32 data_io_com [ 6];
|
|
- u32 data_io_out [ 8];
|
|
-#endif
|
|
/* Data area */
|
|
u32 zero [ 1];
|
|
u32 scratch [ 1];
|
|
@@ -1838,51 +1831,6 @@
|
|
SCR_JUMP,
|
|
PADDR_A (dispatch),
|
|
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
-}/*-------------------------< DATA_IO >--------------------------*/,{
|
|
- /*
|
|
- * We jump here if the data direction was unknown at the
|
|
- * time we had to queue the command to the scripts processor.
|
|
- * Pointers had been set as follow in this situation:
|
|
- * savep --> DATA_IO
|
|
- * lastp --> start pointer when DATA_IN
|
|
- * wlastp --> start pointer when DATA_OUT
|
|
- * This script sets savep and lastp according to the
|
|
- * direction chosen by the target.
|
|
- */
|
|
- SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_OUT)),
|
|
- PADDR_B (data_io_out),
|
|
-}/*-------------------------< DATA_IO_IN >-----------------------*/,{
|
|
- /*
|
|
- * Direction is DATA IN.
|
|
- */
|
|
- SCR_LOAD_REL (scratcha, 4),
|
|
- offsetof (struct sym_ccb, phys.head.lastp),
|
|
-}/*-------------------------< DATA_IO_COM >----------------------*/,{
|
|
- SCR_STORE_REL (scratcha, 4),
|
|
- offsetof (struct sym_ccb, phys.head.savep),
|
|
-
|
|
- /*
|
|
- * Jump to the SCRIPTS according to actual direction.
|
|
- */
|
|
- SCR_LOAD_REL (temp, 4),
|
|
- offsetof (struct sym_ccb, phys.head.savep),
|
|
- SCR_RETURN,
|
|
- 0,
|
|
-}/*-------------------------< DATA_IO_OUT >----------------------*/,{
|
|
- /*
|
|
- * Direction is DATA OUT.
|
|
- */
|
|
- SCR_REG_REG (HF_REG, SCR_AND, (~HF_DATA_IN)),
|
|
- 0,
|
|
- SCR_LOAD_REL (scratcha, 4),
|
|
- offsetof (struct sym_ccb, phys.head.wlastp),
|
|
- SCR_STORE_REL (scratcha, 4),
|
|
- offsetof (struct sym_ccb, phys.head.lastp),
|
|
- SCR_JUMP,
|
|
- PADDR_B(data_io_com),
|
|
-#endif /* SYM_OPT_HANDLE_DIR_UNKNOWN */
|
|
-
|
|
}/*-------------------------< ZERO >-----------------------------*/,{
|
|
SCR_DATA_ZERO,
|
|
}/*-------------------------< SCRATCH >--------------------------*/,{
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_glue.c CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_glue.c
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_glue.c 2005-12-27 13:25:49.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_glue.c 2005-12-18 08:29:09.000000000 -0700
|
|
@@ -134,45 +134,6 @@
|
|
}
|
|
}
|
|
|
|
-/*
|
|
- * We used to try to deal with 64-bit BARs here, but don't any more.
|
|
- * There are many parts of this driver which would need to be modified
|
|
- * to handle a 64-bit base address, including scripts. I'm uncomfortable
|
|
- * with making those changes when I have no way of testing it, so I'm
|
|
- * just going to disable it.
|
|
- *
|
|
- * Note that some machines (eg HP rx8620 and Superdome) have bus addresses
|
|
- * below 4GB and physical addresses above 4GB. These will continue to work.
|
|
- */
|
|
-static int __devinit
|
|
-pci_get_base_address(struct pci_dev *pdev, int index, unsigned long *basep)
|
|
-{
|
|
- u32 tmp;
|
|
- unsigned long base;
|
|
-#define PCI_BAR_OFFSET(index) (PCI_BASE_ADDRESS_0 + (index<<2))
|
|
-
|
|
- pci_read_config_dword(pdev, PCI_BAR_OFFSET(index++), &tmp);
|
|
- base = tmp;
|
|
- if ((tmp & 0x7) == PCI_BASE_ADDRESS_MEM_TYPE_64) {
|
|
- pci_read_config_dword(pdev, PCI_BAR_OFFSET(index++), &tmp);
|
|
- if (tmp > 0) {
|
|
- dev_err(&pdev->dev,
|
|
- "BAR %d is 64-bit, disabling\n", index - 1);
|
|
- base = 0;
|
|
- }
|
|
- }
|
|
-
|
|
- if ((base & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
|
|
- base &= PCI_BASE_ADDRESS_IO_MASK;
|
|
- } else {
|
|
- base &= PCI_BASE_ADDRESS_MEM_MASK;
|
|
- }
|
|
-
|
|
- *basep = base;
|
|
- return index;
|
|
-#undef PCI_BAR_OFFSET
|
|
-}
|
|
-
|
|
static struct scsi_transport_template *sym2_transport_template = NULL;
|
|
|
|
/*
|
|
@@ -514,9 +475,8 @@
|
|
*/
|
|
int sym_setup_data_and_start(struct sym_hcb *np, struct scsi_cmnd *cmd, struct sym_ccb *cp)
|
|
{
|
|
+ u32 lastp, goalp;
|
|
int dir;
|
|
- struct sym_tcb *tp = &np->target[cp->target];
|
|
- struct sym_lcb *lp = sym_lp(tp, cp->lun);
|
|
|
|
/*
|
|
* Build the CDB.
|
|
@@ -534,15 +494,47 @@
|
|
sym_set_cam_status(cmd, DID_ERROR);
|
|
goto out_abort;
|
|
}
|
|
+
|
|
+ /*
|
|
+ * No segments means no data.
|
|
+ */
|
|
+ if (!cp->segments)
|
|
+ dir = DMA_NONE;
|
|
} else {
|
|
cp->data_len = 0;
|
|
cp->segments = 0;
|
|
}
|
|
|
|
/*
|
|
- * Set data pointers.
|
|
+ * Set the data pointer.
|
|
+ */
|
|
+ switch (dir) {
|
|
+ case DMA_BIDIRECTIONAL:
|
|
+ printk("%s: got DMA_BIDIRECTIONAL command", sym_name(np));
|
|
+ sym_set_cam_status(cmd, DID_ERROR);
|
|
+ goto out_abort;
|
|
+ case DMA_TO_DEVICE:
|
|
+ goalp = SCRIPTA_BA(np, data_out2) + 8;
|
|
+ lastp = goalp - 8 - (cp->segments * (2*4));
|
|
+ break;
|
|
+ case DMA_FROM_DEVICE:
|
|
+ cp->host_flags |= HF_DATA_IN;
|
|
+ goalp = SCRIPTA_BA(np, data_in2) + 8;
|
|
+ lastp = goalp - 8 - (cp->segments * (2*4));
|
|
+ break;
|
|
+ case DMA_NONE:
|
|
+ default:
|
|
+ lastp = goalp = SCRIPTB_BA(np, no_data);
|
|
+ break;
|
|
+ }
|
|
+
|
|
+ /*
|
|
+ * Set all pointers values needed by SCRIPTS.
|
|
*/
|
|
- sym_setup_data_pointers(np, cp, dir);
|
|
+ cp->phys.head.lastp = cpu_to_scr(lastp);
|
|
+ cp->phys.head.savep = cpu_to_scr(lastp);
|
|
+ cp->startp = cp->phys.head.savep;
|
|
+ cp->goalp = cpu_to_scr(goalp);
|
|
|
|
/*
|
|
* When `#ifed 1', the code below makes the driver
|
|
@@ -563,10 +555,7 @@
|
|
/*
|
|
* activate this job.
|
|
*/
|
|
- if (lp)
|
|
- sym_start_next_ccbs(np, lp, 2);
|
|
- else
|
|
- sym_put_start_queue(np, cp);
|
|
+ sym_put_start_queue(np, cp);
|
|
return 0;
|
|
|
|
out_abort:
|
|
@@ -721,7 +710,6 @@
|
|
* What we will do regarding the involved SCSI command.
|
|
*/
|
|
#define SYM_EH_DO_IGNORE 0
|
|
-#define SYM_EH_DO_COMPLETE 1
|
|
#define SYM_EH_DO_WAIT 2
|
|
|
|
/*
|
|
@@ -773,25 +761,18 @@
|
|
|
|
dev_warn(&cmd->device->sdev_gendev, "%s operation started.\n", opname);
|
|
|
|
+ spin_lock_irq(cmd->device->host->host_lock);
|
|
/* This one is queued in some place -> to wait for completion */
|
|
FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
|
|
struct sym_ccb *cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
|
|
if (cp->cmd == cmd) {
|
|
to_do = SYM_EH_DO_WAIT;
|
|
- goto prepare;
|
|
+ break;
|
|
}
|
|
}
|
|
|
|
-prepare:
|
|
- /* Prepare stuff to either ignore, complete or wait for completion */
|
|
- switch(to_do) {
|
|
- default:
|
|
- case SYM_EH_DO_IGNORE:
|
|
- break;
|
|
- case SYM_EH_DO_WAIT:
|
|
+ if (to_do == SYM_EH_DO_WAIT) {
|
|
init_completion(&ep->done);
|
|
- /* fall through */
|
|
- case SYM_EH_DO_COMPLETE:
|
|
ep->old_done = cmd->scsi_done;
|
|
cmd->scsi_done = sym_eh_done;
|
|
SYM_UCMD_PTR(cmd)->eh_wait = ep;
|
|
@@ -827,9 +808,6 @@
|
|
}
|
|
|
|
ep->to_do = to_do;
|
|
- /* Complete the command with locks held as required by the driver */
|
|
- if (to_do == SYM_EH_DO_COMPLETE)
|
|
- sym_xpt_done2(np, cmd, DID_ABORT);
|
|
|
|
/* Wait for completion with locks released, as required by kernel */
|
|
if (to_do == SYM_EH_DO_WAIT) {
|
|
@@ -845,6 +823,7 @@
|
|
if (ep->timed_out)
|
|
sts = -2;
|
|
}
|
|
+ spin_unlock_irq(cmd->device->host->host_lock);
|
|
dev_warn(&cmd->device->sdev_gendev, "%s operation %s.\n", opname,
|
|
sts==0 ? "complete" :sts==-2 ? "timed-out" : "failed");
|
|
return sts ? SCSI_FAILED : SCSI_SUCCESS;
|
|
@@ -856,46 +835,22 @@
|
|
*/
|
|
static int sym53c8xx_eh_abort_handler(struct scsi_cmnd *cmd)
|
|
{
|
|
- int rc;
|
|
-
|
|
- spin_lock_irq(cmd->device->host->host_lock);
|
|
- rc = sym_eh_handler(SYM_EH_ABORT, "ABORT", cmd);
|
|
- spin_unlock_irq(cmd->device->host->host_lock);
|
|
-
|
|
- return rc;
|
|
+ return sym_eh_handler(SYM_EH_ABORT, "ABORT", cmd);
|
|
}
|
|
|
|
static int sym53c8xx_eh_device_reset_handler(struct scsi_cmnd *cmd)
|
|
{
|
|
- int rc;
|
|
-
|
|
- spin_lock_irq(cmd->device->host->host_lock);
|
|
- rc = sym_eh_handler(SYM_EH_DEVICE_RESET, "DEVICE RESET", cmd);
|
|
- spin_unlock_irq(cmd->device->host->host_lock);
|
|
-
|
|
- return rc;
|
|
+ return sym_eh_handler(SYM_EH_DEVICE_RESET, "DEVICE RESET", cmd);
|
|
}
|
|
|
|
static int sym53c8xx_eh_bus_reset_handler(struct scsi_cmnd *cmd)
|
|
{
|
|
- int rc;
|
|
-
|
|
- spin_lock_irq(cmd->device->host->host_lock);
|
|
- rc = sym_eh_handler(SYM_EH_BUS_RESET, "BUS RESET", cmd);
|
|
- spin_unlock_irq(cmd->device->host->host_lock);
|
|
-
|
|
- return rc;
|
|
+ return sym_eh_handler(SYM_EH_BUS_RESET, "BUS RESET", cmd);
|
|
}
|
|
|
|
static int sym53c8xx_eh_host_reset_handler(struct scsi_cmnd *cmd)
|
|
{
|
|
- int rc;
|
|
-
|
|
- spin_lock_irq(cmd->device->host->host_lock);
|
|
- rc = sym_eh_handler(SYM_EH_HOST_RESET, "HOST RESET", cmd);
|
|
- spin_unlock_irq(cmd->device->host->host_lock);
|
|
-
|
|
- return rc;
|
|
+ return sym_eh_handler(SYM_EH_HOST_RESET, "HOST RESET", cmd);
|
|
}
|
|
|
|
/*
|
|
@@ -914,15 +869,12 @@
|
|
if (reqtags > lp->s.scdev_depth)
|
|
reqtags = lp->s.scdev_depth;
|
|
|
|
- lp->started_limit = reqtags ? reqtags : 2;
|
|
- lp->started_max = 1;
|
|
lp->s.reqtags = reqtags;
|
|
|
|
if (reqtags != oldtags) {
|
|
dev_info(&tp->starget->dev,
|
|
"tagged command queuing %s, command queue depth %d.\n",
|
|
- lp->s.reqtags ? "enabled" : "disabled",
|
|
- lp->started_limit);
|
|
+ lp->s.reqtags ? "enabled" : "disabled", reqtags);
|
|
}
|
|
}
|
|
|
|
@@ -981,15 +933,14 @@
|
|
|
|
static int sym53c8xx_slave_alloc(struct scsi_device *sdev)
|
|
{
|
|
- struct sym_hcb *np;
|
|
- struct sym_tcb *tp;
|
|
+ struct sym_hcb *np = sym_get_hcb(sdev->host);
|
|
+ struct sym_tcb *tp = &np->target[sdev->id];
|
|
+ struct sym_lcb *lp;
|
|
|
|
if (sdev->id >= SYM_CONF_MAX_TARGET || sdev->lun >= SYM_CONF_MAX_LUN)
|
|
return -ENXIO;
|
|
|
|
- np = sym_get_hcb(sdev->host);
|
|
- tp = &np->target[sdev->id];
|
|
-
|
|
+ tp->starget = sdev->sdev_target;
|
|
/*
|
|
* Fail the device init if the device is flagged NOSCAN at BOOT in
|
|
* the NVRAM. This may speed up boot and maintain coherency with
|
|
@@ -999,35 +950,41 @@
|
|
* lun devices behave badly when asked for a non zero LUN.
|
|
*/
|
|
|
|
- if ((tp->usrflags & SYM_SCAN_BOOT_DISABLED) ||
|
|
- ((tp->usrflags & SYM_SCAN_LUNS_DISABLED) && sdev->lun != 0)) {
|
|
+ if (tp->usrflags & SYM_SCAN_BOOT_DISABLED) {
|
|
tp->usrflags &= ~SYM_SCAN_BOOT_DISABLED;
|
|
+ starget_printk(KERN_INFO, tp->starget,
|
|
+ "Scan at boot disabled in NVRAM\n");
|
|
return -ENXIO;
|
|
}
|
|
|
|
- tp->starget = sdev->sdev_target;
|
|
+ if (tp->usrflags & SYM_SCAN_LUNS_DISABLED) {
|
|
+ if (sdev->lun != 0)
|
|
+ return -ENXIO;
|
|
+ starget_printk(KERN_INFO, tp->starget,
|
|
+ "Multiple LUNs disabled in NVRAM\n");
|
|
+ }
|
|
+
|
|
+ lp = sym_alloc_lcb(np, sdev->id, sdev->lun);
|
|
+ if (!lp)
|
|
+ return -ENOMEM;
|
|
+
|
|
+ spi_min_period(tp->starget) = tp->usr_period;
|
|
+ spi_max_width(tp->starget) = tp->usr_width;
|
|
+
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Linux entry point for device queue sizing.
|
|
*/
|
|
-static int sym53c8xx_slave_configure(struct scsi_device *device)
|
|
+static int sym53c8xx_slave_configure(struct scsi_device *sdev)
|
|
{
|
|
- struct sym_hcb *np = sym_get_hcb(device->host);
|
|
- struct sym_tcb *tp = &np->target[device->id];
|
|
- struct sym_lcb *lp;
|
|
+ struct sym_hcb *np = sym_get_hcb(sdev->host);
|
|
+ struct sym_tcb *tp = &np->target[sdev->id];
|
|
+ struct sym_lcb *lp = sym_lp(tp, sdev->lun);
|
|
int reqtags, depth_to_use;
|
|
|
|
/*
|
|
- * Allocate the LCB if not yet.
|
|
- * If it fail, we may well be in the sh*t. :)
|
|
- */
|
|
- lp = sym_alloc_lcb(np, device->id, device->lun);
|
|
- if (!lp)
|
|
- return -ENOMEM;
|
|
-
|
|
- /*
|
|
* Get user flags.
|
|
*/
|
|
lp->curr_flags = lp->user_flags;
|
|
@@ -1038,10 +995,10 @@
|
|
* Use at least 2.
|
|
* Donnot use more than our maximum.
|
|
*/
|
|
- reqtags = device_queue_depth(np, device->id, device->lun);
|
|
+ reqtags = device_queue_depth(np, sdev->id, sdev->lun);
|
|
if (reqtags > tp->usrtags)
|
|
reqtags = tp->usrtags;
|
|
- if (!device->tagged_supported)
|
|
+ if (!sdev->tagged_supported)
|
|
reqtags = 0;
|
|
#if 1 /* Avoid to locally queue commands for no good reasons */
|
|
if (reqtags > SYM_CONF_MAX_TAG)
|
|
@@ -1050,19 +1007,30 @@
|
|
#else
|
|
depth_to_use = (reqtags ? SYM_CONF_MAX_TAG : 2);
|
|
#endif
|
|
- scsi_adjust_queue_depth(device,
|
|
- (device->tagged_supported ?
|
|
+ scsi_adjust_queue_depth(sdev,
|
|
+ (sdev->tagged_supported ?
|
|
MSG_SIMPLE_TAG : 0),
|
|
depth_to_use);
|
|
lp->s.scdev_depth = depth_to_use;
|
|
- sym_tune_dev_queuing(tp, device->lun, reqtags);
|
|
+ sym_tune_dev_queuing(tp, sdev->lun, reqtags);
|
|
|
|
- if (!spi_initial_dv(device->sdev_target))
|
|
- spi_dv_device(device);
|
|
+ if (!spi_initial_dv(sdev->sdev_target))
|
|
+ spi_dv_device(sdev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
+static void sym53c8xx_slave_destroy(struct scsi_device *sdev)
|
|
+{
|
|
+ struct sym_hcb *np = sym_get_hcb(sdev->host);
|
|
+ struct sym_lcb *lp = sym_lp(&np->target[sdev->id], sdev->lun);
|
|
+
|
|
+ if (lp->itlq_tbl)
|
|
+ sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK * 4, "ITLQ_TBL");
|
|
+ kfree(lp->cb_tags);
|
|
+ sym_mfree_dma(lp, sizeof(*lp), "LCB");
|
|
+}
|
|
+
|
|
/*
|
|
* Linux entry point for info() function
|
|
*/
|
|
@@ -1497,7 +1465,7 @@
|
|
{
|
|
#if SYM_CONF_DMA_ADDRESSING_MODE > 0
|
|
#if SYM_CONF_DMA_ADDRESSING_MODE == 1
|
|
-#define DMA_DAC_MASK 0x000000ffffffffffULL /* 40-bit */
|
|
+#define DMA_DAC_MASK DMA_40BIT_MASK
|
|
#elif SYM_CONF_DMA_ADDRESSING_MODE == 2
|
|
#define DMA_DAC_MASK DMA_64BIT_MASK
|
|
#endif
|
|
@@ -1820,15 +1788,25 @@
|
|
static void __devinit
|
|
sym_init_device(struct pci_dev *pdev, struct sym_device *device)
|
|
{
|
|
- int i;
|
|
+ int i = 2;
|
|
+ struct pci_bus_region bus_addr;
|
|
|
|
device->host_id = SYM_SETUP_HOST_ID;
|
|
device->pdev = pdev;
|
|
|
|
- i = pci_get_base_address(pdev, 1, &device->mmio_base);
|
|
- pci_get_base_address(pdev, i, &device->ram_base);
|
|
+ pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[1]);
|
|
+ device->mmio_base = bus_addr.start;
|
|
+
|
|
+ /*
|
|
+ * If the BAR is 64-bit, resource 2 will be occupied by the
|
|
+ * upper 32 bits
|
|
+ */
|
|
+ if (!pdev->resource[i].flags)
|
|
+ i++;
|
|
+ pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[i]);
|
|
+ device->ram_base = bus_addr.start;
|
|
|
|
-#ifndef CONFIG_SCSI_SYM53C8XX_IOMAPPED
|
|
+#ifdef CONFIG_SCSI_SYM53C8XX_MMIO
|
|
if (device->mmio_base)
|
|
device->s.ioaddr = pci_iomap(pdev, 1,
|
|
pci_resource_len(pdev, 1));
|
|
@@ -1926,6 +1904,7 @@
|
|
.queuecommand = sym53c8xx_queue_command,
|
|
.slave_alloc = sym53c8xx_slave_alloc,
|
|
.slave_configure = sym53c8xx_slave_configure,
|
|
+ .slave_destroy = sym53c8xx_slave_destroy,
|
|
.eh_abort_handler = sym53c8xx_eh_abort_handler,
|
|
.eh_device_reset_handler = sym53c8xx_eh_device_reset_handler,
|
|
.eh_bus_reset_handler = sym53c8xx_eh_bus_reset_handler,
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_glue.h CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_glue.h
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_glue.h 2005-12-27 13:25:49.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_glue.h 2005-12-18 08:29:09.000000000 -0700
|
|
@@ -68,8 +68,7 @@
|
|
*/
|
|
#define SYM_CONF_TIMER_INTERVAL ((HZ+1)/2)
|
|
|
|
-#define SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
-#define SYM_OPT_HANDLE_DEVICE_QUEUEING
|
|
+#undef SYM_OPT_HANDLE_DEVICE_QUEUEING
|
|
#define SYM_OPT_LIMIT_COMMAND_REORDERING
|
|
|
|
/*
|
|
@@ -268,6 +267,5 @@
|
|
void sym_xpt_async_sent_bdr(struct sym_hcb *np, int target);
|
|
int sym_setup_data_and_start (struct sym_hcb *np, struct scsi_cmnd *csio, struct sym_ccb *cp);
|
|
void sym_log_bus_error(struct sym_hcb *np);
|
|
-void sym_sniff_inquiry(struct sym_hcb *np, struct scsi_cmnd *cmd, int resid);
|
|
|
|
#endif /* SYM_GLUE_H */
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_hipd.c CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_hipd.c
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_hipd.c 2005-12-27 13:25:49.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_hipd.c 2005-12-18 08:29:09.000000000 -0700
|
|
@@ -40,6 +40,7 @@
|
|
|
|
#include <linux/slab.h>
|
|
#include <asm/param.h> /* for timeouts in units of HZ */
|
|
+#include <scsi/scsi_dbg.h>
|
|
|
|
#include "sym_glue.h"
|
|
#include "sym_nvram.h"
|
|
@@ -70,32 +71,12 @@
|
|
printf (".\n");
|
|
}
|
|
|
|
-/*
|
|
- * Print out the content of a SCSI message.
|
|
- */
|
|
-static int sym_show_msg (u_char * msg)
|
|
-{
|
|
- u_char i;
|
|
- printf ("%x",*msg);
|
|
- if (*msg==M_EXTENDED) {
|
|
- for (i=1;i<8;i++) {
|
|
- if (i-1>msg[1]) break;
|
|
- printf ("-%x",msg[i]);
|
|
- }
|
|
- return (i+1);
|
|
- } else if ((*msg & 0xf0) == 0x20) {
|
|
- printf ("-%x",msg[1]);
|
|
- return (2);
|
|
- }
|
|
- return (1);
|
|
-}
|
|
-
|
|
static void sym_print_msg(struct sym_ccb *cp, char *label, u_char *msg)
|
|
{
|
|
sym_print_addr(cp->cmd, "%s: ", label);
|
|
|
|
- sym_show_msg(msg);
|
|
- printf(".\n");
|
|
+ scsi_print_msg(msg);
|
|
+ printf("\n");
|
|
}
|
|
|
|
static void sym_print_nego_msg(struct sym_hcb *np, int target, char *label, u_char *msg)
|
|
@@ -103,8 +84,8 @@
|
|
struct sym_tcb *tp = &np->target[target];
|
|
dev_info(&tp->starget->dev, "%s: ", label);
|
|
|
|
- sym_show_msg(msg);
|
|
- printf(".\n");
|
|
+ scsi_print_msg(msg);
|
|
+ printf("\n");
|
|
}
|
|
|
|
/*
|
|
@@ -635,29 +616,6 @@
|
|
}
|
|
}
|
|
|
|
-
|
|
-/*
|
|
- * Print out the list of targets that have some flag disabled by user.
|
|
- */
|
|
-static void sym_print_targets_flag(struct sym_hcb *np, int mask, char *msg)
|
|
-{
|
|
- int cnt;
|
|
- int i;
|
|
-
|
|
- for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
|
|
- if (i == np->myaddr)
|
|
- continue;
|
|
- if (np->target[i].usrflags & mask) {
|
|
- if (!cnt++)
|
|
- printf("%s: %s disabled for targets",
|
|
- sym_name(np), msg);
|
|
- printf(" %d", i);
|
|
- }
|
|
- }
|
|
- if (cnt)
|
|
- printf(".\n");
|
|
-}
|
|
-
|
|
/*
|
|
* Save initial settings of some IO registers.
|
|
* Assumed to have been set by BIOS.
|
|
@@ -962,7 +920,7 @@
|
|
tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
|
|
tp->usrtags = SYM_SETUP_MAX_TAG;
|
|
|
|
- sym_nvram_setup_target(np, i, nvram);
|
|
+ sym_nvram_setup_target(tp, i, nvram);
|
|
|
|
if (!tp->usrtags)
|
|
tp->usrflags &= ~SYM_TAGS_ENABLED;
|
|
@@ -1005,13 +963,6 @@
|
|
sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
|
|
np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
|
|
}
|
|
- /*
|
|
- * Let user be aware of targets that have some disable flags set.
|
|
- */
|
|
- sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT");
|
|
- if (sym_verbose)
|
|
- sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED,
|
|
- "SCAN FOR LUNS");
|
|
|
|
return 0;
|
|
}
|
|
@@ -1021,8 +972,8 @@
|
|
*
|
|
* Has to be called with interrupts disabled.
|
|
*/
|
|
-#ifndef CONFIG_SCSI_SYM53C8XX_IOMAPPED
|
|
-static int sym_regtest (struct sym_hcb *np)
|
|
+#ifdef CONFIG_SCSI_SYM53C8XX_MMIO
|
|
+static int sym_regtest(struct sym_hcb *np)
|
|
{
|
|
register volatile u32 data;
|
|
/*
|
|
@@ -1040,20 +991,25 @@
|
|
#endif
|
|
printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
|
|
(unsigned) data);
|
|
- return (0x10);
|
|
+ return 0x10;
|
|
}
|
|
- return (0);
|
|
+ return 0;
|
|
+}
|
|
+#else
|
|
+static inline int sym_regtest(struct sym_hcb *np)
|
|
+{
|
|
+ return 0;
|
|
}
|
|
#endif
|
|
|
|
-static int sym_snooptest (struct sym_hcb *np)
|
|
+static int sym_snooptest(struct sym_hcb *np)
|
|
{
|
|
- u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
|
|
- int i, err=0;
|
|
-#ifndef CONFIG_SCSI_SYM53C8XX_IOMAPPED
|
|
- err |= sym_regtest (np);
|
|
- if (err) return (err);
|
|
-#endif
|
|
+ u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
|
|
+ int i, err;
|
|
+
|
|
+ err = sym_regtest(np);
|
|
+ if (err)
|
|
+ return err;
|
|
restart_test:
|
|
/*
|
|
* Enable Master Parity Checking as we intend
|
|
@@ -1142,7 +1098,7 @@
|
|
err |= 4;
|
|
}
|
|
|
|
- return (err);
|
|
+ return err;
|
|
}
|
|
|
|
/*
|
|
@@ -3654,7 +3610,7 @@
|
|
* If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
|
|
* end of the data.
|
|
*/
|
|
- tmp = scr_to_cpu(sym_goalp(cp));
|
|
+ tmp = scr_to_cpu(cp->goalp);
|
|
dp_sg = SYM_CONF_MAX_SG;
|
|
if (dp_scr != tmp)
|
|
dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
|
|
@@ -3761,7 +3717,7 @@
|
|
* And our alchemy:) allows to easily calculate the data
|
|
* script address we want to return for the next data phase.
|
|
*/
|
|
- dp_ret = cpu_to_scr(sym_goalp(cp));
|
|
+ dp_ret = cpu_to_scr(cp->goalp);
|
|
dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
|
|
|
|
/*
|
|
@@ -3857,7 +3813,7 @@
|
|
* If all data has been transferred,
|
|
* there is no residual.
|
|
*/
|
|
- if (cp->phys.head.lastp == sym_goalp(cp))
|
|
+ if (cp->phys.head.lastp == cp->goalp)
|
|
return resid;
|
|
|
|
/*
|
|
@@ -4664,30 +4620,7 @@
|
|
goto out;
|
|
cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
|
|
|
|
-#ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
|
|
- /*
|
|
- * If the LCB is not yet available and the LUN
|
|
- * has been probed ok, try to allocate the LCB.
|
|
- */
|
|
- if (!lp && sym_is_bit(tp->lun_map, ln)) {
|
|
- lp = sym_alloc_lcb(np, tn, ln);
|
|
- if (!lp)
|
|
- goto out_free;
|
|
- }
|
|
-#endif
|
|
-
|
|
- /*
|
|
- * If the LCB is not available here, then the
|
|
- * logical unit is not yet discovered. For those
|
|
- * ones only accept 1 SCSI IO per logical unit,
|
|
- * since we cannot allow disconnections.
|
|
- */
|
|
- if (!lp) {
|
|
- if (!sym_is_bit(tp->busy0_map, ln))
|
|
- sym_set_bit(tp->busy0_map, ln);
|
|
- else
|
|
- goto out_free;
|
|
- } else {
|
|
+ {
|
|
/*
|
|
* If we have been asked for a tagged command.
|
|
*/
|
|
@@ -4696,7 +4629,8 @@
|
|
* Debugging purpose.
|
|
*/
|
|
#ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
|
|
- assert(lp->busy_itl == 0);
|
|
+ if (lp->busy_itl != 0)
|
|
+ goto out_free;
|
|
#endif
|
|
/*
|
|
* Allocate resources for tags if not yet.
|
|
@@ -4741,7 +4675,8 @@
|
|
* Debugging purpose.
|
|
*/
|
|
#ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
|
|
- assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
|
|
+ if (lp->busy_itl != 0 || lp->busy_itlq != 0)
|
|
+ goto out_free;
|
|
#endif
|
|
/*
|
|
* Count this nexus for this LUN.
|
|
@@ -4840,12 +4775,6 @@
|
|
lp->head.resel_sa =
|
|
cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
|
|
}
|
|
- /*
|
|
- * Otherwise, we only accept 1 IO per LUN.
|
|
- * Clear the bit that keeps track of this IO.
|
|
- */
|
|
- else
|
|
- sym_clr_bit(tp->busy0_map, cp->lun);
|
|
|
|
/*
|
|
* We donnot queue more than 1 ccb per target
|
|
@@ -4997,20 +4926,7 @@
|
|
struct sym_lcb *sym_alloc_lcb (struct sym_hcb *np, u_char tn, u_char ln)
|
|
{
|
|
struct sym_tcb *tp = &np->target[tn];
|
|
- struct sym_lcb *lp = sym_lp(tp, ln);
|
|
-
|
|
- /*
|
|
- * Already done, just return.
|
|
- */
|
|
- if (lp)
|
|
- return lp;
|
|
-
|
|
- /*
|
|
- * Donnot allow LUN control block
|
|
- * allocation for not probed LUNs.
|
|
- */
|
|
- if (!sym_is_bit(tp->lun_map, ln))
|
|
- return NULL;
|
|
+ struct sym_lcb *lp = NULL;
|
|
|
|
/*
|
|
* Initialize the target control block if not yet.
|
|
@@ -5082,13 +4998,7 @@
|
|
lp->started_max = SYM_CONF_MAX_TASK;
|
|
lp->started_limit = SYM_CONF_MAX_TASK;
|
|
#endif
|
|
- /*
|
|
- * If we are busy, count the IO.
|
|
- */
|
|
- if (sym_is_bit(tp->busy0_map, ln)) {
|
|
- lp->busy_itl = 1;
|
|
- sym_clr_bit(tp->busy0_map, ln);
|
|
- }
|
|
+
|
|
fail:
|
|
return lp;
|
|
}
|
|
@@ -5103,12 +5013,6 @@
|
|
int i;
|
|
|
|
/*
|
|
- * If LCB not available, try to allocate it.
|
|
- */
|
|
- if (!lp && !(lp = sym_alloc_lcb(np, tn, ln)))
|
|
- goto fail;
|
|
-
|
|
- /*
|
|
* Allocate the task table and and the tag allocation
|
|
* circular buffer. We want both or none.
|
|
*/
|
|
@@ -5481,8 +5385,7 @@
|
|
/*
|
|
* Donnot start more than 1 command after an error.
|
|
*/
|
|
- if (lp)
|
|
- sym_start_next_ccbs(np, lp, 1);
|
|
+ sym_start_next_ccbs(np, lp, 1);
|
|
#endif
|
|
}
|
|
|
|
@@ -5521,17 +5424,11 @@
|
|
lp = sym_lp(tp, cp->lun);
|
|
|
|
/*
|
|
- * Assume device discovered on first success.
|
|
- */
|
|
- if (!lp)
|
|
- sym_set_bit(tp->lun_map, cp->lun);
|
|
-
|
|
- /*
|
|
* If all data have been transferred, given than no
|
|
* extended error did occur, there is no residual.
|
|
*/
|
|
resid = 0;
|
|
- if (cp->phys.head.lastp != sym_goalp(cp))
|
|
+ if (cp->phys.head.lastp != cp->goalp)
|
|
resid = sym_compute_residual(np, cp);
|
|
|
|
/*
|
|
@@ -5551,15 +5448,6 @@
|
|
*/
|
|
sym_set_cam_result_ok(cp, cmd, resid);
|
|
|
|
-#ifdef SYM_OPT_SNIFF_INQUIRY
|
|
- /*
|
|
- * On standard INQUIRY response (EVPD and CmDt
|
|
- * not set), sniff out device capabilities.
|
|
- */
|
|
- if (cp->cdb_buf[0] == INQUIRY && !(cp->cdb_buf[1] & 0x3))
|
|
- sym_sniff_inquiry(np, cmd, resid);
|
|
-#endif
|
|
-
|
|
#ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
|
|
/*
|
|
* If max number of started ccbs had been reduced,
|
|
@@ -5587,7 +5475,7 @@
|
|
/*
|
|
* Requeue a couple of awaiting scsi commands.
|
|
*/
|
|
- if (lp && !sym_que_empty(&lp->waiting_ccbq))
|
|
+ if (!sym_que_empty(&lp->waiting_ccbq))
|
|
sym_start_next_ccbs(np, lp, 2);
|
|
#endif
|
|
/*
|
|
@@ -5830,8 +5718,7 @@
|
|
SYM_QUEHEAD *qp;
|
|
struct sym_ccb *cp;
|
|
struct sym_tcb *tp;
|
|
- struct sym_lcb *lp;
|
|
- int target, lun;
|
|
+ int target;
|
|
|
|
if (np->scriptz0)
|
|
sym_mfree_dma(np->scriptz0, np->scriptz_sz, "SCRIPTZ0");
|
|
@@ -5857,16 +5744,6 @@
|
|
|
|
for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
|
|
tp = &np->target[target];
|
|
- for (lun = 0 ; lun < SYM_CONF_MAX_LUN ; lun++) {
|
|
- lp = sym_lp(tp, lun);
|
|
- if (!lp)
|
|
- continue;
|
|
- if (lp->itlq_tbl)
|
|
- sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4,
|
|
- "ITLQ_TBL");
|
|
- kfree(lp->cb_tags);
|
|
- sym_mfree_dma(lp, sizeof(*lp), "LCB");
|
|
- }
|
|
#if SYM_CONF_MAX_LUN > 1
|
|
kfree(tp->lunmp);
|
|
#endif
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_hipd.h CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_hipd.h
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_hipd.h 2005-12-27 13:25:49.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_hipd.h 2005-12-18 08:29:09.000000000 -0700
|
|
@@ -48,12 +48,6 @@
|
|
* They may be defined in platform specific headers, if they
|
|
* are useful.
|
|
*
|
|
- * SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
- * When this option is set, the SCRIPTS used by the driver
|
|
- * are able to handle SCSI transfers with direction not
|
|
- * supplied by user.
|
|
- * (set for Linux-2.0.X)
|
|
- *
|
|
* SYM_OPT_HANDLE_DEVICE_QUEUEING
|
|
* When this option is set, the driver will use a queue per
|
|
* device and handle QUEUE FULL status requeuing internally.
|
|
@@ -64,7 +58,6 @@
|
|
* (set for Linux)
|
|
*/
|
|
#if 0
|
|
-#define SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
#define SYM_OPT_HANDLE_DEVICE_QUEUEING
|
|
#define SYM_OPT_LIMIT_COMMAND_REORDERING
|
|
#endif
|
|
@@ -416,19 +409,6 @@
|
|
struct sym_lcb **lunmp; /* Other LCBs [1..MAX_LUN] */
|
|
#endif
|
|
|
|
- /*
|
|
- * Bitmap that tells about LUNs that succeeded at least
|
|
- * 1 IO and therefore assumed to be a real device.
|
|
- * Avoid useless allocation of the LCB structure.
|
|
- */
|
|
- u32 lun_map[(SYM_CONF_MAX_LUN+31)/32];
|
|
-
|
|
- /*
|
|
- * Bitmap that tells about LUNs that haven't yet an LCB
|
|
- * allocated (not discovered or LCB allocation failed).
|
|
- */
|
|
- u32 busy0_map[(SYM_CONF_MAX_LUN+31)/32];
|
|
-
|
|
#ifdef SYM_HAVE_STCB
|
|
/*
|
|
* O/S specific data structure.
|
|
@@ -454,8 +434,10 @@
|
|
* Other user settable limits and options.
|
|
* These limits are read from the NVRAM if present.
|
|
*/
|
|
- u_char usrflags;
|
|
- u_short usrtags;
|
|
+ unsigned char usrflags;
|
|
+ unsigned char usr_period;
|
|
+ unsigned char usr_width;
|
|
+ unsigned short usrtags;
|
|
struct scsi_target *starget;
|
|
};
|
|
|
|
@@ -672,9 +654,6 @@
|
|
*/
|
|
u32 savep; /* Jump address to saved data pointer */
|
|
u32 lastp; /* SCRIPTS address at end of data */
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
- u32 wlastp;
|
|
-#endif
|
|
|
|
/*
|
|
* Status fields.
|
|
@@ -804,9 +783,6 @@
|
|
SYM_QUEHEAD link_ccbq; /* Link to free/busy CCB queue */
|
|
u32 startp; /* Initial data pointer */
|
|
u32 goalp; /* Expected last data pointer */
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
- u32 wgoalp;
|
|
-#endif
|
|
int ext_sg; /* Extreme data pointer, used */
|
|
int ext_ofs; /* to calculate the residual. */
|
|
#ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
|
|
@@ -821,12 +797,6 @@
|
|
|
|
#define CCB_BA(cp,lbl) cpu_to_scr(cp->ccb_ba + offsetof(struct sym_ccb, lbl))
|
|
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
-#define sym_goalp(cp) ((cp->host_flags & HF_DATA_IN) ? cp->goalp : cp->wgoalp)
|
|
-#else
|
|
-#define sym_goalp(cp) (cp->goalp)
|
|
-#endif
|
|
-
|
|
typedef struct device *m_pool_ident_t;
|
|
|
|
/*
|
|
@@ -1077,9 +1047,10 @@
|
|
void sym_print_xerr(struct scsi_cmnd *cmd, int x_status);
|
|
int sym_reset_scsi_bus(struct sym_hcb *np, int enab_int);
|
|
struct sym_chip *sym_lookup_chip_table(u_short device_id, u_char revision);
|
|
-void sym_put_start_queue(struct sym_hcb *np, struct sym_ccb *cp);
|
|
#ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
|
|
void sym_start_next_ccbs(struct sym_hcb *np, struct sym_lcb *lp, int maxn);
|
|
+#else
|
|
+void sym_put_start_queue(struct sym_hcb *np, struct sym_ccb *cp);
|
|
#endif
|
|
void sym_start_up(struct sym_hcb *np, int reason);
|
|
void sym_interrupt(struct sym_hcb *np);
|
|
@@ -1136,71 +1107,6 @@
|
|
#endif
|
|
|
|
/*
|
|
- * Set up data pointers used by SCRIPTS.
|
|
- * Called from O/S specific code.
|
|
- */
|
|
-static inline void sym_setup_data_pointers(struct sym_hcb *np,
|
|
- struct sym_ccb *cp, int dir)
|
|
-{
|
|
- u32 lastp, goalp;
|
|
-
|
|
- /*
|
|
- * No segments means no data.
|
|
- */
|
|
- if (!cp->segments)
|
|
- dir = DMA_NONE;
|
|
-
|
|
- /*
|
|
- * Set the data pointer.
|
|
- */
|
|
- switch(dir) {
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
- case DMA_BIDIRECTIONAL:
|
|
-#endif
|
|
- case DMA_TO_DEVICE:
|
|
- goalp = SCRIPTA_BA(np, data_out2) + 8;
|
|
- lastp = goalp - 8 - (cp->segments * (2*4));
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
- cp->wgoalp = cpu_to_scr(goalp);
|
|
- if (dir != DMA_BIDIRECTIONAL)
|
|
- break;
|
|
- cp->phys.head.wlastp = cpu_to_scr(lastp);
|
|
- /* fall through */
|
|
-#else
|
|
- break;
|
|
-#endif
|
|
- case DMA_FROM_DEVICE:
|
|
- cp->host_flags |= HF_DATA_IN;
|
|
- goalp = SCRIPTA_BA(np, data_in2) + 8;
|
|
- lastp = goalp - 8 - (cp->segments * (2*4));
|
|
- break;
|
|
- case DMA_NONE:
|
|
- default:
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
- cp->host_flags |= HF_DATA_IN;
|
|
-#endif
|
|
- lastp = goalp = SCRIPTB_BA(np, no_data);
|
|
- break;
|
|
- }
|
|
-
|
|
- /*
|
|
- * Set all pointers values needed by SCRIPTS.
|
|
- */
|
|
- cp->phys.head.lastp = cpu_to_scr(lastp);
|
|
- cp->phys.head.savep = cpu_to_scr(lastp);
|
|
- cp->startp = cp->phys.head.savep;
|
|
- cp->goalp = cpu_to_scr(goalp);
|
|
-
|
|
-#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
|
|
- /*
|
|
- * If direction is unknown, start at data_io.
|
|
- */
|
|
- if (dir == DMA_BIDIRECTIONAL)
|
|
- cp->phys.head.savep = cpu_to_scr(SCRIPTB_BA(np, data_io));
|
|
-#endif
|
|
-}
|
|
-
|
|
-/*
|
|
* MEMORY ALLOCATOR.
|
|
*/
|
|
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_malloc.c CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_malloc.c
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_malloc.c 2005-12-27 13:25:49.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_malloc.c 2005-09-27 06:03:22.000000000 -0600
|
|
@@ -37,11 +37,7 @@
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
|
*/
|
|
|
|
-#ifdef __FreeBSD__
|
|
-#include <dev/sym/sym_glue.h>
|
|
-#else
|
|
#include "sym_glue.h"
|
|
-#endif
|
|
|
|
/*
|
|
* Simple power of two buddy-like generic allocator.
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_nvram.c CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_nvram.c
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_nvram.c 2005-12-27 13:25:49.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_nvram.c 2005-12-12 09:00:09.000000000 -0700
|
|
@@ -92,29 +92,32 @@
|
|
* Get target set-up from Symbios format NVRAM.
|
|
*/
|
|
static void
|
|
-sym_Symbios_setup_target(struct sym_hcb *np, int target, Symbios_nvram *nvram)
|
|
+sym_Symbios_setup_target(struct sym_tcb *tp, int target, Symbios_nvram *nvram)
|
|
{
|
|
- struct sym_tcb *tp = &np->target[target];
|
|
Symbios_target *tn = &nvram->target[target];
|
|
|
|
- tp->usrtags =
|
|
- (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? SYM_SETUP_MAX_TAG : 0;
|
|
-
|
|
+ if (!(tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED))
|
|
+ tp->usrtags = 0;
|
|
if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
|
|
tp->usrflags &= ~SYM_DISC_ENABLED;
|
|
if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
|
|
tp->usrflags |= SYM_SCAN_BOOT_DISABLED;
|
|
if (!(tn->flags & SYMBIOS_SCAN_LUNS))
|
|
tp->usrflags |= SYM_SCAN_LUNS_DISABLED;
|
|
+ tp->usr_period = (tn->sync_period + 3) / 4;
|
|
+ tp->usr_width = (tn->bus_width == 0x8) ? 0 : 1;
|
|
}
|
|
|
|
+static const unsigned char Tekram_sync[16] = {
|
|
+ 25, 31, 37, 43, 50, 62, 75, 125, 12, 15, 18, 21, 6, 7, 9, 10
|
|
+};
|
|
+
|
|
/*
|
|
* Get target set-up from Tekram format NVRAM.
|
|
*/
|
|
static void
|
|
-sym_Tekram_setup_target(struct sym_hcb *np, int target, Tekram_nvram *nvram)
|
|
+sym_Tekram_setup_target(struct sym_tcb *tp, int target, Tekram_nvram *nvram)
|
|
{
|
|
- struct sym_tcb *tp = &np->target[target];
|
|
struct Tekram_target *tn = &nvram->target[target];
|
|
|
|
if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
|
|
@@ -124,22 +127,22 @@
|
|
if (tn->flags & TEKRAM_DISCONNECT_ENABLE)
|
|
tp->usrflags |= SYM_DISC_ENABLED;
|
|
|
|
- /* If any device does not support parity, we will not use this option */
|
|
- if (!(tn->flags & TEKRAM_PARITY_CHECK))
|
|
- np->rv_scntl0 &= ~0x0a; /* SCSI parity checking disabled */
|
|
+ if (tn->flags & TEKRAM_SYNC_NEGO)
|
|
+ tp->usr_period = Tekram_sync[tn->sync_index & 0xf];
|
|
+ tp->usr_width = (tn->flags & TEKRAM_WIDE_NEGO) ? 1 : 0;
|
|
}
|
|
|
|
/*
|
|
* Get target setup from NVRAM.
|
|
*/
|
|
-void sym_nvram_setup_target(struct sym_hcb *np, int target, struct sym_nvram *nvp)
|
|
+void sym_nvram_setup_target(struct sym_tcb *tp, int target, struct sym_nvram *nvp)
|
|
{
|
|
switch (nvp->type) {
|
|
case SYM_SYMBIOS_NVRAM:
|
|
- sym_Symbios_setup_target(np, target, &nvp->data.Symbios);
|
|
+ sym_Symbios_setup_target(tp, target, &nvp->data.Symbios);
|
|
break;
|
|
case SYM_TEKRAM_NVRAM:
|
|
- sym_Tekram_setup_target(np, target, &nvp->data.Tekram);
|
|
+ sym_Tekram_setup_target(tp, target, &nvp->data.Tekram);
|
|
break;
|
|
default:
|
|
break;
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_nvram.h CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_nvram.h
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_2/sym_nvram.h 2005-12-27 13:25:49.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_2/sym_nvram.h 2005-12-12 09:00:09.000000000 -0700
|
|
@@ -194,12 +194,12 @@
|
|
|
|
#if SYM_CONF_NVRAM_SUPPORT
|
|
void sym_nvram_setup_host(struct Scsi_Host *shost, struct sym_hcb *np, struct sym_nvram *nvram);
|
|
-void sym_nvram_setup_target (struct sym_hcb *np, int target, struct sym_nvram *nvp);
|
|
+void sym_nvram_setup_target (struct sym_tcb *tp, int target, struct sym_nvram *nvp);
|
|
int sym_read_nvram (struct sym_device *np, struct sym_nvram *nvp);
|
|
char *sym_nvram_type(struct sym_nvram *nvp);
|
|
#else
|
|
static inline void sym_nvram_setup_host(struct Scsi_Host *shost, struct sym_hcb *np, struct sym_nvram *nvram) { }
|
|
-static inline void sym_nvram_setup_target(struct sym_hcb *np, struct sym_nvram *nvram) { }
|
|
+static inline void sym_nvram_setup_target(struct sym_tcb *tp, struct sym_nvram *nvram) { }
|
|
static inline int sym_read_nvram(struct sym_device *np, struct sym_nvram *nvp)
|
|
{
|
|
nvp->type = 0;
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_comm.h CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_comm.h
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_comm.h 2005-12-27 13:25:48.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_comm.h 1969-12-31 17:00:00.000000000 -0700
|
|
@@ -1,792 +0,0 @@
|
|
-/******************************************************************************
|
|
-** High Performance device driver for the Symbios 53C896 controller.
|
|
-**
|
|
-** Copyright (C) 1998-2001 Gerard Roudier <groudier@free.fr>
|
|
-**
|
|
-** This driver also supports all the Symbios 53C8XX controller family,
|
|
-** except 53C810 revisions < 16, 53C825 revisions < 16 and all
|
|
-** revisions of 53C815 controllers.
|
|
-**
|
|
-** This driver is based on the Linux port of the FreeBSD ncr driver.
|
|
-**
|
|
-** Copyright (C) 1994 Wolfgang Stanglmeier
|
|
-**
|
|
-**-----------------------------------------------------------------------------
|
|
-**
|
|
-** This program is free software; you can redistribute it and/or modify
|
|
-** it under the terms of the GNU General Public License as published by
|
|
-** the Free Software Foundation; either version 2 of the License, or
|
|
-** (at your option) any later version.
|
|
-**
|
|
-** This program is distributed in the hope that it will be useful,
|
|
-** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
-** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
-** GNU General Public License for more details.
|
|
-**
|
|
-** You should have received a copy of the GNU General Public License
|
|
-** along with this program; if not, write to the Free Software
|
|
-** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
-**
|
|
-**-----------------------------------------------------------------------------
|
|
-**
|
|
-** The Linux port of the FreeBSD ncr driver has been achieved in
|
|
-** november 1995 by:
|
|
-**
|
|
-** Gerard Roudier <groudier@free.fr>
|
|
-**
|
|
-** Being given that this driver originates from the FreeBSD version, and
|
|
-** in order to keep synergy on both, any suggested enhancements and corrections
|
|
-** received on Linux are automatically a potential candidate for the FreeBSD
|
|
-** version.
|
|
-**
|
|
-** The original driver has been written for 386bsd and FreeBSD by
|
|
-** Wolfgang Stanglmeier <wolf@cologne.de>
|
|
-** Stefan Esser <se@mi.Uni-Koeln.de>
|
|
-**
|
|
-**-----------------------------------------------------------------------------
|
|
-**
|
|
-** Major contributions:
|
|
-** --------------------
|
|
-**
|
|
-** NVRAM detection and reading.
|
|
-** Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
|
|
-**
|
|
-*******************************************************************************
|
|
-*/
|
|
-
|
|
-/*==========================================================
|
|
-**
|
|
-** Debugging tags
|
|
-**
|
|
-**==========================================================
|
|
-*/
|
|
-
|
|
-#define DEBUG_ALLOC (0x0001)
|
|
-#define DEBUG_PHASE (0x0002)
|
|
-#define DEBUG_QUEUE (0x0008)
|
|
-#define DEBUG_RESULT (0x0010)
|
|
-#define DEBUG_POINTER (0x0020)
|
|
-#define DEBUG_SCRIPT (0x0040)
|
|
-#define DEBUG_TINY (0x0080)
|
|
-#define DEBUG_TIMING (0x0100)
|
|
-#define DEBUG_NEGO (0x0200)
|
|
-#define DEBUG_TAGS (0x0400)
|
|
-#define DEBUG_SCATTER (0x0800)
|
|
-#define DEBUG_IC (0x1000)
|
|
-
|
|
-/*
|
|
-** Enable/Disable debug messages.
|
|
-** Can be changed at runtime too.
|
|
-*/
|
|
-
|
|
-#ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
|
|
-static int ncr_debug = SCSI_NCR_DEBUG_FLAGS;
|
|
- #define DEBUG_FLAGS ncr_debug
|
|
-#else
|
|
- #define DEBUG_FLAGS SCSI_NCR_DEBUG_FLAGS
|
|
-#endif
|
|
-
|
|
-static inline struct list_head *ncr_list_pop(struct list_head *head)
|
|
-{
|
|
- if (!list_empty(head)) {
|
|
- struct list_head *elem = head->next;
|
|
-
|
|
- list_del(elem);
|
|
- return elem;
|
|
- }
|
|
-
|
|
- return NULL;
|
|
-}
|
|
-
|
|
-#ifdef __sparc__
|
|
-#include <asm/irq.h>
|
|
-#endif
|
|
-
|
|
-/*==========================================================
|
|
-**
|
|
-** Simple power of two buddy-like allocator.
|
|
-**
|
|
-** This simple code is not intended to be fast, but to
|
|
-** provide power of 2 aligned memory allocations.
|
|
-** Since the SCRIPTS processor only supplies 8 bit
|
|
-** arithmetic, this allocator allows simple and fast
|
|
-** address calculations from the SCRIPTS code.
|
|
-** In addition, cache line alignment is guaranteed for
|
|
-** power of 2 cache line size.
|
|
-** Enhanced in linux-2.3.44 to provide a memory pool
|
|
-** per pcidev to support dynamic dma mapping. (I would
|
|
-** have preferred a real bus astraction, btw).
|
|
-**
|
|
-**==========================================================
|
|
-*/
|
|
-
|
|
-#define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
|
|
-#if PAGE_SIZE >= 8192
|
|
-#define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
|
|
-#else
|
|
-#define MEMO_PAGE_ORDER 1 /* 2 PAGES maximum */
|
|
-#endif
|
|
-#define MEMO_FREE_UNUSED /* Free unused pages immediately */
|
|
-#define MEMO_WARN 1
|
|
-#define MEMO_GFP_FLAGS GFP_ATOMIC
|
|
-#define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
|
|
-#define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
|
|
-#define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
|
|
-
|
|
-typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
|
|
-typedef struct device *m_bush_t; /* Something that addresses DMAable */
|
|
-
|
|
-typedef struct m_link { /* Link between free memory chunks */
|
|
- struct m_link *next;
|
|
-} m_link_s;
|
|
-
|
|
-typedef struct m_vtob { /* Virtual to Bus address translation */
|
|
- struct m_vtob *next;
|
|
- m_addr_t vaddr;
|
|
- m_addr_t baddr;
|
|
-} m_vtob_s;
|
|
-#define VTOB_HASH_SHIFT 5
|
|
-#define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
|
|
-#define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
|
|
-#define VTOB_HASH_CODE(m) \
|
|
- ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
|
|
-
|
|
-typedef struct m_pool { /* Memory pool of a given kind */
|
|
- m_bush_t bush;
|
|
- m_addr_t (*getp)(struct m_pool *);
|
|
- void (*freep)(struct m_pool *, m_addr_t);
|
|
- int nump;
|
|
- m_vtob_s *(vtob[VTOB_HASH_SIZE]);
|
|
- struct m_pool *next;
|
|
- struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1];
|
|
-} m_pool_s;
|
|
-
|
|
-static void *___m_alloc(m_pool_s *mp, int size)
|
|
-{
|
|
- int i = 0;
|
|
- int s = (1 << MEMO_SHIFT);
|
|
- int j;
|
|
- m_addr_t a;
|
|
- m_link_s *h = mp->h;
|
|
-
|
|
- if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
|
|
- return NULL;
|
|
-
|
|
- while (size > s) {
|
|
- s <<= 1;
|
|
- ++i;
|
|
- }
|
|
-
|
|
- j = i;
|
|
- while (!h[j].next) {
|
|
- if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
|
|
- h[j].next = (m_link_s *)mp->getp(mp);
|
|
- if (h[j].next)
|
|
- h[j].next->next = NULL;
|
|
- break;
|
|
- }
|
|
- ++j;
|
|
- s <<= 1;
|
|
- }
|
|
- a = (m_addr_t) h[j].next;
|
|
- if (a) {
|
|
- h[j].next = h[j].next->next;
|
|
- while (j > i) {
|
|
- j -= 1;
|
|
- s >>= 1;
|
|
- h[j].next = (m_link_s *) (a+s);
|
|
- h[j].next->next = NULL;
|
|
- }
|
|
- }
|
|
-#ifdef DEBUG
|
|
- printk("___m_alloc(%d) = %p\n", size, (void *) a);
|
|
-#endif
|
|
- return (void *) a;
|
|
-}
|
|
-
|
|
-static void ___m_free(m_pool_s *mp, void *ptr, int size)
|
|
-{
|
|
- int i = 0;
|
|
- int s = (1 << MEMO_SHIFT);
|
|
- m_link_s *q;
|
|
- m_addr_t a, b;
|
|
- m_link_s *h = mp->h;
|
|
-
|
|
-#ifdef DEBUG
|
|
- printk("___m_free(%p, %d)\n", ptr, size);
|
|
-#endif
|
|
-
|
|
- if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
|
|
- return;
|
|
-
|
|
- while (size > s) {
|
|
- s <<= 1;
|
|
- ++i;
|
|
- }
|
|
-
|
|
- a = (m_addr_t) ptr;
|
|
-
|
|
- while (1) {
|
|
-#ifdef MEMO_FREE_UNUSED
|
|
- if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
|
|
- mp->freep(mp, a);
|
|
- break;
|
|
- }
|
|
-#endif
|
|
- b = a ^ s;
|
|
- q = &h[i];
|
|
- while (q->next && q->next != (m_link_s *) b) {
|
|
- q = q->next;
|
|
- }
|
|
- if (!q->next) {
|
|
- ((m_link_s *) a)->next = h[i].next;
|
|
- h[i].next = (m_link_s *) a;
|
|
- break;
|
|
- }
|
|
- q->next = q->next->next;
|
|
- a = a & b;
|
|
- s <<= 1;
|
|
- ++i;
|
|
- }
|
|
-}
|
|
-
|
|
-static DEFINE_SPINLOCK(ncr53c8xx_lock);
|
|
-
|
|
-static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags)
|
|
-{
|
|
- void *p;
|
|
-
|
|
- p = ___m_alloc(mp, size);
|
|
-
|
|
- if (DEBUG_FLAGS & DEBUG_ALLOC)
|
|
- printk ("new %-10s[%4d] @%p.\n", name, size, p);
|
|
-
|
|
- if (p)
|
|
- memset(p, 0, size);
|
|
- else if (uflags & MEMO_WARN)
|
|
- printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size);
|
|
-
|
|
- return p;
|
|
-}
|
|
-
|
|
-#define __m_calloc(mp, s, n) __m_calloc2(mp, s, n, MEMO_WARN)
|
|
-
|
|
-static void __m_free(m_pool_s *mp, void *ptr, int size, char *name)
|
|
-{
|
|
- if (DEBUG_FLAGS & DEBUG_ALLOC)
|
|
- printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
|
|
-
|
|
- ___m_free(mp, ptr, size);
|
|
-
|
|
-}
|
|
-
|
|
-/*
|
|
- * With pci bus iommu support, we use a default pool of unmapped memory
|
|
- * for memory we donnot need to DMA from/to and one pool per pcidev for
|
|
- * memory accessed by the PCI chip. `mp0' is the default not DMAable pool.
|
|
- */
|
|
-
|
|
-static m_addr_t ___mp0_getp(m_pool_s *mp)
|
|
-{
|
|
- m_addr_t m = __get_free_pages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER);
|
|
- if (m)
|
|
- ++mp->nump;
|
|
- return m;
|
|
-}
|
|
-
|
|
-static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
|
|
-{
|
|
- free_pages(m, MEMO_PAGE_ORDER);
|
|
- --mp->nump;
|
|
-}
|
|
-
|
|
-static m_pool_s mp0 = {NULL, ___mp0_getp, ___mp0_freep};
|
|
-
|
|
-/*
|
|
- * DMAable pools.
|
|
- */
|
|
-
|
|
-/*
|
|
- * With pci bus iommu support, we maintain one pool per pcidev and a
|
|
- * hashed reverse table for virtual to bus physical address translations.
|
|
- */
|
|
-static m_addr_t ___dma_getp(m_pool_s *mp)
|
|
-{
|
|
- m_addr_t vp;
|
|
- m_vtob_s *vbp;
|
|
-
|
|
- vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB");
|
|
- if (vbp) {
|
|
- dma_addr_t daddr;
|
|
- vp = (m_addr_t) dma_alloc_coherent(mp->bush,
|
|
- PAGE_SIZE<<MEMO_PAGE_ORDER,
|
|
- &daddr, GFP_ATOMIC);
|
|
- if (vp) {
|
|
- int hc = VTOB_HASH_CODE(vp);
|
|
- vbp->vaddr = vp;
|
|
- vbp->baddr = daddr;
|
|
- vbp->next = mp->vtob[hc];
|
|
- mp->vtob[hc] = vbp;
|
|
- ++mp->nump;
|
|
- return vp;
|
|
- }
|
|
- }
|
|
- if (vbp)
|
|
- __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
|
|
- return 0;
|
|
-}
|
|
-
|
|
-static void ___dma_freep(m_pool_s *mp, m_addr_t m)
|
|
-{
|
|
- m_vtob_s **vbpp, *vbp;
|
|
- int hc = VTOB_HASH_CODE(m);
|
|
-
|
|
- vbpp = &mp->vtob[hc];
|
|
- while (*vbpp && (*vbpp)->vaddr != m)
|
|
- vbpp = &(*vbpp)->next;
|
|
- if (*vbpp) {
|
|
- vbp = *vbpp;
|
|
- *vbpp = (*vbpp)->next;
|
|
- dma_free_coherent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER,
|
|
- (void *)vbp->vaddr, (dma_addr_t)vbp->baddr);
|
|
- __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
|
|
- --mp->nump;
|
|
- }
|
|
-}
|
|
-
|
|
-static inline m_pool_s *___get_dma_pool(m_bush_t bush)
|
|
-{
|
|
- m_pool_s *mp;
|
|
- for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next);
|
|
- return mp;
|
|
-}
|
|
-
|
|
-static m_pool_s *___cre_dma_pool(m_bush_t bush)
|
|
-{
|
|
- m_pool_s *mp;
|
|
- mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL");
|
|
- if (mp) {
|
|
- memset(mp, 0, sizeof(*mp));
|
|
- mp->bush = bush;
|
|
- mp->getp = ___dma_getp;
|
|
- mp->freep = ___dma_freep;
|
|
- mp->next = mp0.next;
|
|
- mp0.next = mp;
|
|
- }
|
|
- return mp;
|
|
-}
|
|
-
|
|
-static void ___del_dma_pool(m_pool_s *p)
|
|
-{
|
|
- struct m_pool **pp = &mp0.next;
|
|
-
|
|
- while (*pp && *pp != p)
|
|
- pp = &(*pp)->next;
|
|
- if (*pp) {
|
|
- *pp = (*pp)->next;
|
|
- __m_free(&mp0, p, sizeof(*p), "MPOOL");
|
|
- }
|
|
-}
|
|
-
|
|
-static void *__m_calloc_dma(m_bush_t bush, int size, char *name)
|
|
-{
|
|
- u_long flags;
|
|
- struct m_pool *mp;
|
|
- void *m = NULL;
|
|
-
|
|
- spin_lock_irqsave(&ncr53c8xx_lock, flags);
|
|
- mp = ___get_dma_pool(bush);
|
|
- if (!mp)
|
|
- mp = ___cre_dma_pool(bush);
|
|
- if (mp)
|
|
- m = __m_calloc(mp, size, name);
|
|
- if (mp && !mp->nump)
|
|
- ___del_dma_pool(mp);
|
|
- spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
|
|
-
|
|
- return m;
|
|
-}
|
|
-
|
|
-static void __m_free_dma(m_bush_t bush, void *m, int size, char *name)
|
|
-{
|
|
- u_long flags;
|
|
- struct m_pool *mp;
|
|
-
|
|
- spin_lock_irqsave(&ncr53c8xx_lock, flags);
|
|
- mp = ___get_dma_pool(bush);
|
|
- if (mp)
|
|
- __m_free(mp, m, size, name);
|
|
- if (mp && !mp->nump)
|
|
- ___del_dma_pool(mp);
|
|
- spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
|
|
-}
|
|
-
|
|
-static m_addr_t __vtobus(m_bush_t bush, void *m)
|
|
-{
|
|
- u_long flags;
|
|
- m_pool_s *mp;
|
|
- int hc = VTOB_HASH_CODE(m);
|
|
- m_vtob_s *vp = NULL;
|
|
- m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
|
|
-
|
|
- spin_lock_irqsave(&ncr53c8xx_lock, flags);
|
|
- mp = ___get_dma_pool(bush);
|
|
- if (mp) {
|
|
- vp = mp->vtob[hc];
|
|
- while (vp && (m_addr_t) vp->vaddr != a)
|
|
- vp = vp->next;
|
|
- }
|
|
- spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
|
|
- return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
|
|
-}
|
|
-
|
|
-#define _m_calloc_dma(np, s, n) __m_calloc_dma(np->dev, s, n)
|
|
-#define _m_free_dma(np, p, s, n) __m_free_dma(np->dev, p, s, n)
|
|
-#define m_calloc_dma(s, n) _m_calloc_dma(np, s, n)
|
|
-#define m_free_dma(p, s, n) _m_free_dma(np, p, s, n)
|
|
-#define _vtobus(np, p) __vtobus(np->dev, p)
|
|
-#define vtobus(p) _vtobus(np, p)
|
|
-
|
|
-/*
|
|
- * Deal with DMA mapping/unmapping.
|
|
- */
|
|
-
|
|
-/* To keep track of the dma mapping (sg/single) that has been set */
|
|
-#define __data_mapped SCp.phase
|
|
-#define __data_mapping SCp.have_data_in
|
|
-
|
|
-static void __unmap_scsi_data(struct device *dev, struct scsi_cmnd *cmd)
|
|
-{
|
|
- switch(cmd->__data_mapped) {
|
|
- case 2:
|
|
- dma_unmap_sg(dev, cmd->buffer, cmd->use_sg,
|
|
- cmd->sc_data_direction);
|
|
- break;
|
|
- case 1:
|
|
- dma_unmap_single(dev, cmd->__data_mapping,
|
|
- cmd->request_bufflen,
|
|
- cmd->sc_data_direction);
|
|
- break;
|
|
- }
|
|
- cmd->__data_mapped = 0;
|
|
-}
|
|
-
|
|
-static u_long __map_scsi_single_data(struct device *dev, struct scsi_cmnd *cmd)
|
|
-{
|
|
- dma_addr_t mapping;
|
|
-
|
|
- if (cmd->request_bufflen == 0)
|
|
- return 0;
|
|
-
|
|
- mapping = dma_map_single(dev, cmd->request_buffer,
|
|
- cmd->request_bufflen,
|
|
- cmd->sc_data_direction);
|
|
- cmd->__data_mapped = 1;
|
|
- cmd->__data_mapping = mapping;
|
|
-
|
|
- return mapping;
|
|
-}
|
|
-
|
|
-static int __map_scsi_sg_data(struct device *dev, struct scsi_cmnd *cmd)
|
|
-{
|
|
- int use_sg;
|
|
-
|
|
- if (cmd->use_sg == 0)
|
|
- return 0;
|
|
-
|
|
- use_sg = dma_map_sg(dev, cmd->buffer, cmd->use_sg,
|
|
- cmd->sc_data_direction);
|
|
- cmd->__data_mapped = 2;
|
|
- cmd->__data_mapping = use_sg;
|
|
-
|
|
- return use_sg;
|
|
-}
|
|
-
|
|
-#define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->dev, cmd)
|
|
-#define map_scsi_single_data(np, cmd) __map_scsi_single_data(np->dev, cmd)
|
|
-#define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->dev, cmd)
|
|
-
|
|
-/*==========================================================
|
|
-**
|
|
-** Driver setup.
|
|
-**
|
|
-** This structure is initialized from linux config
|
|
-** options. It can be overridden at boot-up by the boot
|
|
-** command line.
|
|
-**
|
|
-**==========================================================
|
|
-*/
|
|
-static struct ncr_driver_setup
|
|
- driver_setup = SCSI_NCR_DRIVER_SETUP;
|
|
-
|
|
-#ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
|
|
-static struct ncr_driver_setup
|
|
- driver_safe_setup __initdata = SCSI_NCR_DRIVER_SAFE_SETUP;
|
|
-#endif
|
|
-
|
|
-#define initverbose (driver_setup.verbose)
|
|
-#define bootverbose (np->verbose)
|
|
-
|
|
-
|
|
-/*===================================================================
|
|
-**
|
|
-** Driver setup from the boot command line
|
|
-**
|
|
-**===================================================================
|
|
-*/
|
|
-
|
|
-#ifdef MODULE
|
|
-#define ARG_SEP ' '
|
|
-#else
|
|
-#define ARG_SEP ','
|
|
-#endif
|
|
-
|
|
-#define OPT_TAGS 1
|
|
-#define OPT_MASTER_PARITY 2
|
|
-#define OPT_SCSI_PARITY 3
|
|
-#define OPT_DISCONNECTION 4
|
|
-#define OPT_SPECIAL_FEATURES 5
|
|
-#define OPT_UNUSED_1 6
|
|
-#define OPT_FORCE_SYNC_NEGO 7
|
|
-#define OPT_REVERSE_PROBE 8
|
|
-#define OPT_DEFAULT_SYNC 9
|
|
-#define OPT_VERBOSE 10
|
|
-#define OPT_DEBUG 11
|
|
-#define OPT_BURST_MAX 12
|
|
-#define OPT_LED_PIN 13
|
|
-#define OPT_MAX_WIDE 14
|
|
-#define OPT_SETTLE_DELAY 15
|
|
-#define OPT_DIFF_SUPPORT 16
|
|
-#define OPT_IRQM 17
|
|
-#define OPT_PCI_FIX_UP 18
|
|
-#define OPT_BUS_CHECK 19
|
|
-#define OPT_OPTIMIZE 20
|
|
-#define OPT_RECOVERY 21
|
|
-#define OPT_SAFE_SETUP 22
|
|
-#define OPT_USE_NVRAM 23
|
|
-#define OPT_EXCLUDE 24
|
|
-#define OPT_HOST_ID 25
|
|
-
|
|
-#ifdef SCSI_NCR_IARB_SUPPORT
|
|
-#define OPT_IARB 26
|
|
-#endif
|
|
-
|
|
-static char setup_token[] __initdata =
|
|
- "tags:" "mpar:"
|
|
- "spar:" "disc:"
|
|
- "specf:" "ultra:"
|
|
- "fsn:" "revprob:"
|
|
- "sync:" "verb:"
|
|
- "debug:" "burst:"
|
|
- "led:" "wide:"
|
|
- "settle:" "diff:"
|
|
- "irqm:" "pcifix:"
|
|
- "buschk:" "optim:"
|
|
- "recovery:"
|
|
- "safe:" "nvram:"
|
|
- "excl:" "hostid:"
|
|
-#ifdef SCSI_NCR_IARB_SUPPORT
|
|
- "iarb:"
|
|
-#endif
|
|
- ; /* DONNOT REMOVE THIS ';' */
|
|
-
|
|
-#ifdef MODULE
|
|
-#define ARG_SEP ' '
|
|
-#else
|
|
-#define ARG_SEP ','
|
|
-#endif
|
|
-
|
|
-static int __init get_setup_token(char *p)
|
|
-{
|
|
- char *cur = setup_token;
|
|
- char *pc;
|
|
- int i = 0;
|
|
-
|
|
- while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
|
|
- ++pc;
|
|
- ++i;
|
|
- if (!strncmp(p, cur, pc - cur))
|
|
- return i;
|
|
- cur = pc;
|
|
- }
|
|
- return 0;
|
|
-}
|
|
-
|
|
-
|
|
-static int __init sym53c8xx__setup(char *str)
|
|
-{
|
|
-#ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
|
|
- char *cur = str;
|
|
- char *pc, *pv;
|
|
- int i, val, c;
|
|
- int xi = 0;
|
|
-
|
|
- while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
|
|
- char *pe;
|
|
-
|
|
- val = 0;
|
|
- pv = pc;
|
|
- c = *++pv;
|
|
-
|
|
- if (c == 'n')
|
|
- val = 0;
|
|
- else if (c == 'y')
|
|
- val = 1;
|
|
- else
|
|
- val = (int) simple_strtoul(pv, &pe, 0);
|
|
-
|
|
- switch (get_setup_token(cur)) {
|
|
- case OPT_TAGS:
|
|
- driver_setup.default_tags = val;
|
|
- if (pe && *pe == '/') {
|
|
- i = 0;
|
|
- while (*pe && *pe != ARG_SEP &&
|
|
- i < sizeof(driver_setup.tag_ctrl)-1) {
|
|
- driver_setup.tag_ctrl[i++] = *pe++;
|
|
- }
|
|
- driver_setup.tag_ctrl[i] = '\0';
|
|
- }
|
|
- break;
|
|
- case OPT_MASTER_PARITY:
|
|
- driver_setup.master_parity = val;
|
|
- break;
|
|
- case OPT_SCSI_PARITY:
|
|
- driver_setup.scsi_parity = val;
|
|
- break;
|
|
- case OPT_DISCONNECTION:
|
|
- driver_setup.disconnection = val;
|
|
- break;
|
|
- case OPT_SPECIAL_FEATURES:
|
|
- driver_setup.special_features = val;
|
|
- break;
|
|
- case OPT_FORCE_SYNC_NEGO:
|
|
- driver_setup.force_sync_nego = val;
|
|
- break;
|
|
- case OPT_REVERSE_PROBE:
|
|
- driver_setup.reverse_probe = val;
|
|
- break;
|
|
- case OPT_DEFAULT_SYNC:
|
|
- driver_setup.default_sync = val;
|
|
- break;
|
|
- case OPT_VERBOSE:
|
|
- driver_setup.verbose = val;
|
|
- break;
|
|
- case OPT_DEBUG:
|
|
- driver_setup.debug = val;
|
|
- break;
|
|
- case OPT_BURST_MAX:
|
|
- driver_setup.burst_max = val;
|
|
- break;
|
|
- case OPT_LED_PIN:
|
|
- driver_setup.led_pin = val;
|
|
- break;
|
|
- case OPT_MAX_WIDE:
|
|
- driver_setup.max_wide = val? 1:0;
|
|
- break;
|
|
- case OPT_SETTLE_DELAY:
|
|
- driver_setup.settle_delay = val;
|
|
- break;
|
|
- case OPT_DIFF_SUPPORT:
|
|
- driver_setup.diff_support = val;
|
|
- break;
|
|
- case OPT_IRQM:
|
|
- driver_setup.irqm = val;
|
|
- break;
|
|
- case OPT_PCI_FIX_UP:
|
|
- driver_setup.pci_fix_up = val;
|
|
- break;
|
|
- case OPT_BUS_CHECK:
|
|
- driver_setup.bus_check = val;
|
|
- break;
|
|
- case OPT_OPTIMIZE:
|
|
- driver_setup.optimize = val;
|
|
- break;
|
|
- case OPT_RECOVERY:
|
|
- driver_setup.recovery = val;
|
|
- break;
|
|
- case OPT_USE_NVRAM:
|
|
- driver_setup.use_nvram = val;
|
|
- break;
|
|
- case OPT_SAFE_SETUP:
|
|
- memcpy(&driver_setup, &driver_safe_setup,
|
|
- sizeof(driver_setup));
|
|
- break;
|
|
- case OPT_EXCLUDE:
|
|
- if (xi < SCSI_NCR_MAX_EXCLUDES)
|
|
- driver_setup.excludes[xi++] = val;
|
|
- break;
|
|
- case OPT_HOST_ID:
|
|
- driver_setup.host_id = val;
|
|
- break;
|
|
-#ifdef SCSI_NCR_IARB_SUPPORT
|
|
- case OPT_IARB:
|
|
- driver_setup.iarb = val;
|
|
- break;
|
|
-#endif
|
|
- default:
|
|
- printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur);
|
|
- break;
|
|
- }
|
|
-
|
|
- if ((cur = strchr(cur, ARG_SEP)) != NULL)
|
|
- ++cur;
|
|
- }
|
|
-#endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */
|
|
- return 1;
|
|
-}
|
|
-
|
|
-/*===================================================================
|
|
-**
|
|
-** Get device queue depth from boot command line.
|
|
-**
|
|
-**===================================================================
|
|
-*/
|
|
-#define DEF_DEPTH (driver_setup.default_tags)
|
|
-#define ALL_TARGETS -2
|
|
-#define NO_TARGET -1
|
|
-#define ALL_LUNS -2
|
|
-#define NO_LUN -1
|
|
-
|
|
-static int device_queue_depth(int unit, int target, int lun)
|
|
-{
|
|
- int c, h, t, u, v;
|
|
- char *p = driver_setup.tag_ctrl;
|
|
- char *ep;
|
|
-
|
|
- h = -1;
|
|
- t = NO_TARGET;
|
|
- u = NO_LUN;
|
|
- while ((c = *p++) != 0) {
|
|
- v = simple_strtoul(p, &ep, 0);
|
|
- switch(c) {
|
|
- case '/':
|
|
- ++h;
|
|
- t = ALL_TARGETS;
|
|
- u = ALL_LUNS;
|
|
- break;
|
|
- case 't':
|
|
- if (t != target)
|
|
- t = (target == v) ? v : NO_TARGET;
|
|
- u = ALL_LUNS;
|
|
- break;
|
|
- case 'u':
|
|
- if (u != lun)
|
|
- u = (lun == v) ? v : NO_LUN;
|
|
- break;
|
|
- case 'q':
|
|
- if (h == unit &&
|
|
- (t == ALL_TARGETS || t == target) &&
|
|
- (u == ALL_LUNS || u == lun))
|
|
- return v;
|
|
- break;
|
|
- case '-':
|
|
- t = ALL_TARGETS;
|
|
- u = ALL_LUNS;
|
|
- break;
|
|
- default:
|
|
- break;
|
|
- }
|
|
- p = ep;
|
|
- }
|
|
- return DEF_DEPTH;
|
|
-}
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_defs.h CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_defs.h
|
|
--- LINUS_2_6_15_RC7/drivers/scsi/sym53c8xx_defs.h 2005-12-27 13:25:48.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/scsi/sym53c8xx_defs.h 1969-12-31 17:00:00.000000000 -0700
|
|
@@ -1,1320 +0,0 @@
|
|
-/******************************************************************************
|
|
-** High Performance device driver for the Symbios 53C896 controller.
|
|
-**
|
|
-** Copyright (C) 1998-2001 Gerard Roudier <groudier@free.fr>
|
|
-**
|
|
-** This driver also supports all the Symbios 53C8XX controller family,
|
|
-** except 53C810 revisions < 16, 53C825 revisions < 16 and all
|
|
-** revisions of 53C815 controllers.
|
|
-**
|
|
-** This driver is based on the Linux port of the FreeBSD ncr driver.
|
|
-**
|
|
-** Copyright (C) 1994 Wolfgang Stanglmeier
|
|
-**
|
|
-**-----------------------------------------------------------------------------
|
|
-**
|
|
-** This program is free software; you can redistribute it and/or modify
|
|
-** it under the terms of the GNU General Public License as published by
|
|
-** the Free Software Foundation; either version 2 of the License, or
|
|
-** (at your option) any later version.
|
|
-**
|
|
-** This program is distributed in the hope that it will be useful,
|
|
-** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
-** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
-** GNU General Public License for more details.
|
|
-**
|
|
-** You should have received a copy of the GNU General Public License
|
|
-** along with this program; if not, write to the Free Software
|
|
-** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
-**
|
|
-**-----------------------------------------------------------------------------
|
|
-**
|
|
-** The Linux port of the FreeBSD ncr driver has been achieved in
|
|
-** november 1995 by:
|
|
-**
|
|
-** Gerard Roudier <groudier@free.fr>
|
|
-**
|
|
-** Being given that this driver originates from the FreeBSD version, and
|
|
-** in order to keep synergy on both, any suggested enhancements and corrections
|
|
-** received on Linux are automatically a potential candidate for the FreeBSD
|
|
-** version.
|
|
-**
|
|
-** The original driver has been written for 386bsd and FreeBSD by
|
|
-** Wolfgang Stanglmeier <wolf@cologne.de>
|
|
-** Stefan Esser <se@mi.Uni-Koeln.de>
|
|
-**
|
|
-**-----------------------------------------------------------------------------
|
|
-**
|
|
-** Major contributions:
|
|
-** --------------------
|
|
-**
|
|
-** NVRAM detection and reading.
|
|
-** Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
|
|
-**
|
|
-** Added support for MIPS big endian systems.
|
|
-** Carsten Langgaard, carstenl@mips.com
|
|
-** Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
|
|
-**
|
|
-** Added support for HP PARISC big endian systems.
|
|
-** Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
|
|
-**
|
|
-*******************************************************************************
|
|
-*/
|
|
-
|
|
-#ifndef SYM53C8XX_DEFS_H
|
|
-#define SYM53C8XX_DEFS_H
|
|
-
|
|
-#include <linux/config.h>
|
|
-
|
|
-/*
|
|
-** If you want a driver as small as possible, donnot define the
|
|
-** following options.
|
|
-*/
|
|
-#define SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
|
|
-#define SCSI_NCR_DEBUG_INFO_SUPPORT
|
|
-
|
|
-/*
|
|
-** To disable integrity checking, do not define the
|
|
-** following option.
|
|
-*/
|
|
-#ifdef CONFIG_SCSI_NCR53C8XX_INTEGRITY_CHECK
|
|
-# define SCSI_NCR_ENABLE_INTEGRITY_CHECK
|
|
-#endif
|
|
-
|
|
-/* ---------------------------------------------------------------------
|
|
-** Take into account kernel configured parameters.
|
|
-** Most of these options can be overridden at startup by a command line.
|
|
-** ---------------------------------------------------------------------
|
|
-*/
|
|
-
|
|
-/*
|
|
- * For Ultra2 and Ultra3 SCSI support option, use special features.
|
|
- *
|
|
- * Value (default) means:
|
|
- * bit 0 : all features enabled, except:
|
|
- * bit 1 : PCI Write And Invalidate.
|
|
- * bit 2 : Data Phase Mismatch handling from SCRIPTS.
|
|
- *
|
|
- * Use boot options ncr53c8xx=specf:1 if you want all chip features to be
|
|
- * enabled by the driver.
|
|
- */
|
|
-#define SCSI_NCR_SETUP_SPECIAL_FEATURES (3)
|
|
-
|
|
-#define SCSI_NCR_MAX_SYNC (80)
|
|
-
|
|
-/*
|
|
- * Allow tags from 2 to 256, default 8
|
|
- */
|
|
-#ifdef CONFIG_SCSI_NCR53C8XX_MAX_TAGS
|
|
-#if CONFIG_SCSI_NCR53C8XX_MAX_TAGS < 2
|
|
-#define SCSI_NCR_MAX_TAGS (2)
|
|
-#elif CONFIG_SCSI_NCR53C8XX_MAX_TAGS > 256
|
|
-#define SCSI_NCR_MAX_TAGS (256)
|
|
-#else
|
|
-#define SCSI_NCR_MAX_TAGS CONFIG_SCSI_NCR53C8XX_MAX_TAGS
|
|
-#endif
|
|
-#else
|
|
-#define SCSI_NCR_MAX_TAGS (8)
|
|
-#endif
|
|
-
|
|
-/*
|
|
- * Allow tagged command queuing support if configured with default number
|
|
- * of tags set to max (see above).
|
|
- */
|
|
-#ifdef CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS
|
|
-#define SCSI_NCR_SETUP_DEFAULT_TAGS CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS
|
|
-#elif defined CONFIG_SCSI_NCR53C8XX_TAGGED_QUEUE
|
|
-#define SCSI_NCR_SETUP_DEFAULT_TAGS SCSI_NCR_MAX_TAGS
|
|
-#else
|
|
-#define SCSI_NCR_SETUP_DEFAULT_TAGS (0)
|
|
-#endif
|
|
-
|
|
-/*
|
|
- * Immediate arbitration
|
|
- */
|
|
-#if defined(CONFIG_SCSI_NCR53C8XX_IARB)
|
|
-#define SCSI_NCR_IARB_SUPPORT
|
|
-#endif
|
|
-
|
|
-/*
|
|
- * Sync transfer frequency at startup.
|
|
- * Allow from 5Mhz to 80Mhz default 20 Mhz.
|
|
- */
|
|
-#ifndef CONFIG_SCSI_NCR53C8XX_SYNC
|
|
-#define CONFIG_SCSI_NCR53C8XX_SYNC (20)
|
|
-#elif CONFIG_SCSI_NCR53C8XX_SYNC > SCSI_NCR_MAX_SYNC
|
|
-#undef CONFIG_SCSI_NCR53C8XX_SYNC
|
|
-#define CONFIG_SCSI_NCR53C8XX_SYNC SCSI_NCR_MAX_SYNC
|
|
-#endif
|
|
-
|
|
-#if CONFIG_SCSI_NCR53C8XX_SYNC == 0
|
|
-#define SCSI_NCR_SETUP_DEFAULT_SYNC (255)
|
|
-#elif CONFIG_SCSI_NCR53C8XX_SYNC <= 5
|
|
-#define SCSI_NCR_SETUP_DEFAULT_SYNC (50)
|
|
-#elif CONFIG_SCSI_NCR53C8XX_SYNC <= 20
|
|
-#define SCSI_NCR_SETUP_DEFAULT_SYNC (250/(CONFIG_SCSI_NCR53C8XX_SYNC))
|
|
-#elif CONFIG_SCSI_NCR53C8XX_SYNC <= 33
|
|
-#define SCSI_NCR_SETUP_DEFAULT_SYNC (11)
|
|
-#elif CONFIG_SCSI_NCR53C8XX_SYNC <= 40
|
|
-#define SCSI_NCR_SETUP_DEFAULT_SYNC (10)
|
|
-#else
|
|
-#define SCSI_NCR_SETUP_DEFAULT_SYNC (9)
|
|
-#endif
|
|
-
|
|
-/*
|
|
- * Disallow disconnections at boot-up
|
|
- */
|
|
-#ifdef CONFIG_SCSI_NCR53C8XX_NO_DISCONNECT
|
|
-#define SCSI_NCR_SETUP_DISCONNECTION (0)
|
|
-#else
|
|
-#define SCSI_NCR_SETUP_DISCONNECTION (1)
|
|
-#endif
|
|
-
|
|
-/*
|
|
- * Force synchronous negotiation for all targets
|
|
- */
|
|
-#ifdef CONFIG_SCSI_NCR53C8XX_FORCE_SYNC_NEGO
|
|
-#define SCSI_NCR_SETUP_FORCE_SYNC_NEGO (1)
|
|
-#else
|
|
-#define SCSI_NCR_SETUP_FORCE_SYNC_NEGO (0)
|
|
-#endif
|
|
-
|
|
-/*
|
|
- * Disable master parity checking (flawed hardwares need that)
|
|
- */
|
|
-#ifdef CONFIG_SCSI_NCR53C8XX_DISABLE_MPARITY_CHECK
|
|
-#define SCSI_NCR_SETUP_MASTER_PARITY (0)
|
|
-#else
|
|
-#define SCSI_NCR_SETUP_MASTER_PARITY (1)
|
|
-#endif
|
|
-
|
|
-/*
|
|
- * Disable scsi parity checking (flawed devices may need that)
|
|
- */
|
|
-#ifdef CONFIG_SCSI_NCR53C8XX_DISABLE_PARITY_CHECK
|
|
-#define SCSI_NCR_SETUP_SCSI_PARITY (0)
|
|
-#else
|
|
-#define SCSI_NCR_SETUP_SCSI_PARITY (1)
|
|
-#endif
|
|
-
|
|
-/*
|
|
- * Settle time after reset at boot-up
|
|
- */
|
|
-#define SCSI_NCR_SETUP_SETTLE_TIME (2)
|
|
-
|
|
-/*
|
|
-** Bridge quirks work-around option defaulted to 1.
|
|
-*/
|
|
-#ifndef SCSI_NCR_PCIQ_WORK_AROUND_OPT
|
|
-#define SCSI_NCR_PCIQ_WORK_AROUND_OPT 1
|
|
-#endif
|
|
-
|
|
-/*
|
|
-** Work-around common bridge misbehaviour.
|
|
-**
|
|
-** - Do not flush posted writes in the opposite
|
|
-** direction on read.
|
|
-** - May reorder DMA writes to memory.
|
|
-**
|
|
-** This option should not affect performances
|
|
-** significantly, so it is the default.
|
|
-*/
|
|
-#if SCSI_NCR_PCIQ_WORK_AROUND_OPT == 1
|
|
-#define SCSI_NCR_PCIQ_MAY_NOT_FLUSH_PW_UPSTREAM
|
|
-#define SCSI_NCR_PCIQ_MAY_REORDER_WRITES
|
|
-#define SCSI_NCR_PCIQ_MAY_MISS_COMPLETIONS
|
|
-
|
|
-/*
|
|
-** Same as option 1, but also deal with
|
|
-** misconfigured interrupts.
|
|
-**
|
|
-** - Edge triggerred instead of level sensitive.
|
|
-** - No interrupt line connected.
|
|
-** - IRQ number misconfigured.
|
|
-**
|
|
-** If no interrupt is delivered, the driver will
|
|
-** catch the interrupt conditions 10 times per
|
|
-** second. No need to say that this option is
|
|
-** not recommended.
|
|
-*/
|
|
-#elif SCSI_NCR_PCIQ_WORK_AROUND_OPT == 2
|
|
-#define SCSI_NCR_PCIQ_MAY_NOT_FLUSH_PW_UPSTREAM
|
|
-#define SCSI_NCR_PCIQ_MAY_REORDER_WRITES
|
|
-#define SCSI_NCR_PCIQ_MAY_MISS_COMPLETIONS
|
|
-#define SCSI_NCR_PCIQ_BROKEN_INTR
|
|
-
|
|
-/*
|
|
-** Some bridge designers decided to flush
|
|
-** everything prior to deliver the interrupt.
|
|
-** This option tries to deal with such a
|
|
-** behaviour.
|
|
-*/
|
|
-#elif SCSI_NCR_PCIQ_WORK_AROUND_OPT == 3
|
|
-#define SCSI_NCR_PCIQ_SYNC_ON_INTR
|
|
-#endif
|
|
-
|
|
-/*
|
|
-** Other parameters not configurable with "make config"
|
|
-** Avoid to change these constants, unless you know what you are doing.
|
|
-*/
|
|
-
|
|
-#define SCSI_NCR_ALWAYS_SIMPLE_TAG
|
|
-#define SCSI_NCR_MAX_SCATTER (127)
|
|
-#define SCSI_NCR_MAX_TARGET (16)
|
|
-
|
|
-/*
|
|
-** Compute some desirable value for CAN_QUEUE
|
|
-** and CMD_PER_LUN.
|
|
-** The driver will use lower values if these
|
|
-** ones appear to be too large.
|
|
-*/
|
|
-#define SCSI_NCR_CAN_QUEUE (8*SCSI_NCR_MAX_TAGS + 2*SCSI_NCR_MAX_TARGET)
|
|
-#define SCSI_NCR_CMD_PER_LUN (SCSI_NCR_MAX_TAGS)
|
|
-
|
|
-#define SCSI_NCR_SG_TABLESIZE (SCSI_NCR_MAX_SCATTER)
|
|
-#define SCSI_NCR_TIMER_INTERVAL (HZ)
|
|
-
|
|
-#if 1 /* defined CONFIG_SCSI_MULTI_LUN */
|
|
-#define SCSI_NCR_MAX_LUN (16)
|
|
-#else
|
|
-#define SCSI_NCR_MAX_LUN (1)
|
|
-#endif
|
|
-
|
|
-/*
|
|
- * IO functions definition for big/little endian CPU support.
|
|
- * For now, the NCR is only supported in little endian addressing mode,
|
|
- */
|
|
-
|
|
-#ifdef __BIG_ENDIAN
|
|
-
|
|
-#define inw_l2b inw
|
|
-#define inl_l2b inl
|
|
-#define outw_b2l outw
|
|
-#define outl_b2l outl
|
|
-
|
|
-#define readb_raw readb
|
|
-#define writeb_raw writeb
|
|
-
|
|
-#if defined(SCSI_NCR_BIG_ENDIAN)
|
|
-#define readw_l2b __raw_readw
|
|
-#define readl_l2b __raw_readl
|
|
-#define writew_b2l __raw_writew
|
|
-#define writel_b2l __raw_writel
|
|
-#define readw_raw __raw_readw
|
|
-#define readl_raw __raw_readl
|
|
-#define writew_raw __raw_writew
|
|
-#define writel_raw __raw_writel
|
|
-#else /* Other big-endian */
|
|
-#define readw_l2b readw
|
|
-#define readl_l2b readl
|
|
-#define writew_b2l writew
|
|
-#define writel_b2l writel
|
|
-#define readw_raw readw
|
|
-#define readl_raw readl
|
|
-#define writew_raw writew
|
|
-#define writel_raw writel
|
|
-#endif
|
|
-
|
|
-#else /* little endian */
|
|
-
|
|
-#define inw_raw inw
|
|
-#define inl_raw inl
|
|
-#define outw_raw outw
|
|
-#define outl_raw outl
|
|
-
|
|
-#define readb_raw readb
|
|
-#define readw_raw readw
|
|
-#define readl_raw readl
|
|
-#define writeb_raw writeb
|
|
-#define writew_raw writew
|
|
-#define writel_raw writel
|
|
-
|
|
-#endif
|
|
-
|
|
-#if !defined(__hppa__) && !defined(__mips__)
|
|
-#ifdef SCSI_NCR_BIG_ENDIAN
|
|
-#error "The NCR in BIG ENDIAN addressing mode is not (yet) supported"
|
|
-#endif
|
|
-#endif
|
|
-
|
|
-#define MEMORY_BARRIER() mb()
|
|
-
|
|
-
|
|
-/*
|
|
- * If the NCR uses big endian addressing mode over the
|
|
- * PCI, actual io register addresses for byte and word
|
|
- * accesses must be changed according to lane routing.
|
|
- * Btw, ncr_offb() and ncr_offw() macros only apply to
|
|
- * constants and so donnot generate bloated code.
|
|
- */
|
|
-
|
|
-#if defined(SCSI_NCR_BIG_ENDIAN)
|
|
-
|
|
-#define ncr_offb(o) (((o)&~3)+((~((o)&3))&3))
|
|
-#define ncr_offw(o) (((o)&~3)+((~((o)&3))&2))
|
|
-
|
|
-#else
|
|
-
|
|
-#define ncr_offb(o) (o)
|
|
-#define ncr_offw(o) (o)
|
|
-
|
|
-#endif
|
|
-
|
|
-/*
|
|
- * If the CPU and the NCR use same endian-ness addressing,
|
|
- * no byte reordering is needed for script patching.
|
|
- * Macro cpu_to_scr() is to be used for script patching.
|
|
- * Macro scr_to_cpu() is to be used for getting a DWORD
|
|
- * from the script.
|
|
- */
|
|
-
|
|
-#if defined(__BIG_ENDIAN) && !defined(SCSI_NCR_BIG_ENDIAN)
|
|
-
|
|
-#define cpu_to_scr(dw) cpu_to_le32(dw)
|
|
-#define scr_to_cpu(dw) le32_to_cpu(dw)
|
|
-
|
|
-#elif defined(__LITTLE_ENDIAN) && defined(SCSI_NCR_BIG_ENDIAN)
|
|
-
|
|
-#define cpu_to_scr(dw) cpu_to_be32(dw)
|
|
-#define scr_to_cpu(dw) be32_to_cpu(dw)
|
|
-
|
|
-#else
|
|
-
|
|
-#define cpu_to_scr(dw) (dw)
|
|
-#define scr_to_cpu(dw) (dw)
|
|
-
|
|
-#endif
|
|
-
|
|
-/*
|
|
- * Access to the controller chip.
|
|
- *
|
|
- * If the CPU and the NCR use same endian-ness addressing,
|
|
- * no byte reordering is needed for accessing chip io
|
|
- * registers. Functions suffixed by '_raw' are assumed
|
|
- * to access the chip over the PCI without doing byte
|
|
- * reordering. Functions suffixed by '_l2b' are
|
|
- * assumed to perform little-endian to big-endian byte
|
|
- * reordering, those suffixed by '_b2l' blah, blah,
|
|
- * blah, ...
|
|
- */
|
|
-
|
|
-/*
|
|
- * MEMORY mapped IO input / output
|
|
- */
|
|
-
|
|
-#define INB_OFF(o) readb_raw((char __iomem *)np->reg + ncr_offb(o))
|
|
-#define OUTB_OFF(o, val) writeb_raw((val), (char __iomem *)np->reg + ncr_offb(o))
|
|
-
|
|
-#if defined(__BIG_ENDIAN) && !defined(SCSI_NCR_BIG_ENDIAN)
|
|
-
|
|
-#define INW_OFF(o) readw_l2b((char __iomem *)np->reg + ncr_offw(o))
|
|
-#define INL_OFF(o) readl_l2b((char __iomem *)np->reg + (o))
|
|
-
|
|
-#define OUTW_OFF(o, val) writew_b2l((val), (char __iomem *)np->reg + ncr_offw(o))
|
|
-#define OUTL_OFF(o, val) writel_b2l((val), (char __iomem *)np->reg + (o))
|
|
-
|
|
-#elif defined(__LITTLE_ENDIAN) && defined(SCSI_NCR_BIG_ENDIAN)
|
|
-
|
|
-#define INW_OFF(o) readw_b2l((char __iomem *)np->reg + ncr_offw(o))
|
|
-#define INL_OFF(o) readl_b2l((char __iomem *)np->reg + (o))
|
|
-
|
|
-#define OUTW_OFF(o, val) writew_l2b((val), (char __iomem *)np->reg + ncr_offw(o))
|
|
-#define OUTL_OFF(o, val) writel_l2b((val), (char __iomem *)np->reg + (o))
|
|
-
|
|
-#else
|
|
-
|
|
-#ifdef CONFIG_SCSI_NCR53C8XX_NO_WORD_TRANSFERS
|
|
-/* Only 8 or 32 bit transfers allowed */
|
|
-#define INW_OFF(o) (readb((char __iomem *)np->reg + ncr_offw(o)) << 8 | readb((char __iomem *)np->reg + ncr_offw(o) + 1))
|
|
-#else
|
|
-#define INW_OFF(o) readw_raw((char __iomem *)np->reg + ncr_offw(o))
|
|
-#endif
|
|
-#define INL_OFF(o) readl_raw((char __iomem *)np->reg + (o))
|
|
-
|
|
-#ifdef CONFIG_SCSI_NCR53C8XX_NO_WORD_TRANSFERS
|
|
-/* Only 8 or 32 bit transfers allowed */
|
|
-#define OUTW_OFF(o, val) do { writeb((char)((val) >> 8), (char __iomem *)np->reg + ncr_offw(o)); writeb((char)(val), (char __iomem *)np->reg + ncr_offw(o) + 1); } while (0)
|
|
-#else
|
|
-#define OUTW_OFF(o, val) writew_raw((val), (char __iomem *)np->reg + ncr_offw(o))
|
|
-#endif
|
|
-#define OUTL_OFF(o, val) writel_raw((val), (char __iomem *)np->reg + (o))
|
|
-
|
|
-#endif
|
|
-
|
|
-#define INB(r) INB_OFF (offsetof(struct ncr_reg,r))
|
|
-#define INW(r) INW_OFF (offsetof(struct ncr_reg,r))
|
|
-#define INL(r) INL_OFF (offsetof(struct ncr_reg,r))
|
|
-
|
|
-#define OUTB(r, val) OUTB_OFF (offsetof(struct ncr_reg,r), (val))
|
|
-#define OUTW(r, val) OUTW_OFF (offsetof(struct ncr_reg,r), (val))
|
|
-#define OUTL(r, val) OUTL_OFF (offsetof(struct ncr_reg,r), (val))
|
|
-
|
|
-/*
|
|
- * Set bit field ON, OFF
|
|
- */
|
|
-
|
|
-#define OUTONB(r, m) OUTB(r, INB(r) | (m))
|
|
-#define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
|
|
-#define OUTONW(r, m) OUTW(r, INW(r) | (m))
|
|
-#define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
|
|
-#define OUTONL(r, m) OUTL(r, INL(r) | (m))
|
|
-#define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
|
|
-
|
|
-/*
|
|
- * We normally want the chip to have a consistent view
|
|
- * of driver internal data structures when we restart it.
|
|
- * Thus these macros.
|
|
- */
|
|
-#define OUTL_DSP(v) \
|
|
- do { \
|
|
- MEMORY_BARRIER(); \
|
|
- OUTL (nc_dsp, (v)); \
|
|
- } while (0)
|
|
-
|
|
-#define OUTONB_STD() \
|
|
- do { \
|
|
- MEMORY_BARRIER(); \
|
|
- OUTONB (nc_dcntl, (STD|NOCOM)); \
|
|
- } while (0)
|
|
-
|
|
-
|
|
-/*
|
|
-** NCR53C8XX devices features table.
|
|
-*/
|
|
-struct ncr_chip {
|
|
- unsigned short revision_id;
|
|
- unsigned char burst_max; /* log-base-2 of max burst */
|
|
- unsigned char offset_max;
|
|
- unsigned char nr_divisor;
|
|
- unsigned int features;
|
|
-#define FE_LED0 (1<<0)
|
|
-#define FE_WIDE (1<<1) /* Wide data transfers */
|
|
-#define FE_ULTRA (1<<2) /* Ultra speed 20Mtrans/sec */
|
|
-#define FE_DBLR (1<<4) /* Clock doubler present */
|
|
-#define FE_QUAD (1<<5) /* Clock quadrupler present */
|
|
-#define FE_ERL (1<<6) /* Enable read line */
|
|
-#define FE_CLSE (1<<7) /* Cache line size enable */
|
|
-#define FE_WRIE (1<<8) /* Write & Invalidate enable */
|
|
-#define FE_ERMP (1<<9) /* Enable read multiple */
|
|
-#define FE_BOF (1<<10) /* Burst opcode fetch */
|
|
-#define FE_DFS (1<<11) /* DMA fifo size */
|
|
-#define FE_PFEN (1<<12) /* Prefetch enable */
|
|
-#define FE_LDSTR (1<<13) /* Load/Store supported */
|
|
-#define FE_RAM (1<<14) /* On chip RAM present */
|
|
-#define FE_VARCLK (1<<15) /* SCSI clock may vary */
|
|
-#define FE_RAM8K (1<<16) /* On chip RAM sized 8Kb */
|
|
-#define FE_64BIT (1<<17) /* Have a 64-bit PCI interface */
|
|
-#define FE_IO256 (1<<18) /* Requires full 256 bytes in PCI space */
|
|
-#define FE_NOPM (1<<19) /* Scripts handles phase mismatch */
|
|
-#define FE_LEDC (1<<20) /* Hardware control of LED */
|
|
-#define FE_DIFF (1<<21) /* Support Differential SCSI */
|
|
-#define FE_66MHZ (1<<23) /* 66MHz PCI Support */
|
|
-#define FE_DAC (1<<24) /* Support DAC cycles (64 bit addressing) */
|
|
-#define FE_ISTAT1 (1<<25) /* Have ISTAT1, MBOX0, MBOX1 registers */
|
|
-#define FE_DAC_IN_USE (1<<26) /* Platform does DAC cycles */
|
|
-#define FE_EHP (1<<27) /* 720: Even host parity */
|
|
-#define FE_MUX (1<<28) /* 720: Multiplexed bus */
|
|
-#define FE_EA (1<<29) /* 720: Enable Ack */
|
|
-
|
|
-#define FE_CACHE_SET (FE_ERL|FE_CLSE|FE_WRIE|FE_ERMP)
|
|
-#define FE_SCSI_SET (FE_WIDE|FE_ULTRA|FE_DBLR|FE_QUAD|F_CLK80)
|
|
-#define FE_SPECIAL_SET (FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM)
|
|
-};
|
|
-
|
|
-
|
|
-/*
|
|
-** Driver setup structure.
|
|
-**
|
|
-** This structure is initialized from linux config options.
|
|
-** It can be overridden at boot-up by the boot command line.
|
|
-*/
|
|
-#define SCSI_NCR_MAX_EXCLUDES 8
|
|
-struct ncr_driver_setup {
|
|
- u8 master_parity;
|
|
- u8 scsi_parity;
|
|
- u8 disconnection;
|
|
- u8 special_features;
|
|
- u8 force_sync_nego;
|
|
- u8 reverse_probe;
|
|
- u8 pci_fix_up;
|
|
- u8 use_nvram;
|
|
- u8 verbose;
|
|
- u8 default_tags;
|
|
- u16 default_sync;
|
|
- u16 debug;
|
|
- u8 burst_max;
|
|
- u8 led_pin;
|
|
- u8 max_wide;
|
|
- u8 settle_delay;
|
|
- u8 diff_support;
|
|
- u8 irqm;
|
|
- u8 bus_check;
|
|
- u8 optimize;
|
|
- u8 recovery;
|
|
- u8 host_id;
|
|
- u16 iarb;
|
|
- u32 excludes[SCSI_NCR_MAX_EXCLUDES];
|
|
- char tag_ctrl[100];
|
|
-};
|
|
-
|
|
-/*
|
|
-** Initial setup.
|
|
-** Can be overriden at startup by a command line.
|
|
-*/
|
|
-#define SCSI_NCR_DRIVER_SETUP \
|
|
-{ \
|
|
- SCSI_NCR_SETUP_MASTER_PARITY, \
|
|
- SCSI_NCR_SETUP_SCSI_PARITY, \
|
|
- SCSI_NCR_SETUP_DISCONNECTION, \
|
|
- SCSI_NCR_SETUP_SPECIAL_FEATURES, \
|
|
- SCSI_NCR_SETUP_FORCE_SYNC_NEGO, \
|
|
- 0, \
|
|
- 0, \
|
|
- 1, \
|
|
- 0, \
|
|
- SCSI_NCR_SETUP_DEFAULT_TAGS, \
|
|
- SCSI_NCR_SETUP_DEFAULT_SYNC, \
|
|
- 0x00, \
|
|
- 7, \
|
|
- 0, \
|
|
- 1, \
|
|
- SCSI_NCR_SETUP_SETTLE_TIME, \
|
|
- 0, \
|
|
- 0, \
|
|
- 1, \
|
|
- 0, \
|
|
- 0, \
|
|
- 255, \
|
|
- 0x00 \
|
|
-}
|
|
-
|
|
-/*
|
|
-** Boot fail safe setup.
|
|
-** Override initial setup from boot command line:
|
|
-** ncr53c8xx=safe:y
|
|
-*/
|
|
-#define SCSI_NCR_DRIVER_SAFE_SETUP \
|
|
-{ \
|
|
- 0, \
|
|
- 1, \
|
|
- 0, \
|
|
- 0, \
|
|
- 0, \
|
|
- 0, \
|
|
- 0, \
|
|
- 1, \
|
|
- 2, \
|
|
- 0, \
|
|
- 255, \
|
|
- 0x00, \
|
|
- 255, \
|
|
- 0, \
|
|
- 0, \
|
|
- 10, \
|
|
- 1, \
|
|
- 1, \
|
|
- 1, \
|
|
- 0, \
|
|
- 0, \
|
|
- 255 \
|
|
-}
|
|
-
|
|
-/**************** ORIGINAL CONTENT of ncrreg.h from FreeBSD ******************/
|
|
-
|
|
-/*-----------------------------------------------------------------
|
|
-**
|
|
-** The ncr 53c810 register structure.
|
|
-**
|
|
-**-----------------------------------------------------------------
|
|
-*/
|
|
-
|
|
-struct ncr_reg {
|
|
-/*00*/ u8 nc_scntl0; /* full arb., ena parity, par->ATN */
|
|
-
|
|
-/*01*/ u8 nc_scntl1; /* no reset */
|
|
- #define ISCON 0x10 /* connected to scsi */
|
|
- #define CRST 0x08 /* force reset */
|
|
- #define IARB 0x02 /* immediate arbitration */
|
|
-
|
|
-/*02*/ u8 nc_scntl2; /* no disconnect expected */
|
|
- #define SDU 0x80 /* cmd: disconnect will raise error */
|
|
- #define CHM 0x40 /* sta: chained mode */
|
|
- #define WSS 0x08 /* sta: wide scsi send [W]*/
|
|
- #define WSR 0x01 /* sta: wide scsi received [W]*/
|
|
-
|
|
-/*03*/ u8 nc_scntl3; /* cnf system clock dependent */
|
|
- #define EWS 0x08 /* cmd: enable wide scsi [W]*/
|
|
- #define ULTRA 0x80 /* cmd: ULTRA enable */
|
|
- /* bits 0-2, 7 rsvd for C1010 */
|
|
-
|
|
-/*04*/ u8 nc_scid; /* cnf host adapter scsi address */
|
|
- #define RRE 0x40 /* r/w:e enable response to resel. */
|
|
- #define SRE 0x20 /* r/w:e enable response to select */
|
|
-
|
|
-/*05*/ u8 nc_sxfer; /* ### Sync speed and count */
|
|
- /* bits 6-7 rsvd for C1010 */
|
|
-
|
|
-/*06*/ u8 nc_sdid; /* ### Destination-ID */
|
|
-
|
|
-/*07*/ u8 nc_gpreg; /* ??? IO-Pins */
|
|
-
|
|
-/*08*/ u8 nc_sfbr; /* ### First byte in phase */
|
|
-
|
|
-/*09*/ u8 nc_socl;
|
|
- #define CREQ 0x80 /* r/w: SCSI-REQ */
|
|
- #define CACK 0x40 /* r/w: SCSI-ACK */
|
|
- #define CBSY 0x20 /* r/w: SCSI-BSY */
|
|
- #define CSEL 0x10 /* r/w: SCSI-SEL */
|
|
- #define CATN 0x08 /* r/w: SCSI-ATN */
|
|
- #define CMSG 0x04 /* r/w: SCSI-MSG */
|
|
- #define CC_D 0x02 /* r/w: SCSI-C_D */
|
|
- #define CI_O 0x01 /* r/w: SCSI-I_O */
|
|
-
|
|
-/*0a*/ u8 nc_ssid;
|
|
-
|
|
-/*0b*/ u8 nc_sbcl;
|
|
-
|
|
-/*0c*/ u8 nc_dstat;
|
|
- #define DFE 0x80 /* sta: dma fifo empty */
|
|
- #define MDPE 0x40 /* int: master data parity error */
|
|
- #define BF 0x20 /* int: script: bus fault */
|
|
- #define ABRT 0x10 /* int: script: command aborted */
|
|
- #define SSI 0x08 /* int: script: single step */
|
|
- #define SIR 0x04 /* int: script: interrupt instruct. */
|
|
- #define IID 0x01 /* int: script: illegal instruct. */
|
|
-
|
|
-/*0d*/ u8 nc_sstat0;
|
|
- #define ILF 0x80 /* sta: data in SIDL register lsb */
|
|
- #define ORF 0x40 /* sta: data in SODR register lsb */
|
|
- #define OLF 0x20 /* sta: data in SODL register lsb */
|
|
- #define AIP 0x10 /* sta: arbitration in progress */
|
|
- #define LOA 0x08 /* sta: arbitration lost */
|
|
- #define WOA 0x04 /* sta: arbitration won */
|
|
- #define IRST 0x02 /* sta: scsi reset signal */
|
|
- #define SDP 0x01 /* sta: scsi parity signal */
|
|
-
|
|
-/*0e*/ u8 nc_sstat1;
|
|
- #define FF3210 0xf0 /* sta: bytes in the scsi fifo */
|
|
-
|
|
-/*0f*/ u8 nc_sstat2;
|
|
- #define ILF1 0x80 /* sta: data in SIDL register msb[W]*/
|
|
- #define ORF1 0x40 /* sta: data in SODR register msb[W]*/
|
|
- #define OLF1 0x20 /* sta: data in SODL register msb[W]*/
|
|
- #define DM 0x04 /* sta: DIFFSENS mismatch (895/6 only) */
|
|
- #define LDSC 0x02 /* sta: disconnect & reconnect */
|
|
-
|
|
-/*10*/ u8 nc_dsa; /* --> Base page */
|
|
-/*11*/ u8 nc_dsa1;
|
|
-/*12*/ u8 nc_dsa2;
|
|
-/*13*/ u8 nc_dsa3;
|
|
-
|
|
-/*14*/ u8 nc_istat; /* --> Main Command and status */
|
|
- #define CABRT 0x80 /* cmd: abort current operation */
|
|
- #define SRST 0x40 /* mod: reset chip */
|
|
- #define SIGP 0x20 /* r/w: message from host to ncr */
|
|
- #define SEM 0x10 /* r/w: message between host + ncr */
|
|
- #define CON 0x08 /* sta: connected to scsi */
|
|
- #define INTF 0x04 /* sta: int on the fly (reset by wr)*/
|
|
- #define SIP 0x02 /* sta: scsi-interrupt */
|
|
- #define DIP 0x01 /* sta: host/script interrupt */
|
|
-
|
|
-/*15*/ u8 nc_istat1; /* 896 and later cores only */
|
|
- #define FLSH 0x04 /* sta: chip is flushing */
|
|
- #define SRUN 0x02 /* sta: scripts are running */
|
|
- #define SIRQD 0x01 /* r/w: disable INT pin */
|
|
-
|
|
-/*16*/ u8 nc_mbox0; /* 896 and later cores only */
|
|
-/*17*/ u8 nc_mbox1; /* 896 and later cores only */
|
|
-
|
|
-/*18*/ u8 nc_ctest0;
|
|
- #define EHP 0x04 /* 720 even host parity */
|
|
-/*19*/ u8 nc_ctest1;
|
|
-
|
|
-/*1a*/ u8 nc_ctest2;
|
|
- #define CSIGP 0x40
|
|
- /* bits 0-2,7 rsvd for C1010 */
|
|
-
|
|
-/*1b*/ u8 nc_ctest3;
|
|
- #define FLF 0x08 /* cmd: flush dma fifo */
|
|
- #define CLF 0x04 /* cmd: clear dma fifo */
|
|
- #define FM 0x02 /* mod: fetch pin mode */
|
|
- #define WRIE 0x01 /* mod: write and invalidate enable */
|
|
- /* bits 4-7 rsvd for C1010 */
|
|
-
|
|
-/*1c*/ u32 nc_temp; /* ### Temporary stack */
|
|
-
|
|
-/*20*/ u8 nc_dfifo;
|
|
-/*21*/ u8 nc_ctest4;
|
|
- #define MUX 0x80 /* 720 host bus multiplex mode */
|
|
- #define BDIS 0x80 /* mod: burst disable */
|
|
- #define MPEE 0x08 /* mod: master parity error enable */
|
|
-
|
|
-/*22*/ u8 nc_ctest5;
|
|
- #define DFS 0x20 /* mod: dma fifo size */
|
|
- /* bits 0-1, 3-7 rsvd for C1010 */
|
|
-/*23*/ u8 nc_ctest6;
|
|
-
|
|
-/*24*/ u32 nc_dbc; /* ### Byte count and command */
|
|
-/*28*/ u32 nc_dnad; /* ### Next command register */
|
|
-/*2c*/ u32 nc_dsp; /* --> Script Pointer */
|
|
-/*30*/ u32 nc_dsps; /* --> Script pointer save/opcode#2 */
|
|
-
|
|
-/*34*/ u8 nc_scratcha; /* Temporary register a */
|
|
-/*35*/ u8 nc_scratcha1;
|
|
-/*36*/ u8 nc_scratcha2;
|
|
-/*37*/ u8 nc_scratcha3;
|
|
-
|
|
-/*38*/ u8 nc_dmode;
|
|
- #define BL_2 0x80 /* mod: burst length shift value +2 */
|
|
- #define BL_1 0x40 /* mod: burst length shift value +1 */
|
|
- #define ERL 0x08 /* mod: enable read line */
|
|
- #define ERMP 0x04 /* mod: enable read multiple */
|
|
- #define BOF 0x02 /* mod: burst op code fetch */
|
|
-
|
|
-/*39*/ u8 nc_dien;
|
|
-/*3a*/ u8 nc_sbr;
|
|
-
|
|
-/*3b*/ u8 nc_dcntl; /* --> Script execution control */
|
|
- #define CLSE 0x80 /* mod: cache line size enable */
|
|
- #define PFF 0x40 /* cmd: pre-fetch flush */
|
|
- #define PFEN 0x20 /* mod: pre-fetch enable */
|
|
- #define EA 0x20 /* mod: 720 enable-ack */
|
|
- #define SSM 0x10 /* mod: single step mode */
|
|
- #define IRQM 0x08 /* mod: irq mode (1 = totem pole !) */
|
|
- #define STD 0x04 /* cmd: start dma mode */
|
|
- #define IRQD 0x02 /* mod: irq disable */
|
|
- #define NOCOM 0x01 /* cmd: protect sfbr while reselect */
|
|
- /* bits 0-1 rsvd for C1010 */
|
|
-
|
|
-/*3c*/ u32 nc_adder;
|
|
-
|
|
-/*40*/ u16 nc_sien; /* -->: interrupt enable */
|
|
-/*42*/ u16 nc_sist; /* <--: interrupt status */
|
|
- #define SBMC 0x1000/* sta: SCSI Bus Mode Change (895/6 only) */
|
|
- #define STO 0x0400/* sta: timeout (select) */
|
|
- #define GEN 0x0200/* sta: timeout (general) */
|
|
- #define HTH 0x0100/* sta: timeout (handshake) */
|
|
- #define MA 0x80 /* sta: phase mismatch */
|
|
- #define CMP 0x40 /* sta: arbitration complete */
|
|
- #define SEL 0x20 /* sta: selected by another device */
|
|
- #define RSL 0x10 /* sta: reselected by another device*/
|
|
- #define SGE 0x08 /* sta: gross error (over/underflow)*/
|
|
- #define UDC 0x04 /* sta: unexpected disconnect */
|
|
- #define RST 0x02 /* sta: scsi bus reset detected */
|
|
- #define PAR 0x01 /* sta: scsi parity error */
|
|
-
|
|
-/*44*/ u8 nc_slpar;
|
|
-/*45*/ u8 nc_swide;
|
|
-/*46*/ u8 nc_macntl;
|
|
-/*47*/ u8 nc_gpcntl;
|
|
-/*48*/ u8 nc_stime0; /* cmd: timeout for select&handshake*/
|
|
-/*49*/ u8 nc_stime1; /* cmd: timeout user defined */
|
|
-/*4a*/ u16 nc_respid; /* sta: Reselect-IDs */
|
|
-
|
|
-/*4c*/ u8 nc_stest0;
|
|
-
|
|
-/*4d*/ u8 nc_stest1;
|
|
- #define SCLK 0x80 /* Use the PCI clock as SCSI clock */
|
|
- #define DBLEN 0x08 /* clock doubler running */
|
|
- #define DBLSEL 0x04 /* clock doubler selected */
|
|
-
|
|
-
|
|
-/*4e*/ u8 nc_stest2;
|
|
- #define ROF 0x40 /* reset scsi offset (after gross error!) */
|
|
- #define DIF 0x20 /* 720 SCSI differential mode */
|
|
- #define EXT 0x02 /* extended filtering */
|
|
-
|
|
-/*4f*/ u8 nc_stest3;
|
|
- #define TE 0x80 /* c: tolerAnt enable */
|
|
- #define HSC 0x20 /* c: Halt SCSI Clock */
|
|
- #define CSF 0x02 /* c: clear scsi fifo */
|
|
-
|
|
-/*50*/ u16 nc_sidl; /* Lowlevel: latched from scsi data */
|
|
-/*52*/ u8 nc_stest4;
|
|
- #define SMODE 0xc0 /* SCSI bus mode (895/6 only) */
|
|
- #define SMODE_HVD 0x40 /* High Voltage Differential */
|
|
- #define SMODE_SE 0x80 /* Single Ended */
|
|
- #define SMODE_LVD 0xc0 /* Low Voltage Differential */
|
|
- #define LCKFRQ 0x20 /* Frequency Lock (895/6 only) */
|
|
- /* bits 0-5 rsvd for C1010 */
|
|
-
|
|
-/*53*/ u8 nc_53_;
|
|
-/*54*/ u16 nc_sodl; /* Lowlevel: data out to scsi data */
|
|
-/*56*/ u8 nc_ccntl0; /* Chip Control 0 (896) */
|
|
- #define ENPMJ 0x80 /* Enable Phase Mismatch Jump */
|
|
- #define PMJCTL 0x40 /* Phase Mismatch Jump Control */
|
|
- #define ENNDJ 0x20 /* Enable Non Data PM Jump */
|
|
- #define DISFC 0x10 /* Disable Auto FIFO Clear */
|
|
- #define DILS 0x02 /* Disable Internal Load/Store */
|
|
- #define DPR 0x01 /* Disable Pipe Req */
|
|
-
|
|
-/*57*/ u8 nc_ccntl1; /* Chip Control 1 (896) */
|
|
- #define ZMOD 0x80 /* High Impedance Mode */
|
|
- #define DIC 0x10 /* Disable Internal Cycles */
|
|
- #define DDAC 0x08 /* Disable Dual Address Cycle */
|
|
- #define XTIMOD 0x04 /* 64-bit Table Ind. Indexing Mode */
|
|
- #define EXTIBMV 0x02 /* Enable 64-bit Table Ind. BMOV */
|
|
- #define EXDBMV 0x01 /* Enable 64-bit Direct BMOV */
|
|
-
|
|
-/*58*/ u16 nc_sbdl; /* Lowlevel: data from scsi data */
|
|
-/*5a*/ u16 nc_5a_;
|
|
-
|
|
-/*5c*/ u8 nc_scr0; /* Working register B */
|
|
-/*5d*/ u8 nc_scr1; /* */
|
|
-/*5e*/ u8 nc_scr2; /* */
|
|
-/*5f*/ u8 nc_scr3; /* */
|
|
-
|
|
-/*60*/ u8 nc_scrx[64]; /* Working register C-R */
|
|
-/*a0*/ u32 nc_mmrs; /* Memory Move Read Selector */
|
|
-/*a4*/ u32 nc_mmws; /* Memory Move Write Selector */
|
|
-/*a8*/ u32 nc_sfs; /* Script Fetch Selector */
|
|
-/*ac*/ u32 nc_drs; /* DSA Relative Selector */
|
|
-/*b0*/ u32 nc_sbms; /* Static Block Move Selector */
|
|
-/*b4*/ u32 nc_dbms; /* Dynamic Block Move Selector */
|
|
-/*b8*/ u32 nc_dnad64; /* DMA Next Address 64 */
|
|
-/*bc*/ u16 nc_scntl4; /* C1010 only */
|
|
- #define U3EN 0x80 /* Enable Ultra 3 */
|
|
- #define AIPEN 0x40 /* Allow check upper byte lanes */
|
|
- #define XCLKH_DT 0x08 /* Extra clock of data hold on DT
|
|
- transfer edge */
|
|
- #define XCLKH_ST 0x04 /* Extra clock of data hold on ST
|
|
- transfer edge */
|
|
-
|
|
-/*be*/ u8 nc_aipcntl0; /* Epat Control 1 C1010 only */
|
|
-/*bf*/ u8 nc_aipcntl1; /* AIP Control C1010_66 Only */
|
|
-
|
|
-/*c0*/ u32 nc_pmjad1; /* Phase Mismatch Jump Address 1 */
|
|
-/*c4*/ u32 nc_pmjad2; /* Phase Mismatch Jump Address 2 */
|
|
-/*c8*/ u8 nc_rbc; /* Remaining Byte Count */
|
|
-/*c9*/ u8 nc_rbc1; /* */
|
|
-/*ca*/ u8 nc_rbc2; /* */
|
|
-/*cb*/ u8 nc_rbc3; /* */
|
|
-
|
|
-/*cc*/ u8 nc_ua; /* Updated Address */
|
|
-/*cd*/ u8 nc_ua1; /* */
|
|
-/*ce*/ u8 nc_ua2; /* */
|
|
-/*cf*/ u8 nc_ua3; /* */
|
|
-/*d0*/ u32 nc_esa; /* Entry Storage Address */
|
|
-/*d4*/ u8 nc_ia; /* Instruction Address */
|
|
-/*d5*/ u8 nc_ia1;
|
|
-/*d6*/ u8 nc_ia2;
|
|
-/*d7*/ u8 nc_ia3;
|
|
-/*d8*/ u32 nc_sbc; /* SCSI Byte Count (3 bytes only) */
|
|
-/*dc*/ u32 nc_csbc; /* Cumulative SCSI Byte Count */
|
|
-
|
|
- /* Following for C1010 only */
|
|
-/*e0*/ u16 nc_crcpad; /* CRC Value */
|
|
-/*e2*/ u8 nc_crccntl0; /* CRC control register */
|
|
- #define SNDCRC 0x10 /* Send CRC Request */
|
|
-/*e3*/ u8 nc_crccntl1; /* CRC control register */
|
|
-/*e4*/ u32 nc_crcdata; /* CRC data register */
|
|
-/*e8*/ u32 nc_e8_; /* rsvd */
|
|
-/*ec*/ u32 nc_ec_; /* rsvd */
|
|
-/*f0*/ u16 nc_dfbc; /* DMA FIFO byte count */
|
|
-
|
|
-};
|
|
-
|
|
-/*-----------------------------------------------------------
|
|
-**
|
|
-** Utility macros for the script.
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-*/
|
|
-
|
|
-#define REGJ(p,r) (offsetof(struct ncr_reg, p ## r))
|
|
-#define REG(r) REGJ (nc_, r)
|
|
-
|
|
-typedef u32 ncrcmd;
|
|
-
|
|
-/*-----------------------------------------------------------
|
|
-**
|
|
-** SCSI phases
|
|
-**
|
|
-** DT phases illegal for ncr driver.
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-*/
|
|
-
|
|
-#define SCR_DATA_OUT 0x00000000
|
|
-#define SCR_DATA_IN 0x01000000
|
|
-#define SCR_COMMAND 0x02000000
|
|
-#define SCR_STATUS 0x03000000
|
|
-#define SCR_DT_DATA_OUT 0x04000000
|
|
-#define SCR_DT_DATA_IN 0x05000000
|
|
-#define SCR_MSG_OUT 0x06000000
|
|
-#define SCR_MSG_IN 0x07000000
|
|
-
|
|
-#define SCR_ILG_OUT 0x04000000
|
|
-#define SCR_ILG_IN 0x05000000
|
|
-
|
|
-/*-----------------------------------------------------------
|
|
-**
|
|
-** Data transfer via SCSI.
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-**
|
|
-** MOVE_ABS (LEN)
|
|
-** <<start address>>
|
|
-**
|
|
-** MOVE_IND (LEN)
|
|
-** <<dnad_offset>>
|
|
-**
|
|
-** MOVE_TBL
|
|
-** <<dnad_offset>>
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-*/
|
|
-
|
|
-#define OPC_MOVE 0x08000000
|
|
-
|
|
-#define SCR_MOVE_ABS(l) ((0x00000000 | OPC_MOVE) | (l))
|
|
-#define SCR_MOVE_IND(l) ((0x20000000 | OPC_MOVE) | (l))
|
|
-#define SCR_MOVE_TBL (0x10000000 | OPC_MOVE)
|
|
-
|
|
-#define SCR_CHMOV_ABS(l) ((0x00000000) | (l))
|
|
-#define SCR_CHMOV_IND(l) ((0x20000000) | (l))
|
|
-#define SCR_CHMOV_TBL (0x10000000)
|
|
-
|
|
-struct scr_tblmove {
|
|
- u32 size;
|
|
- u32 addr;
|
|
-};
|
|
-
|
|
-/*-----------------------------------------------------------
|
|
-**
|
|
-** Selection
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-**
|
|
-** SEL_ABS | SCR_ID (0..15) [ | REL_JMP]
|
|
-** <<alternate_address>>
|
|
-**
|
|
-** SEL_TBL | << dnad_offset>> [ | REL_JMP]
|
|
-** <<alternate_address>>
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-*/
|
|
-
|
|
-#define SCR_SEL_ABS 0x40000000
|
|
-#define SCR_SEL_ABS_ATN 0x41000000
|
|
-#define SCR_SEL_TBL 0x42000000
|
|
-#define SCR_SEL_TBL_ATN 0x43000000
|
|
-
|
|
-
|
|
-#ifdef SCSI_NCR_BIG_ENDIAN
|
|
-struct scr_tblsel {
|
|
- u8 sel_scntl3;
|
|
- u8 sel_id;
|
|
- u8 sel_sxfer;
|
|
- u8 sel_scntl4;
|
|
-};
|
|
-#else
|
|
-struct scr_tblsel {
|
|
- u8 sel_scntl4;
|
|
- u8 sel_sxfer;
|
|
- u8 sel_id;
|
|
- u8 sel_scntl3;
|
|
-};
|
|
-#endif
|
|
-
|
|
-#define SCR_JMP_REL 0x04000000
|
|
-#define SCR_ID(id) (((u32)(id)) << 16)
|
|
-
|
|
-/*-----------------------------------------------------------
|
|
-**
|
|
-** Waiting for Disconnect or Reselect
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-**
|
|
-** WAIT_DISC
|
|
-** dummy: <<alternate_address>>
|
|
-**
|
|
-** WAIT_RESEL
|
|
-** <<alternate_address>>
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-*/
|
|
-
|
|
-#define SCR_WAIT_DISC 0x48000000
|
|
-#define SCR_WAIT_RESEL 0x50000000
|
|
-
|
|
-/*-----------------------------------------------------------
|
|
-**
|
|
-** Bit Set / Reset
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-**
|
|
-** SET (flags {|.. })
|
|
-**
|
|
-** CLR (flags {|.. })
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-*/
|
|
-
|
|
-#define SCR_SET(f) (0x58000000 | (f))
|
|
-#define SCR_CLR(f) (0x60000000 | (f))
|
|
-
|
|
-#define SCR_CARRY 0x00000400
|
|
-#define SCR_TRG 0x00000200
|
|
-#define SCR_ACK 0x00000040
|
|
-#define SCR_ATN 0x00000008
|
|
-
|
|
-
|
|
-
|
|
-
|
|
-/*-----------------------------------------------------------
|
|
-**
|
|
-** Memory to memory move
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-**
|
|
-** COPY (bytecount)
|
|
-** << source_address >>
|
|
-** << destination_address >>
|
|
-**
|
|
-** SCR_COPY sets the NO FLUSH option by default.
|
|
-** SCR_COPY_F does not set this option.
|
|
-**
|
|
-** For chips which do not support this option,
|
|
-** ncr_copy_and_bind() will remove this bit.
|
|
-**-----------------------------------------------------------
|
|
-*/
|
|
-
|
|
-#define SCR_NO_FLUSH 0x01000000
|
|
-
|
|
-#define SCR_COPY(n) (0xc0000000 | SCR_NO_FLUSH | (n))
|
|
-#define SCR_COPY_F(n) (0xc0000000 | (n))
|
|
-
|
|
-/*-----------------------------------------------------------
|
|
-**
|
|
-** Register move and binary operations
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-**
|
|
-** SFBR_REG (reg, op, data) reg = SFBR op data
|
|
-** << 0 >>
|
|
-**
|
|
-** REG_SFBR (reg, op, data) SFBR = reg op data
|
|
-** << 0 >>
|
|
-**
|
|
-** REG_REG (reg, op, data) reg = reg op data
|
|
-** << 0 >>
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-** On 810A, 860, 825A, 875, 895 and 896 chips the content
|
|
-** of SFBR register can be used as data (SCR_SFBR_DATA).
|
|
-** The 896 has additionnal IO registers starting at
|
|
-** offset 0x80. Bit 7 of register offset is stored in
|
|
-** bit 7 of the SCRIPTS instruction first DWORD.
|
|
-**-----------------------------------------------------------
|
|
-*/
|
|
-
|
|
-#define SCR_REG_OFS(ofs) ((((ofs) & 0x7f) << 16ul) + ((ofs) & 0x80))
|
|
-
|
|
-#define SCR_SFBR_REG(reg,op,data) \
|
|
- (0x68000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
|
|
-
|
|
-#define SCR_REG_SFBR(reg,op,data) \
|
|
- (0x70000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
|
|
-
|
|
-#define SCR_REG_REG(reg,op,data) \
|
|
- (0x78000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
|
|
-
|
|
-
|
|
-#define SCR_LOAD 0x00000000
|
|
-#define SCR_SHL 0x01000000
|
|
-#define SCR_OR 0x02000000
|
|
-#define SCR_XOR 0x03000000
|
|
-#define SCR_AND 0x04000000
|
|
-#define SCR_SHR 0x05000000
|
|
-#define SCR_ADD 0x06000000
|
|
-#define SCR_ADDC 0x07000000
|
|
-
|
|
-#define SCR_SFBR_DATA (0x00800000>>8ul) /* Use SFBR as data */
|
|
-
|
|
-/*-----------------------------------------------------------
|
|
-**
|
|
-** FROM_REG (reg) SFBR = reg
|
|
-** << 0 >>
|
|
-**
|
|
-** TO_REG (reg) reg = SFBR
|
|
-** << 0 >>
|
|
-**
|
|
-** LOAD_REG (reg, data) reg = <data>
|
|
-** << 0 >>
|
|
-**
|
|
-** LOAD_SFBR(data) SFBR = <data>
|
|
-** << 0 >>
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-*/
|
|
-
|
|
-#define SCR_FROM_REG(reg) \
|
|
- SCR_REG_SFBR(reg,SCR_OR,0)
|
|
-
|
|
-#define SCR_TO_REG(reg) \
|
|
- SCR_SFBR_REG(reg,SCR_OR,0)
|
|
-
|
|
-#define SCR_LOAD_REG(reg,data) \
|
|
- SCR_REG_REG(reg,SCR_LOAD,data)
|
|
-
|
|
-#define SCR_LOAD_SFBR(data) \
|
|
- (SCR_REG_SFBR (gpreg, SCR_LOAD, data))
|
|
-
|
|
-/*-----------------------------------------------------------
|
|
-**
|
|
-** LOAD from memory to register.
|
|
-** STORE from register to memory.
|
|
-**
|
|
-** Only supported by 810A, 860, 825A, 875, 895 and 896.
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-**
|
|
-** LOAD_ABS (LEN)
|
|
-** <<start address>>
|
|
-**
|
|
-** LOAD_REL (LEN) (DSA relative)
|
|
-** <<dsa_offset>>
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-*/
|
|
-
|
|
-#define SCR_REG_OFS2(ofs) (((ofs) & 0xff) << 16ul)
|
|
-#define SCR_NO_FLUSH2 0x02000000
|
|
-#define SCR_DSA_REL2 0x10000000
|
|
-
|
|
-#define SCR_LOAD_R(reg, how, n) \
|
|
- (0xe1000000 | how | (SCR_REG_OFS2(REG(reg))) | (n))
|
|
-
|
|
-#define SCR_STORE_R(reg, how, n) \
|
|
- (0xe0000000 | how | (SCR_REG_OFS2(REG(reg))) | (n))
|
|
-
|
|
-#define SCR_LOAD_ABS(reg, n) SCR_LOAD_R(reg, SCR_NO_FLUSH2, n)
|
|
-#define SCR_LOAD_REL(reg, n) SCR_LOAD_R(reg, SCR_NO_FLUSH2|SCR_DSA_REL2, n)
|
|
-#define SCR_LOAD_ABS_F(reg, n) SCR_LOAD_R(reg, 0, n)
|
|
-#define SCR_LOAD_REL_F(reg, n) SCR_LOAD_R(reg, SCR_DSA_REL2, n)
|
|
-
|
|
-#define SCR_STORE_ABS(reg, n) SCR_STORE_R(reg, SCR_NO_FLUSH2, n)
|
|
-#define SCR_STORE_REL(reg, n) SCR_STORE_R(reg, SCR_NO_FLUSH2|SCR_DSA_REL2,n)
|
|
-#define SCR_STORE_ABS_F(reg, n) SCR_STORE_R(reg, 0, n)
|
|
-#define SCR_STORE_REL_F(reg, n) SCR_STORE_R(reg, SCR_DSA_REL2, n)
|
|
-
|
|
-
|
|
-/*-----------------------------------------------------------
|
|
-**
|
|
-** Waiting for Disconnect or Reselect
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-**
|
|
-** JUMP [ | IFTRUE/IFFALSE ( ... ) ]
|
|
-** <<address>>
|
|
-**
|
|
-** JUMPR [ | IFTRUE/IFFALSE ( ... ) ]
|
|
-** <<distance>>
|
|
-**
|
|
-** CALL [ | IFTRUE/IFFALSE ( ... ) ]
|
|
-** <<address>>
|
|
-**
|
|
-** CALLR [ | IFTRUE/IFFALSE ( ... ) ]
|
|
-** <<distance>>
|
|
-**
|
|
-** RETURN [ | IFTRUE/IFFALSE ( ... ) ]
|
|
-** <<dummy>>
|
|
-**
|
|
-** INT [ | IFTRUE/IFFALSE ( ... ) ]
|
|
-** <<ident>>
|
|
-**
|
|
-** INT_FLY [ | IFTRUE/IFFALSE ( ... ) ]
|
|
-** <<ident>>
|
|
-**
|
|
-** Conditions:
|
|
-** WHEN (phase)
|
|
-** IF (phase)
|
|
-** CARRYSET
|
|
-** DATA (data, mask)
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-*/
|
|
-
|
|
-#define SCR_NO_OP 0x80000000
|
|
-#define SCR_JUMP 0x80080000
|
|
-#define SCR_JUMP64 0x80480000
|
|
-#define SCR_JUMPR 0x80880000
|
|
-#define SCR_CALL 0x88080000
|
|
-#define SCR_CALLR 0x88880000
|
|
-#define SCR_RETURN 0x90080000
|
|
-#define SCR_INT 0x98080000
|
|
-#define SCR_INT_FLY 0x98180000
|
|
-
|
|
-#define IFFALSE(arg) (0x00080000 | (arg))
|
|
-#define IFTRUE(arg) (0x00000000 | (arg))
|
|
-
|
|
-#define WHEN(phase) (0x00030000 | (phase))
|
|
-#define IF(phase) (0x00020000 | (phase))
|
|
-
|
|
-#define DATA(D) (0x00040000 | ((D) & 0xff))
|
|
-#define MASK(D,M) (0x00040000 | (((M ^ 0xff) & 0xff) << 8ul)|((D) & 0xff))
|
|
-
|
|
-#define CARRYSET (0x00200000)
|
|
-
|
|
-/*-----------------------------------------------------------
|
|
-**
|
|
-** SCSI constants.
|
|
-**
|
|
-**-----------------------------------------------------------
|
|
-*/
|
|
-
|
|
-/*
|
|
-** Messages
|
|
-*/
|
|
-
|
|
-#define M_COMPLETE COMMAND_COMPLETE
|
|
-#define M_EXTENDED EXTENDED_MESSAGE
|
|
-#define M_SAVE_DP SAVE_POINTERS
|
|
-#define M_RESTORE_DP RESTORE_POINTERS
|
|
-#define M_DISCONNECT DISCONNECT
|
|
-#define M_ID_ERROR INITIATOR_ERROR
|
|
-#define M_ABORT ABORT_TASK_SET
|
|
-#define M_REJECT MESSAGE_REJECT
|
|
-#define M_NOOP NOP
|
|
-#define M_PARITY MSG_PARITY_ERROR
|
|
-#define M_LCOMPLETE LINKED_CMD_COMPLETE
|
|
-#define M_FCOMPLETE LINKED_FLG_CMD_COMPLETE
|
|
-#define M_RESET TARGET_RESET
|
|
-#define M_ABORT_TAG ABORT_TASK
|
|
-#define M_CLEAR_QUEUE CLEAR_TASK_SET
|
|
-#define M_INIT_REC INITIATE_RECOVERY
|
|
-#define M_REL_REC RELEASE_RECOVERY
|
|
-#define M_TERMINATE (0x11)
|
|
-#define M_SIMPLE_TAG SIMPLE_QUEUE_TAG
|
|
-#define M_HEAD_TAG HEAD_OF_QUEUE_TAG
|
|
-#define M_ORDERED_TAG ORDERED_QUEUE_TAG
|
|
-#define M_IGN_RESIDUE IGNORE_WIDE_RESIDUE
|
|
-#define M_IDENTIFY (0x80)
|
|
-
|
|
-#define M_X_MODIFY_DP EXTENDED_MODIFY_DATA_POINTER
|
|
-#define M_X_SYNC_REQ EXTENDED_SDTR
|
|
-#define M_X_WIDE_REQ EXTENDED_WDTR
|
|
-#define M_X_PPR_REQ EXTENDED_PPR
|
|
-
|
|
-/*
|
|
-** Status
|
|
-*/
|
|
-
|
|
-#define S_GOOD (0x00)
|
|
-#define S_CHECK_COND (0x02)
|
|
-#define S_COND_MET (0x04)
|
|
-#define S_BUSY (0x08)
|
|
-#define S_INT (0x10)
|
|
-#define S_INT_COND_MET (0x14)
|
|
-#define S_CONFLICT (0x18)
|
|
-#define S_TERMINATED (0x20)
|
|
-#define S_QUEUE_FULL (0x28)
|
|
-#define S_ILLEGAL (0xff)
|
|
-#define S_SENSE (0x80)
|
|
-
|
|
-/*
|
|
- * End of ncrreg from FreeBSD
|
|
- */
|
|
-
|
|
-#endif /* defined SYM53C8XX_DEFS_H */
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/serial/serial_core.c CVS2_6_15_RC7_PA0/drivers/serial/serial_core.c
|
|
--- LINUS_2_6_15_RC7/drivers/serial/serial_core.c 2005-12-27 13:25:49.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/serial/serial_core.c 2005-11-29 11:03:08.000000000 -0700
|
|
@@ -1961,6 +1961,7 @@
|
|
uart_report_port(struct uart_driver *drv, struct uart_port *port)
|
|
{
|
|
char address[64];
|
|
+ char irq[16];
|
|
|
|
switch (port->iotype) {
|
|
case UPIO_PORT:
|
|
@@ -1982,10 +1983,19 @@
|
|
break;
|
|
}
|
|
|
|
- printk(KERN_INFO "%s%s%s%d at %s (irq = %d) is a %s\n",
|
|
+#ifndef NO_IRQ
|
|
+#define NO_IRQ (-1)
|
|
+#endif
|
|
+ if (port->irq == NO_IRQ) {
|
|
+ strlcpy(irq, "polled", sizeof(irq));
|
|
+ } else {
|
|
+ snprintf(irq, sizeof(irq), "irq = %d", port->irq);
|
|
+ }
|
|
+
|
|
+ printk(KERN_INFO "%s%s%s%d at %s (%s) is a %s\n",
|
|
port->dev ? port->dev->bus_id : "",
|
|
port->dev ? ": " : "",
|
|
- drv->dev_name, port->line, address, port->irq, uart_type(port));
|
|
+ drv->dev_name, port->line, address, irq, uart_type(port));
|
|
}
|
|
|
|
static void
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/usb/input/hid-core.c CVS2_6_15_RC7_PA0/drivers/usb/input/hid-core.c
|
|
--- LINUS_2_6_15_RC7/drivers/usb/input/hid-core.c 2005-12-27 13:25:50.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/usb/input/hid-core.c 2005-12-19 05:42:37.000000000 -0700
|
|
@@ -760,21 +760,31 @@
|
|
}
|
|
|
|
/*
|
|
- * Extract/implement a data field from/to a report.
|
|
+ * Extract/implement a data field from/to a little endian report (bit array).
|
|
*/
|
|
|
|
static __inline__ __u32 extract(__u8 *report, unsigned offset, unsigned n)
|
|
{
|
|
- report += (offset >> 5) << 2; offset &= 31;
|
|
- return (le64_to_cpu(get_unaligned((__le64*)report)) >> offset) & ((1ULL << n) - 1);
|
|
+ u32 x;
|
|
+
|
|
+ report += offset >> 3; /* adjust byte index */
|
|
+ offset &= 8 - 1;
|
|
+ x = get_unaligned((u32 *) report);
|
|
+ x = le32_to_cpu(x);
|
|
+ x = (x >> offset) & ((1 << n) - 1);
|
|
+ return x;
|
|
}
|
|
|
|
static __inline__ void implement(__u8 *report, unsigned offset, unsigned n, __u32 value)
|
|
{
|
|
- report += (offset >> 5) << 2; offset &= 31;
|
|
- put_unaligned((get_unaligned((__le64*)report)
|
|
- & cpu_to_le64(~((((__u64) 1 << n) - 1) << offset)))
|
|
- | cpu_to_le64((__u64)value << offset), (__le64*)report);
|
|
+ u32 x;
|
|
+
|
|
+ report += offset >> 3;
|
|
+ offset &= 8 - 1;
|
|
+ x = get_unaligned((u32 *)report);
|
|
+ x &= cpu_to_le32(~((((__u32) 1 << n) - 1) << offset));
|
|
+ x |= cpu_to_le32(value << offset);
|
|
+ put_unaligned(x,(u32 *)report);
|
|
}
|
|
|
|
/*
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/drivers/video/stifb.c CVS2_6_15_RC7_PA0/drivers/video/stifb.c
|
|
--- LINUS_2_6_15_RC7/drivers/video/stifb.c 2005-12-27 13:25:50.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/drivers/video/stifb.c 2005-12-19 08:32:13.000000000 -0700
|
|
@@ -3,7 +3,7 @@
|
|
* Low level Frame buffer driver for HP workstations with
|
|
* STI (standard text interface) video firmware.
|
|
*
|
|
- * Copyright (C) 2001-2004 Helge Deller <deller@gmx.de>
|
|
+ * Copyright (C) 2001-2005 Helge Deller <deller@gmx.de>
|
|
* Portions Copyright (C) 2001 Thomas Bogendoerfer <tsbogend@alpha.franken.de>
|
|
*
|
|
* Based on:
|
|
@@ -73,16 +73,13 @@
|
|
#include "sticore.h"
|
|
|
|
/* REGION_BASE(fb_info, index) returns the virtual address for region <index> */
|
|
-#ifdef __LP64__
|
|
- #define REGION_BASE(fb_info, index) \
|
|
- (fb_info->sti->glob_cfg->region_ptrs[index] | 0xffffffff00000000)
|
|
-#else
|
|
- #define REGION_BASE(fb_info, index) \
|
|
- fb_info->sti->glob_cfg->region_ptrs[index]
|
|
-#endif
|
|
+#define REGION_BASE(fb_info, index) \
|
|
+ F_EXTEND(fb_info->sti->glob_cfg->region_ptrs[index])
|
|
|
|
#define NGLEDEVDEPROM_CRT_REGION 1
|
|
|
|
+#define NR_PALETTE 256
|
|
+
|
|
typedef struct {
|
|
__s32 video_config_reg;
|
|
__s32 misc_video_start;
|
|
@@ -112,7 +109,7 @@
|
|
ngle_rom_t ngle_rom;
|
|
struct sti_struct *sti;
|
|
int deviceSpecificConfig;
|
|
- u32 pseudo_palette[256];
|
|
+ u32 pseudo_palette[16];
|
|
};
|
|
|
|
static int __initdata stifb_bpp_pref[MAX_STI_ROMS];
|
|
@@ -352,10 +349,10 @@
|
|
#define IS_888_DEVICE(fb) \
|
|
(!(IS_24_DEVICE(fb)))
|
|
|
|
-#define GET_FIFO_SLOTS(fb, cnt, numslots) \
|
|
-{ while (cnt < numslots) \
|
|
+#define GET_FIFO_SLOTS(fb, cnt, numslots) \
|
|
+{ while (cnt < numslots) \
|
|
cnt = READ_WORD(fb, REG_34); \
|
|
- cnt -= numslots; \
|
|
+ cnt -= numslots; \
|
|
}
|
|
|
|
#define IndexedDcd 0 /* Pixel data is indexed (pseudo) color */
|
|
@@ -995,7 +992,7 @@
|
|
struct stifb_info *fb = (struct stifb_info *) info;
|
|
u32 color;
|
|
|
|
- if (regno >= 256) /* no. of hw registers */
|
|
+ if (regno >= NR_PALETTE)
|
|
return 1;
|
|
|
|
red >>= 8;
|
|
@@ -1005,8 +1002,8 @@
|
|
DEBUG_OFF();
|
|
|
|
START_IMAGE_COLORMAP_ACCESS(fb);
|
|
-
|
|
- if (fb->info.var.grayscale) {
|
|
+
|
|
+ if (unlikely(fb->info.var.grayscale)) {
|
|
/* gray = 0.30*R + 0.59*G + 0.11*B */
|
|
color = ((red * 77) +
|
|
(green * 151) +
|
|
@@ -1017,17 +1014,17 @@
|
|
(blue));
|
|
}
|
|
|
|
- if (info->var.bits_per_pixel == 32) {
|
|
- ((u32 *)(info->pseudo_palette))[regno] =
|
|
- (red << info->var.red.offset) |
|
|
- (green << info->var.green.offset) |
|
|
- (blue << info->var.blue.offset);
|
|
- } else {
|
|
- ((u32 *)(info->pseudo_palette))[regno] = regno;
|
|
+ if (fb->info.fix.visual == FB_VISUAL_DIRECTCOLOR) {
|
|
+ struct fb_var_screeninfo *var = &fb->info.var;
|
|
+ if (regno < 16)
|
|
+ ((u32 *)fb->info.pseudo_palette)[regno] =
|
|
+ regno << var->red.offset |
|
|
+ regno << var->green.offset |
|
|
+ regno << var->blue.offset;
|
|
}
|
|
|
|
WRITE_IMAGE_COLOR(fb, regno, color);
|
|
-
|
|
+
|
|
if (fb->id == S9000_ID_HCRX) {
|
|
NgleLutBltCtl lutBltCtl;
|
|
|
|
@@ -1066,9 +1063,9 @@
|
|
case S9000_ID_HCRX:
|
|
HYPER_ENABLE_DISABLE_DISPLAY(fb, enable);
|
|
break;
|
|
- case S9000_ID_A1659A:; /* fall through */
|
|
- case S9000_ID_TIMBER:;
|
|
- case CRX24_OVERLAY_PLANES:;
|
|
+ case S9000_ID_A1659A: /* fall through */
|
|
+ case S9000_ID_TIMBER:
|
|
+ case CRX24_OVERLAY_PLANES:
|
|
default:
|
|
ENABLE_DISABLE_DISPLAY(fb, enable);
|
|
break;
|
|
@@ -1250,12 +1247,10 @@
|
|
memset(&fb->ngle_rom, 0, sizeof(fb->ngle_rom));
|
|
if ((fb->sti->regions_phys[0] & 0xfc000000) ==
|
|
(fb->sti->regions_phys[2] & 0xfc000000))
|
|
- sti_rom_address = fb->sti->regions_phys[0];
|
|
+ sti_rom_address = F_EXTEND(fb->sti->regions_phys[0]);
|
|
else
|
|
- sti_rom_address = fb->sti->regions_phys[1];
|
|
-#ifdef __LP64__
|
|
- sti_rom_address |= 0xffffffff00000000;
|
|
-#endif
|
|
+ sti_rom_address = F_EXTEND(fb->sti->regions_phys[1]);
|
|
+
|
|
fb->deviceSpecificConfig = gsc_readl(sti_rom_address);
|
|
if (IS_24_DEVICE(fb)) {
|
|
if (bpp_pref == 8 || bpp_pref == 32)
|
|
@@ -1315,7 +1310,7 @@
|
|
break;
|
|
case 32:
|
|
fix->type = FB_TYPE_PACKED_PIXELS;
|
|
- fix->visual = FB_VISUAL_TRUECOLOR;
|
|
+ fix->visual = FB_VISUAL_DIRECTCOLOR;
|
|
var->red.length = var->green.length = var->blue.length = var->transp.length = 8;
|
|
var->blue.offset = 0;
|
|
var->green.offset = 8;
|
|
@@ -1337,7 +1332,7 @@
|
|
info->pseudo_palette = &fb->pseudo_palette;
|
|
|
|
/* This has to been done !!! */
|
|
- fb_alloc_cmap(&info->cmap, 256, 0);
|
|
+ fb_alloc_cmap(&info->cmap, NR_PALETTE, 0);
|
|
stifb_init_display(fb);
|
|
|
|
if (!request_mem_region(fix->smem_start, fix->smem_len, "stifb fb")) {
|
|
@@ -1488,7 +1483,3 @@
|
|
MODULE_AUTHOR("Helge Deller <deller@gmx.de>, Thomas Bogendoerfer <tsbogend@alpha.franken.de>");
|
|
MODULE_DESCRIPTION("Framebuffer driver for HP's NGLE series graphics cards in HP PARISC machines");
|
|
MODULE_LICENSE("GPL v2");
|
|
-
|
|
-MODULE_PARM(bpp, "i");
|
|
-MODULE_PARM_DESC(mem, "Bits per pixel (default: 8)");
|
|
-
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/asm-generic/compat_signal.h CVS2_6_15_RC7_PA0/include/asm-generic/compat_signal.h
|
|
--- LINUS_2_6_15_RC7/include/asm-generic/compat_signal.h 1969-12-31 17:00:00.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/asm-generic/compat_signal.h 2004-01-27 22:12:47.000000000 -0700
|
|
@@ -0,0 +1,25 @@
|
|
+#ifndef _ASM_GENERIC_COMPAT_SIGNAL_H
|
|
+#define _ASM_GENERIC_COMPAT_SIGNAL_H
|
|
+
|
|
+#ifndef __ASSEMBLY__
|
|
+#include <linux/compat.h>
|
|
+
|
|
+typedef compat_uptr_t compat_sighandler_t;
|
|
+
|
|
+typedef struct compat_sigaltstack {
|
|
+ compat_uptr_t ss_sp;
|
|
+ compat_int_t ss_flags;
|
|
+ compat_size_t ss_size;
|
|
+} compat_stack_t;
|
|
+
|
|
+/* Most things should be clean enough to redefine this at will, if care
|
|
+ is taken to make libc match. */
|
|
+
|
|
+struct compat_sigaction {
|
|
+ compat_sighandler_t sa_handler;
|
|
+ compat_uint_t sa_flags;
|
|
+ compat_sigset_t sa_mask; /* mask last for extensibility */
|
|
+};
|
|
+
|
|
+#endif /* !__ASSEMBLY__ */
|
|
+#endif /* !_ASM_GENERIC_COMPAT_SIGNAL_H */
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/asm-ia64/compat.h CVS2_6_15_RC7_PA0/include/asm-ia64/compat.h
|
|
--- LINUS_2_6_15_RC7/include/asm-ia64/compat.h 2005-12-27 13:25:53.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/asm-ia64/compat.h 2005-09-14 06:57:31.000000000 -0600
|
|
@@ -15,6 +15,9 @@
|
|
typedef s32 compat_pid_t;
|
|
typedef u16 __compat_uid_t;
|
|
typedef u16 __compat_gid_t;
|
|
+/* Define for use in compat_siginfo_t */
|
|
+#undef __ARCH_SI_COMPAT_UID_T
|
|
+#define __ARCH_SI_COMPAT_UID_T __compat_uid32_t
|
|
typedef u32 __compat_uid32_t;
|
|
typedef u32 __compat_gid32_t;
|
|
typedef u16 compat_mode_t;
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/asm-parisc/cache.h CVS2_6_15_RC7_PA0/include/asm-parisc/cache.h
|
|
--- LINUS_2_6_15_RC7/include/asm-parisc/cache.h 2005-12-27 13:25:54.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/asm-parisc/cache.h 2005-12-16 06:02:55.000000000 -0700
|
|
@@ -30,14 +30,14 @@
|
|
#define SMP_CACHE_BYTES L1_CACHE_BYTES
|
|
#define L1_CACHE_SHIFT_MAX 5 /* largest L1 which this arch supports */
|
|
|
|
-extern void flush_data_cache_local(void); /* flushes local data-cache only */
|
|
-extern void flush_instruction_cache_local(void); /* flushes local code-cache only */
|
|
+extern void flush_data_cache_local(void *); /* flushes local data-cache only */
|
|
+extern void flush_instruction_cache_local(void *); /* flushes local code-cache only */
|
|
#ifdef CONFIG_SMP
|
|
extern void flush_data_cache(void); /* flushes data-cache only (all processors) */
|
|
extern void flush_instruction_cache(void); /* flushes i-cache only (all processors) */
|
|
#else
|
|
-#define flush_data_cache flush_data_cache_local
|
|
-#define flush_instruction_cache flush_instruction_cache_local
|
|
+#define flush_data_cache() flush_data_cache_local(NULL)
|
|
+#define flush_instruction_cache() flush_instruction_cache_local(NULL)
|
|
#endif
|
|
|
|
extern void parisc_cache_init(void); /* initializes cache-flushing */
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/asm-parisc/io.h CVS2_6_15_RC7_PA0/include/asm-parisc/io.h
|
|
--- LINUS_2_6_15_RC7/include/asm-parisc/io.h 2005-12-27 13:25:54.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/asm-parisc/io.h 2005-12-23 19:01:55.000000000 -0700
|
|
@@ -41,7 +41,7 @@
|
|
#define __raw_check_addr(addr) \
|
|
if (((unsigned long)addr >> NYBBLE_SHIFT) != 0xe) \
|
|
__raw_bad_addr(addr); \
|
|
- addr = (void *)((unsigned long)addr | (0xfUL << NYBBLE_SHIFT));
|
|
+ addr = (void __iomem *)((unsigned long)addr | (0xfUL << NYBBLE_SHIFT));
|
|
#else
|
|
#define gsc_check_addr(addr)
|
|
#define __raw_check_addr(addr)
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/asm-parisc/page.h CVS2_6_15_RC7_PA0/include/asm-parisc/page.h
|
|
--- LINUS_2_6_15_RC7/include/asm-parisc/page.h 2005-12-27 13:25:54.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/asm-parisc/page.h 2005-12-12 14:28:25.000000000 -0700
|
|
@@ -135,6 +135,13 @@
|
|
#define pfn_valid(pfn) ((pfn) < max_mapnr)
|
|
#endif /* CONFIG_DISCONTIGMEM */
|
|
|
|
+#ifdef CONFIG_HUGETLB_PAGE
|
|
+#define HPAGE_SHIFT 22 /* 4MB (is this fixed?) */
|
|
+#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
|
|
+#define HPAGE_MASK (~(HPAGE_SIZE - 1))
|
|
+#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
|
|
+#endif
|
|
+
|
|
#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
|
|
|
|
#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/asm-parisc/pci.h CVS2_6_15_RC7_PA0/include/asm-parisc/pci.h
|
|
--- LINUS_2_6_15_RC7/include/asm-parisc/pci.h 2005-12-27 13:25:54.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/asm-parisc/pci.h 2005-12-15 12:34:46.000000000 -0700
|
|
@@ -84,11 +84,17 @@
|
|
/*
|
|
** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses.
|
|
** See pcibios.c for more conversions used by Generic PCI code.
|
|
+**
|
|
+** Platform characteristics/firmware guarantee that
|
|
+** (1) PA_VIEW - IO_VIEW = lmmio_offset for both LMMIO and ELMMIO
|
|
+** (2) PA_VIEW == IO_VIEW for GMMIO
|
|
*/
|
|
#define PCI_BUS_ADDR(hba,a) (PCI_IS_LMMIO(hba,a) \
|
|
? ((a) - hba->lmmio_space_offset) /* mangle LMMIO */ \
|
|
: (a)) /* GMMIO */
|
|
-#define PCI_HOST_ADDR(hba,a) ((a) + hba->lmmio_space_offset)
|
|
+#define PCI_HOST_ADDR(hba,a) (((a) & PCI_F_EXTEND) == 0 \
|
|
+ ? (a) + hba->lmmio_space_offset \
|
|
+ : (a))
|
|
|
|
#else /* !CONFIG_64BIT */
|
|
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/asm-parisc/processor.h CVS2_6_15_RC7_PA0/include/asm-parisc/processor.h
|
|
--- LINUS_2_6_15_RC7/include/asm-parisc/processor.h 2005-12-27 13:25:54.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/asm-parisc/processor.h 2005-12-23 19:03:24.000000000 -0700
|
|
@@ -144,16 +144,16 @@
|
|
})
|
|
|
|
#define INIT_THREAD { \
|
|
- regs: { gr: { 0, }, \
|
|
- fr: { 0, }, \
|
|
- sr: { 0, }, \
|
|
- iasq: { 0, }, \
|
|
- iaoq: { 0, }, \
|
|
- cr27: 0, \
|
|
+ .regs = { .gr = { 0, }, \
|
|
+ .fr = { 0, }, \
|
|
+ .sr = { 0, }, \
|
|
+ .iasq = { 0, }, \
|
|
+ .iaoq = { 0, }, \
|
|
+ .cr27 = 0, \
|
|
}, \
|
|
- task_size: DEFAULT_TASK_SIZE, \
|
|
- map_base: DEFAULT_MAP_BASE, \
|
|
- flags: 0 \
|
|
+ .task_size = DEFAULT_TASK_SIZE, \
|
|
+ .map_base = DEFAULT_MAP_BASE, \
|
|
+ .flags = 0 \
|
|
}
|
|
|
|
/*
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/asm-parisc/tlbflush.h CVS2_6_15_RC7_PA0/include/asm-parisc/tlbflush.h
|
|
--- LINUS_2_6_15_RC7/include/asm-parisc/tlbflush.h 2005-12-27 13:25:54.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/asm-parisc/tlbflush.h 2005-12-15 11:12:46.000000000 -0700
|
|
@@ -22,6 +22,7 @@
|
|
#define purge_tlb_end(x) spin_unlock(&pa_tlb_lock)
|
|
|
|
extern void flush_tlb_all(void);
|
|
+extern void flush_tlb_all_local(void *);
|
|
|
|
/*
|
|
* flush_tlb_mm()
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/asm-s390/compat.h CVS2_6_15_RC7_PA0/include/asm-s390/compat.h
|
|
--- LINUS_2_6_15_RC7/include/asm-s390/compat.h 2005-12-27 13:25:54.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/asm-s390/compat.h 2005-09-14 06:57:44.000000000 -0600
|
|
@@ -15,6 +15,9 @@
|
|
typedef s32 compat_pid_t;
|
|
typedef u16 __compat_uid_t;
|
|
typedef u16 __compat_gid_t;
|
|
+/* Define for use in compat_siginfo_t */
|
|
+#undef __ARCH_SI_COMPAT_UID_T
|
|
+#define __ARCH_SI_COMPAT_UID_T __compat_uid32_t
|
|
typedef u32 __compat_uid32_t;
|
|
typedef u32 __compat_gid32_t;
|
|
typedef u16 compat_mode_t;
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/asm-sparc64/compat.h CVS2_6_15_RC7_PA0/include/asm-sparc64/compat.h
|
|
--- LINUS_2_6_15_RC7/include/asm-sparc64/compat.h 2005-12-27 13:25:54.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/asm-sparc64/compat.h 2005-09-14 06:57:45.000000000 -0600
|
|
@@ -14,6 +14,9 @@
|
|
typedef s32 compat_pid_t;
|
|
typedef u16 __compat_uid_t;
|
|
typedef u16 __compat_gid_t;
|
|
+/* Define for use in the compat_siginfo_t */
|
|
+#undef __ARCH_SI_COMPAT_UID_T
|
|
+#define __ARCH_SI_COMPAT_UID_T compat_uint_t
|
|
typedef u32 __compat_uid32_t;
|
|
typedef u32 __compat_gid32_t;
|
|
typedef u16 compat_mode_t;
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/asm-x86_64/compat.h CVS2_6_15_RC7_PA0/include/asm-x86_64/compat.h
|
|
--- LINUS_2_6_15_RC7/include/asm-x86_64/compat.h 2005-12-27 13:25:55.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/asm-x86_64/compat.h 2005-11-12 20:29:21.000000000 -0700
|
|
@@ -16,6 +16,9 @@
|
|
typedef s32 compat_pid_t;
|
|
typedef u16 __compat_uid_t;
|
|
typedef u16 __compat_gid_t;
|
|
+/* Define for use in compat_siginfo_t */
|
|
+#undef __ARCH_SI_COMPAT_UID_T
|
|
+#define __ARCH_SI_COMPAT_UID_T __compat_uid32_t
|
|
typedef u32 __compat_uid32_t;
|
|
typedef u32 __compat_gid32_t;
|
|
typedef u16 compat_mode_t;
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/asm-x86_64/ia32.h CVS2_6_15_RC7_PA0/include/asm-x86_64/ia32.h
|
|
--- LINUS_2_6_15_RC7/include/asm-x86_64/ia32.h 2005-12-27 13:25:55.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/asm-x86_64/ia32.h 2005-11-19 22:09:34.000000000 -0700
|
|
@@ -6,6 +6,7 @@
|
|
#ifdef CONFIG_IA32_EMULATION
|
|
|
|
#include <linux/compat.h>
|
|
+#include <linux/compat_siginfo.h>
|
|
|
|
/*
|
|
* 32 bit structures for IA32 support.
|
|
@@ -78,58 +79,6 @@
|
|
unsigned long long st_ino;
|
|
} __attribute__((packed));
|
|
|
|
-typedef struct compat_siginfo{
|
|
- int si_signo;
|
|
- int si_errno;
|
|
- int si_code;
|
|
-
|
|
- union {
|
|
- int _pad[((128/sizeof(int)) - 3)];
|
|
-
|
|
- /* kill() */
|
|
- struct {
|
|
- unsigned int _pid; /* sender's pid */
|
|
- unsigned int _uid; /* sender's uid */
|
|
- } _kill;
|
|
-
|
|
- /* POSIX.1b timers */
|
|
- struct {
|
|
- compat_timer_t _tid; /* timer id */
|
|
- int _overrun; /* overrun count */
|
|
- compat_sigval_t _sigval; /* same as below */
|
|
- int _sys_private; /* not to be passed to user */
|
|
- int _overrun_incr; /* amount to add to overrun */
|
|
- } _timer;
|
|
-
|
|
- /* POSIX.1b signals */
|
|
- struct {
|
|
- unsigned int _pid; /* sender's pid */
|
|
- unsigned int _uid; /* sender's uid */
|
|
- compat_sigval_t _sigval;
|
|
- } _rt;
|
|
-
|
|
- /* SIGCHLD */
|
|
- struct {
|
|
- unsigned int _pid; /* which child */
|
|
- unsigned int _uid; /* sender's uid */
|
|
- int _status; /* exit code */
|
|
- compat_clock_t _utime;
|
|
- compat_clock_t _stime;
|
|
- } _sigchld;
|
|
-
|
|
- /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
|
|
- struct {
|
|
- unsigned int _addr; /* faulting insn/memory ref. */
|
|
- } _sigfault;
|
|
-
|
|
- /* SIGPOLL */
|
|
- struct {
|
|
- int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
|
|
- int _fd;
|
|
- } _sigpoll;
|
|
- } _sifields;
|
|
-} compat_siginfo_t;
|
|
-
|
|
struct sigframe32
|
|
{
|
|
u32 pretcode;
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/linux/cache.h CVS2_6_15_RC7_PA0/include/linux/cache.h
|
|
--- LINUS_2_6_15_RC7/include/linux/cache.h 2005-12-27 13:25:55.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/linux/cache.h 2005-12-19 05:42:41.000000000 -0700
|
|
@@ -13,7 +13,7 @@
|
|
#define SMP_CACHE_BYTES L1_CACHE_BYTES
|
|
#endif
|
|
|
|
-#if defined(CONFIG_X86) || defined(CONFIG_SPARC64) || defined(CONFIG_IA64)
|
|
+#if defined(CONFIG_X86) || defined(CONFIG_SPARC64) || defined(CONFIG_IA64) || defined(CONFIG_PARISC)
|
|
#define __read_mostly __attribute__((__section__(".data.read_mostly")))
|
|
#else
|
|
#define __read_mostly
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/linux/compat.h CVS2_6_15_RC7_PA0/include/linux/compat.h
|
|
--- LINUS_2_6_15_RC7/include/linux/compat.h 2005-12-27 13:25:55.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/linux/compat.h 2005-09-14 06:57:49.000000000 -0600
|
|
@@ -6,10 +6,16 @@
|
|
*/
|
|
#include <linux/config.h>
|
|
|
|
-#ifdef CONFIG_COMPAT
|
|
+#ifndef CONFIG_COMPAT
|
|
+
|
|
+/* Non-native task requiring compat... doesn't exist */
|
|
+#define is_compat_task(x) 0
|
|
+
|
|
+#else
|
|
|
|
#include <linux/stat.h>
|
|
#include <linux/param.h> /* for HZ */
|
|
+#include <linux/personality.h> /* Conditional process compat */
|
|
#include <linux/sem.h>
|
|
|
|
#include <asm/compat.h>
|
|
@@ -18,6 +24,11 @@
|
|
#define compat_jiffies_to_clock_t(x) \
|
|
(((unsigned long)(x) * COMPAT_USER_HZ) / HZ)
|
|
|
|
+/* Non-native task requiring compat */
|
|
+#ifndef HAVE_ARCH_IS_COMPAT_TASK
|
|
+#define is_compat_task(x) (personality(x->personality) == PER_LINUX32)
|
|
+#endif
|
|
+
|
|
typedef __compat_uid32_t compat_uid_t;
|
|
typedef __compat_gid32_t compat_gid_t;
|
|
|
|
@@ -99,28 +110,6 @@
|
|
char d_name[256];
|
|
};
|
|
|
|
-typedef union compat_sigval {
|
|
- compat_int_t sival_int;
|
|
- compat_uptr_t sival_ptr;
|
|
-} compat_sigval_t;
|
|
-
|
|
-#define COMPAT_SIGEV_PAD_SIZE ((SIGEV_MAX_SIZE/sizeof(int)) - 3)
|
|
-
|
|
-typedef struct compat_sigevent {
|
|
- compat_sigval_t sigev_value;
|
|
- compat_int_t sigev_signo;
|
|
- compat_int_t sigev_notify;
|
|
- union {
|
|
- compat_int_t _pad[COMPAT_SIGEV_PAD_SIZE];
|
|
- compat_int_t _tid;
|
|
-
|
|
- struct {
|
|
- compat_uptr_t _function;
|
|
- compat_uptr_t _attribute;
|
|
- } _sigev_thread;
|
|
- } _sigev_un;
|
|
-} compat_sigevent_t;
|
|
-
|
|
|
|
long compat_sys_semctl(int first, int second, int third, void __user *uptr);
|
|
long compat_sys_msgsnd(int first, int second, int third, void __user *uptr);
|
|
@@ -156,10 +145,6 @@
|
|
unsigned long bitmap_size);
|
|
long compat_put_bitmap(compat_ulong_t __user *umask, unsigned long *mask,
|
|
unsigned long bitmap_size);
|
|
-int copy_siginfo_from_user32(siginfo_t *to, struct compat_siginfo __user *from);
|
|
-int copy_siginfo_to_user32(struct compat_siginfo __user *to, siginfo_t *from);
|
|
-int get_compat_sigevent(struct sigevent *event,
|
|
- const struct compat_sigevent __user *u_event);
|
|
|
|
#endif /* CONFIG_COMPAT */
|
|
#endif /* _LINUX_COMPAT_H */
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/linux/compat_siginfo.h CVS2_6_15_RC7_PA0/include/linux/compat_siginfo.h
|
|
--- LINUS_2_6_15_RC7/include/linux/compat_siginfo.h 1969-12-31 17:00:00.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/linux/compat_siginfo.h 2005-08-02 08:33:30.000000000 -0600
|
|
@@ -0,0 +1,182 @@
|
|
+#ifndef _ASM_GENERIC_COMPAT_SIGINFO_H
|
|
+#define _ASM_GENERIC_COMPAT_SIGINFO_H
|
|
+
|
|
+#include <linux/config.h>
|
|
+#include <linux/compat.h>
|
|
+
|
|
+#ifndef CONFIG_COMPAT
|
|
+
|
|
+/* No compatibility layer required, add empty definitions for the compiler */
|
|
+
|
|
+typedef struct compat_siginfo{
|
|
+} compat_siginfo_t;
|
|
+
|
|
+static inline int compat_copy_siginfo_to_user(compat_siginfo_t __user *to,
|
|
+ struct siginfo *from)
|
|
+{
|
|
+ return -1;
|
|
+}
|
|
+
|
|
+static inline int compat_copy_siginfo_from_user(struct siginfo *to,
|
|
+ compat_siginfo_t __user *from)
|
|
+{
|
|
+ return -1;
|
|
+}
|
|
+
|
|
+#else
|
|
+
|
|
+#include <linux/compiler.h>
|
|
+#include <asm/siginfo.h>
|
|
+
|
|
+/* compat view of sigval_t */
|
|
+typedef union compat_sigval {
|
|
+ compat_int_t sival_int;
|
|
+ compat_uptr_t sival_ptr;
|
|
+} compat_sigval_t;
|
|
+
|
|
+/*
|
|
+ * This is the size (including padding) of the part of the
|
|
+ * struct siginfo that is before the union.
|
|
+ */
|
|
+#ifndef __ARCH_SI_COMPAT_PREAMBLE_SIZE
|
|
+#define __ARCH_SI_COMPAT_PREAMBLE_SIZE (3 * sizeof(compat_int_t))
|
|
+#endif
|
|
+
|
|
+#define SI_COMPAT_MAX_SIZE 128
|
|
+#ifndef SI_COMPAT_PAD_SIZE
|
|
+#define SI_COMPAT_PAD_SIZE \
|
|
+ ((SI_COMPAT_MAX_SIZE - __ARCH_SI_COMPAT_PREAMBLE_SIZE) / sizeof(compat_int_t))
|
|
+#endif
|
|
+
|
|
+/* 32-bit view of si.uid_t */
|
|
+#ifndef __ARCH_SI_COMPAT_UID_T
|
|
+#define __ARCH_SI_COMPAT_UID_T compat_uid_t
|
|
+#endif
|
|
+
|
|
+/* 32-bit view of si.band_t */
|
|
+#ifndef __ARCH_SI_COMPAT_BAND_T
|
|
+#define __ARCH_SI_COMPAT_BAND_T compat_int_t
|
|
+#endif
|
|
+
|
|
+#ifndef HAVE_ARCH_COMPAT_SIGINFO_T
|
|
+
|
|
+/* Compat view of siginfo_t */
|
|
+typedef struct compat_siginfo {
|
|
+ compat_int_t si_signo;
|
|
+ compat_int_t si_errno;
|
|
+ compat_int_t si_code;
|
|
+
|
|
+ union {
|
|
+ compat_int_t _pad[SI_COMPAT_PAD_SIZE];
|
|
+
|
|
+ /* kill() */
|
|
+ struct {
|
|
+ compat_pid_t _pid; /* sender's pid */
|
|
+ __ARCH_SI_COMPAT_UID_T _uid; /* sender's uid */
|
|
+ } _kill;
|
|
+
|
|
+ /* POSIX.1b timers */
|
|
+ struct {
|
|
+ compat_timer_t _tid; /* timer id */
|
|
+ compat_int_t _overrun; /* overrun count */
|
|
+ char _pad[sizeof(__ARCH_SI_COMPAT_UID_T) - sizeof(compat_int_t)];
|
|
+ compat_sigval_t _sigval; /* same as below */
|
|
+ compat_int_t _sys_private; /* not to be passed to user */
|
|
+ } _timer;
|
|
+
|
|
+ /* POSIX.1b signals */
|
|
+ struct {
|
|
+ compat_pid_t _pid; /* sender's pid */
|
|
+ __ARCH_SI_COMPAT_UID_T _uid; /* sender's uid */
|
|
+ compat_sigval_t _sigval;
|
|
+ } _rt;
|
|
+
|
|
+ /* SIGCHLD */
|
|
+ struct {
|
|
+ compat_pid_t _pid; /* which child */
|
|
+ __ARCH_SI_COMPAT_UID_T _uid; /* sender's uid */
|
|
+ compat_int_t _status; /* exit code */
|
|
+ compat_clock_t _utime;
|
|
+ compat_clock_t _stime;
|
|
+ } _sigchld;
|
|
+
|
|
+ /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
|
|
+ struct {
|
|
+ compat_uptr_t _addr; /* faulting insn/memory ref. */
|
|
+#ifdef __ARCH_SI_COMPAT_TRAPNO
|
|
+ compat_int_t _trapno; /* TRAP # which caused the signal */
|
|
+#endif
|
|
+ } _sigfault;
|
|
+
|
|
+ /* SIGPOLL */
|
|
+ struct {
|
|
+ __ARCH_SI_COMPAT_BAND_T _band; /* POLL_IN, POLL_OUT, POLL_MSG */
|
|
+ compat_int_t _fd;
|
|
+ } _sigpoll;
|
|
+ } _sifields;
|
|
+} compat_siginfo_t;
|
|
+#endif /* !HAVE_ARCH_COMPAT_SIGINFO_T */
|
|
+
|
|
+#ifdef __ARCH_SI_COMPAT_TRAPNO
|
|
+#define si_trapno _sifields._sigfault._trapno
|
|
+#endif
|
|
+
|
|
+/*
|
|
+ * sigevent definitions
|
|
+ *
|
|
+ * It seems likely that SIGEV_THREAD will have to be handled from
|
|
+ * userspace, libpthread transmuting it to SIGEV_SIGNAL, which the
|
|
+ * thread manager then catches and does the appropriate nonsense.
|
|
+ * However, everything is written out here so as to not get lost.
|
|
+ */
|
|
+
|
|
+#ifndef __ARCH_SIGEV_COMPAT_PREAMBLE_SIZE
|
|
+#define __ARCH_SIGEV_COMPAT_PREAMBLE_SIZE (sizeof(compat_int_t) * 2 + sizeof(compat_sigval_t))
|
|
+#endif
|
|
+
|
|
+#define COMPAT_SIGEV_PAD_SIZE ((SIGEV_MAX_SIZE/sizeof(int)) - 3)
|
|
+
|
|
+#ifndef HAVE_ARCH_COMPAT_SIGEVENT_T
|
|
+
|
|
+/* 32-bit view of sigevent_t */
|
|
+typedef struct compat_sigevent {
|
|
+ compat_sigval_t sigev_value;
|
|
+ compat_int_t sigev_signo;
|
|
+ compat_int_t sigev_notify;
|
|
+ union {
|
|
+ compat_int_t _pad[COMPAT_SIGEV_PAD_SIZE];
|
|
+ compat_int_t _tid;
|
|
+
|
|
+ struct {
|
|
+ compat_uptr_t _function;
|
|
+ compat_uptr_t _attribute; /* really pthread_attr_t */
|
|
+ } _sigev_thread;
|
|
+ } _sigev_un;
|
|
+} compat_sigevent_t;
|
|
+
|
|
+#endif /* HAVE_ARCH_COMPAT_SIGEVENT_T */
|
|
+
|
|
+#ifndef HAVE_ARCH_COMPAT_COPY_SIGINFO
|
|
+
|
|
+#include <linux/string.h>
|
|
+
|
|
+static inline void compat_copy_siginfo(struct compat_siginfo *to, struct compat_siginfo *from)
|
|
+{
|
|
+ if (from->si_code < 0)
|
|
+ memcpy(to, from, sizeof(*to));
|
|
+ else
|
|
+ /* _sigchld is currently the largest know union member */
|
|
+ memcpy(to, from, __ARCH_SI_COMPAT_PREAMBLE_SIZE + sizeof(from->_sifields._sigchld));
|
|
+}
|
|
+
|
|
+#endif /* !HAVE_ARCH_COMPAT_COPY_SIGINFO */
|
|
+
|
|
+extern int compat_copy_siginfo_to_user(compat_siginfo_t __user *to, struct siginfo *from);
|
|
+extern int compat_copy_siginfo_from_user(struct siginfo *to, compat_siginfo_t __user *from);
|
|
+
|
|
+extern int compat_copy_sigevent_from_user(struct sigevent *to, compat_sigevent_t __user *from);
|
|
+extern int compat_copy_sigevent_to_user(compat_sigevent_t __user *to, struct sigevent *from);
|
|
+
|
|
+#endif /* CONFIG_COMPAT */
|
|
+#endif /* _ASM_GENERIC_COMPAT_SIGINFO_H */
|
|
+
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/linux/signal.h CVS2_6_15_RC7_PA0/include/linux/signal.h
|
|
--- LINUS_2_6_15_RC7/include/linux/signal.h 2005-12-27 13:25:55.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/linux/signal.h 2005-11-11 21:09:17.000000000 -0700
|
|
@@ -233,6 +233,9 @@
|
|
struct pt_regs;
|
|
extern int get_signal_to_deliver(siginfo_t *info, struct k_sigaction *return_ka, struct pt_regs *regs, void *cookie);
|
|
|
|
+int copy_siginfo_from_user(siginfo_t *to, siginfo_t __user *from);
|
|
+int copy_siginfo_to_user(siginfo_t __user *to, siginfo_t *from);
|
|
+
|
|
#endif /* __KERNEL__ */
|
|
|
|
#endif /* _LINUX_SIGNAL_H */
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/include/sound/opl3.h CVS2_6_15_RC7_PA0/include/sound/opl3.h
|
|
--- LINUS_2_6_15_RC7/include/sound/opl3.h 2005-12-27 13:25:56.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/include/sound/opl3.h 2005-09-13 18:31:04.000000000 -0600
|
|
@@ -261,10 +261,11 @@
|
|
} snd_opl3_voice_t;
|
|
|
|
struct snd_opl3 {
|
|
- unsigned long l_port;
|
|
- unsigned long r_port;
|
|
+ void __iomem *l_port;
|
|
+ void __iomem *r_port;
|
|
struct resource *res_l_port;
|
|
struct resource *res_r_port;
|
|
+ int unmap_on_free;
|
|
unsigned short hardware;
|
|
/* hardware access */
|
|
void (*command) (opl3_t * opl3, unsigned short cmd, unsigned char val);
|
|
@@ -319,6 +320,9 @@
|
|
void snd_opl3_interrupt(snd_hwdep_t * hw);
|
|
int snd_opl3_new(snd_card_t *card, unsigned short hardware, opl3_t **ropl3);
|
|
int snd_opl3_init(opl3_t *opl3);
|
|
+int snd_opl3_create_mapped(snd_card_t * card,
|
|
+ void __iomem * l_port, void __iomem * r_port,
|
|
+ unsigned short hardware, opl3_t ** opl3);
|
|
int snd_opl3_create(snd_card_t * card,
|
|
unsigned long l_port, unsigned long r_port,
|
|
unsigned short hardware,
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/ipc/compat_mq.c CVS2_6_15_RC7_PA0/ipc/compat_mq.c
|
|
--- LINUS_2_6_15_RC7/ipc/compat_mq.c 2005-12-27 13:25:57.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/ipc/compat_mq.c 2005-03-18 06:17:54.000000000 -0700
|
|
@@ -7,6 +7,7 @@
|
|
*/
|
|
|
|
#include <linux/compat.h>
|
|
+#include <linux/compat_siginfo.h>
|
|
#include <linux/fs.h>
|
|
#include <linux/kernel.h>
|
|
#include <linux/mqueue.h>
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/kernel/Makefile CVS2_6_15_RC7_PA0/kernel/Makefile
|
|
--- LINUS_2_6_15_RC7/kernel/Makefile 2005-12-27 13:25:57.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/kernel/Makefile 2005-11-11 21:09:26.000000000 -0700
|
|
@@ -19,7 +19,7 @@
|
|
obj-$(CONFIG_PM) += power/
|
|
obj-$(CONFIG_BSD_PROCESS_ACCT) += acct.o
|
|
obj-$(CONFIG_KEXEC) += kexec.o
|
|
-obj-$(CONFIG_COMPAT) += compat.o
|
|
+obj-$(CONFIG_COMPAT) += compat.o compat_signal.o
|
|
obj-$(CONFIG_CPUSETS) += cpuset.o
|
|
obj-$(CONFIG_IKCONFIG) += configs.o
|
|
obj-$(CONFIG_STOP_MACHINE) += stop_machine.o
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/kernel/compat.c CVS2_6_15_RC7_PA0/kernel/compat.c
|
|
--- LINUS_2_6_15_RC7/kernel/compat.c 2005-12-27 13:25:57.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/kernel/compat.c 2005-09-14 06:57:58.000000000 -0600
|
|
@@ -13,6 +13,7 @@
|
|
|
|
#include <linux/linkage.h>
|
|
#include <linux/compat.h>
|
|
+#include <linux/compat_siginfo.h>
|
|
#include <linux/errno.h>
|
|
#include <linux/time.h>
|
|
#include <linux/signal.h>
|
|
@@ -439,7 +440,11 @@
|
|
|
|
BUG_ON(info.si_code & __SI_MASK);
|
|
info.si_code |= __SI_CHLD;
|
|
- return copy_siginfo_to_user32(uinfo, &info);
|
|
+
|
|
+ if (compat_copy_siginfo_to_user(uinfo, &info) != 0)
|
|
+ return -EFAULT;
|
|
+
|
|
+ return 0;
|
|
}
|
|
|
|
static int compat_get_user_cpu_mask(compat_ulong_t __user *user_mask_ptr,
|
|
@@ -651,6 +656,44 @@
|
|
|
|
/* timer_create is architecture specific because it needs sigevent conversion */
|
|
|
|
+long compat_sys_timer_create(clockid_t which_clock,
|
|
+ compat_sigevent_t __user *timer_event_spec,
|
|
+ compat_timer_t __user * created_timer_id)
|
|
+{
|
|
+ sigevent_t kevent;
|
|
+ timer_t ktimer;
|
|
+ mm_segment_t old_fs = get_fs();
|
|
+ long ret;
|
|
+
|
|
+ /* sigevent_t needs handling for 32-bit to 64-bit compat */
|
|
+ if (timer_event_spec != NULL)
|
|
+ if (compat_copy_sigevent_from_user(&kevent, timer_event_spec) != 0)
|
|
+ return -EFAULT;
|
|
+
|
|
+ /* Timer ID is assumed to be a non-struct simple value */
|
|
+ if (created_timer_id != NULL)
|
|
+ if (__get_user(ktimer, created_timer_id) != 0)
|
|
+ return -EFAULT;
|
|
+
|
|
+ set_fs(KERNEL_DS);
|
|
+ ret = sys_timer_create(which_clock,
|
|
+ timer_event_spec ? (sigevent_t __user *)&kevent : NULL,
|
|
+ created_timer_id ? (timer_t __user *)&ktimer : NULL);
|
|
+ set_fs(old_fs);
|
|
+
|
|
+ /* Copy back the results to userspace */
|
|
+ if (timer_event_spec != NULL)
|
|
+ if (compat_copy_sigevent_to_user(timer_event_spec, &kevent) != 0)
|
|
+ return -EFAULT;
|
|
+
|
|
+ if (created_timer_id != NULL)
|
|
+ if (__put_user(ktimer, created_timer_id) != 0)
|
|
+ return -EFAULT;
|
|
+
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+
|
|
long compat_get_bitmap(unsigned long *mask, compat_ulong_t __user *umask,
|
|
unsigned long bitmap_size)
|
|
{
|
|
@@ -807,7 +850,7 @@
|
|
if (sig) {
|
|
ret = sig;
|
|
if (uinfo) {
|
|
- if (copy_siginfo_to_user32(uinfo, &info))
|
|
+ if (compat_copy_siginfo_to_user(uinfo, &info))
|
|
ret = -EFAULT;
|
|
}
|
|
}else {
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/kernel/compat_signal.c CVS2_6_15_RC7_PA0/kernel/compat_signal.c
|
|
--- LINUS_2_6_15_RC7/kernel/compat_signal.c 1969-12-31 17:00:00.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/kernel/compat_signal.c 2005-08-02 10:22:04.000000000 -0600
|
|
@@ -0,0 +1,280 @@
|
|
+/*
|
|
+ * Copyright (C) 2003 Carlos O'Donell
|
|
+ *
|
|
+ * 2003-12-20 Carlos O'Donell
|
|
+ * Copied linux/kernel/compat_signal.c (copy_siginfo_to_user)
|
|
+ * and modified to use compat_siginfo_t for thunking down to
|
|
+ * 32-bit userspace from a 64-bit kernel.
|
|
+ *
|
|
+ * This program is free software; you can redistribute it and/or modify
|
|
+ * it under the terms of the GNU General Public License as published by
|
|
+ * the Free Software Foundation; either version 2 of the License, or (at
|
|
+ * your option) any later version.
|
|
+ *
|
|
+ * This program is distributed in the hope that it will be useful, but
|
|
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
|
|
+ * NON INFRINGEMENT. See the GNU General Public License for more
|
|
+ * details.
|
|
+ *
|
|
+ * You should have received a copy of the GNU General Public License
|
|
+ * along with this program; if not, write to the Free Software
|
|
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
|
+ *
|
|
+ */
|
|
+
|
|
+#include <linux/compat_siginfo.h>
|
|
+#include <asm/errno.h>
|
|
+#include <asm/uaccess.h>
|
|
+#include <asm/siginfo.h>
|
|
+
|
|
+#ifndef HAVE_ARCH_COMPAT_COPY_SIGINFO_TO_USER
|
|
+int compat_copy_siginfo_to_user(compat_siginfo_t __user *to, siginfo_t *from)
|
|
+{
|
|
+ int err;
|
|
+ compat_siginfo_t compat_from;
|
|
+
|
|
+ if (!access_ok (VERIFY_WRITE, to, sizeof(compat_siginfo_t)))
|
|
+ return -EFAULT;
|
|
+
|
|
+ /*
|
|
+ * If you change compat_siginfo_t structure *or* siginfo_t,
|
|
+ * please be sure this code is fixed accordingly.
|
|
+ * It should never copy any pad contained in the structure
|
|
+ * to avoid security leaks, but must copy the generic
|
|
+ * 3 ints plus the relevant union member.
|
|
+ */
|
|
+
|
|
+ /* Convert structure, don't leak anything in the copy */
|
|
+ memset(&compat_from,'\0',sizeof(compat_siginfo_t));
|
|
+
|
|
+ /* Always copy si_signo, si_errno, and si_code */
|
|
+ compat_from.si_signo = (compat_int_t)(from->si_signo);
|
|
+ compat_from.si_errno = (compat_int_t)(from->si_errno);
|
|
+ /* si_code is only a (short) value, remove kernel bits. */
|
|
+ compat_from.si_code = (short)(from->si_code);
|
|
+
|
|
+ err = __put_user(compat_from.si_signo, &to->si_signo);
|
|
+ err |= __put_user(compat_from.si_errno, &to->si_errno);
|
|
+ err |= __put_user(compat_from.si_code, &to->si_code);
|
|
+
|
|
+ /* siginfo_t came from userspace, so it is the right
|
|
+ * size, no need for conversion
|
|
+ */
|
|
+ if (from->si_code < 0) {
|
|
+ return __copy_to_user(&to->_sifields._pad,
|
|
+ &from->_sifields._pad,
|
|
+ SI_COMPAT_PAD_SIZE)
|
|
+ ? -EFAULT : 0;
|
|
+ }
|
|
+
|
|
+ switch (from->si_code & __SI_MASK) {
|
|
+ case __SI_KILL:
|
|
+ compat_from.si_pid = (compat_pid_t)(from->si_pid);
|
|
+ compat_from.si_uid = (__ARCH_SI_COMPAT_UID_T)(from->si_uid);
|
|
+ err |= __put_user(compat_from.si_pid, &to->si_pid);
|
|
+ err |= __put_user(compat_from.si_uid, &to->si_uid);
|
|
+ break;
|
|
+ case __SI_TIMER:
|
|
+ compat_from.si_pid = (compat_timer_t)(from->si_tid);
|
|
+ compat_from.si_overrun = (compat_int_t)(from->si_overrun);
|
|
+ compat_from.si_ptr = (compat_uptr_t)((u64 __force)(from->si_ptr) & 0xffffffffUL);
|
|
+ err |= __put_user(compat_from.si_tid, &to->si_tid);
|
|
+ err |= __put_user(compat_from.si_overrun, &to->si_overrun);
|
|
+ err |= __put_user(compat_from.si_ptr, &to->si_ptr);
|
|
+ break;
|
|
+ case __SI_POLL:
|
|
+ compat_from.si_band = (__ARCH_SI_COMPAT_BAND_T)(from->si_band);
|
|
+ compat_from.si_fd = (compat_int_t)(from->si_fd);
|
|
+ err |= __put_user(compat_from.si_band, &to->si_band);
|
|
+ err |= __put_user(compat_from.si_fd, &to->si_fd);
|
|
+ break;
|
|
+ case __SI_FAULT:
|
|
+ compat_from.si_addr = (compat_uptr_t)((u64 __force)(from->si_addr) & 0xffffffffUL);
|
|
+ err |= __put_user(compat_from.si_addr, &to->si_addr);
|
|
+#ifdef __ARCH_SI_COMPAT_TRAPNO
|
|
+ compat_from.si_trapno = (compat_int_t)(from->si_addr);
|
|
+ err |= __put_user(compat_from.si_trapno, &to->si_trapno);
|
|
+#endif
|
|
+ break;
|
|
+ case __SI_CHLD:
|
|
+ compat_from.si_pid = (compat_pid_t)(from->si_pid);
|
|
+ compat_from.si_uid = (__ARCH_SI_COMPAT_UID_T)(from->si_uid);
|
|
+ compat_from.si_status = (compat_int_t)(from->si_status);
|
|
+ compat_from.si_utime = (compat_clock_t)(from->si_utime);
|
|
+ compat_from.si_stime = (compat_clock_t)(from->si_stime);
|
|
+ err |= __put_user(compat_from.si_pid, &to->si_pid);
|
|
+ err |= __put_user(compat_from.si_uid, &to->si_uid);
|
|
+ err |= __put_user(compat_from.si_status, &to->si_status);
|
|
+ err |= __put_user(compat_from.si_utime, &to->si_utime);
|
|
+ err |= __put_user(compat_from.si_stime, &to->si_stime);
|
|
+ break;
|
|
+ case __SI_RT: /* This is not generated by the kernel as of now. */
|
|
+ case __SI_MESGQ: /* But this is */
|
|
+ compat_from.si_pid = (compat_pid_t)(from->si_pid);
|
|
+ compat_from.si_uid = (__ARCH_SI_COMPAT_UID_T)(from->si_uid);
|
|
+ compat_from.si_int = (compat_int_t)(from->si_int);
|
|
+ compat_from.si_ptr = (compat_uptr_t)((u64 __force)(from->si_ptr) & 0xffffffffUL);
|
|
+ err |= __put_user(compat_from.si_pid, &to->si_pid);
|
|
+ err |= __put_user(compat_from.si_uid, &to->si_uid);
|
|
+ err |= __put_user(compat_from.si_int, &to->si_int);
|
|
+ err |= __put_user(compat_from.si_ptr, &to->si_ptr);
|
|
+ break;
|
|
+ default: /* this is just in case for now ... */
|
|
+ compat_from.si_pid = (compat_pid_t)(from->si_pid);
|
|
+ compat_from.si_uid = (__ARCH_SI_COMPAT_UID_T)(from->si_uid);
|
|
+ err |= __put_user(compat_from.si_pid, &to->si_pid);
|
|
+ err |= __put_user(compat_from.si_uid, &to->si_uid);
|
|
+ break;
|
|
+ }
|
|
+ return err;
|
|
+}
|
|
+#endif
|
|
+
|
|
+#ifndef HAVE_ARCH_COPY_SIGINFO_FROM_USER
|
|
+int compat_copy_siginfo_from_user(siginfo_t *to, compat_siginfo_t __user *from)
|
|
+{
|
|
+ int err;
|
|
+ u64 scratch;
|
|
+
|
|
+ if (!access_ok (VERIFY_READ, from, sizeof(compat_siginfo_t)))
|
|
+ return -EFAULT;
|
|
+
|
|
+ /*
|
|
+ * If you change compat_siginfo_t structure *or* siginfo_t,
|
|
+ * please be sure this code is fixed accordingly.
|
|
+ */
|
|
+
|
|
+ /* Always copy si_signo, si_errno, and si_code */
|
|
+ err = __get_user(to->si_signo, &from->si_signo);
|
|
+ err |= __get_user(to->si_errno, &from->si_errno);
|
|
+ err |= __get_user(to->si_code, &from->si_code);
|
|
+
|
|
+ /* siginfo_t came from userspace, so it is the right
|
|
+ * size, no need for conversion
|
|
+ */
|
|
+ if (to->si_code < 0) {
|
|
+ return __copy_from_user(&to->_sifields._pad,
|
|
+ &from->_sifields._pad,
|
|
+ SI_COMPAT_PAD_SIZE)
|
|
+ ? -EFAULT : 0;
|
|
+ }
|
|
+
|
|
+ switch (to->si_code & __SI_MASK) {
|
|
+ case __SI_KILL:
|
|
+ err |= __get_user(to->si_pid, &from->si_pid);
|
|
+ err |= __get_user(to->si_uid, &from->si_uid);
|
|
+ break;
|
|
+ case __SI_TIMER:
|
|
+ err |= __get_user(to->si_tid, &from->si_tid);
|
|
+ err |= __get_user(to->si_overrun, &from->si_overrun);
|
|
+ err |= __get_user(scratch, &from->si_ptr);
|
|
+ to->si_ptr = (u64 __user*)scratch;
|
|
+ break;
|
|
+ case __SI_POLL:
|
|
+ err |= __get_user(to->si_band, &from->si_band);
|
|
+ err |= __get_user(to->si_fd, &from->si_fd);
|
|
+ break;
|
|
+ case __SI_FAULT:
|
|
+ err |= __get_user(scratch, &from->si_addr);
|
|
+ to->si_addr = (u64 __user*)scratch;
|
|
+#ifdef __ARCH_SI_COMPAT_TRAPNO
|
|
+ err |= __get_user(to->si_trapno, &from->si_trapno);
|
|
+#endif
|
|
+ break;
|
|
+ case __SI_CHLD:
|
|
+ err |= __get_user(to->si_pid, &from->si_pid);
|
|
+ err |= __get_user(to->si_uid, &from->si_uid);
|
|
+ err |= __get_user(to->si_status, &from->si_status);
|
|
+ err |= __get_user(to->si_utime, &from->si_utime);
|
|
+ err |= __get_user(to->si_stime, &from->si_stime);
|
|
+ break;
|
|
+ case __SI_RT: /* This is not generated by the kernel as of now. */
|
|
+ case __SI_MESGQ: /* But this is */
|
|
+ err |= __get_user(to->si_pid, &from->si_pid);
|
|
+ err |= __get_user(to->si_uid, &from->si_uid);
|
|
+ err |= __get_user(to->si_int, &from->si_int);
|
|
+ err |= __get_user(scratch, &from->si_ptr);
|
|
+ to->si_ptr = (u64 __user*)scratch;
|
|
+ break;
|
|
+ default: /* this is just in case for now ... */
|
|
+ err |= __get_user(to->si_pid, &from->si_pid);
|
|
+ err |= __get_user(to->si_uid, &from->si_uid);
|
|
+ break;
|
|
+ }
|
|
+ return err;
|
|
+}
|
|
+#endif
|
|
+
|
|
+#ifndef HAVE_ARCH_COPY_SIGEVENT_FROM_USER
|
|
+int compat_copy_sigevent_from_user(sigevent_t *to, compat_sigevent_t __user *from)
|
|
+{
|
|
+ int err;
|
|
+ u64 scratch;
|
|
+
|
|
+ /* copy sigval_t sigev_value
|
|
+ int_t sival_int (same)
|
|
+ uptr_t sival_ptr (32 vs 64)*/
|
|
+ err = __get_user(to->sigev_value.sival_int,
|
|
+ &from->sigev_value.sival_int);
|
|
+ err |= __get_user(scratch, &from->sigev_value.sival_ptr);
|
|
+ to->sigev_value.sival_ptr = (u64 __user *)scratch;
|
|
+
|
|
+ /* copy int_t sigev_signo (same)*/
|
|
+ err |= __get_user(to->sigev_signo, &from->sigev_signo);
|
|
+
|
|
+ /* copy int_t sigev_notify (same)*/
|
|
+ err |= __get_user(to->sigev_notify, &from->sigev_notify);
|
|
+
|
|
+ /* never copy _sigev_un padding */
|
|
+
|
|
+ /* copy int_t _tid (same),
|
|
+ good_sigevent() uses this value of */
|
|
+ err |= __get_user(to->sigev_notify_thread_id, &from->sigev_notify_thread_id);
|
|
+
|
|
+ /* XXX: Do not copy these, they aren't used by
|
|
+ anyone. We would need to distinguish the uses of the union.
|
|
+ copy _sigev_thread
|
|
+ uptr_t _function (32 vs 64)
|
|
+ uptr_t _attribute (32 vs 64)*/
|
|
+
|
|
+ return err;
|
|
+}
|
|
+#endif
|
|
+
|
|
+#ifndef HAVE_ARCH_COPY_SIGEVENT_TO_USER
|
|
+int compat_copy_sigevent_to_user(compat_sigevent_t __user *to, sigevent_t *from)
|
|
+{
|
|
+ int err;
|
|
+ u32 scratch;
|
|
+
|
|
+ /* copy sigval_t sigev_value
|
|
+ int_t sival_int (same)
|
|
+ uptr_t sival_ptr (32 vs 64)*/
|
|
+ err = __put_user(from->sigev_value.sival_int,
|
|
+ &to->sigev_value.sival_int);
|
|
+ scratch = (u32)((u64 __force)from->sigev_value.sival_ptr & 0xffffffffUL);
|
|
+ err |= __put_user((compat_uptr_t)scratch, &to->sigev_value.sival_ptr);
|
|
+
|
|
+ /* copy int_t sigev_signo (same)*/
|
|
+ err |= __put_user(from->sigev_signo, &to->sigev_signo);
|
|
+
|
|
+ /* copy int_t sigev_notify (same)*/
|
|
+ err |= __put_user(from->sigev_notify, &to->sigev_notify);
|
|
+
|
|
+ /* never copy _sigev_un padding */
|
|
+
|
|
+ /* copy int_t _tid (same),
|
|
+ good_sigevent() uses this value of */
|
|
+ err |= __put_user(from->sigev_notify_thread_id, &to->sigev_notify_thread_id);
|
|
+
|
|
+ /* XXX: Do not copy these, they aren't used by
|
|
+ anyone. We would need to distinguish the uses of the union.
|
|
+ copy _sigev_thread
|
|
+ uptr_t _function (32 vs 64)
|
|
+ uptr_t _attribute (32 vs 64)*/
|
|
+
|
|
+ return err;
|
|
+}
|
|
+#endif
|
|
+
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/kernel/ptrace.c CVS2_6_15_RC7_PA0/kernel/ptrace.c
|
|
--- LINUS_2_6_15_RC7/kernel/ptrace.c 2005-12-27 13:25:57.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/kernel/ptrace.c 2005-12-04 00:25:16.000000000 -0700
|
|
@@ -363,7 +363,7 @@
|
|
siginfo_t newinfo;
|
|
int error = -ESRCH;
|
|
|
|
- if (copy_from_user(&newinfo, data, sizeof (siginfo_t)))
|
|
+ if (copy_siginfo_from_user(&newinfo, data) != 0)
|
|
return -EFAULT;
|
|
|
|
read_lock(&tasklist_lock);
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/kernel/resource.c CVS2_6_15_RC7_PA0/kernel/resource.c
|
|
--- LINUS_2_6_15_RC7/kernel/resource.c 2005-12-27 13:25:57.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/kernel/resource.c 2005-09-14 06:57:58.000000000 -0600
|
|
@@ -181,6 +181,8 @@
|
|
{
|
|
struct resource *tmp, **p;
|
|
|
|
+ BUG_ON(old->child);
|
|
+
|
|
p = &old->parent->child;
|
|
for (;;) {
|
|
tmp = *p;
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/kernel/signal.c CVS2_6_15_RC7_PA0/kernel/signal.c
|
|
--- LINUS_2_6_15_RC7/kernel/signal.c 2005-12-27 13:25:57.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/kernel/signal.c 2005-11-19 22:09:36.000000000 -0700
|
|
@@ -22,6 +22,7 @@
|
|
#include <linux/security.h>
|
|
#include <linux/syscalls.h>
|
|
#include <linux/ptrace.h>
|
|
+#include <linux/compat_siginfo.h>
|
|
#include <linux/posix-timers.h>
|
|
#include <linux/signal.h>
|
|
#include <linux/audit.h>
|
|
@@ -2095,17 +2096,35 @@
|
|
return do_sigpending(set, sigsetsize);
|
|
}
|
|
|
|
+#ifndef HAVE_ARCH_COPY_SIGINFO_FROM_USER
|
|
+
|
|
+int copy_siginfo_from_user(siginfo_t *to, siginfo_t __user *from)
|
|
+{
|
|
+ if(is_compat_task(current))
|
|
+ return compat_copy_siginfo_from_user(to,(compat_siginfo_t __user *)from);
|
|
+
|
|
+ return copy_from_user(&to, from, sizeof(siginfo_t));
|
|
+}
|
|
+
|
|
+#endif
|
|
+
|
|
#ifndef HAVE_ARCH_COPY_SIGINFO_TO_USER
|
|
|
|
int copy_siginfo_to_user(siginfo_t __user *to, siginfo_t *from)
|
|
{
|
|
int err;
|
|
+
|
|
+ /* Use compat_siginfo_t with 32-bit signals */
|
|
+ if(is_compat_task(current)){
|
|
+ return compat_copy_siginfo_to_user((compat_siginfo_t __user *)to,from);
|
|
+ }
|
|
|
|
if (!access_ok (VERIFY_WRITE, to, sizeof(siginfo_t)))
|
|
return -EFAULT;
|
|
if (from->si_code < 0)
|
|
return __copy_to_user(to, from, sizeof(siginfo_t))
|
|
? -EFAULT : 0;
|
|
+
|
|
/*
|
|
* If you change siginfo_t structure, please be sure
|
|
* this code is fixed accordingly.
|
|
@@ -2321,7 +2340,7 @@
|
|
{
|
|
siginfo_t info;
|
|
|
|
- if (copy_from_user(&info, uinfo, sizeof(siginfo_t)))
|
|
+ if (copy_siginfo_from_user(&info, uinfo))
|
|
return -EFAULT;
|
|
|
|
/* Not even root can pretend to send signals from the kernel.
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/mm/shmem.c CVS2_6_15_RC7_PA0/mm/shmem.c
|
|
--- LINUS_2_6_15_RC7/mm/shmem.c 2005-12-27 13:25:58.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/mm/shmem.c 2005-11-11 21:09:28.000000000 -0700
|
|
@@ -457,7 +457,7 @@
|
|
} while (next);
|
|
}
|
|
|
|
-static void shmem_truncate(struct inode *inode)
|
|
+/* static gcc-3.3 OPD bug - GGG */ void shmem_truncate(struct inode *inode)
|
|
{
|
|
struct shmem_inode_info *info = SHMEM_I(inode);
|
|
unsigned long idx;
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/sound/drivers/opl3/opl3_lib.c CVS2_6_15_RC7_PA0/sound/drivers/opl3/opl3_lib.c
|
|
--- LINUS_2_6_15_RC7/sound/drivers/opl3/opl3_lib.c 2005-12-27 13:26:01.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/sound/drivers/opl3/opl3_lib.c 2005-11-11 23:00:07.000000000 -0700
|
|
@@ -40,7 +40,7 @@
|
|
static void snd_opl2_command(opl3_t * opl3, unsigned short cmd, unsigned char val)
|
|
{
|
|
unsigned long flags;
|
|
- unsigned long port;
|
|
+ void __iomem *port;
|
|
|
|
/*
|
|
* The original 2-OP synth requires a quite long delay
|
|
@@ -51,10 +51,10 @@
|
|
|
|
spin_lock_irqsave(&opl3->reg_lock, flags);
|
|
|
|
- outb((unsigned char) cmd, port);
|
|
+ iowrite8((unsigned char) cmd, port);
|
|
udelay(10);
|
|
|
|
- outb((unsigned char) val, port + 1);
|
|
+ iowrite8((unsigned char) val, port + 1);
|
|
udelay(30);
|
|
|
|
spin_unlock_irqrestore(&opl3->reg_lock, flags);
|
|
@@ -63,7 +63,7 @@
|
|
static void snd_opl3_command(opl3_t * opl3, unsigned short cmd, unsigned char val)
|
|
{
|
|
unsigned long flags;
|
|
- unsigned long port;
|
|
+ void __iomem *port;
|
|
|
|
/*
|
|
* The OPL-3 survives with just two INBs
|
|
@@ -74,13 +74,13 @@
|
|
|
|
spin_lock_irqsave(&opl3->reg_lock, flags);
|
|
|
|
- outb((unsigned char) cmd, port);
|
|
- inb(opl3->l_port);
|
|
- inb(opl3->l_port);
|
|
-
|
|
- outb((unsigned char) val, port + 1);
|
|
- inb(opl3->l_port);
|
|
- inb(opl3->l_port);
|
|
+ iowrite8((unsigned char) cmd, port);
|
|
+ ioread8(opl3->l_port);
|
|
+ ioread8(opl3->l_port);
|
|
+
|
|
+ iowrite8((unsigned char) val, port + 1);
|
|
+ ioread8(opl3->l_port);
|
|
+ ioread8(opl3->l_port);
|
|
|
|
spin_unlock_irqrestore(&opl3->reg_lock, flags);
|
|
}
|
|
@@ -104,7 +104,7 @@
|
|
opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
|
|
/* Reset the IRQ of the FM chip */
|
|
opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
|
|
- signature = stat1 = inb(opl3->l_port); /* Status register */
|
|
+ signature = stat1 = ioread8(opl3->l_port); /* Status register */
|
|
if ((stat1 & 0xe0) != 0x00) { /* Should be 0x00 */
|
|
snd_printd("OPL3: stat1 = 0x%x\n", stat1);
|
|
return -ENODEV;
|
|
@@ -116,7 +116,7 @@
|
|
/* Now we have to delay at least 80us */
|
|
udelay(200);
|
|
/* Read status after timers have expired */
|
|
- stat2 = inb(opl3->l_port);
|
|
+ stat2 = ioread8(opl3->l_port);
|
|
/* Stop the timers */
|
|
opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
|
|
/* Reset the IRQ of the FM chip */
|
|
@@ -299,7 +299,7 @@
|
|
return;
|
|
|
|
opl3 = hw->private_data;
|
|
- status = inb(opl3->l_port);
|
|
+ status = ioread8(opl3->l_port);
|
|
#if 0
|
|
snd_printk("AdLib IRQ status = 0x%x\n", status);
|
|
#endif
|
|
@@ -327,6 +327,10 @@
|
|
opl3->private_free(opl3);
|
|
release_and_free_resource(opl3->res_l_port);
|
|
release_and_free_resource(opl3->res_r_port);
|
|
+ if (opl3->unmap_on_free) {
|
|
+ iounmap(opl3->l_port);
|
|
+ iounmap(opl3->r_port);
|
|
+ }
|
|
kfree(opl3);
|
|
return 0;
|
|
}
|
|
@@ -391,12 +395,14 @@
|
|
return 0;
|
|
}
|
|
|
|
-int snd_opl3_create(snd_card_t * card,
|
|
- unsigned long l_port,
|
|
- unsigned long r_port,
|
|
- unsigned short hardware,
|
|
- int integrated,
|
|
- opl3_t ** ropl3)
|
|
+static int snd_opl3_create_main(snd_card_t * card,
|
|
+ void __iomem *l_port,
|
|
+ void __iomem *r_port,
|
|
+ int unmap_on_free,
|
|
+ struct resource *res_l_port,
|
|
+ struct resource *res_r_port,
|
|
+ unsigned short hardware,
|
|
+ opl3_t ** ropl3)
|
|
{
|
|
opl3_t *opl3;
|
|
int err;
|
|
@@ -404,21 +410,11 @@
|
|
*ropl3 = NULL;
|
|
if ((err = snd_opl3_new(card, hardware, &opl3)) < 0)
|
|
return err;
|
|
- if (! integrated) {
|
|
- if ((opl3->res_l_port = request_region(l_port, 2, "OPL2/3 (left)")) == NULL) {
|
|
- snd_printk(KERN_ERR "opl3: can't grab left port 0x%lx\n", l_port);
|
|
- snd_device_free(card, opl3);
|
|
- return -EBUSY;
|
|
- }
|
|
- if (r_port != 0 &&
|
|
- (opl3->res_r_port = request_region(r_port, 2, "OPL2/3 (right)")) == NULL) {
|
|
- snd_printk(KERN_ERR "opl3: can't grab right port 0x%lx\n", r_port);
|
|
- snd_device_free(card, opl3);
|
|
- return -EBUSY;
|
|
- }
|
|
- }
|
|
opl3->l_port = l_port;
|
|
opl3->r_port = r_port;
|
|
+ opl3->unmap_on_free = unmap_on_free;
|
|
+ opl3->res_l_port = res_l_port;
|
|
+ opl3->res_r_port = res_r_port;
|
|
|
|
switch (opl3->hardware) {
|
|
/* some hardware doesn't support timers */
|
|
@@ -449,6 +445,61 @@
|
|
return 0;
|
|
}
|
|
|
|
+int snd_opl3_create_mapped(snd_card_t * card,
|
|
+ void __iomem * l_port,
|
|
+ void __iomem * r_port,
|
|
+ unsigned short hardware,
|
|
+ opl3_t ** ropl3)
|
|
+{
|
|
+ return snd_opl3_create_main(card, l_port, r_port, 0, NULL, NULL, hardware, ropl3);
|
|
+}
|
|
+
|
|
+int snd_opl3_create(snd_card_t * card,
|
|
+ unsigned long l_port,
|
|
+ unsigned long r_port,
|
|
+ unsigned short hardware,
|
|
+ int integrated,
|
|
+ opl3_t ** ropl3) {
|
|
+ struct resource *res_l_port = NULL;
|
|
+ struct resource *res_r_port = NULL;
|
|
+ void __iomem *l_mapped = NULL;
|
|
+ void __iomem *r_mapped = NULL;
|
|
+
|
|
+ if (! integrated) {
|
|
+ if ((res_l_port = request_region(l_port, 2, "OPL2/3 (left)")) == NULL) {
|
|
+ snd_printk(KERN_ERR "opl3: can't grab left port 0x%lx\n", l_port);
|
|
+ goto fail;
|
|
+ }
|
|
+ if (r_port != 0 &&
|
|
+ (res_r_port = request_region(r_port, 2, "OPL2/3 (right)")) == NULL) {
|
|
+ snd_printk(KERN_ERR "opl3: can't grab right port 0x%lx\n", r_port);
|
|
+ goto fail;
|
|
+ }
|
|
+ }
|
|
+
|
|
+ l_mapped = ioport_map(l_port, 2);
|
|
+ if (l_mapped == NULL) {
|
|
+ snd_printk(KERN_ERR "opl3: failed to map port 0x%lx\n", l_port);
|
|
+ goto fail;
|
|
+ }
|
|
+ r_mapped = ioport_map(r_port, 2);
|
|
+ if (r_mapped == NULL) {
|
|
+ snd_printk(KERN_ERR "opl3: failed to map port 0x%lx\n", r_port);
|
|
+ goto fail;
|
|
+ }
|
|
+
|
|
+ return snd_opl3_create_main(card, l_mapped, r_mapped, 1, res_l_port, res_r_port, hardware, ropl3);
|
|
+
|
|
+fail:
|
|
+ release_and_free_resource(res_l_port);
|
|
+ release_and_free_resource(res_r_port);
|
|
+ if (l_mapped)
|
|
+ iounmap(l_mapped);
|
|
+ if (r_mapped)
|
|
+ iounmap(r_mapped);
|
|
+ return -EBUSY;
|
|
+}
|
|
+
|
|
int snd_opl3_timer_new(opl3_t * opl3, int timer1_dev, int timer2_dev)
|
|
{
|
|
int err;
|
|
@@ -528,6 +579,7 @@
|
|
EXPORT_SYMBOL(snd_opl3_new);
|
|
EXPORT_SYMBOL(snd_opl3_init);
|
|
EXPORT_SYMBOL(snd_opl3_create);
|
|
+EXPORT_SYMBOL(snd_opl3_create_mapped);
|
|
EXPORT_SYMBOL(snd_opl3_timer_new);
|
|
EXPORT_SYMBOL(snd_opl3_hwdep_new);
|
|
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/sound/oss/ad1889.c CVS2_6_15_RC7_PA0/sound/oss/ad1889.c
|
|
--- LINUS_2_6_15_RC7/sound/oss/ad1889.c 2005-12-27 13:26:02.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/sound/oss/ad1889.c 2005-06-30 08:26:47.000000000 -0600
|
|
@@ -74,7 +74,7 @@
|
|
|
|
DBG("Setting WAV rate to %d\n", rate);
|
|
dev->state[AD_WAV_STATE].dmabuf.rate = rate;
|
|
- AD1889_WRITEW(dev, AD_DSWAS, rate);
|
|
+ AD1889_WRITEW(dev, AD_DS_WAS, rate);
|
|
|
|
/* Cycle the DAC to enable the new rate */
|
|
ac97_codec->codec_write(dev->ac97_codec, AC97_POWER_CONTROL, 0x0200);
|
|
@@ -88,14 +88,14 @@
|
|
|
|
DBG("Setting WAV format to 0x%x\n", fmt);
|
|
|
|
- tmp = AD1889_READW(ad1889_dev, AD_DSWSMC);
|
|
+ tmp = AD1889_READW(ad1889_dev, AD_DS_WSMC);
|
|
if (fmt & AFMT_S16_LE) {
|
|
//tmp |= 0x0100; /* set WA16 */
|
|
tmp |= 0x0300; /* set WA16 stereo */
|
|
} else if (fmt & AFMT_U8) {
|
|
tmp &= ~0x0100; /* clear WA16 */
|
|
}
|
|
- AD1889_WRITEW(ad1889_dev, AD_DSWSMC, tmp);
|
|
+ AD1889_WRITEW(ad1889_dev, AD_DS_WSMC, tmp);
|
|
}
|
|
|
|
static inline void ad1889_set_adc_fmt(ad1889_dev_t *dev, int fmt)
|
|
@@ -104,13 +104,13 @@
|
|
|
|
DBG("Setting ADC format to 0x%x\n", fmt);
|
|
|
|
- tmp = AD1889_READW(ad1889_dev, AD_DSRAMC);
|
|
+ tmp = AD1889_READW(ad1889_dev, AD_DS_RAMC);
|
|
if (fmt & AFMT_S16_LE) {
|
|
tmp |= 0x0100; /* set WA16 */
|
|
} else if (fmt & AFMT_U8) {
|
|
tmp &= ~0x0100; /* clear WA16 */
|
|
}
|
|
- AD1889_WRITEW(ad1889_dev, AD_DSRAMC, tmp);
|
|
+ AD1889_WRITEW(ad1889_dev, AD_DS_RAMC, tmp);
|
|
}
|
|
|
|
static void ad1889_start_wav(ad1889_state_t *state)
|
|
@@ -144,21 +144,21 @@
|
|
dmabuf->rd_ptr, dmabuf->dma_len);
|
|
|
|
/* load up the current register set */
|
|
- AD1889_WRITEL(ad1889_dev, AD_DMAWAVCC, cnt);
|
|
- AD1889_WRITEL(ad1889_dev, AD_DMAWAVICC, cnt);
|
|
- AD1889_WRITEL(ad1889_dev, AD_DMAWAVCA, dmabuf->dma_handle);
|
|
+ AD1889_WRITEL(ad1889_dev, AD_DMA_WAVCC, cnt);
|
|
+ AD1889_WRITEL(ad1889_dev, AD_DMA_WAVICC, cnt);
|
|
+ AD1889_WRITEL(ad1889_dev, AD_DMA_WAVCA, dmabuf->dma_handle);
|
|
|
|
/* TODO: for now we load the base registers with the same thing */
|
|
- AD1889_WRITEL(ad1889_dev, AD_DMAWAVBC, cnt);
|
|
- AD1889_WRITEL(ad1889_dev, AD_DMAWAVIBC, cnt);
|
|
- AD1889_WRITEL(ad1889_dev, AD_DMAWAVBA, dmabuf->dma_handle);
|
|
+ AD1889_WRITEL(ad1889_dev, AD_DMA_WAVBC, cnt);
|
|
+ AD1889_WRITEL(ad1889_dev, AD_DMA_WAVIBC, cnt);
|
|
+ AD1889_WRITEL(ad1889_dev, AD_DMA_WAVBA, dmabuf->dma_handle);
|
|
|
|
/* and we're off to the races... */
|
|
- AD1889_WRITEL(ad1889_dev, AD_DMACHSS, 0x8);
|
|
- tmp = AD1889_READW(ad1889_dev, AD_DSWSMC);
|
|
+ AD1889_WRITEL(ad1889_dev, AD_DMA_CHSS, 0x8);
|
|
+ tmp = AD1889_READW(ad1889_dev, AD_DS_WSMC);
|
|
tmp |= 0x0400; /* set WAEN */
|
|
- AD1889_WRITEW(ad1889_dev, AD_DSWSMC, tmp);
|
|
- (void) AD1889_READW(ad1889_dev, AD_DSWSMC); /* flush posted PCI write */
|
|
+ AD1889_WRITEW(ad1889_dev, AD_DS_WSMC, tmp);
|
|
+ (void) AD1889_READW(ad1889_dev, AD_DS_WSMC); /* flush posted PCI write */
|
|
|
|
dmabuf->enable |= DAC_RUNNING;
|
|
|
|
@@ -178,10 +178,10 @@
|
|
u16 tmp;
|
|
unsigned long cnt = dmabuf->dma_len;
|
|
|
|
- tmp = AD1889_READW(ad1889_dev, AD_DSWSMC);
|
|
+ tmp = AD1889_READW(ad1889_dev, AD_DS_WSMC);
|
|
tmp &= ~0x0400; /* clear WAEN */
|
|
- AD1889_WRITEW(ad1889_dev, AD_DSWSMC, tmp);
|
|
- (void) AD1889_READW(ad1889_dev, AD_DSWSMC); /* flush posted PCI write */
|
|
+ AD1889_WRITEW(ad1889_dev, AD_DS_WSMC, tmp);
|
|
+ (void) AD1889_READW(ad1889_dev, AD_DS_WSMC); /* flush posted PCI write */
|
|
pci_unmap_single(ad1889_dev->pci, dmabuf->dma_handle,
|
|
cnt, PCI_DMA_TODEVICE);
|
|
|
|
@@ -210,7 +210,7 @@
|
|
|
|
spin_lock_irqsave(&state->card->lock, flags);
|
|
|
|
- tmp = AD1889_READW(ad1889_dev, AD_DSRAMC);
|
|
+ tmp = AD1889_READW(ad1889_dev, AD_DS_RAMC);
|
|
if (start) {
|
|
state->dmabuf.enable |= ADC_RUNNING;
|
|
tmp |= 0x0004; /* set ADEN */
|
|
@@ -218,7 +218,7 @@
|
|
state->dmabuf.enable &= ~ADC_RUNNING;
|
|
tmp &= ~0x0004; /* clear ADEN */
|
|
}
|
|
- AD1889_WRITEW(ad1889_dev, AD_DSRAMC, tmp);
|
|
+ AD1889_WRITEW(ad1889_dev, AD_DS_RAMC, tmp);
|
|
|
|
spin_unlock_irqrestore(&state->card->lock, flags);
|
|
}
|
|
@@ -300,53 +300,53 @@
|
|
int len, i;
|
|
ad1889_dev_t *dev = data;
|
|
ad1889_reg_t regs[] = {
|
|
- { "WSMC", AD_DSWSMC, 16 },
|
|
- { "RAMC", AD_DSRAMC, 16 },
|
|
- { "WADA", AD_DSWADA, 16 },
|
|
- { "SYDA", AD_DSSYDA, 16 },
|
|
- { "WAS", AD_DSWAS, 16 },
|
|
- { "RES", AD_DSRES, 16 },
|
|
- { "CCS", AD_DSCCS, 16 },
|
|
- { "ADCBA", AD_DMAADCBA, 32 },
|
|
- { "ADCCA", AD_DMAADCCA, 32 },
|
|
- { "ADCBC", AD_DMAADCBC, 32 },
|
|
- { "ADCCC", AD_DMAADCCC, 32 },
|
|
- { "ADCIBC", AD_DMAADCIBC, 32 },
|
|
- { "ADCICC", AD_DMAADCICC, 32 },
|
|
- { "ADCCTRL", AD_DMAADCCTRL, 16 },
|
|
- { "WAVBA", AD_DMAWAVBA, 32 },
|
|
- { "WAVCA", AD_DMAWAVCA, 32 },
|
|
- { "WAVBC", AD_DMAWAVBC, 32 },
|
|
- { "WAVCC", AD_DMAWAVCC, 32 },
|
|
- { "WAVIBC", AD_DMAWAVIBC, 32 },
|
|
- { "WAVICC", AD_DMAWAVICC, 32 },
|
|
- { "WAVCTRL", AD_DMAWAVCTRL, 16 },
|
|
- { "DISR", AD_DMADISR, 32 },
|
|
- { "CHSS", AD_DMACHSS, 32 },
|
|
- { "IPC", AD_GPIOIPC, 16 },
|
|
- { "OP", AD_GPIOOP, 16 },
|
|
- { "IP", AD_GPIOIP, 16 },
|
|
- { "ACIC", AD_ACIC, 16 },
|
|
- { "AC97_RESET", 0x100 + AC97_RESET, 16 },
|
|
- { "AC97_MASTER_VOL_STEREO", 0x100 + AC97_MASTER_VOL_STEREO, 16 },
|
|
- { "AC97_HEADPHONE_VOL", 0x100 + AC97_HEADPHONE_VOL, 16 },
|
|
- { "AC97_MASTER_VOL_MONO", 0x100 + AC97_MASTER_VOL_MONO, 16 },
|
|
- { "AC97_MASTER_TONE", 0x100 + AC97_MASTER_TONE, 16 },
|
|
- { "AC97_PCBEEP_VOL", 0x100 + AC97_PCBEEP_VOL, 16 },
|
|
- { "AC97_PHONE_VOL", 0x100 + AC97_PHONE_VOL, 16 },
|
|
- { "AC97_MIC_VOL", 0x100 + AC97_MIC_VOL, 16 },
|
|
- { "AC97_LINEIN_VOL", 0x100 + AC97_LINEIN_VOL, 16 },
|
|
- { "AC97_CD_VOL", 0x100 + AC97_CD_VOL, 16 },
|
|
- { "AC97_VIDEO_VOL", 0x100 + AC97_VIDEO_VOL, 16 },
|
|
- { "AC97_AUX_VOL", 0x100 + AC97_AUX_VOL, 16 },
|
|
- { "AC97_PCMOUT_VOL", 0x100 + AC97_PCMOUT_VOL, 16 },
|
|
- { "AC97_RECORD_SELECT", 0x100 + AC97_RECORD_SELECT, 16 },
|
|
- { "AC97_RECORD_GAIN", 0x100 + AC97_RECORD_GAIN, 16 },
|
|
- { "AC97_RECORD_GAIN_MIC", 0x100 + AC97_RECORD_GAIN_MIC, 16 },
|
|
- { "AC97_GENERAL_PURPOSE", 0x100 + AC97_GENERAL_PURPOSE, 16 },
|
|
- { "AC97_3D_CONTROL", 0x100 + AC97_3D_CONTROL, 16 },
|
|
- { "AC97_MODEM_RATE", 0x100 + AC97_MODEM_RATE, 16 },
|
|
- { "AC97_POWER_CONTROL", 0x100 + AC97_POWER_CONTROL, 16 },
|
|
+ { "WSMC", AD_DS_WSMC, 16 },
|
|
+ { "RAMC", AD_DS_RAMC, 16 },
|
|
+ { "WADA", AD_DS_WADA, 16 },
|
|
+ { "SYDA", AD_DS_SYDA, 16 },
|
|
+ { "WAS", AD_DS_WAS, 16 },
|
|
+ { "RES", AD_DS_RES, 16 },
|
|
+ { "CCS", AD_DS_CCS, 16 },
|
|
+ { "ADCBA", AD_DMA_ADCBA, 32 },
|
|
+ { "ADCCA", AD_DMA_ADCCA, 32 },
|
|
+ { "ADCBC", AD_DMA_ADCBC, 32 },
|
|
+ { "ADCCC", AD_DMA_ADCCC, 32 },
|
|
+ { "ADCIBC", AD_DMA_ADCIBC, 32 },
|
|
+ { "ADCICC", AD_DMA_ADCICC, 32 },
|
|
+ { "ADCCTRL", AD_DMA_ADCCTRL, 16 },
|
|
+ { "WAVBA", AD_DMA_WAVBA, 32 },
|
|
+ { "WAVCA", AD_DMA_WAVCA, 32 },
|
|
+ { "WAVBC", AD_DMA_WAVBC, 32 },
|
|
+ { "WAVCC", AD_DMA_WAVCC, 32 },
|
|
+ { "WAVIBC", AD_DMA_WAVIBC, 32 },
|
|
+ { "WAVICC", AD_DMA_WAVICC, 32 },
|
|
+ { "WAVCTRL", AD_DMA_WAVCTRL, 16 },
|
|
+ { "DISR", AD_DMA_DISR, 32 },
|
|
+ { "CHSS", AD_DMA_CHSS, 32 },
|
|
+ { "IPC", AD_GPIO_IPC, 16 },
|
|
+ { "OP", AD_GPIO_OP, 16 },
|
|
+ { "IP", AD_GPIO_IP, 16 },
|
|
+ { "ACIC", AD_AC97_ACIC, 16 },
|
|
+ { "AC97_RESET", AD_AC97_BASE + AC97_RESET, 16 },
|
|
+ { "AC97_MASTER_VOL_STEREO", AD_AC97_BASE + AC97_MASTER_VOL_STEREO, 16 },
|
|
+ { "AC97_HEADPHONE_VOL", AD_AC97_BASE + AC97_HEADPHONE_VOL, 16 },
|
|
+ { "AC97_MASTER_VOL_MONO", AD_AC97_BASE + AC97_MASTER_VOL_MONO, 16 },
|
|
+ { "AC97_MASTER_TONE", AD_AC97_BASE + AC97_MASTER_TONE, 16 },
|
|
+ { "AC97_PCBEEP_VOL", AD_AC97_BASE + AC97_PCBEEP_VOL, 16 },
|
|
+ { "AC97_PHONE_VOL", AD_AC97_BASE + AC97_PHONE_VOL, 16 },
|
|
+ { "AC97_MIC_VOL", AD_AC97_BASE + AC97_MIC_VOL, 16 },
|
|
+ { "AC97_LINEIN_VOL", AD_AC97_BASE + AC97_LINEIN_VOL, 16 },
|
|
+ { "AC97_CD_VOL", AD_AC97_BASE + AC97_CD_VOL, 16 },
|
|
+ { "AC97_VIDEO_VOL", AD_AC97_BASE + AC97_VIDEO_VOL, 16 },
|
|
+ { "AC97_AUX_VOL", AD_AC97_BASE + AC97_AUX_VOL, 16 },
|
|
+ { "AC97_PCMOUT_VOL", AD_AC97_BASE + AC97_PCMOUT_VOL, 16 },
|
|
+ { "AC97_RECORD_SELECT", AD_AC97_BASE + AC97_RECORD_SELECT, 16 },
|
|
+ { "AC97_RECORD_GAIN", AD_AC97_BASE + AC97_RECORD_GAIN, 16 },
|
|
+ { "AC97_RECORD_GAIN_MIC", AD_AC97_BASE + AC97_RECORD_GAIN_MIC, 16 },
|
|
+ { "AC97_GENERAL_PURPOSE", AD_AC97_BASE + AC97_GENERAL_PURPOSE, 16 },
|
|
+ { "AC97_3D_CONTROL", AD_AC97_BASE + AC97_3D_CONTROL, 16 },
|
|
+ { "AC97_MODEM_RATE", AD_AC97_BASE + AC97_MODEM_RATE, 16 },
|
|
+ { "AC97_POWER_CONTROL", AD_AC97_BASE + AC97_POWER_CONTROL, 16 },
|
|
{ NULL }
|
|
};
|
|
|
|
@@ -399,9 +399,9 @@
|
|
}
|
|
|
|
if (dmabuf->enable & DAC_RUNNING)
|
|
- offset = le32_to_cpu(AD1889_READL(state->card, AD_DMAWAVBA));
|
|
+ offset = le32_to_cpu(AD1889_READL(state->card, AD_DMA_WAVBA));
|
|
else
|
|
- offset = le32_to_cpu(AD1889_READL(state->card, AD_DMAADCBA));
|
|
+ offset = le32_to_cpu(AD1889_READL(state->card, AD_DMA_ADCBA));
|
|
|
|
return (unsigned long)bus_to_virt((unsigned long)offset) - (unsigned long)dmabuf->rawbuf;
|
|
}
|
|
@@ -638,9 +638,9 @@
|
|
if (val > 5400 && val < 48000)
|
|
{
|
|
if (file->f_mode & FMODE_WRITE)
|
|
- AD1889_WRITEW(ad1889_dev, AD_DSWAS, val);
|
|
+ AD1889_WRITEW(ad1889_dev, AD_DS_WAS, val);
|
|
if (file->f_mode & FMODE_READ)
|
|
- AD1889_WRITEW(ad1889_dev, AD_DSRES, val);
|
|
+ AD1889_WRITEW(ad1889_dev, AD_DS_RES, val);
|
|
}
|
|
return 0;
|
|
|
|
@@ -648,22 +648,22 @@
|
|
if (get_user(val, p))
|
|
return -EFAULT;
|
|
if (file->f_mode & FMODE_READ) {
|
|
- val = AD1889_READW(ad1889_dev, AD_DSWSMC);
|
|
+ val = AD1889_READW(ad1889_dev, AD_DS_WSMC);
|
|
if (val) {
|
|
val |= 0x0200; /* set WAST */
|
|
} else {
|
|
val &= ~0x0200; /* clear WAST */
|
|
}
|
|
- AD1889_WRITEW(ad1889_dev, AD_DSWSMC, val);
|
|
+ AD1889_WRITEW(ad1889_dev, AD_DS_WSMC, val);
|
|
}
|
|
if (file->f_mode & FMODE_WRITE) {
|
|
- val = AD1889_READW(ad1889_dev, AD_DSRAMC);
|
|
+ val = AD1889_READW(ad1889_dev, AD_DS_RAMC);
|
|
if (val) {
|
|
val |= 0x0002; /* set ADST */
|
|
} else {
|
|
val &= ~0x0002; /* clear ADST */
|
|
}
|
|
- AD1889_WRITEW(ad1889_dev, AD_DSRAMC, val);
|
|
+ AD1889_WRITEW(ad1889_dev, AD_DS_RAMC, val);
|
|
}
|
|
|
|
return 0;
|
|
@@ -738,7 +738,7 @@
|
|
break;
|
|
|
|
case SOUND_PCM_READ_RATE:
|
|
- return put_user(AD1889_READW(ad1889_dev, AD_DSWAS), p);
|
|
+ return put_user(AD1889_READW(ad1889_dev, AD_DS_WAS), p);
|
|
|
|
case SOUND_PCM_READ_CHANNELS:
|
|
case SOUND_PCM_READ_BITS:
|
|
@@ -768,7 +768,7 @@
|
|
|
|
ad1889_set_wav_rate(ad1889_dev, 48000);
|
|
ad1889_set_wav_fmt(ad1889_dev, AFMT_S16_LE);
|
|
- AD1889_WRITEW(ad1889_dev, AD_DSWADA, 0x0404); /* attenuation */
|
|
+ AD1889_WRITEW(ad1889_dev, AD_DS_WADA, 0x0404); /* attenuation */
|
|
return nonseekable_open(inode, file);
|
|
}
|
|
|
|
@@ -825,15 +825,15 @@
|
|
{
|
|
ad1889_dev_t *dev = ac97->private_data;
|
|
|
|
- //DBG("Writing 0x%x to 0x%lx\n", val, dev->regbase + 0x100 + reg);
|
|
- AD1889_WRITEW(dev, 0x100 + reg, val);
|
|
+ //DBG("Writing 0x%x to 0x%lx\n", val, dev->regbase + AD_AC97_BASE + reg);
|
|
+ AD1889_WRITEW(dev, AD_AC97_BASE + reg, val);
|
|
}
|
|
|
|
static u16 ad1889_codec_read(struct ac97_codec *ac97, u8 reg)
|
|
{
|
|
ad1889_dev_t *dev = ac97->private_data;
|
|
- //DBG("Reading from 0x%lx\n", dev->regbase + 0x100 + reg);
|
|
- return AD1889_READW(dev, 0x100 + reg);
|
|
+ //DBG("Reading from 0x%lx\n", dev->regbase + AD_AC97_BASE + reg);
|
|
+ return AD1889_READW(dev, AD_AC97_BASE + reg);
|
|
}
|
|
|
|
static int ad1889_ac97_init(ad1889_dev_t *dev, int id)
|
|
@@ -882,24 +882,24 @@
|
|
int retry = 200;
|
|
ad1889_dev_t *dev = pci_get_drvdata(pcidev);
|
|
|
|
- AD1889_WRITEW(dev, AD_DSCCS, 0x8000); /* turn on clock */
|
|
- AD1889_READW(dev, AD_DSCCS);
|
|
+ AD1889_WRITEW(dev, AD_DS_CCS, 0x8000); /* turn on clock */
|
|
+ AD1889_READW(dev, AD_DS_CCS);
|
|
|
|
WAIT_10MS();
|
|
|
|
- stat = AD1889_READW(dev, AD_ACIC);
|
|
+ stat = AD1889_READW(dev, AD_AC97_ACIC);
|
|
stat |= 0x0002; /* Reset Disable */
|
|
- AD1889_WRITEW(dev, AD_ACIC, stat);
|
|
- (void) AD1889_READW(dev, AD_ACIC); /* flush posted write */
|
|
+ AD1889_WRITEW(dev, AD_AC97_ACIC, stat);
|
|
+ (void) AD1889_READW(dev, AD_AC97_ACIC); /* flush posted write */
|
|
|
|
udelay(10);
|
|
|
|
- stat = AD1889_READW(dev, AD_ACIC);
|
|
+ stat = AD1889_READW(dev, AD_AC97_ACIC);
|
|
stat |= 0x0001; /* Interface Enable */
|
|
- AD1889_WRITEW(dev, AD_ACIC, stat);
|
|
+ AD1889_WRITEW(dev, AD_AC97_ACIC, stat);
|
|
|
|
do {
|
|
- if (AD1889_READW(dev, AD_ACIC) & 0x8000) /* Ready */
|
|
+ if (AD1889_READW(dev, AD_AC97_ACIC) & 0x8000) /* Ready */
|
|
break;
|
|
WAIT_10MS();
|
|
retry--;
|
|
@@ -907,16 +907,16 @@
|
|
|
|
if (!retry) {
|
|
printk(KERN_ERR "ad1889_aclink_reset: codec is not ready [0x%x]\n",
|
|
- AD1889_READW(dev, AD_ACIC));
|
|
+ AD1889_READW(dev, AD_AC97_ACIC));
|
|
return -EBUSY;
|
|
}
|
|
|
|
/* TODO reset AC97 codec */
|
|
/* TODO set wave/adc pci ctrl status */
|
|
|
|
- stat = AD1889_READW(dev, AD_ACIC);
|
|
+ stat = AD1889_READW(dev, AD_AC97_ACIC);
|
|
stat |= 0x0004; /* Audio Stream Output Enable */
|
|
- AD1889_WRITEW(dev, AD_ACIC, stat);
|
|
+ AD1889_WRITEW(dev, AD_AC97_ACIC, stat);
|
|
return 0;
|
|
}
|
|
|
|
@@ -934,10 +934,10 @@
|
|
u32 stat;
|
|
ad1889_dev_t *dev = (ad1889_dev_t *)dev_id;
|
|
|
|
- stat = AD1889_READL(dev, AD_DMADISR);
|
|
+ stat = AD1889_READL(dev, AD_DMA_DISR);
|
|
|
|
/* clear ISR */
|
|
- AD1889_WRITEL(dev, AD_DMADISR, stat);
|
|
+ AD1889_WRITEL(dev, AD_DMA_DISR, stat);
|
|
|
|
if (stat & 0x8) { /* WAVI */
|
|
DBG("WAV interrupt\n");
|
|
@@ -963,15 +963,15 @@
|
|
u32 tmp32;
|
|
|
|
/* make sure the interrupt bits are setup the way we want */
|
|
- tmp32 = AD1889_READL(dev, AD_DMAWAVCTRL);
|
|
+ tmp32 = AD1889_READL(dev, AD_DMA_WAVCTRL);
|
|
tmp32 &= ~0xff; /* flat dma, no sg, mask out the intr bits */
|
|
tmp32 |= 0x6; /* intr on count, loop */
|
|
- AD1889_WRITEL(dev, AD_DMAWAVCTRL, tmp32);
|
|
+ AD1889_WRITEL(dev, AD_DMA_WAVCTRL, tmp32);
|
|
|
|
/* unmute... */
|
|
- tmp16 = AD1889_READW(dev, AD_DSWADA);
|
|
+ tmp16 = AD1889_READW(dev, AD_DS_WADA);
|
|
tmp16 &= ~0x8080;
|
|
- AD1889_WRITEW(dev, AD_DSWADA, tmp16);
|
|
+ AD1889_WRITEW(dev, AD_DS_WADA, tmp16);
|
|
}
|
|
|
|
static int __devinit ad1889_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
|
|
@@ -1004,7 +1004,7 @@
|
|
goto out1;
|
|
}
|
|
|
|
- dev->regbase = ioremap_nocache(bar, AD_DSIOMEMSIZE);
|
|
+ dev->regbase = ioremap_nocache(bar, AD_DS_IOMEMSIZE);
|
|
if (!dev->regbase) {
|
|
printk(KERN_ERR DEVNAME ": unable to remap iomem\n");
|
|
goto out2;
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/sound/oss/ad1889.h CVS2_6_15_RC7_PA0/sound/oss/ad1889.h
|
|
--- LINUS_2_6_15_RC7/sound/oss/ad1889.h 2005-12-27 13:26:02.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/sound/oss/ad1889.h 2005-03-01 16:00:56.000000000 -0700
|
|
@@ -1,57 +1,58 @@
|
|
#ifndef _AD1889_H_
|
|
#define _AD1889_H_
|
|
|
|
-#define AD_DSWSMC 0x00 /* DMA input wave/syn mixer control */
|
|
-#define AD_DSRAMC 0x02 /* DMA output resamp/ADC mixer control */
|
|
-#define AD_DSWADA 0x04 /* DMA input wave attenuation */
|
|
-#define AD_DSSYDA 0x06 /* DMA input syn attentuation */
|
|
-#define AD_DSWAS 0x08 /* wave input sample rate */
|
|
-#define AD_DSRES 0x0a /* resampler output sample rate */
|
|
-#define AD_DSCCS 0x0c /* chip control/status */
|
|
-
|
|
-#define AD_DMARESBA 0x40 /* RES base addr */
|
|
-#define AD_DMARESCA 0x44 /* RES current addr */
|
|
-#define AD_DMARESBC 0x48 /* RES base cnt */
|
|
-#define AD_DMARESCC 0x4c /* RES current count */
|
|
-#define AD_DMAADCBA 0x50 /* ADC */
|
|
-#define AD_DMAADCCA 0x54
|
|
-#define AD_DMAADCBC 0x58
|
|
-#define AD_DMAADCCC 0x5c
|
|
-#define AD_DMASYNBA 0x60 /* SYN */
|
|
-#define AD_DMASYNCA 0x64
|
|
-#define AD_DMASYNBC 0x68
|
|
-#define AD_DMASYNCC 0x6c
|
|
-#define AD_DMAWAVBA 0x70 /* WAV */
|
|
-#define AD_DMAWAVCA 0x74
|
|
-#define AD_DMAWAVBC 0x78
|
|
-#define AD_DMAWAVCC 0x7c
|
|
-#define AD_DMARESICC 0x80 /* RES interrupt current count */
|
|
-#define AD_DMARESIBC 0x84 /* RES interrupt base count */
|
|
-#define AD_DMAADCICC 0x88 /* ADC interrupt current count */
|
|
-#define AD_DMAADCIBC 0x8c /* ADC interrupt base count */
|
|
-#define AD_DMASYNICC 0x90 /* SYN interrupt current count */
|
|
-#define AD_DMASYNIBC 0x94 /* SYN interrupt base count */
|
|
-#define AD_DMAWAVICC 0x98 /* WAV interrupt current count */
|
|
-#define AD_DMAWAVIBC 0x9c /* WAV interrupt base count */
|
|
-#define AD_DMARESCTRL 0xa0 /* RES PCI control/status */
|
|
-#define AD_DMAADCCTRL 0xa8 /* ADC PCI control/status */
|
|
-#define AD_DMASYNCTRL 0xb0 /* SYN PCI control/status */
|
|
-#define AD_DMAWAVCTRL 0xb8 /* WAV PCI control/status */
|
|
-#define AD_DMADISR 0xc0 /* PCI DMA intr status */
|
|
-#define AD_DMACHSS 0xc4 /* PCI DMA channel stop status */
|
|
-
|
|
-#define AD_GPIOIPC 0xc8 /* IO port ctrl */
|
|
-#define AD_GPIOOP 0xca /* IO output status */
|
|
-#define AD_GPIOIP 0xcc /* IO input status */
|
|
+#define AD_DS_WSMC 0x00 /* DMA input wave/syn mixer control */
|
|
+#define AD_DS_RAMC 0x02 /* DMA output resamp/ADC mixer control */
|
|
+#define AD_DS_WADA 0x04 /* DMA input wave attenuation */
|
|
+#define AD_DS_SYDA 0x06 /* DMA input syn attentuation */
|
|
+#define AD_DS_WAS 0x08 /* wave input sample rate */
|
|
+#define AD_DS_RES 0x0a /* resampler output sample rate */
|
|
+#define AD_DS_CCS 0x0c /* chip control/status */
|
|
+
|
|
+#define AD_DMA_RESBA 0x40 /* RES base addr */
|
|
+#define AD_DMA_RESCA 0x44 /* RES current addr */
|
|
+#define AD_DMA_RESBC 0x48 /* RES base cnt */
|
|
+#define AD_DMA_RESCC 0x4c /* RES current count */
|
|
+#define AD_DMA_ADCBA 0x50 /* ADC */
|
|
+#define AD_DMA_ADCCA 0x54
|
|
+#define AD_DMA_ADCBC 0x58
|
|
+#define AD_DMA_ADCCC 0x5c
|
|
+#define AD_DMA_SYNBA 0x60 /* SYN */
|
|
+#define AD_DMA_SYNCA 0x64
|
|
+#define AD_DMA_SYNBC 0x68
|
|
+#define AD_DMA_SYNCC 0x6c
|
|
+#define AD_DMA_WAVBA 0x70 /* WAV */
|
|
+#define AD_DMA_WAVCA 0x74
|
|
+#define AD_DMA_WAVBC 0x78
|
|
+#define AD_DMA_WAVCC 0x7c
|
|
+#define AD_DMA_RESICC 0x80 /* RES interrupt current count */
|
|
+#define AD_DMA_RESIBC 0x84 /* RES interrupt base count */
|
|
+#define AD_DMA_ADCICC 0x88 /* ADC interrupt current count */
|
|
+#define AD_DMA_ADCIBC 0x8c /* ADC interrupt base count */
|
|
+#define AD_DMA_SYNICC 0x90 /* SYN interrupt current count */
|
|
+#define AD_DMA_SYNIBC 0x94 /* SYN interrupt base count */
|
|
+#define AD_DMA_WAVICC 0x98 /* WAV interrupt current count */
|
|
+#define AD_DMA_WAVIBC 0x9c /* WAV interrupt base count */
|
|
+#define AD_DMA_RESCTRL 0xa0 /* RES PCI control/status */
|
|
+#define AD_DMA_ADCCTRL 0xa8 /* ADC PCI control/status */
|
|
+#define AD_DMA_SYNCTRL 0xb0 /* SYN PCI control/status */
|
|
+#define AD_DMA_WAVCTRL 0xb8 /* WAV PCI control/status */
|
|
+#define AD_DMA_DISR 0xc0 /* PCI DMA intr status */
|
|
+#define AD_DMA_CHSS 0xc4 /* PCI DMA channel stop status */
|
|
+
|
|
+#define AD_GPIO_IPC 0xc8 /* IO port ctrl */
|
|
+#define AD_GPIO_OP 0xca /* IO output status */
|
|
+#define AD_GPIO_IP 0xcc /* IO input status */
|
|
|
|
/* AC97 registers, 0x100 - 0x17f; see ac97.h */
|
|
-#define AD_ACIC 0x180 /* AC Link interface ctrl */
|
|
+#define AD_AC97_BASE 0x100 /* ac97 base register */
|
|
+#define AD_AC97_ACIC 0x180 /* AC Link interface ctrl */
|
|
|
|
/* OPL3; BAR1 */
|
|
-#define AD_OPLM0AS 0x00 /* Music0 address/status */
|
|
-#define AD_OPLM0DATA 0x01 /* Music0 data */
|
|
-#define AD_OPLM1A 0x02 /* Music1 address */
|
|
-#define AD_OPLM1DATA 0x03 /* Music1 data */
|
|
+#define AD_OPL_M0AS 0x00 /* Music0 address/status */
|
|
+#define AD_OPL_M0DATA 0x01 /* Music0 data */
|
|
+#define AD_OPL_M1A 0x02 /* Music1 address */
|
|
+#define AD_OPL_M1DATA 0x03 /* Music1 data */
|
|
/* 0x04-0x0f reserved */
|
|
|
|
/* MIDI; BAR2 */
|
|
@@ -59,9 +60,9 @@
|
|
#define AD_MISC 0x01 /* MIDI status/cmd */
|
|
/* 0x02-0xff reserved */
|
|
|
|
-#define AD_DSIOMEMSIZE 512
|
|
-#define AD_OPLMEMSIZE 16
|
|
-#define AD_MIDIMEMSIZE 16
|
|
+#define AD_DS_IOMEMSIZE 512
|
|
+#define AD_OPL_MEMSIZE 16
|
|
+#define AD_MIDI_MEMSIZE 16
|
|
|
|
#define AD_WAV_STATE 0
|
|
#define AD_ADC_STATE 1
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/sound/oss/harmony.c CVS2_6_15_RC7_PA0/sound/oss/harmony.c
|
|
--- LINUS_2_6_15_RC7/sound/oss/harmony.c 2005-12-27 13:26:02.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/sound/oss/harmony.c 2005-12-19 13:43:22.000000000 -0700
|
|
@@ -1236,7 +1236,7 @@
|
|
}
|
|
|
|
/* Set the HPA of harmony */
|
|
- harmony.hpa = (struct harmony_hpa *)dev->hpa;
|
|
+ harmony.hpa = (struct harmony_hpa *)dev->hpa.start;
|
|
harmony.dev = dev;
|
|
|
|
/* Grab the ID and revision from the device */
|
|
@@ -1250,7 +1250,7 @@
|
|
|
|
printk(KERN_INFO "Lasi Harmony Audio driver " HARMONY_VERSION ", "
|
|
"h/w id %i, rev. %i at 0x%lx, IRQ %i\n",
|
|
- id, rev, dev->hpa, harmony.dev->irq);
|
|
+ id, rev, dev->hpa.start, harmony.dev->irq);
|
|
|
|
/* Make sure the control bit isn't set, although I don't think it
|
|
ever is. */
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/sound/pci/Kconfig CVS2_6_15_RC7_PA0/sound/pci/Kconfig
|
|
--- LINUS_2_6_15_RC7/sound/pci/Kconfig 2005-12-27 13:26:03.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/sound/pci/Kconfig 2005-11-11 21:09:48.000000000 -0700
|
|
@@ -321,6 +321,14 @@
|
|
To compile this as a module, choose M here: the module
|
|
will be called snd-ad1889.
|
|
|
|
+config SND_AD1889_OPL3
|
|
+ bool "Analog Devices AD1889 OPL3 Support (Experimental)"
|
|
+ depends on SND_AD1889 && EXPERIMENTAL
|
|
+ select SND_OPL3_LIB
|
|
+ help
|
|
+ Say Y here to include support for the OPL3-compatible interface
|
|
+ provided on an Analog Devices AD1889.
|
|
+
|
|
config SND_ALS4000
|
|
tristate "Avance Logic ALS4000"
|
|
depends on SND && ISA_DMA_API
|
|
diff -urN --exclude-from=/var/www/download/linux-2.6/autobuild/build-tools/dontdiff LINUS_2_6_15_RC7/sound/pci/ad1889.c CVS2_6_15_RC7_PA0/sound/pci/ad1889.c
|
|
--- LINUS_2_6_15_RC7/sound/pci/ad1889.c 2005-12-27 13:26:03.000000000 -0700
|
|
+++ CVS2_6_15_RC7_PA0/sound/pci/ad1889.c 2005-11-11 21:09:48.000000000 -0700
|
|
@@ -45,6 +45,10 @@
|
|
#include <sound/initval.h>
|
|
#include <sound/ac97_codec.h>
|
|
|
|
+#ifdef CONFIG_SND_AD1889_OPL3
|
|
+#include <sound/opl3.h>
|
|
+#endif
|
|
+
|
|
#include <asm/io.h>
|
|
|
|
#include "ad1889.h"
|
|
@@ -55,6 +59,7 @@
|
|
MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
|
|
MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
|
|
MODULE_LICENSE("GPL");
|
|
+MODULE_VERSION(AD1889_DRVVER);
|
|
MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
|
|
|
|
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
|
|
@@ -94,11 +99,20 @@
|
|
unsigned long bar;
|
|
void __iomem *iobase;
|
|
|
|
+#ifdef CONFIG_SND_AD1889_OPL3
|
|
+ unsigned long opl3_bar;
|
|
+ void __iomem *opl3_iobase;
|
|
+
|
|
+ opl3_t *opl3;
|
|
+ snd_hwdep_t *opl3hwdep;
|
|
+#endif
|
|
+
|
|
ac97_t *ac97;
|
|
ac97_bus_t *ac97_bus;
|
|
snd_pcm_t *pcm;
|
|
snd_info_entry_t *proc;
|
|
|
|
+ struct snd_dma_device dma;
|
|
snd_pcm_substream_t *psubs;
|
|
snd_pcm_substream_t *csubs;
|
|
|
|
@@ -112,25 +126,25 @@
|
|
static inline u16
|
|
ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
|
|
{
|
|
- return readw(chip->iobase + reg);
|
|
+ return ioread16(chip->iobase + reg);
|
|
}
|
|
|
|
static inline void
|
|
ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
|
|
{
|
|
- writew(val, chip->iobase + reg);
|
|
+ iowrite16(val, chip->iobase + reg);
|
|
}
|
|
|
|
static inline u32
|
|
ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
|
|
{
|
|
- return readl(chip->iobase + reg);
|
|
+ return ioread32(chip->iobase + reg);
|
|
}
|
|
|
|
static inline void
|
|
ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
|
|
{
|
|
- writel(val, chip->iobase + reg);
|
|
+ iowrite32(val, chip->iobase + reg);
|
|
}
|
|
|
|
static inline void
|
|
@@ -620,6 +634,9 @@
|
|
if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
|
|
snd_pcm_period_elapsed(chip->csubs);
|
|
|
|
+ ad1889_readl(chip, AD_DMA_DISR); /* flush */
|
|
+ /* XXX under some circumstances the DISR write flush may not happen */
|
|
+
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
@@ -658,6 +675,9 @@
|
|
chip->psubs = NULL;
|
|
chip->csubs = NULL;
|
|
|
|
+ chip->dma.dev = &chip->pci->dev;
|
|
+ chip->dma.type = SNDRV_DMA_TYPE_DEV;
|
|
+
|
|
err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
|
|
snd_dma_pci_data(chip->pci),
|
|
BUFFER_BYTES_MAX / 2,
|
|
@@ -874,6 +894,11 @@
|
|
if (chip->iobase)
|
|
iounmap(chip->iobase);
|
|
|
|
+#ifdef CONFIG_SND_AD1889_OPL3
|
|
+ if (chip->opl3_iobase)
|
|
+ iounmap(chip->opl3_iobase);
|
|
+#endif
|
|
+
|
|
pci_release_regions(chip->pci);
|
|
pci_disable_device(chip->pci);
|
|
|
|
@@ -954,6 +979,17 @@
|
|
|
|
spin_lock_init(&chip->lock); /* only now can we call ad1889_free */
|
|
|
|
+#ifdef CONFIG_SND_AD1889_OPL3
|
|
+ chip->opl3_bar = pci_resource_start(pci, 1);
|
|
+ chip->opl3_iobase = ioremap_nocache(chip->opl3_bar,
|
|
+ pci_resource_len(pci, 1));
|
|
+ if (chip->opl3_iobase == NULL) {
|
|
+ printk(KERN_ERR PFX "unable to reserve region.\n");
|
|
+ snd_ad1889_free(chip);
|
|
+ return -EBUSY;
|
|
+ }
|
|
+#endif
|
|
+
|
|
if (request_irq(pci->irq, snd_ad1889_interrupt,
|
|
SA_INTERRUPT|SA_SHIRQ, card->driver, (void*)chip)) {
|
|
printk(KERN_ERR PFX "cannot obtain IRQ %d\n", pci->irq);
|
|
@@ -1029,6 +1065,22 @@
|
|
if (err < 0)
|
|
goto free_and_ret;
|
|
|
|
+#ifdef CONFIG_SND_AD1889_OPL3
|
|
+ err = snd_opl3_create_mapped(card, chip->opl3_iobase,
|
|
+ chip->opl3_iobase + 2, OPL3_HW_OPL3,
|
|
+ &chip->opl3);
|
|
+ if (err) {
|
|
+ printk(KERN_ERR PFX "failed to create opl3\n");
|
|
+ goto free_and_ret;
|
|
+ }
|
|
+
|
|
+ err = snd_opl3_hwdep_new(chip->opl3, 0, 0, &chip->opl3hwdep);
|
|
+ if (err) {
|
|
+ printk(KERN_ERR PFX "failed to create opl3hwdep\n");
|
|
+ goto free_and_ret;
|
|
+ }
|
|
+#endif
|
|
+
|
|
err = snd_ad1889_pcm_init(chip, 0, NULL);
|
|
if (err < 0)
|
|
goto free_and_ret;
|