Changed permissions; updated DAC src

master
Mike Szczys 11 years ago
parent e7b8823c4f
commit 00e45fdb63
  1. 81
      inc/stm32f0xx_conf.h
  2. 2
      lib/Makefile
  3. 0
      lib/inc/core/arm_common_tables.h
  4. 0
      lib/inc/core/arm_math.h
  5. 0
      lib/inc/core/core_cm0.h
  6. 0
      lib/inc/core/core_cm3.h
  7. 0
      lib/inc/core/core_cm4.h
  8. 0
      lib/inc/core/core_cm4_simd.h
  9. 0
      lib/inc/core/core_cmFunc.h
  10. 0
      lib/inc/core/core_cmInstr.h
  11. 0
      lib/inc/peripherals/stm32f0xx_adc.h
  12. 0
      lib/inc/peripherals/stm32f0xx_cec.h
  13. 0
      lib/inc/peripherals/stm32f0xx_comp.h
  14. 0
      lib/inc/peripherals/stm32f0xx_crc.h
  15. 0
      lib/inc/peripherals/stm32f0xx_dac.h
  16. 0
      lib/inc/peripherals/stm32f0xx_dbgmcu.h
  17. 0
      lib/inc/peripherals/stm32f0xx_dma.h
  18. 0
      lib/inc/peripherals/stm32f0xx_exti.h
  19. 0
      lib/inc/peripherals/stm32f0xx_flash.h
  20. 0
      lib/inc/peripherals/stm32f0xx_gpio.h
  21. 0
      lib/inc/peripherals/stm32f0xx_i2c.h
  22. 0
      lib/inc/peripherals/stm32f0xx_iwdg.h
  23. 0
      lib/inc/peripherals/stm32f0xx_misc.h
  24. 0
      lib/inc/peripherals/stm32f0xx_pwr.h
  25. 0
      lib/inc/peripherals/stm32f0xx_rcc.h
  26. 0
      lib/inc/peripherals/stm32f0xx_rtc.h
  27. 0
      lib/inc/peripherals/stm32f0xx_spi.h
  28. 0
      lib/inc/peripherals/stm32f0xx_syscfg.h
  29. 0
      lib/inc/peripherals/stm32f0xx_tim.h
  30. 0
      lib/inc/peripherals/stm32f0xx_usart.h
  31. 0
      lib/inc/peripherals/stm32f0xx_wwdg.h
  32. 0
      lib/inc/stm32f0_discovery.h
  33. 0
      lib/inc/stm32f0xx.h
  34. 0
      lib/inc/stm32f0xx_conf.h
  35. 0
      lib/inc/system_stm32f0xx.h
  36. 0
      lib/src/peripherals/stm32f0xx_adc.c
  37. 0
      lib/src/peripherals/stm32f0xx_cec.c
  38. 0
      lib/src/peripherals/stm32f0xx_comp.c
  39. 0
      lib/src/peripherals/stm32f0xx_crc.c
  40. 103
      lib/src/peripherals/stm32f0xx_dac.c
  41. 0
      lib/src/peripherals/stm32f0xx_dbgmcu.c
  42. 0
      lib/src/peripherals/stm32f0xx_dma.c
  43. 0
      lib/src/peripherals/stm32f0xx_exti.c
  44. 0
      lib/src/peripherals/stm32f0xx_flash.c
  45. 0
      lib/src/peripherals/stm32f0xx_gpio.c
  46. 0
      lib/src/peripherals/stm32f0xx_i2c.c
  47. 0
      lib/src/peripherals/stm32f0xx_iwdg.c
  48. 0
      lib/src/peripherals/stm32f0xx_misc.c
  49. 0
      lib/src/peripherals/stm32f0xx_pwr.c
  50. 0
      lib/src/peripherals/stm32f0xx_rcc.c
  51. 0
      lib/src/peripherals/stm32f0xx_rtc.c
  52. 0
      lib/src/peripherals/stm32f0xx_spi.c
  53. 0
      lib/src/peripherals/stm32f0xx_syscfg.c
  54. 0
      lib/src/peripherals/stm32f0xx_tim.c
  55. 0
      lib/src/peripherals/stm32f0xx_usart.c
  56. 0
      lib/src/peripherals/stm32f0xx_wwdg.c
  57. 0
      lib/src/stm32f0_discovery.c
  58. 63
      lib/startup_stm32f0xx.s
  59. 2
      src/main.c
  60. 21
      src/main.c~
  61. 0
      src/system_stm32f0xx.c

@ -1,81 +0,0 @@
/**
******************************************************************************
* @file IO_Toggle/stm32f0xx_conf.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @brief Library configuration file.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F0XX_CONF_H
#define __STM32F0XX_CONF_H
/* Includes ------------------------------------------------------------------*/
/* Comment the line below to disable peripheral header file inclusion */
#include "stm32f0xx_adc.h"
#include "stm32f0xx_cec.h"
#include "stm32f0xx_crc.h"
#include "stm32f0xx_comp.h"
#include "stm32f0xx_dac.h"
#include "stm32f0xx_dbgmcu.h"
#include "stm32f0xx_dma.h"
#include "stm32f0xx_exti.h"
#include "stm32f0xx_flash.h"
#include "stm32f0xx_gpio.h"
#include "stm32f0xx_syscfg.h"
#include "stm32f0xx_i2c.h"
#include "stm32f0xx_iwdg.h"
#include "stm32f0xx_pwr.h"
#include "stm32f0xx_rcc.h"
#include "stm32f0xx_rtc.h"
#include "stm32f0xx_spi.h"
#include "stm32f0xx_tim.h"
#include "stm32f0xx_usart.h"
#include "stm32f0xx_wwdg.h"
#include "stm32f0xx_misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Uncomment the line below to expanse the "assert_param" macro in the
Standard Peripheral Library drivers code */
/* #define USE_FULL_ASSERT 1 */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function which reports
* the name of the source file and the source line number of the call
* that failed. If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0)
#endif /* USE_FULL_ASSERT */
#endif /* __STM32F0XX_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

@ -10,7 +10,7 @@ CFLAGS += -mlittle-endian -mthumb -mcpu=cortex-m0 -march=armv6s-m
CFLAGS += -ffreestanding -nostdlib
CFLAGS += -Iinc -Iinc/core -Iinc/peripherals
#SRCS = stm32f0_discovery.c
SRCS = stm32f0_discovery.c
SRCS = stm32f0xx_adc.c stm32f0xx_cec.c stm32f0xx_comp.c stm32f0xx_crc.c \
stm32f0xx_dac.c stm32f0xx_dbgmcu.c stm32f0xx_dma.c stm32f0xx_exti.c \
stm32f0xx_flash.c stm32f0xx_gpio.c stm32f0xx_i2c.c stm32f0xx_iwdg.c \

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_dac.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the Digital-to-Analog Converter (DAC) peripheral:
* + DAC channel configuration: trigger, output buffer, data format
@ -98,6 +98,7 @@
/* Includes ------------------------------------------------------------------*/
#include "stm32f0xx_dac.h"
#include "stm32f0xx_rcc.h"
/** @addtogroup STM32F0xx_StdPeriph_Driver
* @{
@ -157,11 +158,10 @@ void DAC_DeInit(void)
* @brief Initializes the DAC peripheral according to the specified
* parameters in the DAC_InitStruct.
* @param DAC_Channel: the selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that
* contains the configuration information for the specified DAC channel.
*
* @retval None
*/
void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct)
@ -194,7 +194,7 @@ void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct)
/**
* @brief Fills each DAC_InitStruct member with its default value.
* @param DAC_InitStruct : pointer to a DAC_InitTypeDef structure which will
* @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure which will
* be initialized.
* @retval None
*/
@ -210,12 +210,11 @@ void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct)
/**
* @brief Enables or disables the specified DAC channel.
* @param DAC_Channel: The selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* @param NewState: new state of the DAC channel.
* This parameter can be: ENABLE or DISABLE.
* @note When the DAC channel is enabled the trigger source can no more
* be modified.
* This parameter can be: ENABLE or DISABLE.
* @note When the DAC channel is enabled the trigger source can no more be modified.
* @retval None
*/
void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState)
@ -239,10 +238,10 @@ void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState)
/**
* @brief Enables or disables the selected DAC channel software trigger.
* @param DAC_Channel: the selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* @param NewState: new state of the selected DAC channel software trigger.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState)
@ -266,11 +265,11 @@ void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState)
/**
* @brief Set the specified data holding register value for DAC channel1.
* @param DAC_Align: Specifies the data alignment for DAC channel1.
* This parameter can be one of the following values:
* @arg DAC_Align_8b_R: 8bit right data alignment selected
* @arg DAC_Align_12b_L: 12bit left data alignment selected
* @arg DAC_Align_12b_R: 12bit right data alignment selected
* @param Data : Data to be loaded in the selected data holding register.
* This parameter can be one of the following values:
* @arg DAC_Align_8b_R: 8bit right data alignment selected
* @arg DAC_Align_12b_L: 12bit left data alignment selected
* @arg DAC_Align_12b_R: 12bit right data alignment selected
* @param Data: Data to be loaded in the selected data holding register.
* @retval None
*/
void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data)
@ -291,8 +290,8 @@ void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data)
/**
* @brief Returns the last data output value of the selected DAC channel.
* @param DAC_Channel: the selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* @retval The selected DAC channel data output value.
*/
uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel)
@ -330,11 +329,11 @@ uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel)
* When enabled DMA1 is generated when an external trigger (EXTI Line9,
* TIM2, TIM3, TIM6 or TIM15 but not a software trigger) occurs
* @param DAC_Channel: the selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* @param NewState: new state of the selected DAC channel DMA request.
* This parameter can be: ENABLE or DISABLE.
* The DAC channel1 is mapped on DMA1 channel3 which must be already configured.
* This parameter can be: ENABLE or DISABLE.
* @note The DAC channel1 is mapped on DMA1 channel3 which must be already configured.
* @retval None
*/
void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState)
@ -374,15 +373,15 @@ void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState)
/**
* @brief Enables or disables the specified DAC interrupts.
* @param DAC_Channel: the selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* @param DAC_IT: specifies the DAC interrupt sources to be enabled or disabled.
* This parameter can be the following values:
* @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
* @note The DMA underrun occurs when a second external trigger arrives before
* the acknowledgement for the first external trigger is received (first request).
* This parameter can be the following values:
* @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
* @note The DMA underrun occurs when a second external trigger arrives before
* the acknowledgement for the first external trigger is received (first request).
* @param NewState: new state of the specified DAC interrupts.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState)
@ -407,13 +406,13 @@ void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewStat
/**
* @brief Checks whether the specified DAC flag is set or not.
* @param DAC_Channel: thee selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* @param DAC_FLAG: specifies the flag to check.
* This parameter can be only of the following value:
* @arg DAC_FLAG_DMAUDR: DMA underrun flag
* @note The DMA underrun occurs when a second external trigger arrives before
* the acknowledgement for the first external trigger is received (first request).
* This parameter can be only of the following value:
* @arg DAC_FLAG_DMAUDR: DMA underrun flag
* @note The DMA underrun occurs when a second external trigger arrives before
* the acknowledgement for the first external trigger is received (first request).
* @retval The new state of DAC_FLAG (SET or RESET).
*/
FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG)
@ -442,11 +441,11 @@ FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG)
/**
* @brief Clears the DAC channel's pending flags.
* @param DAC_Channel: the selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* @param DAC_FLAG: specifies the flag to clear.
* This parameter can be of the following value:
* @arg DAC_FLAG_DMAUDR: DMA underrun flag
* This parameter can be of the following value:
* @arg DAC_FLAG_DMAUDR: DMA underrun flag
* @retval None
*/
void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG)
@ -462,13 +461,13 @@ void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG)
/**
* @brief Checks whether the specified DAC interrupt has occurred or not.
* @param DAC_Channel: the selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* @param DAC_IT: specifies the DAC interrupt source to check.
* This parameter can be the following values:
* @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
* @note The DMA underrun occurs when a second external trigger arrives before
* the acknowledgement for the first external trigger is received (first request).
* This parameter can be the following values:
* @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
* @note The DMA underrun occurs when a second external trigger arrives before
* the acknowledgement for the first external trigger is received (first request).
* @retval The new state of DAC_IT (SET or RESET).
*/
ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT)
@ -501,11 +500,11 @@ ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT)
/**
* @brief Clears the DAC channel's interrupt pending bits.
* @param DAC_Channel: the selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* This parameter can be one of the following values:
* @arg DAC_Channel_1: DAC Channel1 selected
* @param DAC_IT: specifies the DAC interrupt pending bit to clear.
* This parameter can be the following values:
* @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
* This parameter can be the following values:
* @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
* @retval None
*/
void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT)

@ -4,11 +4,12 @@
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @brief STM32F0xx Devices vector table for RIDE7 toolchain.
* @brief STM32F0xx Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Configure the clock system
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M0 processor is in Thread mode,
@ -32,7 +33,7 @@
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m0
.fpu softvfp
@ -41,10 +42,10 @@
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
@ -58,17 +59,19 @@ defined in linker script */
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr r0, =_estack
mov sp, r0 /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@ -77,7 +80,7 @@ CopyDataInit:
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
@ -86,42 +89,52 @@ LoopCopyDataInit:
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
str r3, [r2]
adds r2, r2, #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
bx lr
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval None
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/*******************************************************************************
/******************************************************************************
*
* The minimal vector table for a Cortex M0. Note that the proper constructs
* The minimal vector table for a Cortex M0. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*******************************************************************************/
.section .isr_vector,"a",%progbits
*
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
@ -161,7 +174,7 @@ g_pfnVectors:
.word TIM2_IRQHandler
.word TIM3_IRQHandler
.word TIM6_DAC_IRQHandler
.word 0
.word 0
.word TIM14_IRQHandler
.word TIM15_IRQHandler
.word TIM16_IRQHandler
@ -177,15 +190,15 @@ g_pfnVectors:
.word 0
.word BootRAM /* @0x108. This is for boot in RAM mode for
STM32F0xx devices. */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
@ -286,7 +299,7 @@ g_pfnVectors:
.thumb_set USART2_IRQHandler,Default_Handler
.weak CEC_IRQHandler
.thumb_set CEC_IRQHandler,Default_Handler
.thumb_set CEC_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

@ -1,4 +1,4 @@
#include "stm32f4xx_conf.h"
#include "stm32f0xx_conf.h"
int main(void)
{

@ -0,0 +1,21 @@
#include "stm32f4xx_conf.h"
int main(void)
{
//#elif CONFIG_STM32F0_DISCOVERY
//
//#define GPIOC 0x48000800 /* port C */
//#define GPIOC_MODER (GPIOC + 0x00) /* port mode register */
//#define LED_PORT_ODR (GPIOC + 0x14) /* port output data register */
//
//#define LED_BLUE (1 << 8) /* port C, pin 8 */
//#define LED_GREEN (1 << 9) /* port C, pin 9 */
//#define LED_ORANGE 0
//#define LED_RED 0
GPIOC->MODER = (1 << 16);
while(1) GPIOC->ODR ^= (1 << 16);
}
Loading…
Cancel
Save