From 61b6afcbccc4ec9514353cca8e7b2602aa1adc6f Mon Sep 17 00:00:00 2001 From: Mike Szczys Date: Sat, 16 Jun 2012 13:47:01 -0500 Subject: [PATCH] Major restructuring to match STM peripherals library; added auto flash programming via OpenOCD --- {lib => Device}/startup_stm32f0xx.s | 0 {lib/inc => Device}/stm32f0xx_conf.h | 31 +- .../CMSIS END USER LICENCE AGREEMENT.pdf | Bin 0 -> 51511 bytes .../Device/ST/STM32F0xx/Include}/stm32f0xx.h | 454 +- .../ST/STM32F0xx/Include}/system_stm32f0xx.h | 4 +- .../Device/ST/STM32F0xx/Release_Notes.html | 146 + .../Templates/TrueSTUDIO/startup_stm32f0xx.s | 305 ++ .../Source/Templates/arm/startup_stm32f0xx.s | 256 ++ .../Templates/gcc_ride7/startup_stm32f0xx.s | 292 ++ .../Source/Templates/iar/startup_stm32f0xx.s | 330 ++ .../Source/Templates/system_stm32f0xx.c | 353 ++ .../Documentation/CMSIS-SVD_Schema_1_0.xsd | 274 ++ .../CMSIS/Documentation/CMSIS_CM4_SIMD.htm | 3809 +++++++++++++++++ Libraries/CMSIS/Documentation/CMSIS_Core.htm | 1470 +++++++ .../Documentation/CMSIS_DebugSupport.htm | 240 ++ .../CMSIS/Documentation/CMSIS_History.htm | 472 ++ .../CMSIS/Documentation/CMSIS_Logo_Final.jpg | Bin 0 -> 123676 bytes .../CMSIS_System_View_Description.htm | 1157 +++++ .../CMSIS/Include}/arm_common_tables.h | 0 .../CMSIS/Include}/arm_math.h | 0 .../CMSIS/Include}/core_cm0.h | 0 .../CMSIS/Include}/core_cm3.h | 0 .../CMSIS/Include}/core_cm4.h | 0 .../CMSIS/Include}/core_cm4_simd.h | 0 .../CMSIS/Include}/core_cmFunc.h | 0 .../CMSIS/Include}/core_cmInstr.h | 0 Libraries/CMSIS/README.txt | 34 + Libraries/CMSIS/index.htm | 115 + {lib => Libraries}/Makefile | 5 +- .../Release_Notes.html | 340 ++ .../inc}/stm32f0xx_adc.h | 6 +- .../inc}/stm32f0xx_cec.h | 4 +- .../inc}/stm32f0xx_comp.h | 4 +- .../inc}/stm32f0xx_crc.h | 4 +- .../inc}/stm32f0xx_dac.h | 4 +- .../inc}/stm32f0xx_dbgmcu.h | 4 +- .../inc}/stm32f0xx_dma.h | 4 +- .../inc}/stm32f0xx_exti.h | 4 +- .../inc}/stm32f0xx_flash.h | 4 +- .../inc}/stm32f0xx_gpio.h | 4 +- .../inc}/stm32f0xx_i2c.h | 4 +- .../inc}/stm32f0xx_iwdg.h | 4 +- .../inc}/stm32f0xx_misc.h | 4 +- .../inc}/stm32f0xx_pwr.h | 4 +- .../inc}/stm32f0xx_rcc.h | 4 +- .../inc}/stm32f0xx_rtc.h | 21 +- .../inc}/stm32f0xx_spi.h | 4 +- .../inc}/stm32f0xx_syscfg.h | 4 +- .../inc}/stm32f0xx_tim.h | 4 +- .../inc}/stm32f0xx_usart.h | 23 +- .../inc}/stm32f0xx_wwdg.h | 4 +- .../src}/stm32f0xx_adc.c | 242 +- .../src}/stm32f0xx_cec.c | 150 +- .../src}/stm32f0xx_comp.c | 54 +- .../src}/stm32f0xx_crc.c | 16 +- .../src}/stm32f0xx_dac.c | 0 .../src}/stm32f0xx_dbgmcu.c | 20 +- .../src}/stm32f0xx_dma.c | 214 +- .../src}/stm32f0xx_exti.c | 21 +- .../src}/stm32f0xx_flash.c | 129 +- .../src}/stm32f0xx_gpio.c | 59 +- .../src}/stm32f0xx_i2c.c | 272 +- .../src}/stm32f0xx_iwdg.c | 40 +- .../src}/stm32f0xx_misc.c | 20 +- .../src}/stm32f0xx_pwr.c | 51 +- .../src}/stm32f0xx_rcc.c | 442 +- .../src}/stm32f0xx_rtc.c | 384 +- .../src}/stm32f0xx_spi.c | 249 +- .../src}/stm32f0xx_syscfg.c | 71 +- .../src}/stm32f0xx_tim.c | 832 ++-- .../src}/stm32f0xx_usart.c | 472 +- .../src}/stm32f0xx_wwdg.c | 24 +- Makefile | 20 +- README.md | 56 +- extra/stm32f0-openocd.cfg | 22 + lib/inc/stm32f0_discovery.h | 156 - lib/src/stm32f0_discovery.c | 256 -- src/main.c | 33 +- src/system_stm32f0xx.c | 0 79 files changed, 11860 insertions(+), 2654 deletions(-) rename {lib => Device}/startup_stm32f0xx.s (100%) rename {lib/inc => Device}/stm32f0xx_conf.h (85%) mode change 100755 => 100644 create mode 100644 Libraries/CMSIS/CMSIS END USER LICENCE AGREEMENT.pdf rename {lib/inc => Libraries/CMSIS/Device/ST/STM32F0xx/Include}/stm32f0xx.h (96%) mode change 100755 => 100644 rename {lib/inc => Libraries/CMSIS/Device/ST/STM32F0xx/Include}/system_stm32f0xx.h (93%) mode change 100755 => 100644 create mode 100644 Libraries/CMSIS/Device/ST/STM32F0xx/Release_Notes.html create mode 100644 Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/TrueSTUDIO/startup_stm32f0xx.s create mode 100644 Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/arm/startup_stm32f0xx.s create mode 100644 Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc_ride7/startup_stm32f0xx.s create mode 100644 Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/startup_stm32f0xx.s create mode 100644 Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c create mode 100644 Libraries/CMSIS/Documentation/CMSIS-SVD_Schema_1_0.xsd create mode 100644 Libraries/CMSIS/Documentation/CMSIS_CM4_SIMD.htm create mode 100644 Libraries/CMSIS/Documentation/CMSIS_Core.htm create mode 100644 Libraries/CMSIS/Documentation/CMSIS_DebugSupport.htm create mode 100644 Libraries/CMSIS/Documentation/CMSIS_History.htm create mode 100644 Libraries/CMSIS/Documentation/CMSIS_Logo_Final.jpg create mode 100644 Libraries/CMSIS/Documentation/CMSIS_System_View_Description.htm rename {lib/inc/core => Libraries/CMSIS/Include}/arm_common_tables.h (100%) mode change 100755 => 100644 rename {lib/inc/core => Libraries/CMSIS/Include}/arm_math.h (100%) mode change 100755 => 100644 rename {lib/inc/core => Libraries/CMSIS/Include}/core_cm0.h (100%) mode change 100755 => 100644 rename {lib/inc/core => Libraries/CMSIS/Include}/core_cm3.h (100%) mode change 100755 => 100644 rename {lib/inc/core => Libraries/CMSIS/Include}/core_cm4.h (100%) mode change 100755 => 100644 rename {lib/inc/core => Libraries/CMSIS/Include}/core_cm4_simd.h (100%) mode change 100755 => 100644 rename {lib/inc/core => Libraries/CMSIS/Include}/core_cmFunc.h (100%) mode change 100755 => 100644 rename {lib/inc/core => Libraries/CMSIS/Include}/core_cmInstr.h (100%) mode change 100755 => 100644 create mode 100644 Libraries/CMSIS/README.txt create mode 100644 Libraries/CMSIS/index.htm rename {lib => Libraries}/Makefile (83%) create mode 100644 Libraries/STM32F0xx_StdPeriph_Driver/Release_Notes.html rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_adc.h (97%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_cec.h (97%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_comp.h (97%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_crc.h (96%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_dac.h (96%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_dbgmcu.h (96%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_dma.h (97%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_exti.h (97%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_flash.h (96%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_gpio.h (96%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_i2c.h (97%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_iwdg.h (95%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_misc.h (95%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_pwr.h (96%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_rcc.h (97%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_rtc.h (96%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_spi.h (97%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_syscfg.h (97%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_tim.h (97%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_usart.h (94%) mode change 100755 => 100644 rename {lib/inc/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/inc}/stm32f0xx_wwdg.h (95%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_adc.c (81%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_cec.c (80%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_comp.c (87%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_crc.c (91%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_dac.c (100%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_dbgmcu.c (88%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_dma.c (72%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_exti.c (89%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_flash.c (85%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_gpio.c (88%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_i2c.c (83%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_iwdg.c (86%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_misc.c (87%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_pwr.c (89%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_rcc.c (73%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_rtc.c (82%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_spi.c (81%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_syscfg.c (74%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_tim.c (76%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_usart.c (81%) mode change 100755 => 100644 rename {lib/src/peripherals => Libraries/STM32F0xx_StdPeriph_Driver/src}/stm32f0xx_wwdg.c (89%) mode change 100755 => 100644 create mode 100644 extra/stm32f0-openocd.cfg delete mode 100755 lib/inc/stm32f0_discovery.h delete mode 100755 lib/src/stm32f0_discovery.c mode change 100755 => 100644 src/system_stm32f0xx.c diff --git a/lib/startup_stm32f0xx.s b/Device/startup_stm32f0xx.s similarity index 100% rename from lib/startup_stm32f0xx.s rename to Device/startup_stm32f0xx.s diff --git a/lib/inc/stm32f0xx_conf.h b/Device/stm32f0xx_conf.h old mode 100755 new mode 100644 similarity index 85% rename from lib/inc/stm32f0xx_conf.h rename to Device/stm32f0xx_conf.h index d2b620c..d4f914e --- a/lib/inc/stm32f0xx_conf.h +++ b/Device/stm32f0xx_conf.h @@ -1,6 +1,6 @@ /** ****************************************************************************** - * @file IO_Toggle/stm32f0xx_conf.h + * @file stm32F0xx_conf.h * @author MCD Application Team * @version V1.0.0 * @date 23-March-2012 @@ -23,7 +23,7 @@ * limitations under the License. * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F0XX_CONF_H @@ -31,26 +31,26 @@ /* Includes ------------------------------------------------------------------*/ /* Comment the line below to disable peripheral header file inclusion */ -#include "stm32f0xx_adc.h" -#include "stm32f0xx_cec.h" +/* #include "stm32f0xx_adc.h" */ +#include "stm32f0xx_cec.h" #include "stm32f0xx_crc.h" -#include "stm32f0xx_comp.h" -#include "stm32f0xx_dac.h" +#include "stm32f0xx_comp.h" +#include "stm32f0xx_dac.h" #include "stm32f0xx_dbgmcu.h" -#include "stm32f0xx_dma.h" -#include "stm32f0xx_exti.h" +#include "stm32f0xx_dma.h" +#include "stm32f0xx_exti.h" #include "stm32f0xx_flash.h" -#include "stm32f0xx_gpio.h" -#include "stm32f0xx_syscfg.h" +#include "stm32f0xx_gpio.h" +#include "stm32f0xx_syscfg.h" #include "stm32f0xx_i2c.h" #include "stm32f0xx_iwdg.h" -#include "stm32f0xx_pwr.h" -#include "stm32f0xx_rcc.h" -#include "stm32f0xx_rtc.h" +#include "stm32f0xx_pwr.h" +#include "stm32f0xx_rcc.h" +#include "stm32f0xx_rtc.h" #include "stm32f0xx_spi.h" #include "stm32f0xx_tim.h" -#include "stm32f0xx_usart.h" -#include "stm32f0xx_wwdg.h" +#include "stm32f0xx_usart.h" +#include "stm32f0xx_wwdg.h" #include "stm32f0xx_misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ /* Exported types ------------------------------------------------------------*/ @@ -58,7 +58,6 @@ /* Uncomment the line below to expanse the "assert_param" macro in the Standard Peripheral Library drivers code */ /* #define USE_FULL_ASSERT 1 */ - /* Exported macro ------------------------------------------------------------*/ #ifdef USE_FULL_ASSERT diff --git a/Libraries/CMSIS/CMSIS END USER LICENCE AGREEMENT.pdf b/Libraries/CMSIS/CMSIS END USER LICENCE AGREEMENT.pdf new file mode 100644 index 0000000000000000000000000000000000000000..e04afaee6286ce461b2ab5f286c6f99b232f5ae0 GIT binary patch literal 51511 zcma&MQ;;Q0)UH`ww%ujhwry)ybzzrn+h!NKY}>YN+qN;^f8v~pn3V5h0Q_&w ze}38ilk~rR%K>f8oXv^Y|CdM!3u|YfBcp`1p)*hnX#AgR0RbmxN1&k%0<3%H68~Bv z9%t-L?5v>k-`yA?~4M`(_T_PzT`m_{Q1f!0-!3I4K{t5rMs%=t|!5hAFZDMmTD z;$SH0Vs$wtT152p@)g9iF}yNj=#^Py&9= z72H8T)%x4-hchqh4b5AedzW)jx;F3a`~}3rKD^mk{O?c8emR^SQMCrsBU|DtO&|8( zL)ZB`aVIlw5559FXK%KVe!g1(_>b?;Glt8K*9q|!yXhL&t8V@uHed6SSKY7ywhrd+ zjbgulTR(j7ak_4VTknTGwm$c9je!hu9}3G%u^+wyJ_sz~Izw4E-7%w6Coir5vEz#H zjegp;jt&sHo~^zxNq=uyq|I2QnG=JWxyug7Qd#rn0pGS?WkBSR;}t1#kuwG0G1Il^ z2y58ytGZ}nv>by=g0HSj^R>7JI)`=6FL~2^;YHM&kuJMw!p*8m8|;^buRczW0Qhax8JzpoDKQQ-wI*BP?Y zP_SARDT^Ho4{RTmLFCMA+`t?bvk(xVe`TT~9ezb_rhSAHOtW5&{H8;e98D6(QJ=5V z<-tzYSlG74#S>*bM-4u4|2FC>pMCsL&|u&6_vH%IQP--n3=d-HEVu1Maht`ysPeo; z7+t;ooEh5R$G#K9M&c?AI4d?>RkZj2@af0|G$M>r_3niLi^~X~4I{kyE>9XDikHH_ z-}K#@(ec=Znuh9-YdUr$1`{!VgO)bjxaC$7Z2N#1usIM)f%`#_xJQs+`%)0SgD8f+ z3byoY0w(V+px67A+=Q(M5?)PL7;?3`xB6Hxm1snvz&63IP^Wuj%OOoKl}|u~XMRKq zYSO(Tc{G-{X6(V^7&G%0*Kd&XS^VC`7QpUn%X{wb%`t?+g)x7KzM{ZZ_qv+~&Y&U+ zD>n&~uuwA>&MI+%(Yu`~=# zoqfTp1;@3n=+kk6Zc28+)L1w_H++r1@`)@Cs-O3B^$|HI9#c52jX z5ab0_H1;`oo5E-zwLekHcrEa04L7jgFRH!m$mw22XJR{+eL^y)&GdqnsLI#qzx=ADnglN*fa8n_Ax683F#kaF6uSY{bCW$@;hINmpK_^|A@f8bD& z+l)9m)Yr;>10NwU~fo7s!;3czDvdmMBe4iZhS z$1)I>nM%fnhYEsTJ=iz?;-1%M64Q$rP2UsH7O>kA!6LVujzGj6qacUq^NCG>TRXhi zbx>`y;_iqcv1RU*G+@5C;rume0WMrd$rqpnGQu=**dCs)kwKQ_g+B0g#&MBFY%8RD z=M>nIVZ4zVpHp_K{Ag#YNo`9K^B=V5@7!z?!c%^m}DpK@Pdq%>C`Ac+I9ndEK6uc~wa2Z+4S${=8iQW`yfAeEuqK?XN^a`OykW#9-;^q#PkS1Ddf>)5*U78B=5KB zvggVHADd$`D2jjFe!&9@Df-`yHR_gj(6D8_7NSr$OUT8xE|s$&u<3(6cT=!cC!jhv z0BMa92WdNEd zH+AcVh~bor4ZcbL)2*o@ULe9i$F;)^-yKp#H9YKZtE65dNvM)UhlXz~s`^HGrEBg1 zC{Gv~r-(E7VW}o(!F@&R`#XTq4f3looeH$TZOTFFl;VYEi492KcCaZ^lE~*KQybjs6B`dvtuX*MX`vygKoK zxRxn1*4@O1v)Gvl!KP#_(gz2QX1MCg`(c$3b!IH}KU+C0txj=)GFl-^k}BK&&MMn* zWb`w^QkVXChVKw=vsPGFDp5$))vs3o&pr{{N%tlQ>2pQ4;O%1l;pwiys%#estGgaT z4+dd~a5BE*=jZ->T+UASnwzRl8|~i|p>}>%sQ)goO^j^6X}Dj}={$FwT9D!80%!2# zDeul>&9GuF2k#U#zlX37_eR8K{H?aF%b>lV-4ET7;-Z28cBJ%E+ll4Q3tWh{ODavrgq&zb}kiD)lf@xlcq%oyB z&A;Y)%n>H7Yw>r~W{1A4NsF-lJmQk(6D~k7Icf*ztgH)f2B!=|T;$$77SEpy==Y0D z{lX^)3FT&GhG&6))5!=SB=x#1=XxZTb|$k|%N6(~rIaxoYX1f02}ZmI6TH;<%0?lI zQ+cQYJJ!siM@i0P8-+-Ij$!u1B`A72W1K#625E2L&7jZoi@x=W!rpZ@{-e<-OeiB% zZo7$qG+5~I67|bK5!t7RPk4tH0Y7lwDLikWT5W2!EOf*W%RE2#PUmVqy)fx4qoTat&q@B4R?whcfp$$ z2Np470dYZ5th-?fQVTCYL{wWQSr8~#U13dPxkYk^Al{YSjV0V_-8&t zs8@lYK%#fC-xop+bNCHL5s~Br7jt=V%G*fEbH+e$U?$bH?FO|J|B16fLA!}WO5a(K zJ)I?dg!TIwaT1=*Gf2gkU zdstamU`|fYcEy~V?JI(gC(x>IK>vP47Gq_+;PK+7gIN~Y%U0%1NRP9)!JYau6b{AK z=o|kG+~sYrqD2ZNV5Yxtm-e7i{l~smf>1v{zA#BR{%5lY znFQsDX0M`JSYdsZre&mH&3He4LP(AXtQFUJ>IoD0Wx0|v+qq8Og=kQ0Lfm~xy#zr< zA52CAeT#eW3qdttS#so)osa*-WqhH6e%OMrd*@eHO#+?>i;+1z-{&nXXQb&nrEY3z zN6v&;!MYz8WWdaqF6jz`cyz4&@1NJtJtPCNhLltuUpj!YTq>sCIqbug3yUYWR2)oFg(1oU78WZqd`Y>n{5&a&XP)CDm5c~13#f$#0^z<1(Onb+H_v1v2a{M^4 zcaXeslQwnhDMWeVLIvpQS7K4>`&=ph?9>HuT6&#QHd1%3?m^i=71r;I%gNbcW$dHs zbZ;)!WRbUZycEhJ|KAduf~&2Q=B<9NPJS|!=|npg#i*ek(L`zZ9Ar5rjSf<^*ziKSE~B^nQP)4 z5;#>eM85!IZJh6td(GOczqMi6WgC&#sE9%d*sxDMltdZhnM2T}<8;b@JINzYb_V2x zG%kIBQi%!&A_^3w2Cztzf>w~=yrw|K1`c{uqQ!61w&10!wgymuqx;yhh@9crF-VqY z|NeY~cQuk4M#Asct?uE;lACHUKHLk`9NW(JJ zq*aK*5yM1^IOj{p7uiU?pbuw^c7$_(F&4I}9nW|#1v{}43`wWp7Tr7|SvRMRQ zW2-@cvA5%q-Eg~t3*L8^9rK^yG>WeY^0Dmssz{D!YGODvr0>)>x2gs2CI=~DIEgP* zDxgaqPp=Xcb~^b>+wWN;wt;3SCFT8+3nKV6bOl_HLMKSvikZ&HB#zrs0l3UU1-)z5 z8HX_C)WOJwPEp1$tmrOUQ;|7H=F1#!i(-Y_sf5HrBE=b|SBZ&(0YMMv(E;dRUznaU z8~HFD)UT~dy^G0&8)75!?%uKawsBycCNqrRe3c@s!<87RbD<_8tU#ow%W8EKD5#eA zw{#7}oMn{JfZ0NBeM{Q;ayG=x?j}Bu7)R|;zj7O}j0>z|N1U_*5HHtnT2AR+Po=(% zY)q8MdV~4IK`Lp#?DY_2YE7BJ!E-V)*D^rFJbf#6n7x)EMxS|bQ1~&E$uJ9Qe<)4% zd9EY3U4+#X=7%^Ejbg@V5<&{LW~%y)>8& z-J@S9x~=dga`i=f;eYfo!JABvmRL>F*x9^4w6mQ4A(qc=6h9dN*?$p;PSe+*FFQMr zks3=yxj^msA1LsIY*&y`JazKkQWmdaNkaJ^Yr1_k6=u#CQlI@zS zN5kH_{@8n;vf1{2k@4`?dQgmM^?(UJkBhy*{Fj6uOD!s3_`Jm4EnGLqrPDjl677po zaa*i_O~@tawm~qr{F2Z#i5{`eg6m&zar^V>o@%e}Om>oTJgsxj|G24zyPKv8&a(&& z+oCmsC@ms@dPSjnjODEYdUqikfKE;kiN?KMA>>T2Ph#lXmZA11bv=h%I7xXuLz6h;dTcS9&SQ)}$UTUcRqv{a{*fLABeZ=Ki zWqfw_+dVepFAZ&Cu((ymZlgtT<`dd8y(VnurTtLl*Y4#PBN=>GUzJG29u2237@3CKc_@ViGG<`O(9&Cetmg*?aE4OJT|yBYTj$5%l3=@ILyfiS>Y10 zs9@DSAoTe)#nc^en zJBWCP!bfMAwLFJdvVfgs8Qz7LeljH2+5Fq}UmPjOpMNWKF@*vRV9LW_M5ZR!(w#x^l%oN z1T*8Z0cL26L80YNcBgUeyP%xO4Gy&qS@Tkq5McQyZ)DgTC);E>qC`?mMauYFHrvabmG3e!aYlKp= zoD}ZtKIsU1SF=;0g_Sa(RQS^T(UNBEzmlJ&^+%O`cuT4w*ksduc;W*V#en@eh{fnH zNlih^MZ>wl5<9#VKx~=40A3#i9mzIOjw($Lew~Ot8&z>==ZG`pma(IYKVLW0ZD2Zxp(fDJ!^A>7|p-k7;j8$V3ZTn|~b~BOa_L>)dtEu?5tj_keZ0*E=*Ht-(m_)eYt25{ z!AsX&pmz&j)h?>m@)@UGyP4=p_dhJuyqpYkwn|q-dJC#aGS{gLOznMrLd^ox`uJZ< zIh(LV^9P`Koy4cB%Kk~Ui_)Rf3S0Q5AZD>pM-6DgB#0POk?ie0W?)MxGeez)fv}ev zTmW2Nx$~rn*+mA|h9&&bNsOX2?=SBj7j$&7TA<@I_Ki*JYU=P*r6Oycmrr2h|7a`Q zD-96h&y|qn1i>Yp*G%C`JYZ<6d%a>@Jm(}_wXe8y5dh-_^w_RNa2FT(#AM2ngZoy zpbLnTJeP4sm&f>f$_@U~5AOSqQ7&>qXhKDI9gXvb?Mj-rC68wS6yOxPjimz`-aUoj z#9}A1l2dh&7F5m((FBcP?tW_3t?&moH4b1J$ZwWANoLqHGUAveEts*-J!BVlA@{Dl zk{-`B{Y-`E)!JW}rlan`XVz&G?yGK8f7qFe*AKA?bf#ufUjInNe|oyhJ)woI(;<-T zp)+?OOTr*5hx0gU_$!VN6X3}Y{|GC`$b6R*X{$}%nWbl{VsXzw&OzzCSwr!MDI_W1 zf>S#1pF@uyGl^XG<4Uy_>ohusRiJmXEI+4Ur#nPPM0rY6c}JvL4HfSR`9K<5SHTi& z-*PpPcI0}>=1sA{u)v{94)Qo(HuaR5g4xl=MFdHo53uT`>fBBVJ=`4bTeG)k?xexf zRma-aMdVD_T-~gK^oYXve9f34Cv%Cyc)Y85iNY;+zf3buHY;LmL!i!5lwzY*j#u9% z5U6zwnQP7ue48eaEt6!rPOVu5M@ITxoqvyw)8}B|jK!lt&T?+5sFKSyO+)2ZDkX*= zwW6ht83{M_lEFThEXNDIF!R2t`PKrH_RjUekbo9`9{coDT)E5Iiq*^yeS72)H&fT8 z&cNGuGf|HwCrg_bM`h(*s=>ow+{s5G2r%(-B!ii>4$yg=k((VDq65%y7R0aoTfeKt z{H7ighTgQ;IEJuW4{#Pz%M%~V9o&h3KR!<{!fF`NJ3@5PvRR8$rhdv#N~UNpEM%&& z4|}0SY6_cKz-ODeq`w#>CzFsSfO zxD+VBtwpd5u9v*;oy4#rpQ7(V`+K(5S}z4IRpkNL$#V&9^DSR-Q(KQ{tOX0!xtXv; zB@(7raeNvtW9ZV3mdM83sj$HwWkL~`utJnx15v^$zJT;E=wc14`sm;$GtyV9zAzQ1 zyp_{yad8r+l%ycY%yS4xMu~6Kzhi6S1{AK(ENs_lQPgEW(nOcp318$Fz5iDlfr~hF zj6e>Zk17ijqrFNR&_BL_(mXi?&pTmhJ9W-XhnFd{w^CEKSPE{Bj%o0N?KknJ$*Zo$ z_fT^uOq-|&iKh`3|0&GPIzxCOo51;+bS1X(%&}+u;O7b&1b2b%vTR^Wx48C3jq-mK z`%Q0h+9X%Ovuysi$ly~RQg zm)`jnMcaQ-#fq_7%kwoW0y|TE8@>pV@mk}2oNUxrn3OM-ds-=KI;Tp)h=zkFt(491 zeDJt#7DYndZGh~u-F58u+Q&U9xD-=4cG>Po91Dvx`ilixph}c_tYnX+z~e`|WVoJl zPBww6hnbco|K#suZ^AaAGWATHPYk_;HvTz)e`U+gAUxSTi^ z2^?OMHHU9x7wC@|U=G(HEi>*EV96_&KIEC%+>LqgeAky&_aQ!JaYA)lsh!+*@@UEH z(o0;JW|N7TIxy3TmZdvBnwe*OX`oK4M&u(<7iv1I)l-bJw?Iv2Au!9gV%CM>?Jl-G z>qvH52*B{K{>2Egb%86;TyQp@&(B7dE1@XR+E(0ETDtWgixQYW?Px;T?R!2}zxF4( zZz9;r9MjREP>SL0*k`fXImr;_FGLkG#Yy#1MBWp6(-Ca8T&02m99e-DaVbaMs5GuF z*W#4Dj~_p2aj;N}Vz9sic=HG z5k%9Ar-ev=9eEtUUr0;| z(~o|bqJhuDwJS$KS@ujeGXG^Kq1NWC@xjy~)$NiLhBBAErRGhLqJWx7;3=Jz@kzZ+7Phe}HBGp0ter;IL$ z-^6a=_7vs%QEndzZxswZO<(wN8z_q>9{8=QVNnx3U{QvJuk7eHp>+9 ztfOqNOtC|5tU2{lB*-%367mp9)|PmLzS&_j^YKO8|KE}DW?N!zi%LvR(hLzzj|C2e zz)?6?-dE7_hg&ddHi1wsJ;r2M9W9flH!rY0gfPb*xJ2&ZnK8KGqQNJ>@l7j5+Se`= zY!)VD-HaF#vER?6B&cej#9Ug3^a;IN|84J}px7tt8X&j%Sd?6P1C14PSQ5wB0sGCD z(H&qVnlbgE0S7wI`aM^(V;<(5J`>JUMGrb3z8tuNjJBUAY2cmq=W%rCj4gl7BtZJ6 zW-3j0-Z%tGU!GqZ+)k?P-i4I77WW)VrJ~yR#0!4VC#!yeO($RLfg7S(Y1 zMO_;cygQLCuztSR@M*;aL!s(xznP|@A6$91%%z7F6}5;aWKP3*^YY22n4Yl172}4U zyE?e7#!oPauEG@ZC?Q9)xRNaXuVgj@$ecK%v281+MVQK6Dn%3QY1_rUW$_Zv_=4nX z@}0w=WPW@^&bQ6VN)1IjchMNKV?5kJ$Ek5GyC(;=a-dZfgLU0gd8*tq3n2%T@n3b! z;yc1>-#sJt1rJ%s=A$YyGwUe{@;peML3)paOuJT0Dsf!nQ`57s(W*;vBRb>9q%N%v zQ$uhc7<_1=Ru51SK)V39Exhm!1QV|}T{2N3jwX1pWBDhKL=LXg`pL{>Y^X6^iIt8MZZlc}u2 zlA}{aGFQ(xLJ`c5Z@(lVRv?(^SNg%_=;gY;#xs<4-dCeW^BcXtG~&R5>oK$G&6C1p ztgHqYe2mpbF;KL2J{EP;31!iE^ENvuKpa$Kp<*(KF~D2C(@?r$-;io+%k9EJ7~veE zZR=(-ji^G*svI=0y7LvQ$UH>Mkdy;d(3TmvtuS(oEfXft7`7u7Ayrug7KYLZFUTLf zS}*)pHEGajkyQWVIs&l14o`N~K6rgi(7G^{zYvn72B_3Rs~H)DhyFy40})}=NoxiU z*X70y@1r&+M1~$HepBAiLhy;_Zg$$sC3Rd@h8U+8-dd)8whBcITH);#m2MXkudVB+ z+Taiuji?2A+CgbBAFg{vk_%Kt`pKtzp=4KwoiT2XBVN%6rQolMGuiH8Ie~7yry;<+s7w0|7--aB9T0gfn`G%O9THv^n8aa7fNpJ_; zWd;;thI=INIewXv>3QY+3<@>5CE2GR=i2JndGcAF)st?jPkz?Jrsl~om2^szi(Qbf z$8gP@UZxHTS>{JZx_67?d0C`BPOJJnkEf#B{+EOnDqb=)%j0urLj9&N$Xqo@Fy*4T zJEbE`a##KA3em+#9fJp<#xUbk|C>qr z-!#+zuuK0#GZAsKvNQi5#EJX=gE%oW{r_N`uK2Z`GFuXEs^|Uw90ASB2glq9FDP~L z<0_45NscOMx1q-JO(+wkF6@_oeCH@}UvH;Y3itVJipIy`O9CKgvEKU`Uj#gyZj$N* zoGA}B3C_PwaFMR;Ra(M)xjejFZvF$Df(gA{J!*IYe!6@-ZjuCj^>Y@V@+=h@3^pt7 zF5ZK~uo0i^9Ub4^w|88Zz8m=`I}H8S*`D&Y_&0N0!wlV;au64;M=HLszdgDHuaLH` z*Sh)H_83d1^47byR>C~p1iec~Zd*b_%brDF?P7kao`0O)O1w@|Uj*JJx)go;Fxal# z&7Bbj>`#j~YJ{PfE8K6dIDh^3Y5&#@GwO|D{|`uh@}b)M_>bSa75vcZyHES|uJOY& z!gNKgwjYlyW=kn(-%Fk&Q4^I+cr{ z{F;IFj>t43u76FlW8@^H>1n|5bG2y(U5`8 zE#r@>plut=@Z8a~1Os?}$Aa`UT;J_hw=L)hd}A+|qg+7IfQ7R#NHnF36O_YZ<|795 zuZ%?Odu3r;Ie<{y@fp$pKBg4u;84ms32m479CDZ)h8T(flmqHz0VGsIusXd{J^p@j7u1nX{K3}2VZ}i^$kRG)k z4t_GD(|ZFkpD5j)AFRB-uLLD$v&L4aj<9Me7{Aui1aesLK@EaVIW7n8PU#s$5we(;d z`l#c`ol|JZAj9jp!hOO)^pXhixAJKKBJv} zTv21l6#E3}I^cUagNnQp;f*>5#B+P$l~!(jc^C}9{ETFaji5H<38SSlRSayuDWTPd z{D8sO%SD@-Un#7;5eI>)nn%`rx~NL>8NfL}>xR*Tne z+Dq{SSvpD3b{VE8X|BFv_t+54k;h;L>e2HPMWF^W~~%!P5HLuT&_ybP-d?f{9JX2P!t{b`dS(yWbyg!b`G9VO%eQZNG^ zIzYe3MJhYhBQ86nsU*2+*PkKh>=|tkQe6NkT4{42sTc=YvZ;8fVx;^nn(1z12@~3a zvhM0PsH%owcE$u*`M`zEojsFm}C6YEC_-v&fPuQUtx<8elRNoiusY%AKBp#m>{tG<=g_)YCA)9y&|!L zf0B0wV%ptRdmZpVXg5EaAKLQJhjY`VR*vWaqan5&vV>tpbwx>FFn(ILLp{!v?e^u9 zgIzZSdB~=Oj#p7&NVPSsL#H=)(UU}`CJAnZ>Z6y)U7GN_;1x0CiD3ok{c`CU#Iz;2 zZs~l8y48x%6l}pdyzkaZ5Y*Nq$|EPm<|7E}EJ306HNX4G+ta=EqKN{OqBv2RjKU1R z#@!Zg))8w5&fNfsZr5%$B{c0KE1%W$&-H4fHSiV-xb*BbR??H7QJy%|9uo2y%q`zdcB;NW(-7+bMPiZN6&EZ@kAu+nzk7d zOe;RAkG~y6Fvr{#2Z4=3O|-2V3=VxnD02|ns0?sDQ2Y4=QhyfJp-ebQCt$#01zOrg z=0bP5T07i0zoLS1{GCmZgs_Qg`Y3WC*8_jlit^^tMiz||>E{!7TqLcxTr zH?H_o7uS@5i9TI|(EO(Yp5IxZK|lABqx!W%)AhhYWSWzDx~O6X^})UfKl$t2(s^AD-c)(U zR;{c;6tYVgdRrXd8u7nyfNhjFb(P*c~|C5_pd+8WZ*@V=&eL>CMHSvpH$hD|V z_q7$EGmlJ{%gHXri|+}&!Fk>LFiYI+@hr5{VY}>ubo`>(NYLbkpbc0<>yQb5^4aH~ z0{a>Cg=PAwC&y}9xQx1$I#E+Qci_}WJ_>@J)&C21T^HX%sPr)Rqrw@1-_drdSKSXn{ z1A~0}lZyH_JZ@2f{nz$hg!86s;G^_5h;Yy-cs1mF@v!;S8)4+!DH~v#9~uS?)M9H; zZQ+7C(&MGMtr5N>gB0I@fKv!}Lc+cj^Z;o2gr zr!bQ^7lW#hd%eFuhKAetiLEfx%JsX6V!?zB^e4c(*e+Koh~sA}jP_2cGK#{%HQ2Z#-~K1lbS67tw`AtfI!2TesO}7UL`UG3c~(*C@qzOuP&;JOQaq zPilYwePR7E9cT}n)pM(%!AqE7YM9WUWe)3JR@9r`10Q4bsiv6NuK7~)9r(X7 ziAum%V>E7p)Mf0R(G-^^=66Ok(C9-Le-2proC(LRv|kB8m|czg$Z29ElhuD&X=F7+ z#^N1yi>s{(Z~qZ6flKcP0JH4`8)$fWnoOKm(Ta=tgWV~N%t=a;pimaql0i5 z5mAS-&V1VdvVHrpDQ{{N=AH)*R1_$Th&1a1tJe$j2f)BB1`BY{2oJtpczXH30R@C# z2i*k@tq|c5eWc2pBM=0qzHPIh`J{+`5b|=EkjfgI#iFef1}+{O$u1L+2TzioxnWY_ zdu=!_AJv%S`5It$akoNBrd!S3KCD0dz$5-)GFl|*JV@V)kO=?hc9Zd|5^U4TW3kN< z20dUd;0IIH`_}x`_vPgf6TK>DdYR4tA0*&PI{2mx1BW6G%1?WN5Qz=MkERaY#DZ;$ z9!Vr17GDD4SGu%>>+u(j5}rr;tFB_&CB=!}8_N#*cqRrB}GIMD&4Or2&p{wk2ZB?lt{9c3U1+D>nSahsg?>7HG>BCiJ zAM0*j>P!uRd`K~mVaIvtvV&go7Z>v+m>iF%8<`Me=8k6A3q){sh(3VhfzuT9SO#}5 z-L1-LtN|kA24zV+65;egCtKVdL#pI-(Jl255_3G|<68&~j8VC|BUr#R-!6T)8G+8u zmssB9Vw>*Nrr>-=3au4xmm*zL%IZ+_GjOk?%xB~es!-qAWwra|$R1M}->fyD!bZl$ z6VC5PiB6%A4u^%Yrr{Ttr>WZ@_`lHV-2tJF_?9-cbG8EU!49Ss-xfBJp%^MNsYG#` ze(1DO(q_RErmFO*#@vJKV38`8XSiJmgziZgh{UH$0`!ZdzUsVyj$!V4p`k1lRbvLg zk@*~Lu>>*lb~8R%7>v&JKIE_YCkFYL<}Bi+WGLG#b~#v}7Pw3RWRmG49rFyak*$-Ot&}feoc#NcyK74Mx*;o`ny(L&F45~0j2%^mDLnOey%kL zIQjHhi&yAqg1!3YGPwTM6;f+R1L;bTAs<=Btq716>;V?&G4%@)1D|a6kjMr>An707 zLslegGXrK_7!q+GKNgMZTsTnpx<`Q-B)V5pTU1aiKu5A2-YvVOFe7EiVDxcrDN+}s z9E}jHE7bABGW6==#6?1p)_bnYh-pYuq$|_K$gnAyGW$lfTtV-nVoj{zR6?c%7n=;5{7lp2 zdb@1s=;Ly#4BMNx$TIzBDr3(0X~!fYnS(V-;*Loq3yw4gC^}@qW!_Fn=i4uX5)e+3 zk6`ph&*`ABCd>9m%QS}N(+P*G14zAFC%ksSy_a(sAL*_)^mxv?r(!HG%0=h}a%pUn zQXxp)-kbp};XseciF6$~<-PPkIhQvL^zq4LGw%h&PjfW9ShaA~_JG_yHcgE4Q|a82 zuU5kLTv%ebe{(pLyToxcWJEzzGIAM;0+d*afgyTaRMej21E7q2TJto#Iv=o~=;M`r z2FtoqT*0UU#KvZVpubqCtWAv?@rzBwL+_@@lwfcOBhYf&MNceEu(2$t799=zOg~7R zPUV#?4iUQor$tPejEfWbjr1fOz!9m+LU=-_VYrquq1MAM9yPk&7YU72-DId&L)D_=ZmxfL7qXbGUB!74gKnJo zo-(BBL@@kKIP8AzgH4;!!Zn<6WIXoxRKxev_>r|hYwCC7YR zv=OX<9}VgHB*Jz_VC@C9ciKuWMJk8H^dzFRA+@#b;auFy_rk{Qk=;8y} zz)Ap}&)o|(erKk=aig}1J{X0L?AzmC_3cDJd#5br-`U?C8-IS-Bxt&mX5hkXZIP=y zJl%7;5TPMibRFtyeucySyW1s~mU}(0f)JlY zM4jP7K?vUQ-_kxlc!vvt*#t0PE+P<7x0_frPDDJK z@TD?LZ5}mDpmeeC3BjUjy4hMqs|96!7HL~uYuMNzhfAEXD(baX=18ZZf^UR=D-feVPx6Ry^(X>Ca$1DDyCY^w!n-c8RerO)pA}vVB$P+%>#qsW8#HxSTAoH zY^y=4v#dW+^$(XFVSLKvU4Z^WHZov=*JS>-e3e-b&b8o9{%N%+luy%&!x@cCSBr?T z#c7)qy*$EAzH`v#^jl;H551D5YvCndX=)#_?XuFLk?g5e!S2)rdzfLBpTVG6gdP`j zd`zWH{|t96_eC{)M%oK@=@7OxzCBzML_48DH4Vg}`m;i0pJdbI2tCV9Ido5W2Lm!| z^4ja`6_m_Nxm=Nivd3EFXcHp964h=lVKViXF|K3U*X6{yMy=M5P-1`!CZ-$W(jG@m zO6}p>QoYDHxlBsS8OA6^C4UR7p6eg_vO2fLU-?^A?vFAe|6r_WCy=A(P?9F~Qo+1O zVem5vDF@GS?MV4LIH44C=^%SFQT6%#+i0OR;=?b6;{EA-;iM(538xmQ)N!!X6x_nY zFvQvzfeCqZJm>A>3tG@sjqh&!Q`KioRWT@ml!@L~8_?qKRqUHRM<36x$1v}XHfQ5z|3RWVq4|C}iPRxVNzuS(b{=ty5{10IhHb8MP) zufc5O?m(#G~Pi8C>VuJjnRZ~gj zSgTm|!n`dUL5==e>e?%9SnuaP)JR9&(e&_!i6eD1%-nu(SWBEiAUP}llG)}n3s8#Y zBb&7rAP%0nb%}q0#C$zuT?ec@>s_UtmawFL+f z2(u66R72I~kzil?^?O)np5=mKIOy}vHr@u~@QhKTmpxVzQOn@A{nwkR!N&!Fa5fKCn3r3gBvs$^SD-$(GZp@K zvoawY`{Ux(CQl=-(ZmiP9^pNQlU^x{+#ui=)ao)z*DjH`;HK7X*EtY0kH8h=O*o z4iG9+%4H3g`>Lfuhrdmtw70Du<^(eA?GdR$NdP`NDcBF5G0G6i4?KAKPM-?~P zQc7p6SUKX7BbzT;={l*WbgNls5k)sJ=(Z8eZjT=h*7ZY0;#Z+TBcgBmepv<)V<;;? zY8HIFX164W$I59ZWUu@1iVvSQhZdWDHmfcf2Hy6(^?7`)Hz;88+(||^DT8l;jhCO|D;K!;BlHGAxaqeoz#w1fGux~4NhF@Dug{EH*FNZHDzTHp_}pve3Z^Y_^r9i zxl(F%)5Kg2gHD%wy3SSO4Q7=&8S&Vr=g{|`7HbGWU)=3~Dvpm-js4G@Npfc&1OA75W&!2Z=%&jFyVEI}`?% zAqP^F3KjyWp-L)6fazKEzRiWf)X-UIWSci7$MoSNafI3v+LKOXbDwPhzr>*D-00Vm z)#Xg6bwe}jOmB~9ht`>NjcN-DbUo8iaK|a~N_WX&Bay|pWg*Erl0%@7{+43lWurQ8nBHysHrcaXRAY<2GwHJcEJ{=;zVt*c% zsl{3ohl>-tq4Ch9<(W3BNg=qu13pc=7xjv58(@|QY0fA>UHgpn!J2TmIM~sRX=MNx z0Pq{IRZd{v+m&9cv!)AD|K`t8-ai-XXJklMhFytSeKFimiZ54YEu9$1jf==ZZwOWX zd+oT~tt(jmO@eFs+}+8i3AVh^5TU&1F}tTzj(oFQtY3JR$*@uB87;g7@`ygwAK|7= zb+UJ6(JEpT)6_2->tf-s(w_-`6j}w)XlD3afkflS^w8F|7l2knV09Mc7GBYscW*8x z@pe^R{abZkTlVGOhpoDyzG1s7^9$&CP3$U5{S)6uo$d2~@%2u@xo}~WW=?ow+qP}n zwr$(CZQFLf6Wg|JJDI<`r>DAVrsne9*ZXSWS%Y=c;RXz{BaHri@v3^exuN=judO;e z!=lC)w&hnvYdji(2A|wR~0H(?XQajc=0ff zyWHDyQ7M9*>~>Hl@DyAgRD@5j$p#e6sB9x6ry4CZWi?Ai!o%3w))$0+ZY#=9rho_% zNR_nS(mp6z=ecL?sY>%UNygoUfZA=#p)WIecEHB4tGDTE2t=CC9<-%uGwx7{@$k7e zJDyquGC8Ai|EZSIYrkMC{aeBmhT3+!%Ud)#u?WA2&U&Ao>q?8_0yEPY89`oBM(%6L zfnVtfd#xr2*hN}JI@#3OR9mZgM$_43Yg{~I ztQ#iZ^6;^tKHbv{V`S#|pesdXdwTgK%J00)5`OXdS53l~md%-w5^zoF30wR6ZUDwS znSidph`MERHf)9GCBWx;K$}OvCg#loS6DD~KP0}92L1x8-%0<1C`%NZkg%98wQhNc zT>e2HNtpRk(4~ck>g$*N#{0k{Y+x%&2!CAIi|QGgR?@C%71v87)@1{~@}&a#Bum(B&=vsg#sR3^_aku%Di5SklooL{yQI-CFen1nYfYNjS_eClQA zP1v<$bwuh`rKNH#{DqdJnRC0WD&E$ZZ$LLS3(J-EZYk7ycO33(Q@Py(O+*bRo7cXS z9gyqRwkT!mi)!cc6DVz!7Mb8yQyj548)xT|9-wiFkXD#eFPqqBNkn`((X5AV7fNmQ z)FR3JD^#!gS)=ry+s-DBBly$xL0+<3p(Jg^LURX~gA^h)*$f;1zhe40pAECTM$HXc z7j@P8c1#_tx(amhX-jrQnh7B?O3yD5Yf3fF(!iaBu9(NxCmrt&2!b9<3{B8(- zfW7%$SqJq|nZ#5*({YuIWw}Rt~QN29+FMDGp~Et5JK(sO7+}RC6cK zNdiZeJrZMo+lRNL(T<6lM7{-?W=r!eYcR>?cm4j#VQo&f13*>B`c@ho2BmR&!vl3w z8{QG`%>G(-4r?JZiAw1|Sc&>{Le6RH5JS{9|Ix#!n-JcVN7lTKRwoVVu*|1tHFHiL zOKFV%k*p|ud@!`R%N@tof>(P5NPryH%vD!u&R}@4JtxJWOJkyJe=?(CC0)GEE1!EB zP-Y=uA83k68V#%B?k(5ZCya6Mmla1HSw3Inah=^;Dvkc>#9q;JuBA@8SYXKb%}@Ik zthwx_y;xh8!JrIHS-6KNKhL~i*qPvR^P7_4A9BSo=m_Vh(e9|kGA9oeuSlrqF|PSW zZNe`2Hq}o+ tUalKRzebAb&M3~sg1N@69tiNYEcv#SJuSx{(h5XK)D<|Vx&_L; zMn?TzZ}8@12S+ufac8+BuRp4|ylVaT%#r5kccRFzhX?Rkp}WQES(M*}IK6p9*Ej2> zJY!uxuP-_B2LSweynKC~tIkqwSoNS=Tp@a!h;mU$+!)!jJcairvjoPAweJ1G*c3gU zf2faqdHd~JG{`U3Lw>pDGUED!=*3WB&bpVJVm8`n@;$bRlxo;PI}qf5r#y7-G~S#+ zgXk{AxfAhDVw39TU5H@IIo-Aer8+veA~Mr|F{(ok))(ng^*Zqhl_lXO)|ImZlA4vO zh~}Rp%Fr&Ho;DCj*eauT@P3;1GTB6rOF zNAsAFFD{Jm9y#P`y)y_{9iQ{a#9jAx@WYK@+89`ppw&U~^WRYVAYE>yZYjZ+Bh9pd?3~$7*%KcaUyZdsme~A^L(F^{R*NjdvFW2Y=+V0Cu^uC!kYA z{WgS6bO{eUZ4`l`1qDlT)4*&@z?w73$Bfi~5T?X-C>Bt7^p&n~*;5}g?SEHTHMH!r ziV0?tmIOSfo^*e&F+*SOzuG;CB+R<+JVmW5^O$v>IJ%7!Fb@ib8n|t(6wsuvFa3f> zl4qz{Ugj)QfWT9UBmXNlO3*$wOFM}kp=mZ|x`bPJPJVz66o9kgDVc9Q&qobEcWV*^ zrMZDkFzNIV5;%7<_}3JvU&^I7G5B>n0ZHA7MPAAhhca?d_J`JHC`8P<)DwdJDWjWk zItjSFd)=oSrpeBpbG?eX^Awy}T|)s%u**^HhB9(cBb?QeVRgDMq*p*R92nP3FCj1+ z_(aN#y-0PV&MG2y6G1$G)yLDjDz|l4gH;bj98ONh?AENlW2WXwta6dq&23I4I)V8m zOPobl3AUR;v2qvW`6|sw7umESb&QT#LBRN9%hnGho?o-M4IUhLGMxwMZWT0NbQZ*%`X%&MyiUlU6%kJq7H;WoYL37!a1n2#NDc$gNxs>yA#btu$ZPR7IZ6xkgz9WzT z=SS8=$4c8}7V#>u4(A45(n7py`j>Xr)=SdWX2_CzcK#L9t$EOC2P6HwiZL+&S4zS) zb77iPU^x<@VD?JzdmxLA$V(!i0vtG@%|UQKun50OxL(U?QQxcHJc>s z4Z~%^wu9bz0g+Vn`sd8g1~x{d~q z51sxA3wiXA{}XxWz9^8?w~@ivd#ocue4#rcjPT(g$Ij6>>3hSBpsaxQ2hs@;NY+22 z0Vd$0Rp(9;bVrbig06qi4vqN~%gc<0V|&x-oA9^yF}zfO>x12bv3Ze_K){jL6!sys zQ!d}Uj*4IgE*IO&isZ{bKsT@z1^=^_Z0 zzQ?1832ViRFqntSIQKOHjpK^%6YmGy`Zv#RMgEAs(@1;5cRTi|?9so-peE!0BhvLh zvs(Wv)5Xfk@V_%%jQ;L9fG5#+|*Z)7bs+HH;9)~??7xs+*?+7qEh(@kmQ+~F5 zT=CY)-WuQLI>f;zfo4-KulB=)+RN8%{BRXfwZsdIxTC?pg(nwOP56~)(F=X?*SfeH zS=~i^`Doj&eUCgWZanuk%#p+F$zpGRZZ~?L*M|z;Fn@OY_#59xVfQUpS?hTHKF*7; z!Kc!l`QmD zsim86^H$*UpU8|8<0B;5b45cFZnl-Xu@^ZeIF5mT*~!m|S&(QByDpRWlB+?nL7YAF6D-fd z#^~%2vtwW*sm$Le5Y9a$R4kkaI80e<$n4DB@1rZzo?AT|U664zU7WKHz_a;w@@B7J zo!&g1t;aaP3f=FMXg(Y92I=Y3&;gEYDbuXHen-2UqF+yh=vJp`S3Jy^b}?8)zzTAI zJsJ^pR;e=}cnZ%&7W`hEJ@3gguFrDlJ&m;5$#uU}oW|iq@lUJ;U|(n1fkNNA0-K(X zB5py9UaeAjFr^%X#?M%gX}%TIszA`y7y_j@`0;Ji%H68Iy-R8Ma$Bs3cRHiB~e-0~GJ|LEa{aA{(=`X%z-53B zZK+ts&u5q$zl}XCaK}2bd&2Y)^osbr0-pinJK#}HtfKR5U$kqg! z+~~iIH5z`;(P`*50UyiYldmFKF*+*chJx9pj|(rCx&QQ+?pkaEYkFtwbhg;{P-sP3 zRdsN6L-w2SNq)`SMBIR{g{|rpk^P*rpgePa9h|}9HiXC^6sdW82k`U%;H7+aio18} zZr$eZO(XV!#O>Jhdi_RGE?fW1JSO7lG0Xk=Hh;B=IVdb=`2fLt0p{QJ8jFA1=Oy}f zh1d-$4n(n6#NgoQ@FOmqV zODu}NdO0K_*ew&&VJ9Uy19KQSu1Sarh7eSlg_FUpi-&#?m`%|nB zwRY1*()_pgWiF3lY*oxys}%$RZ)-Mu9}tp;*dXA~DHC;x)$_q*{P7|~=RpW#$1b35 z#1mkR4`Gg22BP!H!7&?|=c{#p71Hd?*9J!|$Y`{`Nh#<2gO2MO(S=7A$K}sR0>)Rx z#;pXLkLF~dFsOkZ!2J;tO%JhG3~hJq@YlYuhx68uj_7)00w*&7_&}dS>EZ#5m%H;G zXoOZ(n;G~|Qq0{K;Xmd@i=cSGi#xFZedfp(cKUz%y2DvOrtBHr$y{iWl(Zv`-rdA>c zQ|2!r>8FfWCF)~`@L%f_M8Nb^u~!W)4J7%Qa7z-}SQ*V}?-QV1vOu+hUOOTNUfbc1 z#cI)IIA-6m==>5PSw;j0eWF03XAXQW6NuIF{xHG2fj|mnGde2NJoD zSW|f7Q4;;CxCkX8L;ZQ!>H7gzBn06it8^Wp@Qt)b_bCWg5QO425Fo?iiyEqxkbiLABrJS8>|*q$v-n z-m^W`(pKbVqdJ}t&|#{T_p60`i*nGDa@B$LGR=K&;ukio|A15Y%8t6#Y)Rb_C@8C$ z9;iG|p6?YAWrY?A8ks;??h4mz3o|jvC*GS2rnT8Vb|^qfl0I_b0*(xyE)X4Ey79zs z2_Sb%?u8u*();K{Eb9?1lu@}Ax$cO2Rp0y;m!W@`wf#~Lq}afQfTuhEy;57grzF)y z+-4E3TN$uup7m;c?a*3jno=MJXv|6}>cOug?&qFND8vL5{Vb%JwY*Cl=RVn`X-1|! z?Ho&mj7_bgrBkbTgdLhz>Qps{7Qk4_(n4DIX4-7YR*&PEYEsZoGEO4YDv{}ONFQPp zIXDc|!^Hy`Ji%F-O9)9&KgSz@?&$oIsmu?OMKb`~?`Z8!>6rvI(muthq(ZTf{{(3D zLwe~Nsx4~$fmN#d;~c^w%}jxw%nRufkvP{2c zL@m_{N*XH4EEw!pCQ|nB?96)Df};?z{jVOv)d|slIS%8`IHX^qYpgaNdssqSK6Q>@ zx4?vWv!;)?Sm-<%1!pdc|4d9gtMQiVp1~vYix(&^H*}%essGqFVXJ!D1xELaU`iGA z6uy=?QS#<04boPj1`FD1;G&jy+SAt@=_YwuJpBrInh1{)S_Gb}FAMXL{+yY~+cj>+@PN$?o65 zTsc19+LUC!JbW z4y7<;zj>aosUUnG!g!UMY7Kb=!`jJmSqCh_{fen03{l0JVI)C+6o`y#>JE@AgdA;d z{B4AC+rkrL3Wme5=k#Tt^nZ=%%_dT2JF(*h)({zF_Zk4}9EirU?YR$_)AXYvLa&ZlGR<)N6Ce_15 zBAjx^{PMl-cUw=JmyL9f>2bY2O)e50)9aTT` z0uJeY(32H*?6*lJu? zQJqGt`c&f&TwUs8&~4t&G;z}9Z!bAY*4St|Lp9)tc2|WsCXL0Agh#k|rfGX`NXi7K%V9)q)g;vlxF-3T znX8bNjX_jQ7+BF{7)*?+AAHo+UYkNadY6Y<^IWglD9tPMg&5M{@{)ova*lPb!xyqK*G*fg|!SUw0rR$O{yCF(;HL9+7ce`knn;O39LFJXBSH**itw?g$de{#Gtra_1b3Z+2s1{U#jv{17ZuATW-Tfn>A z9bhnvIsYbXXn9m0;KoP-Oa((xB}l~ac3$-eO&Et}FT#XM_7KvU<`DI4U#YpRDPAN+P4L_uk2JVOvK;jiP&WN7 z@>~BN@t5XKh`W!NPG&D=of@KUY;9HgZzqx8N44RsJZ)W{GlW z{G)r^dQ|64 z#g#F{{eUvcI(PzYfWjxh4)XAGE&=W=hs9HFbP7#WBfZXDSyviX@hm5zfh1R1Po+@54#*`7MdW0%;0=mq@1Ioqs!Xirohm2EsPP#kPhFtuxM z|C_O>NOxs*5Cj2PuY)-Z1y{;1jn`vx zs1Y-(f~(cNg&~DfLrqxKwI0quOIBBN+dlLfu$VjoA z=XZ5hwAL4QQza)WVA{aZdeCatWp_G!djlwUdoZs#H)N?&Ms*bbkLb|;l88PJE27!9 z;Ew*X@>$>!kjMT%aa(<18P{^ZUKUkRlkUN70?#Q3I19ni=AU8E6~(X>`Qc*2rIqSOg%-P|RuqJ86{ zmqPUgx0q1XMwPZ`A`F~|Ej}?is+-i3xN%C|^fgANm6Zdx;+5Hm)cL%HLK;cNXr-!5 zGGn3NVU@Z2QQ?*~k99jKt@kI$%Y5uZdtcSi?U%j3<>zj`y2r7FM=8cZr_xlR7b@&t zrl*Z%eRTr;22Kqv&%sp^_^zoW^tILIr3X5LuISq>zT+mS^g4>#2HXkZX~K$h58f7~ zekD%=cTqrvD7YS4=Ma!&OfJkOb#q)0@RR8wtShdYj43IqYm_*v&IA@ytl>(60zolb z#ln%OX|%?5O7`FjDo4$ETAgkuT;?+hNS+%+`S4)gQV`LZ0ieMrIf9dCm*^rP(cKps zA_hrOE|YTFRx}ltmtKCzn3gR@%KK0GRg0zK-cjs51X=aYzVMFXdgAIl$R_FQj=c{S z&^>)au}2`mP{zEq4x~Lw(y*1#0b&QN_RW-U2QQp zC`X?sR%?4-qY8=A0r}75%a_onZWsq~;}?wi?{mg{#b>q9e22Ca;-cxvDftI&dn7Yg zVPy%6)JK^+?P{gBa~2O8w2TwGLC!qifLhD!mdA5rjrcdU#tfYLvk7CIZP#jdT+CMj-<}JC>58|bLN^^BQBrdwhX95`LP z)U6Zssb|r1g%?3RbM~OxmQx}AXk(0fhpL`XQUOS`sKt{-{EX`-JKV5$u66}aYZ&0j z^SUu2JG%o@i}iI=RWLbLk6)$R#cGiWcPCA0bU2*7v6>DnqBd1SKRi267&a;nCf(2& zb4IRfe}>mO9*FuEPfx7aC9zDP1z}b}&6^H^`-Aw7$5Erl0o2QZe4-7{&&n~$A+qjpZuziJ43-&a z#P)L+G*n_tk;2a)m-5AF@^}IqVs7P2wd`33h9r^7i>w;0@dOtgo84#jpVFs1t)8Y+ zbfh1 zAIfN-Kd2!%iPRMy`!%jI`S3DcIWw}wGw;zwOYq6cb&}EVQKtPv#|c}O2xW8xe>W)E zG}PmPL-4#?i)X5ni##Mh+pzHFK5kN0=t^ZSY zURUavFr>IKMTERyk1@xSy{*+#S z*}}Hf(j97Z%xvN7Ef!wdx!Ead0%{hpgKVN_A{S%oVxua&?^VO)Hhl5zP^s1*rBTg{ z3zqKYG%Il!Ly^goAS9wY>acfG=@9E*CGGR2Zn+l9OykQAT^`b=)ZFa`*!=dDYUHeJ zMc4T&g^C{K=%vL*YB76p-Styr^$xS`5&{NlQG_q0{Y$1t)VA+1148)1Q$%fRV^gE! z&=zl=hVw&1C-u6I3l1IcR%y9r3|u~CDII$Z#-W&(Be|PiMTV!GQVwsbZKjygjigf4 z&Mh)_fMF#|_0zkgb?Dq(SJ&Vs`dwR+7ko;HYB(Ftej7`-Kze*lAQXS(UOGe5A4I(Z z*e^ErfR;=jZx={2INhq z63rJiT9GD+da3+HiQ;+pT3r_Kbk>%*cV7yp9NqFw1Yq2=VRF=$$vLUcf1p_p@3JXt zHVGO{jNUdSkjqeBhsjt|m6|y)Pc^)*xC*!S#p@|Q^g$KN-(P@+#e+mPs~hgrl-R3e z4a!ea2e(|b+=(-GW8S0@Z0;klNi=p zC6oMRJYW2(ui{iknP1Vd8$jUpH0+WqU=`L~L=~3Q3*l!y^?!ORellnJ#ZNbKHT?f_ z8vciY@IRdfHbz#~|HoxqZ2loHjDF0sTD7 zR%XG%IPD^9WF%80CM#nU{F~`KLzLEI-}m|p`0ehyoH*!Zew6V)v2;$*4M7xgs{os? zAmQb&ew}LdB37UyE}^~3$47Il7*~o+@aCG6ny{LBKBNXX1U^9jl?2dWZw^Vp(WDX{ zZ3ZPs=qc)JJ|>-?FoXb~5|KDp*W@V}5?7-WqCj5z4inR!JP@~)dj3VV3%xfI114NQ zA=Revhc(SlWR*Si=09JHR6q<)u<~-%&3sSpQwSED4tu!5dVKQ&3;jmOssSa^wytXw z;aj%nPcfX9(_dX>Wg}esD$LIgf|w!x|EQ&A14M& zDZ$znOdBhk7N*5Etz!@A&QJxZS=1GLB-6jy1X3bjmay)TI+~Z1zlxjfaWagt7=P{y|Q?AUc(?3CXP`Y zvt=F8Oq7E{OiWaKSbP|c@z_o4X5iP+JfE1qYnM=3NCl{BV#}DWqJ@TqX9B-N_SB~C zs9f{8)Ok+}Yg9E&6JxTZez}=Jr4e$WZW9+sSFXh!5J{KQ9#TU4^P4~lvB-HnE&W^e73^?5eg?|^kDO_IG*LZF^1?QD4at?VNr zi-(3UP?uS;y_)U9+N;38aq{v}Ic0i~4~sqkKFHG?g;Qkt z`x92Fk5TSt6@w%#Xe3GmIT8byH+X7Hi}fg*94jmP2x(~OY8v^NYy9^rw&!i3sS8Wa zjfWM(jajJ(0~wmwNM7j42sy%GJhf5LipU%*^x7150pS&X-?X5svfvdaL@lSp>w~FX zywwGzWz|9~;?0B(f<+L9Dx^6aVA8i|<e+x5!3&DP%V(!*jfc-JmZH~;nTh|=%;8a?b_qmR3>WOpLI zM;iB6B69h;9^Sr_kKS%2PdYtM5cd{VXJ_^_nAY!`?1sbO=G}U)n?L8x=1o03$c*Gx zyY;r&9^AdJ>ot~=eYaWH_c}AK03P|VWrG92uk;ZB=Z>Xai4V%F_J!ecT`Uh`)-4iY zGN>Mx``v)|+io#Zd|?rDSr-@lds1RJg5ak#2*^%Z(!~0ymAb*(%YR=ECnlG3m#nv- z%X8}SmCY<{7Tjzoe?KgT zX-q0_khXn3@`lUSMc@%;WzRFV?Y@7dJu9!Pa+|?x(|;d&AJ$gyH2NwZ-{$!*UcRjd z^2^Dtr?(S&Q0I9Vf3JYe<66_9#Us_8Gky#t9*c9!rEW2O6KH1tJT7f*#0Ijz%&LCq zYrd6wTu=R>CVx((ioqjKtrq{iH{ORci?$rL`;~^yZ6ntmtDpQ~@LKNca*F4j42FMx zGaQ&@MYiYEW$9^oOhyvB|2jE%HCIobW5J3CaG(1RGhaS`87`mi_sHHY&uxE<6HCKdwbQX) z@@;Y7i8$MwrJKyGhwI?A0Z%)#sQ09;RC(@tYVz64d#*ft42L@H?c}^&zwt*ae-2v} zx~lh=!)3v89d)y;n0VCpuoSe7$GCuT=v6E1CYbGy0piRCX zEeE&#C3B^z%Dd_HM9-R!#QUaMyDBg&^&~=_T*)@stgq|m*>k7=a5oXKqL|Klb&zDTH9CQkB&6xnxYOXGg>;q}5_?q{EUIE8*UzsK+@qsn;p_0~3KVy|vnb19ManADi67!27loekve0y8Zwl~wD-|Nh!Ec`Ccj zIT8R?(SFeuJHlOC=O-krdOSw90-yH^gxG#U!Mth5UYc|&0g@xc!t2Iw1Kdtk(`yNP&n7=Jglke#A zy^0K)wg3A1l6eiaE>pkqG=3UV`qqpuaenc*FFhWO4^gSn;aq4qkP*5=-1H3%`)|=C zfqaw}e&+xm@b0wIvIM<&4PRS>XR))x<*6$<*3rjbx2B!f;S}KAu{3Hpora$W=hV4& zxXu)wB$Q|xD{iw>!>{*cO8H#&GDr-<{4!<9ndH!EUtd3RAw^)SZRrZr!6}J4bMG4pKoOj`4 zt~>bq`)K{m&NQPLYMO2nNB8!OnSMrny>`0jSfwAHDpI3q`zY6RcD@cRPolH5-NEJ| zdDqw4yG!?dd_!K2gdA=YNm+4mS1HNqXm!ase^ft!{-jY{gYQ})yuDj`akkBDiLN5N z_QRhlx6!%$d|jZio1jj6x#aA7J<0Z^xaTMBeo%8*@40EcNJR3gmHYeE*QAyB`MH1T zX^;D}-*HceO_zP$Nb`^O)EM6C@HwsiyjR$N^LcqQxL&JiXM%bSkp80XPRHdf+vOnj z$!u>E4f|tv;GR9Ii_wjii<#f>!5Fuqg4*R%w9mQW8Z3X`)lw z(X;YZkot@}8GHxVeQUgrk3arrUEQP0UV$HZKL1=7x0ldgu0G8V$Mr}MZ2#Z;wZ`V| z6MB96PFnzg)&6+4)*er-ukrnCd44f}Viga|p&MtG^W;hKQo;l)-%lBL^;S;vX0_cL z=Znv6^_?k_&oPFw>eas3{i*AG_3ZpxuBzJn=BFnW-;Sf$bCK0FrsHIUN%tdSiCSE~ zhQfR^UUXYG-_LQuF23PK_S8??{f9HxSKQEJHqcSo4ejS{`?v_QZ}aCbjB@Evth}7> z!*JrR>^Z)+u!y%5h zAIucpFE`D}Kxwz>85nMUn*<=8r1T^x#$73H`GMP{AVMFsg{SoAlC*El_~&pIG! zlM=%7vh*BG>h8Pe`l6S%d>fmh9eY^$JmswW#;0Lzv&qfEr|XWXyxZ&UefH}?XnUB6 z-JaR!ZDsWO`d(HG|C5CszFqtK52pih0Jp4)|NSM=wW;NO9%eM$3_Z`0pVfN!WSZE| z%Twpf`Yi113>JdDgh4AS>TI%GO}A9u%8(-f)o_0VG) z$SEv0*N)n)zw>t`yZBV~@ADD*rj|9SzLpNW-H-2yb<>i0J$9SA?3OFd*>D?FeJr=R zq&R=ErG2#KKIKM15AV+H%+5wE^l)NmcNj#~RcvjM1cRy8PR#gpuNoj2BP8KCksRe$TV}*} z6CEEF6IIwwx)A|ekTDA-R`!?n6XD_=Ui{+QH|d=;y=iYh<>%GWeln`f{#^a?t;X#(O0TXj;dS{oUt~zR z`NATG#g;0^DzBmbp?!U2YHkJavYv*ZKdKtZ(yz<6)@xh;bKEk>lPMXR_7>a;Iegt2L zJD?4J?bzp8jOC4`R%KJNFeziW?Y25bW34ScT>h1fZbKgOeVS@+IS=N!QqWb@a>@68 z59V>>_oY25t+kOuqvVTU{W>p+4&&x-b{xeLli%pFncg&DTaK3VntK|(1Z<7h!m*dL z`ZfJ58axXOyDXie&yQO~nP{r}#p0X1L_Mi2w1WOFmc7YzZF5$~`MFv(`sFz*6-GBVszGTvG?8(A^UXPSMU=ri$a}zK> zDLnO)!e+XRPCue$kKXzFbMr|a{_@UeG@yEm8Eq^40)z2!VqG>cV2hvAhv0VgbezT7 zh&-U3iEO~OTfo33xBUtj;ovjayX7Cz<9;rhFPtp=ICOxdJ;)nCW~avKje%>w{yD-) z^8=V5+nHbKU0N*d-j0O?@8k`z112uLNlc?=P>|C)0ISHh0Iitk?XI=3bS&wWkrt6a zc=lo|6|kM2KRcRB(94BdOCeZ<{C_nAHvYN@87p!?iHe~#&deP=rYCK)6!z6M_3Q9E z4GcDtEJn?jxn|mfieagO=(6d9_v`hw z^@^%}n_FR;?kEVftU~Xzx*-nxupKdUqpZP#PJ?JkH;G)=g~d!^IC8@>OR%) z+egW6ylwEmZZ&MI6wUYcXWRYL>*gze3v#JNNMSYXev_Zh(SxcFzCcQ}mHJB?&w~F* zu&hRNj4luutEp|`a!%*T_UhjlEO^&tC9?mL(;g2G4<8R79}$HIywaY%SBZHHwQ8!D zXn*r#{Jg+C?(0wI@xn;7w?IyN0DH{@(EJ0Tgd0AKwU^rHINow{tGC@?r&G`VFk({A z-#cc1Gcpc9vtjnpc{eHjuC@1bXEpWne3{9*#-C+qSv$I>_<5U^1#{+OL#^2=<00GR zeOo$Zck63@7I|)wOx9=X``*ZL-k5TCf6C?hR$2_Ahk~6%m&I)z?)jjOx5Raapu%Mn zeT|TOwU_t4^vym+-ihuqguy)B-?@DA?pj2R6l-5fmA~#N`Mq!Av|g`S@dk8#X+546 zbi73Og|hDU;@UM+-AnZ2o`=i#E~nvpls}wjTxsgJ;}@yxPguI#SNMo>o!{;E4)Q%l zxG2|dJS?u4-+o~(o%4@v~y42+UiQ-Va#VJV5@BdjOx9ypeT z9Qav_`{|1(;~Ym0rQqBH#s<&&(Zg0y(u?N+e)qhVUGU#9z5zQ^LyNNuljoFA$xq5M z@LmMl0_Y3NPo^JGzNtT0ivoztWE+q69GR; z%zy&0l+ZW@u4#b{3kGT-p#=w(IC1|AOCh8Mkynyk;pKVdlad!vUl65DeCiskw~;>& z5Pbh|2bB6D*H+Bv0r?#c5B%(C^qo`>JpS_}Rgb2ZfG0j+f%80&Z(2EBcew4HWMgE`s0c8hR`$6R!&`$j3{p6F77f5gFjvT+N zd=dJg`FZP;l^1TGpk#)MNjy|WpA3B&d$Q!M$wLNCS-^Pt3FG%2<`-XbG^z*LcKnQ4 zQ^wDev7D2bq+M2yQA2#qsn6!2zF@JBz~XOW@>OVt4C8$1FDSZSFLg*jEiLs8JZ z?ofn&C|j~%oXEdt%7($=j^qU;dqwh!dW*2Mg|?O~x03I3mo7{>cRJpDJ#oNfjKM^P z*@@*WW*(qPY9-Otm{-$&pQZ~b9IZM%SOHTGSP&0e~)uQ1``57#X zkyIwQS)zILDQt%BU{}Kp&Ezy5{nQT0)XfsBcb{D%L-)jHtM!Xh2Cic>vD75An|YV& z5H~Lu-JrLkxkWi%Vcbi&>Yk9LI^6^JduRc47WA%eM&w+3JHWOZ0mAaKT^@Kjx8;rP zbCYk^iP#_eqxL78d)Mc4I@I}*gEuRtkoFmSS&(@MXU?q!`Feyh9h;x)8u+e^`Fweb z!Hh$BMup+|FXOWeGIL($manKxazfp05zp)us*`x;DxSsW4?xe~k}G?$5B)6H1^1hU zv{3z!`ALEdS`Cn<6j1V1^jl)Tk1d1On~^62w&1__dQL@_0ck>X=11^oG>1)T4tCWK z=Mg}92aL-E#Z>~%{9^%>90W!1LAap;f~6dh4`$sT(2Ec}oDj^$9n@>U8O?}e z1Kx;%XTTgG*BUTvVJhQ6rV$G=WVeUxL3h@KBb^AFM#yaw&7u*C(}2Zk2yqm_I)-YU zi0vl6vj%bANdM3eeiZ$U5Z#-|KO_2w10L+a2PFhr;V)j4&^-f6I)pk)VS>4Df1biA;p2hm0B=%Hi zd9e>qum&Lu3cbLv2O(Biz7X-JF8>dR7dZCpM!t#M|1sovg z;@*%291w+dhsXklFD}2AYyoA}U#>{)2QNE(dw?ntXq$kvSs3VnMm0D&rtt>vqu!v{ zZ&2TJ$LfP@6BMDO6qmwpD%`2KV^AnmNkA2%CCMuvs$5-(L6s*}^q~M!p*A5Qs*tFH zf+{<#)Md zi6tFdJfe(TDY=Bal)S`Z#l;$&B{^MmqVQPpzNEYaY(>}_p(RCIo>!PxTBa0T*}1g1 z1ZBnjjP%Udn)wmn6}usPUHYO3QK??hy!6M4{TbXf$t!R}!nR1Sq)lnF0(VKSDt1Hk zx_qNDy;69|@Zzs)3YS=~94^G>C)*mpy+V1(@T$0aqw|e%}QJS9WyH(S;{hfP6vH1)eLDZJyWCd?Qq@RMiCv zSIT=qk45@(&d&u)0}Y-lD6W*RaIsST9Oy!pD``WhT9MfgHg>qa`2G!+1rjj*UUWZ% z95_nIR|(UzOLXVme$M@*`+>JD=pJM`0wY2V6AUmDiOEQ0P!by%!^9p*Q)F<9;Vm{% ziOHIu`#firK`=HE%5We{iZm0-#2|}_G&0KMAPc}8LSYKdBx-OY&M2HhXz(81<4ryv zm+{9D;lYm^T>mSn7OboH5TJ+$gtZZ&wP#MI6_8dyd6((08 z|0C=3sPE+}gRo4X{QW=<(tRX>i52?cMJN6;X&INBThAu~qSL@NyvVQuBlTZyT}m^c z=ei2~Qgt%bs;~}ehq{0TSSwYKItj2_1-A@>_0NvIxbaSTb{ps&sSA7N+IF=bqVIgvUZLPk)2U|dGDR%a&bA;r>yE9*}=8}zi8^N*>eoVp!dR`|&v zCx0l~kEvfjNU7-EBa0TyLjww}@Z@|m0s3s=DSi>(;JkX#GJ?GQ!A061Q`mIk*7^eW zdA=5qYmrY*y|h289&sA)O8xf@cpeOxZXC6nQJz1smj^2-YuxLbI)>$kfjb+uqZ)zn zCC4llV9=`bJZ{$+{Mp+$?K5lb7;;0jKhFAKh>c^=C zg4YGR52z+-!+Y|zhfTVd*WXxmr%~Gr&=o4=h^@$hU-W1`8&=(665Y`tJ8(8WE<5M3q z%*Fj(I>d>k2ZZT`Gg%I&?}*q3hH^#j2$s)zpTSb}PWA#|OPS9=o(MlcsR>^BJ`i_q z3z^Gyj)}w2;jy_&DjW<1{q$}Ee!iVP%wESQuC}R(d1+hADM>rUm5hXZbZlf?G%O?< z0R5}tx7Wu91xg##Hb+dAA~ZyRR>6ME4?R+w?81^*#xrJSVF^up@SslY|4uNadWg-I zMp7N-m;N*|3(b24Y2@97rDY`Qb&?bmq$#tr^|r-xuQpuxaoUitAQxZ6O}Eg=QwPtH zf2b%5bLRyR+51dPxweC(He%ZKjl`#BDJ6p*-8M&-A1u*4BpBC8n*uA~PPRWEAG&M& zn9i6J{KSUnTMeit8*CfwgE~8G{}*Xr8C=)0tLbfKX540GW@ct)W@cul*p8i;nJH$B z8RD3knHge??Qzb%_qaT$# zvlFV!4LV@bMDnZ2Tap+X%G5gWzVwB}tdyauxX$V9awW|*YT358rysfRm9fZ#1)55> zH#VhyBkt|-zsP0$9qQ8@&ykw?Ii9S1nME@s)kHvn171ycPfTn{T>H&avxkA@n}rzzaLD8;=V$5nRb3F1@zU0XPm zvf1HcM}gLPj#Si2>5CfOP`K%VbzNKXxnIFCWVje=q!ifLqv^wtH&);+ zP;`>kz;=a#@8!qH)Y*=|elDNKIDTCGuJuVnD`libe#M@S9JzgAVDdIyc2_qA0-_G* z^PK~npOI2>osej zOlN!|?WE!M@Kf)vzMv=wgb?{y1nmQF=MyTWaRa0EyRM%;8l(4LZ5=M{sIxo9%)aX8 zDzmTz$K_AbSxsQJpoqO$ds zS~L69bfj&j8Hmbg`9?_0cFNH6QAw!lii9M7godQr*7944l!aHCbAf6y*bYY(N>{VR z{aB&SDQTRc%46mmADAA2LmV|HtHb_j52>q=VCgbF(nc;W)|P~ZPyV~#UMn|lh06bi zK`z>Ub#bZgnq=o|X(^n4 z(ReSDj3{Q0Z6sx!Ne6BBeWV4c@l;+3bZ^6+-rV9FB3oV3UD~5X8bN=(Q|QMkHz78mWRQi%W{A)83m42TwvF|K|} z%C!!zp7b(75)Ho)aRcWagBio5jWS6VO<&b1hoo*!PUn;7-Ay^^Sp%BQdRW zO0o@?5o;EIS)tmq|E7eE{FdA)Po*rKTw7EYWyq)bm7Fc8EzO>zjzpAG1C}6&S1C<= z0rcIXS4Dc()GTAoBej$W>2o;US3GIZd3)GRI#%q!?(Yancg_nFDkh|MVay4)YB0-f z^jF#U^j4RC%7Vg+=NPC}loP?w6f=b2y%OTCL==q(2(U1p1?1G7_S#&FV}?Dqp2*eR zio-@Mf)<5HTC>?_hO`NwgdVO6&H_QFuFy8RQ5k7tlaE4dKnf(9X^Vwe*x0M$QihKYSu$>6A9i`RHPFW2jQ4{OSH`)ju9YP-1~;%}ZiDjw@b z90i^!)}qvTFrc7#Wk{TnPrF3Rtpr8o%*@1CFbK@2d{>q6>1il9z9ht564udKE6P8~YYvvymm$-s_>BGzJ$nEnFL zH~v%oG?lu7O0aw$W5t4;tAr7B~g7ed@`X^6_2Zyn)%-{8l<%rF_+yXwKmyXRG%?ulaK5d}9 z%*`Vj*0SewMAP3(OMf-{=r(=4Pt3Cd%1BEq4-ZF%V_;Qg?W!lKi__GKm5~JR3J(ge z!9hSg@o-0Te}0+fSxH#%#e-+A&p2#o5K}zOu%Om>_VIqQF_T;GiY>HileoOtwoNSd z;w*Ifb!!H;ewHEq$QMu@nX-_OPu|Ruwd5>PlEh5HTaDJRI;0>otKypp@j#JW+Hx>q z8&^GoMpo&T$SVU6nscVSgD+KkUVk_<=8LZ9;@--^J~!C@Lcj|_ncDUTFP!U5`uBIUwKC$aMirECDf=Q1l-J=qqQ*Qvj&{50sjQ(jD&J^5IU=R@ zvU7aU-;EHAdWKCG7Zb(_c6kd5yCoh@izC1LezRB*X7U|hrSKydL)QO5D>C5~`6)6* z%YGxWD@RDpQ{^0-ZJSzW9}jk>T^NC2t7p{mRa6bUtP1brNN6ypUd7hTCXC}6_(m&1 zftnO#XZ^Z;dZqnvgnj{Nstb8>EEdtVbZdQv)fa<9`zQ_ZL9r8~!%tLO5eDMey>$4E z*DECnl@kEK#FFQ2v3lD}!AbMPTAS_7LWGyi{sAxEZRhU{4Z+%8JcjDB70#|neRY>H zW|xvWRv(r#I_&uM{R7IZvfMfwLF4&=zKYi{^_M19niRPbV|F^ajcNi}`4~(v0h=C6 z_$4Fcj^_RV^tOPcGt}D`0GtY637{EcD7yL6rUtm@1d>B6uT}O*J{|v;WZI&K&q)L- z7%JgvWFakx%p3F&&gN!Gmy*WiA`^ESw(}|hEheg-k zo*N}_Mw)VnX zrcFT$=Q9v>%+gR!ilDKFHx%Vyrw2Rd!0_t(ow8x}i@I33XqD5l=?b%l?sO_L5|mD6 z-Vp}=FoJE7I=uv|o?!IDw+Y^CYqB#qm=}@0?xZ@#53&nhh3b;erw8S5B+WYurq5Vd zzu?d}aJqAbdq<=^bRw-v`Jl|zW1d@Ty{Oqtx>@DG)pml$aJi0#Gu0cJ`)14;{qrsr z-LSG&LSY@gq|vPbS;M5O-LP;7$adZA!oFJywlRBWm{}p-eG zuN6B>QY68G`MNfxY8xCr8dNYmS^hbNxwMNvOED8}c7NYqJ_Ccpd7x@=G>zAD*y_rU zXz?VpSfHkeXdAxH=pW{yV4{#hv(F|sLk|zjQanS}t88gZaM3nzey_BwcS*8OLJ$=j z3Da;nO?B`AIyR0>AaB+Bh`Ih{3sCn4Xxq^PNg$gD+D+t=I@#JkshX84Pmo#}n(ptN zp6!h|If@sa(bLz8C)48n#Qxkma>a#`W4(J|?o?gBXk&LtWV4@LjM^4v(c>4AqCYLZ ziGE~ydQjWNo3XKnb7Vt0>&11G1;JP$!ao(qA8>z<2+I0_FC>Mb=M&E~D{NE(HY}&; zZDj>+Y!MdA?;RR}BBT2$lmewF8r6Gfe^m7R6n^)}XyP*F5?d?dfiYIk#`e(G%;UexOUXrJHIy};jczdSGd_Gzc?ZS`5T zHe?dw)SQ<19WKA>7S>g|NEEkDCPm%>F$@Y(EDt{_))~k!)EjQ8S|mM0Li+HqlmqI@ z4veXXu^D}o>5z=sf&lTNaR%c#Y_JICs?)l_Ir$x?;!V?I;-E!+BU2G{b*Pp-09 zfqaZzlQSPgKqJsJcXP_}^fZ?M#R&UGu0JEK|FwL-^5O!Q*=zRFR&#BG+hl6Uuw{-g zXR+4kE&oSE;jIfSX17Qu&C*tj(EFM)2=4bWNjf{RKcg&5ONqO_4uu&7V3`JGocJ*! zXEcIeeCm`ArxnD{Bxp80=r&0)SNk~Z@3{_EJXj|?gQ$oar=BCnS!T!EW*ol^b+H9R z%N4qkYmiSN@IoG_&EFv`rE|4%d5yci()d12$^M*Nq;L=OIEKJ)8sIix3hRB96klHN z*x&4czvi{DGa6>5BH*{bQH!WBDXu%w`WCC@fK_j%S^sgWU^^8FJR=V~seq&^C`-mD z{_g>+)v(I121Do_*aed*H^CnS_Ttty5t6+9`zp=rG+9#19)ZhTShh8YB{d+7Twx-I z&Dj`L2`xSaErI0`2Y%tIU*c?Q_qfEh&UlDBf((m{L+1;`b`(Wtsji2qprHRrofikq zz-Ioa!iqDae~_)r-fZUVm`YdAh?Fpt&|rTdWa-hR|H7b{lLLtk3TGKZwWawxI8;Yo zQNT6eU*g1Y{Rze}IKH+Om zbW*RPa99^j%7k_bU*u-!LMh@SoZFx4cr0wFfIW;5*bYf9)_8~JCf3R?blBud2pPT;ZlXXUA|ZSeSc)%#ZcDK zL*90-SCJYjq9D`6(!>g_)y#>N8h>$j_luEA1cl~wiG}BgQNA4z>j9&TLweD_%6N<-NQ&0>9F%W>&Igw^S$UqUk8b3Rz z!9Y%3=k6;)=4sPF=GU6`4u8{PgM>gusz(YzXk(DzO2Xa_G6@SMHg`~DK7Uk9SzwOJ z=mmaWV~zR@j^Yoa;d z-e3x6WyQqB9! zg@vqXoefcf4BY8@l0YYwWwN9g;vVMD0)X@q?vAx+H#q0@MG-zvYepCbLbM)3e;tuQxf&PKj*XIUl4CF2mTB@A|$aqoFxx`q4p8;3-4 zZD6zux{0IRaEEWMB;$YDPeO{is| z3sRAfd=A4tRj;85udIz+VY61ejUz=vOLN#@@W91t%1xgz^fVgYvJMv(5cVk_3YAh} zzA}gKM}^3zYV1eH#!Nv~{Q!W9^0U%H{bB3YOXdYl(T6Gr+F(SUOtG|H?SCxH2(G;M z+@3h1h)!CUg3>yaX5X5sNgENBp@8*U1Fj(||6@zRhvE$JpUH|6rRU0=ot#tgE-PN( zkHvIsdV4Xy&_r1hC56LfYt^0(Q4K>aOLIRDIwdNR-N6bj`gZX9&L4jL(a>i{&SCPk zfSiLlbSUG*z)ngEx1rf??%Ss%`MWS@{s?kk(TttaF+xGAx#@9blfw!Pt229hJ$<%O zv{gzDf~>E}8;^SVCGOT%hO%_^oZZPy~i zY3*p47By4kLZ-e7&bJ6*N0G(n2W#wBu3CpFkC!WI79@r+51mqfE>e+BJ(TvhkSFr5 zNTk=o@r`fDma-sqjs7W5l~%UKCUCZ%8!b$d2yP|0Ah}!e2^}eyol3~qv2yz&l$OUa zb|MHLK}hgRqfK$VQzj>sy`8h6Al8jRZlo{259uC(YfI*?;_q>kxU|wzwCH|5(#H-E zPueX8@GS5j!GTba8ERaXLN|q2b^%M03_Fomxm2Lk^Qb5)!j4c*m{5uj_q2&yl52Ha==UkKsNCX^pr#g^>Ad*tsae^t{>N z=aIb47{wx}*d=WV;X)}rGNarsCdOw(xBEtn)_3YsO$cDee3yF*WM0cUS61MUO19-4 z>NtN9T9bxhh}4n~zBJYcc+~&;bxC6XtS7Q7i{OrDYr2Ei!YP8=A)3io5vZZwu8_%6 z5qMDMh8bw+>tx|^lG=rkbRX>IqG4<8Hy5>#B~X3vShii=>88pE>PVuzyzy*hSBJGX zZm?9|r9OHNA>2TDQz=1#pan`&5M_tg7X0)1tC_Gr{C$GmXH!EmXgowx!fm`tJ9o|N zVQFMa9+MMs8M+jiY<@p{{rG8^=ScFw7E6)NNRh)`2KO7aQ8SiuQLD`*U;D%# z{f!xJg1$O5>0@VH{)lH>k$BUKQn7m-_F3!6H-)o)LA1$No(Ed;i=syo_1O(J2~zpa z^JQ848DETdcXkg>cI_IbXld96e(6W+$;@t**O!Qo(F~f9%UXDq+#>10u`U4*^~rwn zwdaPVu;8}3;Kpq*vt(zmTI4Y)v~tjKQ>W&YcxqWe2EC+~ClFb+9jWg{6?LSNpkrb> zxM6;#G=`CxeX_;gdFI44vnuGU|lyOouJ@ z0s5M?U`gB6Fh%KkE1*@<9uR(kM#?TzYN{}8#WnEa2QMb^8=IURGrB^rToX!>2&Evv ztlv^*osJ1DQ#@2oY2Z&&oq>X4FWrhk&-xrvs8Xj0t6*I^BZt_0anX!ccwJ_dMG%ix z;H<=!5E1j5hfGHoV}A1k~^4CyiIgM;2Ca#*b$6RYlgS5Ud2Q zmFR4Cml*NFh#E)7{~SV2LDS}QH3B(bV6{~8nlB*fM?B0RF7NhdQCV}N?pKxTPvO6c z2)3m#dwM9(dFi|QU0r#oPBD5m&jITjpS>ba-K4tw%YK>V=f>=yzy?bxnXy>K$3=Xy z{O*$KQOt`X0&a9jUN0(GSS~u3aV123QF=m zCx<|ck?cq&P{H9<+sA2SUnp$v;F$96+qk%29WrFSWwD~(?7^OIDzs&+@tyz5$=Q2~ z1$#I+-l9(2T^T?LygUka-Dyn#O?Hd({UQVQ0nI_^GV*}*dPE3CtPV>}R8P3y7pHb} zio%UUIu9LMqJx!fqwiKxcceyQL(>-hIC(@^kmOq}|-)lK0W+r^Fmn`dCKmGinTv9K<%{`kV!0A&l&lGPV3%|J-QZ3G`Zpn5x#B4+u zMAX%rhJpL|g=)uQ1>4FdsUppbIb;BiFKP=hwqQYUR7dcto5yB_&MIpincolKNep zh}%Tfphcqg*GXxiv1kX_st zhx0py@b}pWN0UF^x`#+UIlTDYWDPxIpS)G0GZf|>tvgu#PJV^U9d*0?0{^O^CBHfs z&8Pv6Q@Q$q!n$HniXiiY84-WJf3%_W1EIkPDG&>X-E;Y}<7a5g?|P48BE9zYPM5PD ztwq4CVR^uF_Gj?i#%%=F9=~&tCVf&DiToqql*B~J`|BQo3$5Bg0f(hw3_QKMUK}W= zPR$0H0{uEw2;&wM(mow@-~b)~R1^%H5)a6PJ|h?%1(gJ)>yg7yloE^J-J%TR15RD4 zNh6%tKAi}Q6cqGp%Cs7`lI_GJ>ziaQR-WB3>f4jI*pIGRGURQ8QfVp&|AJmxu!|U} znDF7#1xZ|*Xf3-fk{c~U;saIZ#dda+HW3%cjDZCSy3f=_OBWo`?bh}2@K7wxHdsw? zm6-2jO)1ec><%)~V#g)Q9pz?srDJ<>eY4v81&tU)#P9xJgW<-r!&#j8d(I)Z?r(v! zqgLh8D9E9qe9l2o99|}>9rFlZ>d=x+C?{^XP&l}Qu`d$u!imrsuXx_fPo&NIS%)Dr z%)ixBp2fvlE_)$&PrW89>`eKY`|;klxIkA8U_gKJHU)*;b6aGr;39NRlqNJ%sG`6* zgSa#S4@UP~Mud4_I`U5bY2d-QGBIr+GInl%311VV*&&G(bz(dL8ySo5MVLHCUT@{L za|JP&uh3<=kX=Gje9uuJVB;AtS8(U%a^>csVf0itxGNhP;)2@Q_1aZzqbTW1S)5&% zxIyl-G!VBZ4d=;`l~&%?T8e7dXR>8Tj7bod^jJ2UU1tZ4m=3Di7rhhd>IX;Z2j^H? zAb%6^6cO;M2b^I|E|q|^G68a0qA4LztSHF(*hnkVFRG5Yqzf9DHT69CNAYFtxyir zym@b_#}kB|uFVynNOw?Cv*s}L6qxWK##6hYu5yz6py- z<%}LN)G03Lr;rz-LPXyNfrOgknhHX2$x=uNB9}};w5h1GDH|Se!Y9hXFu+iN3O7}n zH%ftDUal`ARQB^4jMVm(&PbEGLusc#73|@Ev{x8lj_yLGMYYZq%UV)^_;S|gw|(ys zYEI7l9pa#)(e#*MG|!=z1Ixk{=^-Xuinq_^*=r({fmvigUOSCiW9{_|#_iTCd&I_` z(a-G0Vgafa%eqi_ztFj%?~(>Z-Uh}@7+sA;KGMmC17%paF1gqiH>&4%3iQ&)+;r3H z><&^k_kJh)A?LOS@p6sI74rrT3JxA5zD@r3sq+1uanTsJw^00?&6+|A<7@6+IvyH$ z{m+U;-5gjdR`5+GN@U(Yfz#&0GkNG7K$-)~^yImIH3E*rh0b zk23|mubOxZmSr=pzF%#^v04mW1i*ZUN_Cfd_at8M$RRO`$UB$gVG+bk&%a>ti8vP1 z0ewbYK^#GzF#!DmLJFb^@$B(T-l%UD8zBIHzz_$8`~_K-*@}12?LK&pXvRy3%LpV- z&DKC~=u2?qQkKe^IqVRl2(devaSP1ke_QxCj^DXjw z$PaAC3^*W7xF7MJ_g)J6{i1FVX-{#bAIh?4 zAkR$&Cz4ErN4wL078oqsV^##+YueD|v_)S)1bc*p2#w&U)IqQ$Vi%N0jlO;2J)EU9 zvIF_W9;rPiP8^7^aL=qmiP`_C=xGdL#Ft(RVkeIAj>&i%hCl`B@M=n1S#G`G5~R_)W+c=V$VQ{h9T{X$CEy815eJ zwPg35Gx{r2YnMO_hMd}=tenmvy&vXyk0q}yaZ{ulbPxm^2rM8?NE4tjB{>a0gf>1T z=pI0q7qI&*(H1>Eh<{K~FuWka0U6}}4$`#d1(7sJbY z%0)gW-54TyNH1k;P4HtM;8JPLit}^ zCW)wpGXnXKMaP8?79^je7eMEl2cM1^~ z&Uz#2*0MBBM+oDZCALh0Y6ye8(+eP5IE`sx0P6VRUBM7>${f8oN!!5dIZ;>-K7-3!jmZy?yx^^VW=W{`$s&MZl$}4k$7?IdNT{5daMq#RZ!u3I#9c~Jxuo&E z(6fC}xiln!_=jMGf!gVpe8wPWF$EJ?YcX{z@L9ay8Q-@m`vAcYuQ*ty$b!2udjpFw z&CB6$Al|G5LQty+-&#YW_x!9Xjz}9t<^cNwQVcX8E4D%2z*RUSdqhWFqFD#HKH#iiY+CFJf>bC0ELsi>5#uwHs2lE@Oz2bGXLqP6hiT90dWP&uVO9{da*8EYG+YsR$xx8-RG700m?M8Byu6#* zm0qn%z%Ixx!1N0T+t*{jb&oz9>=YQ0Me0KzyMrWAm$Cj?-%aWrsnor zE96RbFqeGfx1wYt+KUkX?;tESAJ-_Tu!ZS z$m+ezndP*|@9W|!sE$coL636v5O&T0+#g)|0(q{qfH43i*HV5qDsPsN{Qm2dj5Ge) zI!)5|t2^>v!b<(`tW)8MP+kd8AX!hotuL3v2ETJfQJ=k}EJ?|He_bbCKGybHock}m zy*=b{z2){h+zLKIy}uj1bBp}Id&ikm4n+DI7Ii!*bD}*S~;C<^mTFt4qRqfkkUm*zbOb(otVagie`lYWoNP1of6Rv-$~ z6A|+fIhpV(09~bk$t*ao4e`r4b}~Z74mI!Qj2&n zi6U`rUJiyitT(S3{Zsqt`>UAL3#@k>*$lNvPRMWgQ%+DI*0CS)B*-fSF{4QH%!hgS zJ1`N0kesA$n!Vx?<OkqA&zLj zRRAfeU$Z^(O^@Yjg9zcH-Ai^7l)&o7A3=D_2T2?EA*~ug|KJCK#7KV4A2x$0J$IwHD`mF& zr;C9u+oY{a`X50sR(te%? zFEhT@a+sw5X(9hToc%7m+kAwGDxL~NC(V`ic>EW617A*L7#O>f;Y4-tS$?vvF=={( zlRXS0O^^=QlMNd{W*2;-Va<{|U8MVKX0`B=F!ykxj6*7q@f<}${{wf=W%|!iS&-ym zI)^|EA!gTH^)=vCRdAu2Yo!C~y)qt6xKvyR zjR3iClO+zcK-L9U-}->h?32a;=Vm25TOecpF|Opp;WQVnnWKlsobD+Ql?vBz-n*966`Mmp*K%qD0e-f)0(i4q-6(L|-A!&nFx!-99Z3JL|D~ zTFaz4t^AJLtJ20U?6&3njY}KOA!bMkTgchV@Q8-H>MmoUAQ8ne&sWD-37+07^KYu zRu$c5OTI1wqv3wm#76oT=RV5N#NV;rPb}8DkbVvajm@2>@ITs~eI^(bkA@z697>x& z51;Dk)_9YPA|K>WyrX|b8UV7gtAqWu+s%%q)#n9RZZ;36U#F`zLNV@gT0+f{jy`~` zzdL#p>1mp9A|_>D`EFMy&3kaTX*aqkl-hEybG+{>cnf3_ZIz4H?IP*A_NkM2kLyjk zC-C(heQe8`og(#W#=dwKI*!@zS%XiR3$0nbliYQ%4eA;8@hc%`-17j>gMN zu68U7#YlnZKboI+-(5;}VzX11?`o@x-Ua2R*1~Z!uB@~%X4ulURww6V5>!qx_d|25 z!L^5J%1JjQ)itfj?)l8#e|>XGaaPq7XNvc8PpQIab!u9#pJOq_+Gs!~k4-~9>_FbV zF2CMP*1{vJEk7bRmZ{aQs11N=VGaF?xA_}OV?j+>b9Ii2jr<9gmCk|9T2pNiUN)KKU5vpP=a~8!W>`(-BJ67HV(fD4eC!(R66^}>0xC6l4R{rJHFza- zs%P3~>KhDy41aX*n2i{Nm|65v8Xp=TDh1^|ns(ZD>UJ6hjjSRrzf8 zLxdqn)vbxI>{t4zaUH)?x0AGEJE$4Mh+#-2py^lgsCFH_V>&1qgM>juwV~Nr%2mdd z=cRd_uwy?MFsK{DiQ!0PpxIgCrG6c=V?HPwgN4CJbx)n6$ye&7aUHi~J*XN(iJ?eE zsL5C2rFI>)V>~Dt(-p%X1BHP^KwV_ zF=!tXwWBdeACrl(iq1*hOyi)ome*?FoNW@jqcg}JQ;DHTU8AO#->T>QWk+R@JSG+c zi<&`AFOSQx{^K9N^~&|a&N(}JgWNF<7^fJP)Dvn|s#a&r@%$zA!)*5%Lxi(SrntUx zris@7qfjG%>bL3FK)KsQ>o?|c!IGzsw+R^sM6>^&!vCzh!Yt2QVm-`uo>4+D+i3dL zLvA*~dZqq1!F12uS<}(Jk;T1ESRVVD&Uw=jVBX0VqiMz#1xnr37NRLjM}q#>w`U>Q z&MH4E=B6mvTP=(hnsV3+y(9Bq;h0MMbACB2iC<;MuUTG18_Kok*T>GFq^Xpurj(-^a7OE*mBY+=Rb=2w#upDMF{q2hmq;j+mZQu$*>bMYnGIGkJbY6~s0$xEd|JkNrx1~hqI%imwzI@l~)U@2r;82Oa zjE*MdN8VT8@krrgwXchQT&Xg}PL@$J2NM=*sx;BVsO3OU3Z-i`{KP>OW;HZITR8$z z_L~_=A%w2GWF;_~p6mbzoc+r5dF8;lT$Asvr<^C6Cs>3pUvveP1yux5pS1>9sK1#J`ET(HB`!VJ+z!Fouix^=G!NA@E@s0YW+9_M(Cb2jHqzTkIu~$4pL0XevXN)-pfW5{>s@Y|r&+GqdTV|{ej-%@$LX}IrO-LBwYJRm-1fxw^p!!@%k72rIsG{Wo5=JT zyqnHcm?@8n&+RGgq3zl2@i9s*KGa&Z=a?J&7B+Z^>tgoB4n+=mHKjF$%}R?m7K>L5 znyQ-DOKEc$AKy@!cW$XT=!@vf=?|D<-7sJ&9o{Zk*q}8fuLxxivrg_WaL+Bz`JB+5 z$T6zHR^N)K=CPJF8CdZ&M(CV}>y-_`88bJl8%!x?FpOKvimGBy!u4P)2P3Z25 z^d7a%&o^*^vVvBmE`szO&49B*Zh=$*Yi;O}HGui`@M$vS*?Y7y&yTSU^5m4AKImD= zTg|Z|eG&cr)uGh+RE@D5`$YQJ)u#f-c-1mJMr)9{by-{}_uEfHqWa!vW+!Bf<@|0W zlV>~R;@|5h3{>ux&&1sK_6Z&_R#dq=mtoX+H>&98BW&cGZax(R%6t^5_vEhEq^Wm< z-NsQwdEV26xqT$V0arE6eR2^OQ^Q~5`s8YB(Cp|-I~k^iaG$+-P5%xlYG zHh)TW=L>?j1=t0=Qos)?Lj!%M7_|MwEw#f3qc693&ze_ok2o&@eceR8NL#*6;4k07 zHg}ddmjvJugKK*=m)^-AL5Br~?=81fuV5azj3aK9`{WKquK->|oss@f+hAMzSBTA< z5f7m)J(*kakK7Zd*ZNtDTbjFvJhcNY9tMz%`G#?m&ITYaJ-1wM`1kyHf|K5muWZjB z=ftlYvMF~gxf6#c-3ViIxA|ghiF#iNA(4VR+q)h+q4=N)qjZnX5-Oc85-Z&i0)=)Zrw()y}yXx9Cp+)N-ufaM1I798XDC$12 z30+D3z*-3x^`IQ1vv>7kyCMDATVeglFWez6+_^8@aqjhD830(Ju|45ipn9GH7cJZt z84c7Htqsf;5e>u^m97RqIV|<_(p)8gi`uqr6Syry`UK_9nr-tJKct%QbnWZsapuG4 z$0|wZUn*}SIAXN78C=sPKex%Q4_8p-YYweCf!C=Q|!a(p@(7>;{dZD4Cc-D2IWzj(w3xqj}iFq6d33q7g0IFO} zH@^}{U(y+`Bzqy z71teP{KbpB8~${ao0M_aXlOeQvO8`it_vr)r1wCpTPICBQ9x6$AF zt+UbN94@5%MFpvdP{w|Wj^*WoGHF1z@A>24)6wgAza z1R<(0vbhQKh4I*EX1hqpN^z%KERe~n*GPXV7i-|S7o4(}=v6Hpc|`VTrVEIDIq*`L zd$I#Y?R~w3)@7R6iXsltt3|nRd7nT)csdz-o^6dToA*v!br~Itr$#xx0D(=;*LBdDj-Ny7pJwE@j-RLvy`X z$J1@BO-kYWkGtn{cRY^AZ_k(u7V(6K5Y2X@C%SrCx@hN}ozFF~%}Ax_hpB22w5~1{ zGFRnA-)KtTi0rhv+SAb1ab8Qm!LClfhn=>(Ka2l*e+w-YPNBV4{&m=0@%~iseo1ui z`8_D`ZPHYb`R7@r_jA%-Kw_TZW= zGbdCo6gR-fmEuzvOOZf`g3!4x8K7@Zu z_zGkR;R5O**teI#38@ut4Z*vh^XfNVPT>D6tOhkgV5$N{u=mtKVlRO7;~Hs!!P^EI z|Nja9Ui=L2!SUuk48b+rHE3L`TE>)&qjD7iSAxtp512&kGGJE%HZxB-KzTh0=gZV!|+ zcQAJ`c5`(3*Q0;w0p+YsT#Q}*W%qA8|L>7{89V*=k$yb*h?MDHk$x~df5qhJqUPvm zCm?Ta>f-47CtA&qIDqs(IdM^XB^7acCMGs6Zh8$41}0ztP+VP382Irw0*cD3N~;1@ zoy<*v#tvpcF;yj?93SKVZuBFFzeVO^ANdntVPa;YXJ(;i;!tB|qT=56%DgKf?LnmizCv?_aWye)U&2{_c5y zxWD_Rxx+`J@%*bRevqziA9=C=yD|T#U;p>u?SJ)WMH3rUH~SB4cbAXt$;HH|0AyzV z8`hnTo#nrJwO7`-=BmRQ2l8vk8`vhCW~VA>90WdZCVKQL8^=nc1mT|kipJI%ByF4g zTeoFI5gD)ToUq{y6L05FoQZhS8dMeR{GzIGs9OW@{4|#WObKuDR8$Ghq`E$>b8wG1 z*CwT#f%Uow8Y zyGL)UxQtNCdRC(-U*kff1fDfIT0CDXz%#?!U-}f6npq`M+`V025JFRMfM6YgQ*~zb zEcyrGLL0P<2&1LJ)ms72WyGr1m4L5hiIfwuelZBEgZNAA$=St?s2&1&i3<(uC-|o@ zZ@#fny$FWEoL#M*Wivkp4E<8K28L_}2J-4m@n19nPnI3J51V!$D01HKfC$-qa69(O zc8gEO{N#DYF5&vKte!IBf-VcD_i35K9!Fmky0qv5qB4Ko-}EE3ULG0>44%mQ61<#v z`L^JMl^eL9zJbz<#k9-`XK0&TewScq$qfF)HMQsGiRJw({hqX0?N`+~sqF9j-$zf& zu|$chs~0Yd>XV$6=k2R{nt^Vah4P#6x8^OUk-M25k=^QD4!2soP@}(`W(}(h2}Q%G#E zkLO>6USryBlD4ECv7)9c^QfEj+3vzrfY=TNY%mQiWaw5EzAVHK1n4wyt@a>(`|^0C z2=@Kh&&@TqA%l|)ju3s)c~y97cZQ2idgC~WTL7#X1+qO(+7&L7I$Au5gZt2^?(Y7jR(Yfssburw~ww5tu5dD>MA7473PzRih!$ z5y)|G77%F`CM}gZcf^EA9=g*#b};^=S%kf#I36sR?=YS!r))M&H$&I2c
  • x#e1h{baLP@AcAEbh($8fkN8HUQ;0!C|bj-I? zC3xCvDY2pY6K-#iix|4&WDlAW_cl$v;i`yLk&4OBOGEeDv-(0OzCASLaHO54{V;o^ zthF@f|61vhBCD5N6O1S4sl6{^dh7Az=!_-oQ(|;y&b??e*(!a1$Pwp99_Le^g-+9c zym8ag)duUk+MoVelHG9NjqTzWQ$M|47x4Z)*Ov9@~|3kA2U z#Yg|$S0(-X?cF@lYKD*R;^rQGxTval)0%USpDWI7o2#mH-fLQihgCr%yNTJt{o>!O zH!S?gmvbQe%|$WWr#;K>%$K*hHf{UcQvbixS>{dbWEU%c>~K-udu@TVtd6bpqvQ8K zZe3R=*AOk6yDoq6gsX+WU#7lUm(Qj(`PGW}iN_g2N(_4WKb%VX;LWuE^q~sbkoC#l z_ZhaZGW_57tc_oHnN_a+^3G4C!E?)M`8VF=y1DaB-r{3lZrk|BFSg~o9RBk_#uocs z7k6A+S0VFCy;A4yndGILjx)Uf9I?`%GH2~9n`;J7_8s3+bpGI%uIVQ)#siCyJmKHf zLg`n#-~QZYbu$0YtGn~-Ie$)G(sfwhZFBj*{mRcTV!PkN$O3VbM{s6Us)CUvwi`Xb zl|n>NYMQ=hUP@|3v;k0EtbTa3p@NZuVJxg>ur${X%FizWiWw*b0ad2uD;PqUF3~p0 zMyAQ8rpbn;X~}6xiK(du1}TXarY5Gz2IgsLsmVrmHl~*5i6+U(KygchB(o#~qtrA5 z!?e^?qZC5}6Z14vyIACEN3>@zuLFaG%l)6rCrwbuYGu_?+_qtktjeNIje;g#+&}g` zdU`Lmkb%*5(U&Px7CtQF@43)nvM1wSO}D9h#@ai=%2%xx)qa}isGE^8FFXFt&aL+( re}uiLx$yNPvx6y58kUYuaS5JcjE;B$L(NY literal 0 HcmV?d00001 diff --git a/lib/inc/stm32f0xx.h b/Libraries/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h old mode 100755 new mode 100644 similarity index 96% rename from lib/inc/stm32f0xx.h rename to Libraries/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h index 07c252c..73c4a61 --- a/lib/inc/stm32f0xx.h +++ b/Libraries/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File. * This file contains all the peripheral register's definitions, bits * definitions and memory mapping for STM32F0xx devices. @@ -61,7 +61,7 @@ * @{ */ -/* Uncomment the line below according to the target STM32F-0 device used in your +/* Uncomment the line below according to the target STM32F0 device used in your application */ @@ -71,8 +71,9 @@ /* Tip: To avoid modifying this file each time you need to switch between these devices, you can define the device in your toolchain compiler preprocessor. - - STM32F0xx devices are STM32F050xx microcontrollers where the Flash memory - density ranges between 32 and 64 Kbytes. + STM32F0xx devices are: + - STM32F050xx microcontrollers where the Flash memory density can go up to 32 Kbytes. + - STM32F051xx microcontrollers where the Flash memory density can go up to 64 Kbytes. */ #if !defined (STM32F0XX) @@ -138,11 +139,11 @@ #endif /* LSE_VALUE */ /** - * @brief STM32F0xx Standard Peripheral Library version number V1.0.0 + * @brief STM32F0xx Standard Peripheral Library version number V1.0.1 */ #define __STM32F0XX_STDPERIPH_VERSION_MAIN (0x01) /*!< [31:24] main version */ #define __STM32F0XX_STDPERIPH_VERSION_SUB1 (0x00) /*!< [23:16] sub1 version */ -#define __STM32F0XX_STDPERIPH_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */ +#define __STM32F0XX_STDPERIPH_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */ #define __STM32F0XX_STDPERIPH_VERSION_RC (0x00) /*!< [7:0] release candidate */ #define __STM32F0XX_STDPERIPH_VERSION ((__STM32F0XX_STDPERIPH_VERSION_MAIN << 24)\ |(__STM32F0XX_STDPERIPH_VERSION_SUB1 << 16)\ @@ -2176,266 +2177,263 @@ typedef struct /* */ /******************************************************************************/ /******************** Bits definition for RTC_TR register *******************/ -#define RTC_TR_PM ((uint32_t)0x00400000) /*!< */ -#define RTC_TR_HT ((uint32_t)0x00300000) /*!< */ -#define RTC_TR_HT_0 ((uint32_t)0x00100000) /*!< */ -#define RTC_TR_HT_1 ((uint32_t)0x00200000) /*!< */ -#define RTC_TR_HU ((uint32_t)0x000F0000) /*!< */ -#define RTC_TR_HU_0 ((uint32_t)0x00010000) /*!< */ -#define RTC_TR_HU_1 ((uint32_t)0x00020000) /*!< */ -#define RTC_TR_HU_2 ((uint32_t)0x00040000) /*!< */ -#define RTC_TR_HU_3 ((uint32_t)0x00080000) /*!< */ -#define RTC_TR_MNT ((uint32_t)0x00007000) /*!< */ -#define RTC_TR_MNT_0 ((uint32_t)0x00001000) /*!< */ -#define RTC_TR_MNT_1 ((uint32_t)0x00002000) /*!< */ -#define RTC_TR_MNT_2 ((uint32_t)0x00004000) /*!< */ -#define RTC_TR_MNU ((uint32_t)0x00000F00) /*!< */ -#define RTC_TR_MNU_0 ((uint32_t)0x00000100) /*!< */ -#define RTC_TR_MNU_1 ((uint32_t)0x00000200) /*!< */ -#define RTC_TR_MNU_2 ((uint32_t)0x00000400) /*!< */ -#define RTC_TR_MNU_3 ((uint32_t)0x00000800) /*!< */ -#define RTC_TR_ST ((uint32_t)0x00000070) /*!< */ -#define RTC_TR_ST_0 ((uint32_t)0x00000010) /*!< */ -#define RTC_TR_ST_1 ((uint32_t)0x00000020) /*!< */ -#define RTC_TR_ST_2 ((uint32_t)0x00000040) /*!< */ -#define RTC_TR_SU ((uint32_t)0x0000000F) /*!< */ -#define RTC_TR_SU_0 ((uint32_t)0x00000001) /*!< */ -#define RTC_TR_SU_1 ((uint32_t)0x00000002) /*!< */ -#define RTC_TR_SU_2 ((uint32_t)0x00000004) /*!< */ -#define RTC_TR_SU_3 ((uint32_t)0x00000008) /*!< */ +#define RTC_TR_PM ((uint32_t)0x00400000) +#define RTC_TR_HT ((uint32_t)0x00300000) +#define RTC_TR_HT_0 ((uint32_t)0x00100000) +#define RTC_TR_HT_1 ((uint32_t)0x00200000) +#define RTC_TR_HU ((uint32_t)0x000F0000) +#define RTC_TR_HU_0 ((uint32_t)0x00010000) +#define RTC_TR_HU_1 ((uint32_t)0x00020000) +#define RTC_TR_HU_2 ((uint32_t)0x00040000) +#define RTC_TR_HU_3 ((uint32_t)0x00080000) +#define RTC_TR_MNT ((uint32_t)0x00007000) +#define RTC_TR_MNT_0 ((uint32_t)0x00001000) +#define RTC_TR_MNT_1 ((uint32_t)0x00002000) +#define RTC_TR_MNT_2 ((uint32_t)0x00004000) +#define RTC_TR_MNU ((uint32_t)0x00000F00) +#define RTC_TR_MNU_0 ((uint32_t)0x00000100) +#define RTC_TR_MNU_1 ((uint32_t)0x00000200) +#define RTC_TR_MNU_2 ((uint32_t)0x00000400) +#define RTC_TR_MNU_3 ((uint32_t)0x00000800) +#define RTC_TR_ST ((uint32_t)0x00000070) +#define RTC_TR_ST_0 ((uint32_t)0x00000010) +#define RTC_TR_ST_1 ((uint32_t)0x00000020) +#define RTC_TR_ST_2 ((uint32_t)0x00000040) +#define RTC_TR_SU ((uint32_t)0x0000000F) +#define RTC_TR_SU_0 ((uint32_t)0x00000001) +#define RTC_TR_SU_1 ((uint32_t)0x00000002) +#define RTC_TR_SU_2 ((uint32_t)0x00000004) +#define RTC_TR_SU_3 ((uint32_t)0x00000008) /******************** Bits definition for RTC_DR register *******************/ -#define RTC_DR_YT ((uint32_t)0x00F00000) /*!< */ -#define RTC_DR_YT_0 ((uint32_t)0x00100000) /*!< */ -#define RTC_DR_YT_1 ((uint32_t)0x00200000) /*!< */ -#define RTC_DR_YT_2 ((uint32_t)0x00400000) /*!< */ -#define RTC_DR_YT_3 ((uint32_t)0x00800000) /*!< */ -#define RTC_DR_YU ((uint32_t)0x000F0000) /*!< */ -#define RTC_DR_YU_0 ((uint32_t)0x00010000) /*!< */ -#define RTC_DR_YU_1 ((uint32_t)0x00020000) /*!< */ -#define RTC_DR_YU_2 ((uint32_t)0x00040000) /*!< */ -#define RTC_DR_YU_3 ((uint32_t)0x00080000) /*!< */ -#define RTC_DR_WDU ((uint32_t)0x0000E000) /*!< */ -#define RTC_DR_WDU_0 ((uint32_t)0x00002000) /*!< */ -#define RTC_DR_WDU_1 ((uint32_t)0x00004000) /*!< */ -#define RTC_DR_WDU_2 ((uint32_t)0x00008000) /*!< */ -#define RTC_DR_MT ((uint32_t)0x00001000) /*!< */ -#define RTC_DR_MU ((uint32_t)0x00000F00) /*!< */ -#define RTC_DR_MU_0 ((uint32_t)0x00000100) /*!< */ -#define RTC_DR_MU_1 ((uint32_t)0x00000200) /*!< */ -#define RTC_DR_MU_2 ((uint32_t)0x00000400) /*!< */ -#define RTC_DR_MU_3 ((uint32_t)0x00000800) /*!< */ -#define RTC_DR_DT ((uint32_t)0x00000030) /*!< */ -#define RTC_DR_DT_0 ((uint32_t)0x00000010) /*!< */ -#define RTC_DR_DT_1 ((uint32_t)0x00000020) /*!< */ -#define RTC_DR_DU ((uint32_t)0x0000000F) /*!< */ -#define RTC_DR_DU_0 ((uint32_t)0x00000001) /*!< */ -#define RTC_DR_DU_1 ((uint32_t)0x00000002) /*!< */ -#define RTC_DR_DU_2 ((uint32_t)0x00000004) /*!< */ -#define RTC_DR_DU_3 ((uint32_t)0x00000008) /*!< */ +#define RTC_DR_YT ((uint32_t)0x00F00000) +#define RTC_DR_YT_0 ((uint32_t)0x00100000) +#define RTC_DR_YT_1 ((uint32_t)0x00200000) +#define RTC_DR_YT_2 ((uint32_t)0x00400000) +#define RTC_DR_YT_3 ((uint32_t)0x00800000) +#define RTC_DR_YU ((uint32_t)0x000F0000) +#define RTC_DR_YU_0 ((uint32_t)0x00010000) +#define RTC_DR_YU_1 ((uint32_t)0x00020000) +#define RTC_DR_YU_2 ((uint32_t)0x00040000) +#define RTC_DR_YU_3 ((uint32_t)0x00080000) +#define RTC_DR_WDU ((uint32_t)0x0000E000) +#define RTC_DR_WDU_0 ((uint32_t)0x00002000) +#define RTC_DR_WDU_1 ((uint32_t)0x00004000) +#define RTC_DR_WDU_2 ((uint32_t)0x00008000) +#define RTC_DR_MT ((uint32_t)0x00001000) +#define RTC_DR_MU ((uint32_t)0x00000F00) +#define RTC_DR_MU_0 ((uint32_t)0x00000100) +#define RTC_DR_MU_1 ((uint32_t)0x00000200) +#define RTC_DR_MU_2 ((uint32_t)0x00000400) +#define RTC_DR_MU_3 ((uint32_t)0x00000800) +#define RTC_DR_DT ((uint32_t)0x00000030) +#define RTC_DR_DT_0 ((uint32_t)0x00000010) +#define RTC_DR_DT_1 ((uint32_t)0x00000020) +#define RTC_DR_DU ((uint32_t)0x0000000F) +#define RTC_DR_DU_0 ((uint32_t)0x00000001) +#define RTC_DR_DU_1 ((uint32_t)0x00000002) +#define RTC_DR_DU_2 ((uint32_t)0x00000004) +#define RTC_DR_DU_3 ((uint32_t)0x00000008) /******************** Bits definition for RTC_CR register *******************/ -#define RTC_CR_COE ((uint32_t)0x00800000) /*!< */ -#define RTC_CR_OSEL ((uint32_t)0x00600000) /*!< */ -#define RTC_CR_OSEL_0 ((uint32_t)0x00200000) /*!< */ -#define RTC_CR_OSEL_1 ((uint32_t)0x00400000) /*!< */ -#define RTC_CR_POL ((uint32_t)0x00100000) /*!< */ -#define RTC_CR_CALSEL ((uint32_t)0x00080000) /*!< */ -#define RTC_CR_BCK ((uint32_t)0x00040000) /*!< */ -#define RTC_CR_SUB1H ((uint32_t)0x00020000) /*!< */ -#define RTC_CR_ADD1H ((uint32_t)0x00010000) /*!< */ -#define RTC_CR_TSIE ((uint32_t)0x00008000) /*!< */ -#define RTC_CR_ALRAIE ((uint32_t)0x00001000) /*!< */ -#define RTC_CR_TSE ((uint32_t)0x00000800) /*!< */ -#define RTC_CR_ALRAE ((uint32_t)0x00000100) /*!< */ -#define RTC_CR_DCE ((uint32_t)0x00000080) /*!< */ -#define RTC_CR_FMT ((uint32_t)0x00000040) /*!< */ -#define RTC_CR_BYPSHAD ((uint32_t)0x00000020) /*!< */ -#define RTC_CR_REFCKON ((uint32_t)0x00000010) /*!< */ -#define RTC_CR_TSEDGE ((uint32_t)0x00000008) /*!< */ +#define RTC_CR_COE ((uint32_t)0x00800000) +#define RTC_CR_OSEL ((uint32_t)0x00600000) +#define RTC_CR_OSEL_0 ((uint32_t)0x00200000) +#define RTC_CR_OSEL_1 ((uint32_t)0x00400000) +#define RTC_CR_POL ((uint32_t)0x00100000) +#define RTC_CR_CALSEL ((uint32_t)0x00080000) +#define RTC_CR_BCK ((uint32_t)0x00040000) +#define RTC_CR_SUB1H ((uint32_t)0x00020000) +#define RTC_CR_ADD1H ((uint32_t)0x00010000) +#define RTC_CR_TSIE ((uint32_t)0x00008000) +#define RTC_CR_ALRAIE ((uint32_t)0x00001000) +#define RTC_CR_TSE ((uint32_t)0x00000800) +#define RTC_CR_ALRAE ((uint32_t)0x00000100) +#define RTC_CR_DCE ((uint32_t)0x00000080) +#define RTC_CR_FMT ((uint32_t)0x00000040) +#define RTC_CR_BYPSHAD ((uint32_t)0x00000020) +#define RTC_CR_REFCKON ((uint32_t)0x00000010) +#define RTC_CR_TSEDGE ((uint32_t)0x00000008) /******************** Bits definition for RTC_ISR register ******************/ -#define RTC_ISR_RECALPF ((uint32_t)0x00010000) /*!< */ -#define RTC_ISR_TAMP3F ((uint32_t)0x00008000) /*!< */ -#define RTC_ISR_TAMP2F ((uint32_t)0x00004000) /*!< */ -#define RTC_ISR_TAMP1F ((uint32_t)0x00002000) /*!< */ -#define RTC_ISR_TSOVF ((uint32_t)0x00001000) /*!< */ -#define RTC_ISR_TSF ((uint32_t)0x00000800) /*!< */ -#define RTC_ISR_ALRAF ((uint32_t)0x00000100) /*!< */ -#define RTC_ISR_INIT ((uint32_t)0x00000080) /*!< */ -#define RTC_ISR_INITF ((uint32_t)0x00000040) /*!< */ -#define RTC_ISR_RSF ((uint32_t)0x00000020) /*!< */ -#define RTC_ISR_INITS ((uint32_t)0x00000010) /*!< */ -#define RTC_ISR_SHPF ((uint32_t)0x00000008) /*!< */ -#define RTC_ISR_ALRAWF ((uint32_t)0x00000001) /*!< */ +#define RTC_ISR_RECALPF ((uint32_t)0x00010000) +#define RTC_ISR_TAMP2F ((uint32_t)0x00004000) +#define RTC_ISR_TAMP1F ((uint32_t)0x00002000) +#define RTC_ISR_TSOVF ((uint32_t)0x00001000) +#define RTC_ISR_TSF ((uint32_t)0x00000800) +#define RTC_ISR_ALRAF ((uint32_t)0x00000100) +#define RTC_ISR_INIT ((uint32_t)0x00000080) +#define RTC_ISR_INITF ((uint32_t)0x00000040) +#define RTC_ISR_RSF ((uint32_t)0x00000020) +#define RTC_ISR_INITS ((uint32_t)0x00000010) +#define RTC_ISR_SHPF ((uint32_t)0x00000008) +#define RTC_ISR_ALRAWF ((uint32_t)0x00000001) /******************** Bits definition for RTC_PRER register *****************/ -#define RTC_PRER_PREDIV_A ((uint32_t)0x007F0000) /*!< */ -#define RTC_PRER_PREDIV_S ((uint32_t)0x00007FFF) /*!< */ +#define RTC_PRER_PREDIV_A ((uint32_t)0x007F0000) +#define RTC_PRER_PREDIV_S ((uint32_t)0x00007FFF) /******************** Bits definition for RTC_ALRMAR register ***************/ -#define RTC_ALRMAR_MSK4 ((uint32_t)0x80000000) /*!< */ -#define RTC_ALRMAR_WDSEL ((uint32_t)0x40000000) /*!< */ -#define RTC_ALRMAR_DT ((uint32_t)0x30000000) /*!< */ -#define RTC_ALRMAR_DT_0 ((uint32_t)0x10000000) /*!< */ -#define RTC_ALRMAR_DT_1 ((uint32_t)0x20000000) /*!< */ -#define RTC_ALRMAR_DU ((uint32_t)0x0F000000) /*!< */ -#define RTC_ALRMAR_DU_0 ((uint32_t)0x01000000) /*!< */ -#define RTC_ALRMAR_DU_1 ((uint32_t)0x02000000) /*!< */ -#define RTC_ALRMAR_DU_2 ((uint32_t)0x04000000) /*!< */ -#define RTC_ALRMAR_DU_3 ((uint32_t)0x08000000) /*!< */ -#define RTC_ALRMAR_MSK3 ((uint32_t)0x00800000) /*!< */ -#define RTC_ALRMAR_PM ((uint32_t)0x00400000) /*!< */ -#define RTC_ALRMAR_HT ((uint32_t)0x00300000) /*!< */ -#define RTC_ALRMAR_HT_0 ((uint32_t)0x00100000) /*!< */ -#define RTC_ALRMAR_HT_1 ((uint32_t)0x00200000) /*!< */ -#define RTC_ALRMAR_HU ((uint32_t)0x000F0000) /*!< */ -#define RTC_ALRMAR_HU_0 ((uint32_t)0x00010000) /*!< */ -#define RTC_ALRMAR_HU_1 ((uint32_t)0x00020000) /*!< */ -#define RTC_ALRMAR_HU_2 ((uint32_t)0x00040000) /*!< */ -#define RTC_ALRMAR_HU_3 ((uint32_t)0x00080000) /*!< */ -#define RTC_ALRMAR_MSK2 ((uint32_t)0x00008000) /*!< */ -#define RTC_ALRMAR_MNT ((uint32_t)0x00007000) /*!< */ -#define RTC_ALRMAR_MNT_0 ((uint32_t)0x00001000) /*!< */ -#define RTC_ALRMAR_MNT_1 ((uint32_t)0x00002000) /*!< */ -#define RTC_ALRMAR_MNT_2 ((uint32_t)0x00004000) /*!< */ -#define RTC_ALRMAR_MNU ((uint32_t)0x00000F00) /*!< */ -#define RTC_ALRMAR_MNU_0 ((uint32_t)0x00000100) /*!< */ -#define RTC_ALRMAR_MNU_1 ((uint32_t)0x00000200) /*!< */ -#define RTC_ALRMAR_MNU_2 ((uint32_t)0x00000400) /*!< */ -#define RTC_ALRMAR_MNU_3 ((uint32_t)0x00000800) /*!< */ -#define RTC_ALRMAR_MSK1 ((uint32_t)0x00000080) /*!< */ -#define RTC_ALRMAR_ST ((uint32_t)0x00000070) /*!< */ -#define RTC_ALRMAR_ST_0 ((uint32_t)0x00000010) /*!< */ -#define RTC_ALRMAR_ST_1 ((uint32_t)0x00000020) /*!< */ -#define RTC_ALRMAR_ST_2 ((uint32_t)0x00000040) /*!< */ -#define RTC_ALRMAR_SU ((uint32_t)0x0000000F) /*!< */ -#define RTC_ALRMAR_SU_0 ((uint32_t)0x00000001) /*!< */ -#define RTC_ALRMAR_SU_1 ((uint32_t)0x00000002) /*!< */ -#define RTC_ALRMAR_SU_2 ((uint32_t)0x00000004) /*!< */ -#define RTC_ALRMAR_SU_3 ((uint32_t)0x00000008) /*!< */ +#define RTC_ALRMAR_MSK4 ((uint32_t)0x80000000) +#define RTC_ALRMAR_WDSEL ((uint32_t)0x40000000) +#define RTC_ALRMAR_DT ((uint32_t)0x30000000) +#define RTC_ALRMAR_DT_0 ((uint32_t)0x10000000) +#define RTC_ALRMAR_DT_1 ((uint32_t)0x20000000) +#define RTC_ALRMAR_DU ((uint32_t)0x0F000000) +#define RTC_ALRMAR_DU_0 ((uint32_t)0x01000000) +#define RTC_ALRMAR_DU_1 ((uint32_t)0x02000000) +#define RTC_ALRMAR_DU_2 ((uint32_t)0x04000000) +#define RTC_ALRMAR_DU_3 ((uint32_t)0x08000000) +#define RTC_ALRMAR_MSK3 ((uint32_t)0x00800000) +#define RTC_ALRMAR_PM ((uint32_t)0x00400000) +#define RTC_ALRMAR_HT ((uint32_t)0x00300000) +#define RTC_ALRMAR_HT_0 ((uint32_t)0x00100000) +#define RTC_ALRMAR_HT_1 ((uint32_t)0x00200000) +#define RTC_ALRMAR_HU ((uint32_t)0x000F0000) +#define RTC_ALRMAR_HU_0 ((uint32_t)0x00010000) +#define RTC_ALRMAR_HU_1 ((uint32_t)0x00020000) +#define RTC_ALRMAR_HU_2 ((uint32_t)0x00040000) +#define RTC_ALRMAR_HU_3 ((uint32_t)0x00080000) +#define RTC_ALRMAR_MSK2 ((uint32_t)0x00008000) +#define RTC_ALRMAR_MNT ((uint32_t)0x00007000) +#define RTC_ALRMAR_MNT_0 ((uint32_t)0x00001000) +#define RTC_ALRMAR_MNT_1 ((uint32_t)0x00002000) +#define RTC_ALRMAR_MNT_2 ((uint32_t)0x00004000) +#define RTC_ALRMAR_MNU ((uint32_t)0x00000F00) +#define RTC_ALRMAR_MNU_0 ((uint32_t)0x00000100) +#define RTC_ALRMAR_MNU_1 ((uint32_t)0x00000200) +#define RTC_ALRMAR_MNU_2 ((uint32_t)0x00000400) +#define RTC_ALRMAR_MNU_3 ((uint32_t)0x00000800) +#define RTC_ALRMAR_MSK1 ((uint32_t)0x00000080) +#define RTC_ALRMAR_ST ((uint32_t)0x00000070) +#define RTC_ALRMAR_ST_0 ((uint32_t)0x00000010) +#define RTC_ALRMAR_ST_1 ((uint32_t)0x00000020) +#define RTC_ALRMAR_ST_2 ((uint32_t)0x00000040) +#define RTC_ALRMAR_SU ((uint32_t)0x0000000F) +#define RTC_ALRMAR_SU_0 ((uint32_t)0x00000001) +#define RTC_ALRMAR_SU_1 ((uint32_t)0x00000002) +#define RTC_ALRMAR_SU_2 ((uint32_t)0x00000004) +#define RTC_ALRMAR_SU_3 ((uint32_t)0x00000008) /******************** Bits definition for RTC_WPR register ******************/ -#define RTC_WPR_KEY ((uint32_t)0x000000FF) /*!< */ +#define RTC_WPR_KEY ((uint32_t)0x000000FF) /******************** Bits definition for RTC_SSR register ******************/ -#define RTC_SSR_SS ((uint32_t)0x0003FFFF) /*!< */ +#define RTC_SSR_SS ((uint32_t)0x0003FFFF) /******************** Bits definition for RTC_SHIFTR register ***************/ -#define RTC_SHIFTR_SUBFS ((uint32_t)0x00007FFF) /*!< */ -#define RTC_SHIFTR_ADD1S ((uint32_t)0x80000000) /*!< */ +#define RTC_SHIFTR_SUBFS ((uint32_t)0x00007FFF) +#define RTC_SHIFTR_ADD1S ((uint32_t)0x80000000) /******************** Bits definition for RTC_TSTR register *****************/ -#define RTC_TSTR_PM ((uint32_t)0x00400000) /*!< */ -#define RTC_TSTR_HT ((uint32_t)0x00300000) /*!< */ -#define RTC_TSTR_HT_0 ((uint32_t)0x00100000) /*!< */ -#define RTC_TSTR_HT_1 ((uint32_t)0x00200000) /*!< */ -#define RTC_TSTR_HU ((uint32_t)0x000F0000) /*!< */ -#define RTC_TSTR_HU_0 ((uint32_t)0x00010000) /*!< */ -#define RTC_TSTR_HU_1 ((uint32_t)0x00020000) /*!< */ -#define RTC_TSTR_HU_2 ((uint32_t)0x00040000) /*!< */ -#define RTC_TSTR_HU_3 ((uint32_t)0x00080000) /*!< */ -#define RTC_TSTR_MNT ((uint32_t)0x00007000) /*!< */ -#define RTC_TSTR_MNT_0 ((uint32_t)0x00001000) /*!< */ -#define RTC_TSTR_MNT_1 ((uint32_t)0x00002000) /*!< */ -#define RTC_TSTR_MNT_2 ((uint32_t)0x00004000) /*!< */ -#define RTC_TSTR_MNU ((uint32_t)0x00000F00) /*!< */ -#define RTC_TSTR_MNU_0 ((uint32_t)0x00000100) /*!< */ -#define RTC_TSTR_MNU_1 ((uint32_t)0x00000200) /*!< */ -#define RTC_TSTR_MNU_2 ((uint32_t)0x00000400) /*!< */ -#define RTC_TSTR_MNU_3 ((uint32_t)0x00000800) /*!< */ -#define RTC_TSTR_ST ((uint32_t)0x00000070) /*!< */ -#define RTC_TSTR_ST_0 ((uint32_t)0x00000010) /*!< */ -#define RTC_TSTR_ST_1 ((uint32_t)0x00000020) /*!< */ -#define RTC_TSTR_ST_2 ((uint32_t)0x00000040) /*!< */ -#define RTC_TSTR_SU ((uint32_t)0x0000000F) /*!< */ -#define RTC_TSTR_SU_0 ((uint32_t)0x00000001) /*!< */ -#define RTC_TSTR_SU_1 ((uint32_t)0x00000002) /*!< */ -#define RTC_TSTR_SU_2 ((uint32_t)0x00000004) /*!< */ -#define RTC_TSTR_SU_3 ((uint32_t)0x00000008) /*!< */ +#define RTC_TSTR_PM ((uint32_t)0x00400000) +#define RTC_TSTR_HT ((uint32_t)0x00300000) +#define RTC_TSTR_HT_0 ((uint32_t)0x00100000) +#define RTC_TSTR_HT_1 ((uint32_t)0x00200000) +#define RTC_TSTR_HU ((uint32_t)0x000F0000) +#define RTC_TSTR_HU_0 ((uint32_t)0x00010000) +#define RTC_TSTR_HU_1 ((uint32_t)0x00020000) +#define RTC_TSTR_HU_2 ((uint32_t)0x00040000) +#define RTC_TSTR_HU_3 ((uint32_t)0x00080000) +#define RTC_TSTR_MNT ((uint32_t)0x00007000) +#define RTC_TSTR_MNT_0 ((uint32_t)0x00001000) +#define RTC_TSTR_MNT_1 ((uint32_t)0x00002000) +#define RTC_TSTR_MNT_2 ((uint32_t)0x00004000) +#define RTC_TSTR_MNU ((uint32_t)0x00000F00) +#define RTC_TSTR_MNU_0 ((uint32_t)0x00000100) +#define RTC_TSTR_MNU_1 ((uint32_t)0x00000200) +#define RTC_TSTR_MNU_2 ((uint32_t)0x00000400) +#define RTC_TSTR_MNU_3 ((uint32_t)0x00000800) +#define RTC_TSTR_ST ((uint32_t)0x00000070) +#define RTC_TSTR_ST_0 ((uint32_t)0x00000010) +#define RTC_TSTR_ST_1 ((uint32_t)0x00000020) +#define RTC_TSTR_ST_2 ((uint32_t)0x00000040) +#define RTC_TSTR_SU ((uint32_t)0x0000000F) +#define RTC_TSTR_SU_0 ((uint32_t)0x00000001) +#define RTC_TSTR_SU_1 ((uint32_t)0x00000002) +#define RTC_TSTR_SU_2 ((uint32_t)0x00000004) +#define RTC_TSTR_SU_3 ((uint32_t)0x00000008) /******************** Bits definition for RTC_TSDR register *****************/ -#define RTC_TSDR_WDU ((uint32_t)0x0000E000) /*!< */ -#define RTC_TSDR_WDU_0 ((uint32_t)0x00002000) /*!< */ -#define RTC_TSDR_WDU_1 ((uint32_t)0x00004000) /*!< */ -#define RTC_TSDR_WDU_2 ((uint32_t)0x00008000) /*!< */ -#define RTC_TSDR_MT ((uint32_t)0x00001000) /*!< */ -#define RTC_TSDR_MU ((uint32_t)0x00000F00) /*!< */ -#define RTC_TSDR_MU_0 ((uint32_t)0x00000100) /*!< */ -#define RTC_TSDR_MU_1 ((uint32_t)0x00000200) /*!< */ -#define RTC_TSDR_MU_2 ((uint32_t)0x00000400) /*!< */ -#define RTC_TSDR_MU_3 ((uint32_t)0x00000800) /*!< */ -#define RTC_TSDR_DT ((uint32_t)0x00000030) /*!< */ -#define RTC_TSDR_DT_0 ((uint32_t)0x00000010) /*!< */ -#define RTC_TSDR_DT_1 ((uint32_t)0x00000020) /*!< */ -#define RTC_TSDR_DU ((uint32_t)0x0000000F) /*!< */ -#define RTC_TSDR_DU_0 ((uint32_t)0x00000001) /*!< */ -#define RTC_TSDR_DU_1 ((uint32_t)0x00000002) /*!< */ -#define RTC_TSDR_DU_2 ((uint32_t)0x00000004) /*!< */ -#define RTC_TSDR_DU_3 ((uint32_t)0x00000008) /*!< */ +#define RTC_TSDR_WDU ((uint32_t)0x0000E000) +#define RTC_TSDR_WDU_0 ((uint32_t)0x00002000) +#define RTC_TSDR_WDU_1 ((uint32_t)0x00004000) +#define RTC_TSDR_WDU_2 ((uint32_t)0x00008000) +#define RTC_TSDR_MT ((uint32_t)0x00001000) +#define RTC_TSDR_MU ((uint32_t)0x00000F00) +#define RTC_TSDR_MU_0 ((uint32_t)0x00000100) +#define RTC_TSDR_MU_1 ((uint32_t)0x00000200) +#define RTC_TSDR_MU_2 ((uint32_t)0x00000400) +#define RTC_TSDR_MU_3 ((uint32_t)0x00000800) +#define RTC_TSDR_DT ((uint32_t)0x00000030) +#define RTC_TSDR_DT_0 ((uint32_t)0x00000010) +#define RTC_TSDR_DT_1 ((uint32_t)0x00000020) +#define RTC_TSDR_DU ((uint32_t)0x0000000F) +#define RTC_TSDR_DU_0 ((uint32_t)0x00000001) +#define RTC_TSDR_DU_1 ((uint32_t)0x00000002) +#define RTC_TSDR_DU_2 ((uint32_t)0x00000004) +#define RTC_TSDR_DU_3 ((uint32_t)0x00000008) /******************** Bits definition for RTC_TSSSR register ****************/ #define RTC_TSSSR_SS ((uint32_t)0x0003FFFF) /******************** Bits definition for RTC_CAL register *****************/ -#define RTC_CAL_CALP ((uint32_t)0x00008000) /*!< */ -#define RTC_CAL_CALW8 ((uint32_t)0x00004000) /*!< */ -#define RTC_CAL_CALW16 ((uint32_t)0x00002000) /*!< */ -#define RTC_CAL_CALM ((uint32_t)0x000001FF) /*!< */ -#define RTC_CAL_CALM_0 ((uint32_t)0x00000001) /*!< */ -#define RTC_CAL_CALM_1 ((uint32_t)0x00000002) /*!< */ -#define RTC_CAL_CALM_2 ((uint32_t)0x00000004) /*!< */ -#define RTC_CAL_CALM_3 ((uint32_t)0x00000008) /*!< */ -#define RTC_CAL_CALM_4 ((uint32_t)0x00000010) /*!< */ -#define RTC_CAL_CALM_5 ((uint32_t)0x00000020) /*!< */ -#define RTC_CAL_CALM_6 ((uint32_t)0x00000040) /*!< */ -#define RTC_CAL_CALM_7 ((uint32_t)0x00000080) /*!< */ -#define RTC_CAL_CALM_8 ((uint32_t)0x00000100) /*!< */ +#define RTC_CAL_CALP ((uint32_t)0x00008000) +#define RTC_CAL_CALW8 ((uint32_t)0x00004000) +#define RTC_CAL_CALW16 ((uint32_t)0x00002000) +#define RTC_CAL_CALM ((uint32_t)0x000001FF) +#define RTC_CAL_CALM_0 ((uint32_t)0x00000001) +#define RTC_CAL_CALM_1 ((uint32_t)0x00000002) +#define RTC_CAL_CALM_2 ((uint32_t)0x00000004) +#define RTC_CAL_CALM_3 ((uint32_t)0x00000008) +#define RTC_CAL_CALM_4 ((uint32_t)0x00000010) +#define RTC_CAL_CALM_5 ((uint32_t)0x00000020) +#define RTC_CAL_CALM_6 ((uint32_t)0x00000040) +#define RTC_CAL_CALM_7 ((uint32_t)0x00000080) +#define RTC_CAL_CALM_8 ((uint32_t)0x00000100) /******************** Bits definition for RTC_TAFCR register ****************/ -#define RTC_TAFCR_ALARMOUTTYPE ((uint32_t)0x00040000) /*!< */ -#define RTC_TAFCR_TAMPPUDIS ((uint32_t)0x00008000) /*!< */ -#define RTC_TAFCR_TAMPPRCH ((uint32_t)0x00006000) /*!< */ -#define RTC_TAFCR_TAMPPRCH_0 ((uint32_t)0x00002000) /*!< */ -#define RTC_TAFCR_TAMPPRCH_1 ((uint32_t)0x00004000) /*!< */ -#define RTC_TAFCR_TAMPFLT ((uint32_t)0x00001800) /*!< */ -#define RTC_TAFCR_TAMPFLT_0 ((uint32_t)0x00000800) /*!< */ -#define RTC_TAFCR_TAMPFLT_1 ((uint32_t)0x00001000) /*!< */ -#define RTC_TAFCR_TAMPFREQ ((uint32_t)0x00000700) /*!< */ -#define RTC_TAFCR_TAMPFREQ_0 ((uint32_t)0x00000100) /*!< */ -#define RTC_TAFCR_TAMPFREQ_1 ((uint32_t)0x00000200) /*!< */ -#define RTC_TAFCR_TAMPFREQ_2 ((uint32_t)0x00000400) /*!< */ -#define RTC_TAFCR_TAMPTS ((uint32_t)0x00000080) /*!< */ -#define RTC_TAFCR_TAMP3EDGE ((uint32_t)0x00000040) /*!< */ -#define RTC_TAFCR_TAMP3E ((uint32_t)0x00000020) /*!< */ -#define RTC_TAFCR_TAMP2EDGE ((uint32_t)0x00000010) /*!< */ -#define RTC_TAFCR_TAMP2E ((uint32_t)0x00000008) /*!< */ -#define RTC_TAFCR_TAMPIE ((uint32_t)0x00000004) /*!< */ -#define RTC_TAFCR_TAMP1TRG ((uint32_t)0x00000002) /*!< */ -#define RTC_TAFCR_TAMP1E ((uint32_t)0x00000001) /*!< */ +#define RTC_TAFCR_ALARMOUTTYPE ((uint32_t)0x00040000) +#define RTC_TAFCR_TAMPPUDIS ((uint32_t)0x00008000) +#define RTC_TAFCR_TAMPPRCH ((uint32_t)0x00006000) +#define RTC_TAFCR_TAMPPRCH_0 ((uint32_t)0x00002000) +#define RTC_TAFCR_TAMPPRCH_1 ((uint32_t)0x00004000) +#define RTC_TAFCR_TAMPFLT ((uint32_t)0x00001800) +#define RTC_TAFCR_TAMPFLT_0 ((uint32_t)0x00000800) +#define RTC_TAFCR_TAMPFLT_1 ((uint32_t)0x00001000) +#define RTC_TAFCR_TAMPFREQ ((uint32_t)0x00000700) +#define RTC_TAFCR_TAMPFREQ_0 ((uint32_t)0x00000100) +#define RTC_TAFCR_TAMPFREQ_1 ((uint32_t)0x00000200) +#define RTC_TAFCR_TAMPFREQ_2 ((uint32_t)0x00000400) +#define RTC_TAFCR_TAMPTS ((uint32_t)0x00000080) +#define RTC_TAFCR_TAMP2EDGE ((uint32_t)0x00000010) +#define RTC_TAFCR_TAMP2E ((uint32_t)0x00000008) +#define RTC_TAFCR_TAMPIE ((uint32_t)0x00000004) +#define RTC_TAFCR_TAMP1TRG ((uint32_t)0x00000002) +#define RTC_TAFCR_TAMP1E ((uint32_t)0x00000001) /******************** Bits definition for RTC_ALRMASSR register *************/ -#define RTC_ALRMASSR_MASKSS ((uint32_t)0x0F000000) /*!< */ -#define RTC_ALRMASSR_MASKSS_0 ((uint32_t)0x01000000) /*!< */ -#define RTC_ALRMASSR_MASKSS_1 ((uint32_t)0x02000000) /*!< */ -#define RTC_ALRMASSR_MASKSS_2 ((uint32_t)0x04000000) /*!< */ -#define RTC_ALRMASSR_MASKSS_3 ((uint32_t)0x08000000) /*!< */ -#define RTC_ALRMASSR_SS ((uint32_t)0x00007FFF) /*!< */ +#define RTC_ALRMASSR_MASKSS ((uint32_t)0x0F000000) +#define RTC_ALRMASSR_MASKSS_0 ((uint32_t)0x01000000) +#define RTC_ALRMASSR_MASKSS_1 ((uint32_t)0x02000000) +#define RTC_ALRMASSR_MASKSS_2 ((uint32_t)0x04000000) +#define RTC_ALRMASSR_MASKSS_3 ((uint32_t)0x08000000) +#define RTC_ALRMASSR_SS ((uint32_t)0x00007FFF) /******************** Bits definition for RTC_BKP0R register ****************/ -#define RTC_BKP0R ((uint32_t)0xFFFFFFFF) /*!< */ +#define RTC_BKP0R ((uint32_t)0xFFFFFFFF) /******************** Bits definition for RTC_BKP1R register ****************/ -#define RTC_BKP1R ((uint32_t)0xFFFFFFFF) /*!< */ +#define RTC_BKP1R ((uint32_t)0xFFFFFFFF) /******************** Bits definition for RTC_BKP2R register ****************/ -#define RTC_BKP2R ((uint32_t)0xFFFFFFFF) /*!< */ +#define RTC_BKP2R ((uint32_t)0xFFFFFFFF) /******************** Bits definition for RTC_BKP3R register ****************/ -#define RTC_BKP3R ((uint32_t)0xFFFFFFFF) /*!< */ +#define RTC_BKP3R ((uint32_t)0xFFFFFFFF) /******************** Bits definition for RTC_BKP4R register ****************/ -#define RTC_BKP4R ((uint32_t)0xFFFFFFFF) /*!< */ +#define RTC_BKP4R ((uint32_t)0xFFFFFFFF) /******************************************************************************/ /* */ diff --git a/lib/inc/system_stm32f0xx.h b/Libraries/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h old mode 100755 new mode 100644 similarity index 93% rename from lib/inc/system_stm32f0xx.h rename to Libraries/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h index 1bd5a4d..adf0b57 --- a/lib/inc/system_stm32f0xx.h +++ b/Libraries/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file system_stm32f0xx.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Header File. ****************************************************************************** * @attention diff --git a/Libraries/CMSIS/Device/ST/STM32F0xx/Release_Notes.html b/Libraries/CMSIS/Device/ST/STM32F0xx/Release_Notes.html new file mode 100644 index 0000000..9fab448 --- /dev/null +++ b/Libraries/CMSIS/Device/ST/STM32F0xx/Release_Notes.html @@ -0,0 +1,146 @@ + + + + + + + + + + +Release Notes for STM32F0xx CMSIS + + + + + +
    +


    +

    +
    + + + + + + +
    + + + + + + + + + +
    Back to Release page
    +

    Release +Notes for STM32F0xx CMSIS

    +

    Copyright 2012 STMicroelectronics

    +

    +
    +

     

    + + + + + + +
    +

    Contents

    +
      +
    1. STM32F0xx CMSIS +update History
      2. +
    2. License
      3. +
    + +

    STM32F0xx CMSIS +update History

    V1.0.1 / 20-April-2012

    Main +Changes

    +
    • stm32f0xx.h
      • Add reference to STM32F050xx (Flash memory up to 32 Kbytes) and STM32F051xx (Flash memory up to 64 Kbytes) devices
      • RTC register bits definition: remove reference to Tamper3

    V1.0.0 / 23-March-2012

    Main +Changes

    +
    • First official release for STM32F0xx devices
    • All source files: license disclaimer text update and add link to the License file on ST Internet
    • stm32f0xx.h
      • change MCO bits value:
        • change RCC_CFGR_MCO_HSI14 value from 0x03000000 to 0x01000000
        • Add RCC_CFGR_MCO_LSI having value 0x02000000
        • Add RCC_CFGR_MCO_LSE having value 0x03000000
      • Add new bit RCC_CSR_V18PWRRSTF having value 0x00800000
      • TIM_OR bits definition values corrected
      • Rename ADC_ISR_EOS to ADC_ISR_EOSEQ
      • Rename ADC_IER_EOSIE to ADC_IER_EOSEQIE
      • Rename ADC_CFGR1_AUTDLY to ADC_CFGR1_WAIT
      • Rename option bit FLASH_OBR_BOOT1 to FLASH_OBR_nBOOT1
      • Rename FLASH_OBR_VDDA_ANALOG to FLASH_OBR_VDDA_MONITOR
      • Add Flash and OB keys (removed from Flash driver)
    • system_stm32f0xx.c
      • SetSysClock() function: code optimized 
      • Miscellaneous formatting
    +

    V1.0.0RC1 / 27-January-2012

    +

    Main +Changes

    + +
      +
    • Official version (V1.0.0) Release Candidate 1
      • +
    • All source +files: update disclaimer to add reference to the new license agreement
      • +
    • Update all peripherals bits definitions
      +
      • +
    + +
      +
    +

    License

    Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this package except in compliance with the License. You may obtain a copy of the License at:


    Unless +required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS,
    WITHOUT +WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See +the License for the specific language governing permissions and +limitations under the License.     + +
    +
    +

    For + complete documentation on STM32 + Microcontrollers visit www.st.com/STM32

    +
    +

    +
    +
    +

     

    +
    + \ No newline at end of file diff --git a/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/TrueSTUDIO/startup_stm32f0xx.s b/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/TrueSTUDIO/startup_stm32f0xx.s new file mode 100644 index 0000000..f6913ef --- /dev/null +++ b/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/TrueSTUDIO/startup_stm32f0xx.s @@ -0,0 +1,305 @@ +/** + ****************************************************************************** + * @file startup_stm32f0xx.s + * @author MCD Application Team + * @version V1.0.1 + * @date 20-April-2012 + * @brief STM32F0xx Devices vector table for Atollic toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M0 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

    © COPYRIGHT 2012 STMicroelectronics

    + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m0 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF108F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + mov sp, r0 /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2] + adds r2, r2, #4 + + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M0. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word 0 + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_IRQHandler + .word RTC_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_1_IRQHandler + .word EXTI2_3_IRQHandler + .word EXTI4_15_IRQHandler + .word TS_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_3_IRQHandler + .word DMA1_Channel4_5_IRQHandler + .word ADC1_COMP_IRQHandler + .word TIM1_BRK_UP_TRG_COM_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word TIM6_DAC_IRQHandler + .word 0 + .word TIM14_IRQHandler + .word TIM15_IRQHandler + .word TIM16_IRQHandler + .word TIM17_IRQHandler + .word I2C1_IRQHandler + .word I2C2_IRQHandler + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word 0 + .word CEC_IRQHandler + .word 0 + .word BootRAM /* @0x108. This is for boot in RAM mode for + STM32F0xx devices. */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak RTC_IRQHandler + .thumb_set RTC_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_1_IRQHandler + .thumb_set EXTI0_1_IRQHandler,Default_Handler + + .weak EXTI2_3_IRQHandler + .thumb_set EXTI2_3_IRQHandler,Default_Handler + + .weak EXTI4_15_IRQHandler + .thumb_set EXTI4_15_IRQHandler,Default_Handler + + .weak TS_IRQHandler + .thumb_set TS_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_3_IRQHandler + .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_5_IRQHandler + .thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler + + .weak ADC1_COMP_IRQHandler + .thumb_set ADC1_COMP_IRQHandler,Default_Handler + + .weak TIM1_BRK_UP_TRG_COM_IRQHandler + .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM14_IRQHandler + .thumb_set TIM14_IRQHandler,Default_Handler + + .weak TIM15_IRQHandler + .thumb_set TIM15_IRQHandler,Default_Handler + + .weak TIM16_IRQHandler + .thumb_set TIM16_IRQHandler,Default_Handler + + .weak TIM17_IRQHandler + .thumb_set TIM17_IRQHandler,Default_Handler + + .weak I2C1_IRQHandler + .thumb_set I2C1_IRQHandler,Default_Handler + + .weak I2C2_IRQHandler + .thumb_set I2C2_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak CEC_IRQHandler + .thumb_set CEC_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/arm/startup_stm32f0xx.s b/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/arm/startup_stm32f0xx.s new file mode 100644 index 0000000..b0f8c22 --- /dev/null +++ b/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/arm/startup_stm32f0xx.s @@ -0,0 +1,256 @@ +;******************** (C) COPYRIGHT 2012 STMicroelectronics ******************** +;* File Name : startup_stm32f0xx.s +;* Author : MCD Application Team +;* Version : V1.0.1 +;* Date : 20-April-2012 +;* Description : STM32F0xx Devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM0 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +; @attention +; +; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); +; You may not use this file except in compliance with the License. +; You may obtain a copy of the License at: +; +; http://www.st.com/software_license_agreement_liberty_v2 +; +; Unless required by applicable law or agreed to in writing, software +; distributed under the License is distributed on an "AS IS" BASIS, +; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +; See the License for the specific language governing permissions and +; limitations under the License. +; +;******************************************************************************* +; +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000200 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window Watchdog + DCD PVD_IRQHandler ; PVD through EXTI Line detect + DCD RTC_IRQHandler ; RTC through EXTI Line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 + DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 + DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 + DCD TS_IRQHandler ; TS + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 + DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5 + DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2 + DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC + DCD 0 ; Reserved + DCD TIM14_IRQHandler ; TIM14 + DCD TIM15_IRQHandler ; TIM15 + DCD TIM16_IRQHandler ; TIM16 + DCD TIM17_IRQHandler ; TIM17 + DCD I2C1_IRQHandler ; I2C1 + DCD I2C2_IRQHandler ; I2C2 + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD 0 ; Reserved + DCD CEC_IRQHandler ; CEC + DCD 0 ; Reserved + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler routine +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + IMPORT SystemInit + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_1_IRQHandler [WEAK] + EXPORT EXTI2_3_IRQHandler [WEAK] + EXPORT EXTI4_15_IRQHandler [WEAK] + EXPORT TS_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_5_IRQHandler [WEAK] + EXPORT ADC1_COMP_IRQHandler [WEAK] + EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM14_IRQHandler [WEAK] + EXPORT TIM15_IRQHandler [WEAK] + EXPORT TIM16_IRQHandler [WEAK] + EXPORT TIM17_IRQHandler [WEAK] + EXPORT I2C1_IRQHandler [WEAK] + EXPORT I2C2_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT CEC_IRQHandler [WEAK] + + +WWDG_IRQHandler +PVD_IRQHandler +RTC_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_1_IRQHandler +EXTI2_3_IRQHandler +EXTI4_15_IRQHandler +TS_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_3_IRQHandler +DMA1_Channel4_5_IRQHandler +ADC1_COMP_IRQHandler +TIM1_BRK_UP_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM6_DAC_IRQHandler +TIM14_IRQHandler +TIM15_IRQHandler +TIM16_IRQHandler +TIM17_IRQHandler +I2C1_IRQHandler +I2C2_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +CEC_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc_ride7/startup_stm32f0xx.s b/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc_ride7/startup_stm32f0xx.s new file mode 100644 index 0000000..6427d4d --- /dev/null +++ b/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc_ride7/startup_stm32f0xx.s @@ -0,0 +1,292 @@ +/** + ****************************************************************************** + * @file startup_stm32f0xx.s + * @author MCD Application Team + * @version V1.0.1 + * @date 20-April-2012 + * @brief STM32F0xx Devices vector table for RIDE7 toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M0 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

    © COPYRIGHT 2012 STMicroelectronics

    + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m0 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF108F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/******************************************************************************* +* +* The minimal vector table for a Cortex M0. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word 0 + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_IRQHandler + .word RTC_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_1_IRQHandler + .word EXTI2_3_IRQHandler + .word EXTI4_15_IRQHandler + .word TS_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_3_IRQHandler + .word DMA1_Channel4_5_IRQHandler + .word ADC1_COMP_IRQHandler + .word TIM1_BRK_UP_TRG_COM_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word TIM6_DAC_IRQHandler + .word 0 + .word TIM14_IRQHandler + .word TIM15_IRQHandler + .word TIM16_IRQHandler + .word TIM17_IRQHandler + .word I2C1_IRQHandler + .word I2C2_IRQHandler + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word 0 + .word CEC_IRQHandler + .word 0 + .word BootRAM /* @0x108. This is for boot in RAM mode for + STM32F0xx devices. */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak RTC_IRQHandler + .thumb_set RTC_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_1_IRQHandler + .thumb_set EXTI0_1_IRQHandler,Default_Handler + + .weak EXTI2_3_IRQHandler + .thumb_set EXTI2_3_IRQHandler,Default_Handler + + .weak EXTI4_15_IRQHandler + .thumb_set EXTI4_15_IRQHandler,Default_Handler + + .weak TS_IRQHandler + .thumb_set TS_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_3_IRQHandler + .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_5_IRQHandler + .thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler + + .weak ADC1_COMP_IRQHandler + .thumb_set ADC1_COMP_IRQHandler,Default_Handler + + .weak TIM1_BRK_UP_TRG_COM_IRQHandler + .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM14_IRQHandler + .thumb_set TIM14_IRQHandler,Default_Handler + + .weak TIM15_IRQHandler + .thumb_set TIM15_IRQHandler,Default_Handler + + .weak TIM16_IRQHandler + .thumb_set TIM16_IRQHandler,Default_Handler + + .weak TIM17_IRQHandler + .thumb_set TIM17_IRQHandler,Default_Handler + + .weak I2C1_IRQHandler + .thumb_set I2C1_IRQHandler,Default_Handler + + .weak I2C2_IRQHandler + .thumb_set I2C2_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak CEC_IRQHandler + .thumb_set CEC_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/startup_stm32f0xx.s b/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/startup_stm32f0xx.s new file mode 100644 index 0000000..010d8c5 --- /dev/null +++ b/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/startup_stm32f0xx.s @@ -0,0 +1,330 @@ +;******************** (C) COPYRIGHT 2012 STMicroelectronics ******************** +;* File Name : startup_stm32f0xx.s +;* Author : MCD Application Team +;* Version : V1.0.1 +;* Date : 20-April-2012 +;* Description : STM32F0xx Devices vector table for EWARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == iar_program_start, +;* - Set the vector table entries with the exceptions ISR +;* address. +;* After Reset the Cortex-M0 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;******************************************************************************* +; @attention +; +; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); +; You may not use this file except in compliance with the License. +; You may obtain a copy of the License at: +; +; http://www.st.com/software_license_agreement_liberty_v2 +; +; Unless required by applicable law or agreed to in writing, software +; distributed under the License is distributed on an "AS IS" BASIS, +; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +; See the License for the specific language governing permissions and +; limitations under the License. +; +;******************************************************************************* +; +; +; The modules in this file are included in the libraries, and may be replaced +; by any user-defined modules that define the PUBLIC symbol _program_start or +; a user defined start symbol. +; To override the cstartup defined in the library, simply add your modified +; version to the workbench project. +; +; The vector table is normally located at address 0. +; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. +; The name "__vector_table" has special meaning for C-SPY: +; it is where the SP start value is found, and the NVIC vector +; table register (VTOR) is initialized to this address if != 0. +; +; Cortex-M version +; + + MODULE ?cstartup + + ;; Forward declaration of sections. + SECTION CSTACK:DATA:NOROOT(3) + + SECTION .intvec:CODE:NOROOT(2) + + EXTERN __iar_program_start + EXTERN SystemInit + PUBLIC __vector_table + + DATA +__vector_table + DCD sfe(CSTACK) + DCD Reset_Handler ; Reset Handler + + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window Watchdog + DCD PVD_IRQHandler ; PVD through EXTI Line detect + DCD RTC_IRQHandler ; RTC through EXTI Line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 + DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 + DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 + DCD TS_IRQHandler ; TS + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 + DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5 + DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2 + DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC + DCD 0 ; Reserved + DCD TIM14_IRQHandler ; TIM14 + DCD TIM15_IRQHandler ; TIM15 + DCD TIM16_IRQHandler ; TIM16 + DCD TIM17_IRQHandler ; TIM17 + DCD I2C1_IRQHandler ; I2C1 + DCD I2C2_IRQHandler ; I2C2 + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD 0 ; Reserved + DCD CEC_IRQHandler ; CEC + DCD 0 ; Reserved + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;; +;; Default interrupt handlers. +;; + THUMB + + PUBWEAK Reset_Handler + SECTION .text:CODE:REORDER(2) +Reset_Handler + LDR R0, =SystemInit + BLX R0 + LDR R0, =__iar_program_start + BX R0 + + PUBWEAK NMI_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +NMI_Handler + B NMI_Handler + + + PUBWEAK HardFault_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +HardFault_Handler + B HardFault_Handler + + + PUBWEAK SVC_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +SVC_Handler + B SVC_Handler + + + PUBWEAK PendSV_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +PendSV_Handler + B PendSV_Handler + + + PUBWEAK SysTick_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +SysTick_Handler + B SysTick_Handler + + + PUBWEAK WWDG_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +WWDG_IRQHandler + B WWDG_IRQHandler + + + PUBWEAK PVD_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +PVD_IRQHandler + B PVD_IRQHandler + + + PUBWEAK RTC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +RTC_IRQHandler + B RTC_IRQHandler + + + PUBWEAK FLASH_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +FLASH_IRQHandler + B FLASH_IRQHandler + + + PUBWEAK RCC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +RCC_IRQHandler + B RCC_IRQHandler + + + PUBWEAK EXTI0_1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +EXTI0_1_IRQHandler + B EXTI0_1_IRQHandler + + + PUBWEAK EXTI2_3_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +EXTI2_3_IRQHandler + B EXTI2_3_IRQHandler + + + PUBWEAK EXTI4_15_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +EXTI4_15_IRQHandler + B EXTI4_15_IRQHandler + + + PUBWEAK TS_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TS_IRQHandler + B TS_IRQHandler + + + PUBWEAK DMA1_Channel1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +DMA1_Channel1_IRQHandler + B DMA1_Channel1_IRQHandler + + + PUBWEAK DMA1_Channel2_3_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +DMA1_Channel2_3_IRQHandler + B DMA1_Channel2_3_IRQHandler + + + PUBWEAK DMA1_Channel4_5_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +DMA1_Channel4_5_IRQHandler + B DMA1_Channel4_5_IRQHandler + + + PUBWEAK ADC1_COMP_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +ADC1_COMP_IRQHandler + B ADC1_COMP_IRQHandler + + + PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TIM1_BRK_UP_TRG_COM_IRQHandler + B TIM1_BRK_UP_TRG_COM_IRQHandler + + + PUBWEAK TIM1_CC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TIM1_CC_IRQHandler + B TIM1_CC_IRQHandler + + + PUBWEAK TIM2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TIM2_IRQHandler + B TIM2_IRQHandler + + + PUBWEAK TIM3_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TIM3_IRQHandler + B TIM3_IRQHandler + + + PUBWEAK TIM6_DAC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TIM6_DAC_IRQHandler + B TIM6_DAC_IRQHandler + + + PUBWEAK TIM14_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TIM14_IRQHandler + B TIM14_IRQHandler + + + PUBWEAK TIM15_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TIM15_IRQHandler + B TIM15_IRQHandler + + + PUBWEAK TIM16_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TIM16_IRQHandler + B TIM16_IRQHandler + + + PUBWEAK TIM17_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TIM17_IRQHandler + B TIM17_IRQHandler + + + PUBWEAK I2C1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +I2C1_IRQHandler + B I2C1_IRQHandler + + + PUBWEAK I2C2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +I2C2_IRQHandler + B I2C2_IRQHandler + + + PUBWEAK SPI1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI1_IRQHandler + B SPI1_IRQHandler + + + PUBWEAK SPI2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI2_IRQHandler + B SPI2_IRQHandler + + + PUBWEAK USART1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +USART1_IRQHandler + B USART1_IRQHandler + + + PUBWEAK USART2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +USART2_IRQHandler + B USART2_IRQHandler + + + PUBWEAK CEC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +CEC_IRQHandler + B CEC_IRQHandler + + END +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c b/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c new file mode 100644 index 0000000..05cd6a1 --- /dev/null +++ b/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c @@ -0,0 +1,353 @@ +/** + ****************************************************************************** + * @file system_stm32f0xx.c + * @author MCD Application Team + * @version V1.0.1 + * @date 20-April-2012 + * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File. + * This file contains the system clock configuration for STM32F0xx devices, + * and is generated by the clock configuration tool + * STM32F0xx_Clock_Configuration_V1.0.0.xls + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * and Divider factors, AHB/APBx prescalers and Flash settings), + * depending on the configuration made in the clock xls tool. + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f0xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz Range) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f0xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" define + * in "stm32f0xx.h" file. When HSE is used as system clock source, directly or + * through PLL, and you are using different crystal you have to adapt the HSE + * value to your own configuration. + * + * 5. This file configures the system clock as follows: + *============================================================================= + * System Clock Configuration + *============================================================================= + * System Clock source | PLL(HSE) + *----------------------------------------------------------------------------- + * SYSCLK | 48000000 Hz + *----------------------------------------------------------------------------- + * HCLK | 48000000 Hz + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * HSE Frequency | 8000000 Hz + *----------------------------------------------------------------------------- + * PLL MUL | 6 + *----------------------------------------------------------------------------- + * VDD | 3.3 V + *----------------------------------------------------------------------------- + * Flash Latency | 1 WS + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + *

    © COPYRIGHT 2012 STMicroelectronics

    + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f0xx_system + * @{ + */ + +/** @addtogroup STM32F0xx_System_Private_Includes + * @{ + */ + +#include "stm32f0xx.h" + +/** + * @} + */ + +/** @addtogroup STM32F0xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F0xx_System_Private_Defines + * @{ + */ +/** + * @} + */ + +/** @addtogroup STM32F0xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F0xx_System_Private_Variables + * @{ + */ +uint32_t SystemCoreClock = 48000000; +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32F0xx_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); + +/** + * @} + */ + +/** @addtogroup STM32F0xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */ + RCC->CFGR &= (uint32_t)0xF8FFB80C; + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */ + RCC->CFGR &= (uint32_t)0xFFC0FFFF; + + /* Reset PREDIV1[3:0] bits */ + RCC->CFGR2 &= (uint32_t)0xFFFFFFF0; + + /* Reset USARTSW[1:0], I2CSW, CECSW and ADCSW bits */ + RCC->CFGR3 &= (uint32_t)0xFFFFFEAC; + + /* Reset HSI14 bit */ + RCC->CR2 &= (uint32_t)0xFFFFFFFE; + + /* Disable all interrupts */ + RCC->CIR = 0x00000000; + + /* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */ + SetSysClock(); +} + +/** + * @brief Update SystemCoreClock according to Clock Register Values + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f0xx.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f0xx.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0, prediv1factor = 0; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + } + break; + default: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + } + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock frequency, AHB/APBx prescalers and Flash + * settings. + * @note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ +static void SetSysClock(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK configuration ----------------------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer and set Flash Latency */ + FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1; + + /* PLL configuration = HSE * 6 = 48 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL6); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Libraries/CMSIS/Documentation/CMSIS-SVD_Schema_1_0.xsd b/Libraries/CMSIS/Documentation/CMSIS-SVD_Schema_1_0.xsd new file mode 100644 index 0000000..17ace6a --- /dev/null +++ b/Libraries/CMSIS/Documentation/CMSIS-SVD_Schema_1_0.xsd @@ -0,0 +1,274 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Libraries/CMSIS/Documentation/CMSIS_CM4_SIMD.htm b/Libraries/CMSIS/Documentation/CMSIS_CM4_SIMD.htm new file mode 100644 index 0000000..7275e0e --- /dev/null +++ b/Libraries/CMSIS/Documentation/CMSIS_CM4_SIMD.htm @@ -0,0 +1,3809 @@ + + + + CMSIS: Cortex-M4 SIMD Instructions + + + + + + +

    CMSIS Support for Cortex-M4 SIMD Instructions

    + +

    This file describes the Cortex-M4 SIMD instructions supported by CMSIS.

    +

    Version: 1.00 - 25. November 2010

    + +

    Information in this file, the accompany manuals, and software is
    + Copyright © ARM Ltd.
    All rights reserved. +

    + +
    + +

    Revision History

    +
      +
    • Revision 0.01 - January 2010: Initial version
      • +
    • Revision 0.02 - June 2010: added __QADD, __QSUB
      • +
    • Revision 1.00 - November 2010:
      • +
    + +
    + +

    Contents

    + +
      +
    1. About
      2. +
    2. Cortex-M4 SIMD instruction support
      3. +
    3. Examples
      4. +
    + + + +

     

    +

    About

    +

    + CMSIS provides for the Cortex-M4 a set of functions supporting Cortex-M4 SIMD instructions. +

    + +

     

    +

    Cortex-M4 SIMD instruction support

    +

    CMSIS supports the following functions for Cortex-M4 instructions: +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    NameMnemonicDescription
    __SADD8SADD8GE setting quad 8-bit signed addition
    __QADD8QADD8Q setting quad 8-bit saturating addition
    __SHADD8SHADD8Quad 8-bit signed addition with halved results
    __UADD8UADD8GE setting quad 8-bit unsigned addition
    __UQADD8UQADD8Quad 8-bit unsigned saturating addition
    __UHADD8UHADD8Quad 8-bit unsigned addition with halved results
    __SSUB8SSUB8GE setting quad 8-bit signed subtraction
    __QSUB8QSUB8Q setting quad 8-bit saturating subtract
    __SHSUB8SHSUB8Quad 8-bit signed subtraction with halved results
    __USUB8USUB8GE setting quad 8-bit unsigned subtract
    __UQSUB8UQSUB8Quad 8-bit unsigned saturating subtraction
    __UHSUB8UHSUB8Quad 8-bit unsigned subtraction with halved results
    __SADD16SADD16GE setting dual 16-bit signed addition
    __QADD16QADD16Q setting dual 16-bit saturating addition
    __SHADD16SHADD16Dual 16-bit signed addition with halved results
    __UADD16UADD16GE setting dual 16-bit unsigned addition
    __UQADD16UQADD16Dual 16-bit unsigned saturating addition
    __UHADD16UHADD16Dual 16-bit unsigned addition with halved results
    __SSUB16SSUB16GE setting dual 16-bit signed subtraction
    __QSUB16QSUB16Q setting dual 16-bit saturating subtract
    __SHSUB16SHSUB16Dual 16-bit signed subtraction with halved results
    __USUB16USUB16GE setting dual 16-bit unsigned subtract
    __UQSUB16UQSUB16Dual 16-bit unsigned saturating subtraction
    __UHSUB16UHSUB16Dual 16-bit unsigned subtraction with halved results
    __SASXSASXGE setting dual 16-bit addition and subtraction with exchange
    __QASXQASXQ setting dual 16-bit add and subtract with exchange
    __SHASXSHASXDual 16-bit signed addition and subtraction with halved results
    __UASXUASXGE setting dual 16-bit unsigned addition and subtraction with exchange
    __UQASXUQASXDual 16-bit unsigned saturating addition and subtraction with exchange
    __UHASXUHASXDual 16-bit unsigned addition and subtraction with halved results and exchange
    __SSAXSSAXGE setting dual 16-bit signed subtraction and addition with exchange
    __QSAXQSAXQ setting dual 16-bit subtract and add with exchange
    __SHSAXSHSAXDual 16-bit signed subtraction and addition with halved results
    __USAXUSAXGE setting dual 16-bit unsigned subtract and add with exchange
    __UQSAXUQSAXDual 16-bit unsigned saturating subtraction and addition with exchange
    __UHSAXUHSAXDual 16-bit unsigned subtraction and addition with halved results and exchange
    __USAD8USAD8Unsigned sum of quad 8-bit unsigned absolute difference
    __USADA8USADA8Unsigned sum of quad 8-bit unsigned absolute difference with 32-bit accumulate
    __SSAT16SSAT16Q setting dual 16-bit saturate
    __USAT16USAT16Q setting dual 16-bit unsigned saturate
    __UXTB16UXTB16Dual extract 8-bits and zero-extend to 16-bits
    __UXTAB16UXTAB16Extracted 16-bit to 32-bit unsigned addition
    __SXTB16SXTB16Dual extract 8-bits and sign extend each to 16-bits
    __SXTAB16SXTAB16Dual extracted 8-bit to 16-bit signed addition
    __SMUADSMUADQ setting sum of dual 16-bit signed multiply
    __SMUADXSMUADXQ setting sum of dual 16-bit signed multiply with exchange
    __SMLADSMLADQ setting dual 16-bit signed multiply with single 32-bit accumulator
    __SMLADXSMLADXQ setting pre-exchanged dual 16-bit signed multiply with single 32-bit accumulator
    __SMLALDSMLALDDual 16-bit signed multiply with single 64-bit accumulator
    __SMLALDXSMLALDXDual 16-bit signed multiply with exchange with single 64-bit accumulator
    __SMUSDSMUSDDual 16-bit signed multiply returning difference
    __SMUSDXSMUSDXDual 16-bit signed multiply with exchange returning difference
    __SMLSDSMLSDQ setting dual 16-bit signed multiply subtract with 32-bit accumulate
    __SMLSDXSMLSDXQ setting dual 16-bit signed multiply with exchange subtract with 32-bit accumulate
    __SMLSLDSMLSLDQ setting dual 16-bit signed multiply subtract with 64-bit accumulate
    __SMLSLDXSMLSLDXQ setting dual 16-bit signed multiply with exchange subtract with 64-bit accumulate
    __SELSELSelect bytes based on GE bits
    __QADDQADDQ setting saturating add
    __QSUBQSUB/td> + Q setting saturating subtract
    + + + + +

    Function __SADD8

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SADD8(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform four 8-bit signed integer additions.
    + The GE bits in the APSR are set according to the results of the additions. +
    Parameter +
      +
    • val1: first four 8-bit summands.
      • +
    • val2: second four 8-bit summands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the addition of the first bytes from each operand, in the first byte of the return value.
      • +
    • the addition of the second bytes of each operand, in the second byte of the return value.
      • +
    • the addition of the third bytes of each operand, in the third byte of the return value.
      • +
    • the addition of the fourth bytes of each operand, in the fourth byte of the return value.
      • +
    +

    Each bit in APSR.GE is set or cleared for each byte in the return value, depending on + the results of the operation.
    + If res is the return value, then: +

    +
      +
    • if res[7:0] ≥ 0 then APSR.GE[0] = 1 else 0
      • +
    • if res[15:8] ≥ 0 then APSR.GE[1] = 1 else 0
      • +
    • if res[23:16] ≥ 0 then APSR.GE[2] = 1 else 0
      • +
    • if res[31:24] ≥ 0 then APSR.GE[3] = 1 else 0
      • +
    +
    Operation + 
    +res[7:0]   = val1[7:0]   + val2[7:0]
+res[15:8]  = val1[15:8]  + val2[15:8]
+res[23:16] = val1[23:16] + val2[23:16]
+res[31:24] = val1[31:24] + val2[31:24]
    +
    + +

    Function __QADD8

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __QADD8(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform four 8-bit integer additions, saturating the results to + the 8-bit signed integer range -27 ≤ x ≤ 27 - 1. +
    Parameter +
      +
    • val1: first four 8-bit summands.
      • +
    • val2: second four 8-bit summands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the saturated addition of the first byte of each operand in the first byte of the return value.
      • +
    • the saturated addition of the second byte of each operand in the second byte of the return value.
      • +
    • the saturated addition of the third byte of each operand in the third byte of the return value.
      • +
    • the saturated addition of the fourth byte of each operand in the fourth byte of the return value.
      • +
    +

    The returned results are saturated to the 16-bit signed integer range -27 ≤ x ≤ 27 - 1. +

    +
    Operation + 
    +res[7:0]   = val1[7:0]   + val2[7:0]
+res[15:8]  = val1[15:8]  + val2[15:8]
+res[23:16] = val1[23:16] + val2[23:16]
+res[31:24] = val1[31:24] + val2[31:24]
    +
    + +

    Function __SHADD8

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SHADD8(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform four signed 8-bit integer additions, halving the results. +
    Parameter +
      +
    • val1: first four 8-bit summands.
      • +
    • val2: second four 8-bit summands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the halved addition of the first bytes from each operand, in the first byte of the return value.
      • +
    • the halved addition of the second bytes from each operand, in the second byte of the return value.
      • +
    • the halved addition fo the third bytes from each operand, in the third byte of the return value.
      • +
    • the halved addition of the fourth bytes from each operand, in the fourth byte of the return value.
      • +
    +
    Operation + 
    +res[7:0]   = (val1[7:0]   + val2[7:0])   >> 1
+res[15:8]  = (val1[15:8]  + val2[15:8])  >> 1
+res[23:16] = (val1[23:16] + val2[23:16]) >> 1
+res[31:24] = (val1[31:24] + val2[31:24]) >> 1
    +
    + +

    Function __UADD8

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UADD8(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform four unsigned 8-bit integer additions.
    + The GE bits in the APSR are set according to the results. +
    Parameter +
      +
    • val1: first four 8-bit summands for each addition.
      • +
    • val2: second four 8-bit summands for each addition.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the addition of the first bytes in each operand, in the first byte of the return value.
      • +
    • the addition of the second bytes in each operand, in the second byte of the return value.
      • +
    • the addition of the third bytes in each operand, in the third byte of the return value.
      • +
    • the addition of the fourth bytes in each operand, in the fourth byte of the return value.
      • +
    +

    Each bit in APSR.GE is set or cleared for each byte in the return value, depending on + the results of the operation.
    + If res is the return value, then: +

    +
      +
    • if res[7:0] ≥ 0x100 then APSR.GE[0] = 1 else 0
      • +
    • if res[15:8] ≥ 0x100 then APSR.GE[1] = 1 else 0
      • +
    • if res[23:16] ≥ 0x100 then APSR.GE[2] = 1 else 0
      • +
    • if res[31:24] ≥ 0x100 then APSR.GE[3] = 1 else 0
      • +
    +
    Operation + 
    +res[7:0]   = val1[7:0]   + val2[7:0]
+res[15:8]  = val1[15:8]  + val2[15:8]
+res[23:16] = val1[23:16] + val2[23:16]
+res[31:24] = val1[31:24] + val2[31:24]
    +
    + +

    Function __UQADD8

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UQADD8(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform four unsigned 8-bit integer additions, saturating the + results to the 8-bit unsigned integer range 0 ≤ x ≤ 28 - 1. +
    Parameter +
      +
    • val1: first four 8-bit summands.
      • +
    • val2: second four 8-bit summands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the addition of the first bytes in each operand, in the first byte of the return value.
      • +
    • the addition of the second bytes in each operand, in the second byte of the return value.
      • +
    • the addition of the third bytes in each operand, in the third byte of the return value.
      • +
    • the addition of the fourth bytes in each operand, in the fourth byte of the return value.
      • +
    +

    The results are saturated to the 8-bit unsigned integer range 0 ≤ x ≤ 28 - 1. +

    +
    Operation + 
    +res[7:0]   = val1[7:0]   + val2[7:0]
+res[15:8]  = val1[15:8]  + val2[15:8]
+res[23:16] = val1[23:16] + val2[23:16]
+res[31:24] = val1[31:24] + val2[31:24]
    +
    + +

    Function __UHADD8

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UHADD8(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform four unsigned 8-bit integer additions, halving the results. +
    Parameter +
      +
    • val1: first four 8-bit summands.
      • +
    • val2: second four 8-bit summands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the halved addition of the first bytes in each operand, in the first byte of the return value.
      • +
    • the halved addition of the second bytes in each operand, in the second byte of the return value.
      • +
    • the halved addition of the third bytes in each operand, in the third byte of the return value.
      • +
    • the halved addition of the fourth bytes in each operand, in the fourth byte of the return value.
      • +
    +
    Operation + 
    +res[7:0]   = (val1[7:0]   + val2[7:0])   >> 1
+res[15:8]  = (val1[15:8]  + val2[15:8])  >> 1
+res[23:16] = (val1[23:16] + val2[23:16]) >> 1
+res[31:24] = (val1[31:24] + val2[31:24]) >> 1
    +
    + +

    Function __SSUB8

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SSUB8(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform four 8-bit signed integer subtractions.
    + The GE bits in the APSR are set according to the results. +
    Parameter +
      +
    • val1: first four 8-bit operands of each subtraction.
      • +
    • val2: second four 8-bit operands of each subtraction.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the subtraction of the first byte in the second operand from the first byte in the + first operand, in the first bytes of the return value.
      • +
    • the subtraction of the second byte in the second operand from the second byte in + the first operand, in the second byte of the return value.
      • +
    • the subtraction of the third byte in the second operand from the third byte in the + first operand, in the third byte of the return value.
      • +
    • the subtraction of the fourth byte in the second operand from the fourth byte in + the first operand, in the fourth byte of the return value.
      • +
    +

    Each bit in APSR.GE is set or cleared for each byte in the return value, depending on + the results of the operation. If res is the return value, then: +

    +
      +
    • if res[8:0] ≥ 0 then APSR.GE[0] = 1 else 0
      • +
    • if res[15:8] ≥ 0 then APSR.GE[1] = 1 else 0
      • +
    • if res[23:16] ≥ 0 then APSR.GE[2] = 1 else 0
      • +
    • if res[31:24] ≥ 0 then APSR.GE[3] = 1 else 0
      • +
    +
    Operation + 
    +res[7:0]   = val1[7:0]   - val2[7:0]
+res[15:8]  = val1[15:8]  - val2[15:8]
+res[23:16] = val1[23:16] - val2[23:16]
+res[31:24] = val1[31:24] - val2[31:24]
    +
    + +

    Function __QSUB8

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __QADD8(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform four 8-bit integer subtractions, saturating the results + to the 8-bit signed integer range -27 ≤ x ≤ 27 - 1. +
    Parameter +
      +
    • val1: first four 8-bit operands.
      • +
    • val2: second four 8-bit operands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the subtraction of the first byte in the second operand from the first byte in the + first operand, in the first byte of the return value.
      • +
    • the subtraction of the second byte in the second operand from the second byte in + the first operand, in the second byte of the return value.
      • +
    • the subtraction of the third byte in the second operand from the third byte in the + first operand, in the third byte of the return value.
      • +
    • the subtraction of the fourth byte in the second operand from the fourth byte in + the first operand, in the fourth byte of the return value.
      • +
    +

    The returned results are saturated to the 8-bit signed integer range -27 ≤ x ≤ 27 - 1. +

    +
    Operation + 
    +res[7:0]   = val1[7:0]   - val2[7:0]
+res[15:8]  = val1[15:8]  - val2[15:8]
+res[23:16] = val1[23:16] - val2[23:16]
+res[31:24] = val1[31:24] - val2[31:24]
    +
    + +

    Function __SHSUB8

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SHSUB8(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform four signed 8-bit integer subtractions, halving the + results. +
    Parameter +
      +
    • val1: first four 8-bit operands.
      • +
    • val2: second four 8-bit operands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the halved subtraction of the first byte in the second operand from the first byte + in the first operand, in the first byte of the return value.
      • +
    • the halved subtraction of the second byte in the second operand from the second + byte in the first operand, in the second byte of the return value.
      • +
    • the halved subtraction of the third byte in the second operand from the third byte + in the first operand, in the third byte of the return value.
      • +
    • the halved subtraction of the fourth byte in the second operand from the fourth + byte in the first operand, in the fourth byte of the return value.
      • +
    +
    Operation + 
    +res[7:0]   = (val1[7:0]   - val2[7:0])  >> 1
+res[15:8]  = (val1[15:8]  - val2[15:8]) >> 1
+res[23:16] = (val1[23:16] - val2[23:16] >> 1
+res[31:24] = (val1[31:24] - val2[31:24] >> 1
    +
    + +

    Function __USUB8

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __USUB8(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function It enables you to perform four 8-bit unsigned integer subtractions.
    + The GE bits in the APSR are set according to the results. +
    Parameter +
      +
    • val1: first four 8-bit operands.
      • +
    • val2: second four 8-bit operands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the subtraction of the first byte in the second operand from the first byte in the + first operand, in the first byte of the return value.
      • +
    • the subtraction of the second byte in the second operand from the second byte in + the first operand, in the second byte of the return value.
      • +
    • the subtraction of the third byte in the second operand from the third byte in the + first operand, in the third byte of the return value.
      • +
    • the subtraction of the fourth byte in the second operand from the fourth byte in + the first operand, in the fourth byte of the return value.
      • +
    +

    Each bit in APSR.GE is set or cleared for each byte in the return value, depending on + the results of the operation.
    + If res is the return value, then: +

    +
      +
    • if res[7:0] ≥ 0 then APSR.GE[0] = 1 else 0
      • +
    • if res[15:8] ≥ 0 then APSR.GE[1] = 1 else 0
      • +
    • if res[23:16] ≥ 0 then APSR.GE[2] = 1 else 0
      • +
    • if res[31:24] ≥ 0 then APSR.GE[3] = 1 else 0
      • +
    +
    Operation + 
    +res[7:0]   = val1[7:0]   - val2[7:0]
+res[15:8]  = val1[15:8]  - val2[15:8]
+res[23:16] = val1[23:16] - val2[23:16]
+res[31:24] = val1[31:24] - val2[31:24]
    +
    + +

    Function __UQSUB8

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UQSUB8(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform four unsigned 8-bit integer subtractions, saturating + the results to the 8-bit unsigned integer range 0 ≤ x ≤ 28 - 1. +
    Parameter +
      +
    • val1: first four 8-bit operands.
      • +
    • val2: second four 8-bit operands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the subtraction of the first byte in the second operand from the first byte in the + first operand, in the first byte of the return value.
      • +
    • the subtraction of the second byte in the second operand from the second byte in + the first operand, in the second byte of the return value.
      • +
    • the subtraction of the third byte in the second operand from the third byte in the + first operand, in the third byte of the return value.
      • +
    • the subtraction of the fourth byte in the second operand from the fourth byte in + the first operand, in the fourth byte of the return value.
      • +
    +

    The results are saturated to the 8-bit unsigned integer range 0 ≤ x ≤ 28 - 1. +

    +
    Operation + 
    +res[7:0]   = val1[7:0]   - val2[7:0]
+res[15:8]  = val1[15:8]  - val2[15:8]
+res[23:16] = val1[23:16] - val2[23:16]
+res[31:24] = val1[31:24] - val2[31:24]
    +
    + +

    Function __UHSUB8

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UHSUB8(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform four unsigned 8-bit integer subtractions, halving the + results. +
    Parameter +
      +
    • val1: first four 8-bit operands.
      • +
    • val2: second four 8-bit operands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the halved subtraction of the first byte in the second operand from the first byte + in the first operand, in the first byte of the return value.
      • +
    • the halved subtraction of the second byte in the second operand from the second + byte in the first operand, in the second byte of the return value.
      • +
    • the halved subtraction of the third byte in the second operand from the third byte + in the first operand, in the third byte of the return value.
      • +
    • the halved subtraction of the fourth byte in the second operand from the fourth + byte in the first operand, in the fourth byte of the return value.
      • +
    +
    Operation + 
    +res[7:0]   = (val1[7:0]   - val2[7:0])   >> 1
+res[15:8]  = (val1[15:8]  - val2[15:8])  >> 1
+res[23:16] = (val1[23:16] - val2[23:16]) >> 1
+res[31:24] = (val1[31:24] - val2[31:24]) >> 1
    +
    + +

    Function __SADD16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SADD16(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two 16-bit signed integer additions.
    + The GE bits in the APSR are set according to the results of the additions. +
    Parameter +
      +
    • val1: first two 16-bit summands.
      • +
    • val2: second two 16-bit summands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the addition of the low halfwords in the low halfword of the return value.
      • +
    • the addition of the high halfwords in the high halfword of the return value.
      • +
    +

    Each bit in APSR.GE is set or cleared for each byte in the return value, depending on + the results of the operation.
    + If res is the return value, then: +

    +
      +
    • if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
      • +
    • if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00
      • +
    +
    Operation + 
    +res[15:0]  = val1[15:0]  + val2[15:0]
+res[31:16] = val1[31:16] + val2[31:16]
    +
    + +

    Function __QADD16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __QADD16(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two 16-bit integer arithmetic additions in parallel, + saturating the results to the 16-bit signed integer range -215 ≤ x ≤ 215 - 1. +
    Parameter +
      +
    • val1: first two 16-bit summands.
      • +
    • val2: second two 16-bit summands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the saturated addition of the low halfwords in the low halfword of the return value.
      • +
    • the saturated addition of the high halfwords in the high halfword of the return value.
      • +
    +

    The returned results are saturated to the 16-bit signed integer + range -215 ≤ x ≤ 215 - 1 +

    +
    Operation + 
    +res[15:0]  = val1[15:0]  + val2[15:0]
+res[16:31] = val1[31:16] + val2[31:16]
    +
    + +

    Function __SHADD16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SHADD16(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two signed 16-bit integer additions, halving the + results. +
    Parameter +
      +
    • val1: first two 16-bit summands.
      • +
    • val2: second two 16-bit summands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the halved addition of the low halfwords from each operand, in the low halfword + of the return value.
      • +
    • the halved addition of the high halfwords from each operand, in the high halfword + of the return value.
      • +
    +
    Operation + 
    +res[15:0]  = (val1[15:0]  + val2[15:0])  >> 1
+res[31:16] = (val1[31:16] + val2[31:16]) >> 1
    +
    + +

    Function __UADD16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UADD16(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two 16-bit unsigned integer additions.
    + The GE bits in the APSR are set according to the results. +
    Parameter +
      +
    • val1: first two 16-bit summands for each addition.
      • +
    • val2: second two 16-bit summands for each addition.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the addition of the low halfwords in each operand, in the low halfword of the + return value.
      • +
    • the addition of the high halfwords in each operand, in the high halfword of the + return value.
      • +
    +

    Each bit in APSR.GE is set or cleared for each byte in the return value, depending on + the results of the operation.
    + If res is the return value, then: +

    +
      +
    • if res[15:0] ≥ 0x10000 then APSR.GE[0] = 11 else 00
      • +
    • if res[31:16] ≥ 0x10000 then APSR.GE[1] = 11 else 00
      • +
    +
    Operation + 
    +res[15:0]  = val1[15:0]  + val2[15:0]
+res[31:16] = val1[31:16] + val2[31:16]
    +
    + +

    Function __UQADD16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UQADD16(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two unsigned 16-bit integer additions, saturating the + results to the 16-bit unsigned integer range 0 ≤ x ≤ 216 - 1. +
    Parameter +
      +
    • val1: first two 16-bit summands.
      • +
    • val2: second two 16-bit summands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the addition of the low halfword in the first operand and the low halfword in the + second operand, in the low halfword of the return value.
      • +
    • the addition of the high halfword in the first operand and the high halfword in the + second operand, in the high halfword of the return value.
      • +
    +

    The results are saturated to the 16-bit unsigned integer + range 0 ≤ x ≤ 216 - 1. +

    +
    Operation + 
    +res[15:0]  = val1[15:0]  + val2[15:0]
+res[31:16] = val1[31:16] + val2[31:16]
    +
    + +

    Function __UHADD16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UHADD16(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two unsigned 16-bit integer additions, halving the + results. +
    Parameter +
      +
    • val1: first two 16-bit summands.
      • +
    • val2: second two 16-bit summands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the halved addition of the low halfwords in each operand, in the low halfword of + the return value.
      • +
    • the halved addition of the high halfwords in each operand, in the high halfword + of the return value.
      • +
    +
    Operation + 
    +res[15:0]  = (val1[15:0]  + val2[15:0])  >> 1
+res[31:16] = (val1[31:16] + val2[31:16]) >> 1
    +
    + +

    Function __SSUB16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SSUB16(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two 16-bit signed integer subtractions.
    + The GE bits in the APSR are set according to the results. +
    Parameter +
      +
    • val1: first two 16-bit operands of each subtraction.
      • +
    • val2: second two 16-bit operands of each subtraction.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the subtraction of the low halfword in the second operand from the low halfword + in the first operand, in the low halfword of the return value.
      • +
    • the subtraction of the high halfword in the second operand from the high halfword + in the first operand, in the high halfword of the return value.
      • +
    +

    Each bit in APSR.GE is set or cleared for each byte in the return value, depending on + the results of the operation.
    + If res is the return value, then: +

    +
      +
    • if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
      • +
    • if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00
      • +
    +
    Operation + 
    +res[15:0]  = val1[15:0]  - val2[15:0]
+res[31:16] = val1[31:16] - val2[31:16]
    +
    + +

    Function __QSUB16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __QSUB16(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two 16-bit integer subtractions, saturating the + results to the 16-bit signed integer range -215 ≤ x ≤ 215 - 1. +
    Parameter +
      +
    • val1: first two 16-bit operands.
      • +
    • val2: second two 16-bit operands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the saturated subtraction of the low halfword in the second operand from the low + halfword in the first operand, in the low halfword of the returned result.
      • +
    • the saturated subtraction of the high halfword in the second operand from the high + halfword in the first operand, in the high halfword of the returned result.
      • +
    +

    The returned results are saturated to the 16-bit signed integer + range -215 ≤ x ≤ 215 - 1. +

    +
    Operation + 
    +res[15:0]  = val1[15:0]  - val2[15:0]
+res[31:16] = val1[31:16] - val2[31:16]
    +
    + +

    Function __SHSUB16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SHSUB16(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two signed 16-bit integer subtractions, halving the + results. +
    Parameter +
      +
    • val1: first two 16-bit operands.
      • +
    • val2: second two 16-bit operands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the halved subtraction of the low halfword in the second operand from the low + halfword in the first operand, in the low halfword of the return value.
      • +
    • the halved subtraction of the high halfword in the second operand from the high + halfword in the first operand, in the high halfword of the return value.
      • +
    +
    Operation + 
    +res[15:0]  = (val1[15:0]  - val2[15:0])  >> 1
+res[31:16] = (val1[31:16] - val2[31:16]) >> 1
    +
    + +

    Function __USUB16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __USUB16(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two 16-bit unsigned integer subtractions.
    + The GE bits in the APSR are set according to the results. +
    Parameter +
      +
    • val1: first two 16-bit operands.
      • +
    • val2: second two 16-bit operands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the subtraction of the low halfword in the second operand from the low halfword + in the first operand, in the low halfword of the return value.
      • +
    • the subtraction of the high halfword in the second operand from the high halfword + in the first operand, in the high halfword of the return value.
      • +
    +

    Each bit in APSR.GE is set or cleared for each byte in the return value, depending on + the results of the operation.
    + If res is the return value, then: +

    +
      +
    • if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
      • +
    • if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00
      • +
    +
    Operation + 
    +res[15:0]  = val1[15:0]  - val2[15:0]
+res[31:16] = val1[31:16] - val2[31:16]
    +
    + +

    Function __UQSUB16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UQSUB16(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two unsigned 16-bit integer subtractions, saturating + the results to the 16-bit unsigned integer range 0 ≤ x ≤ 216 - 1. +
    Parameter +
      +
    • val1: first two 16-bit operands for each subtraction.
      • +
    • val2: second two 16-bit operands for each subtraction.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the subtraction of the low halfword in the second operand from the low halfword + in the first operand, in the low halfword of the return value.
      • +
    • the subtraction of the high halfword in the second operand from the high halfword + in the first operand, in the high halfword of the return value.
      • +
    +

    The results are saturated to the 16-bit unsigned integer range 0 ≤ x ≤ 216 - 1. +

    +
    Operation + 
    +res[15:0]  = val1[15:0]  - val2[15:0]
+res[31:16] = val1[31:16] - val2[31:16]
    +
    + +

    Function __UHSUB16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UHSUB16(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two unsigned 16-bit integer subtractions, halving + the results. +
    Parameter +
      +
    • val1: first two 16-bit operands.
      • +
    • val2: second two 16-bit operands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the halved subtraction of the low halfword in the second operand from the low + halfword in the first operand, in the low halfword of the return value.
      • +
    • the halved subtraction of the high halfword in the second operand from the high + halfword in the first operand, in the high halfword of the return value.
      • +
    +
    Operation + 
    +res[15:0]  = (val1[15:0]  - val2[15:0])  >> 1
+res[31:16] = (val1[31:16] - val2[31:16]) >> 1
    +
    + +

    Function __SASX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SASX(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function inserts an SASX instruction into the instruction stream generated by the + compiler. It enables you to exchange the halfwords of the second operand, add the high + halfwords and subtract the low halfwords.
    + The GE bits in the APRS are set according to the results. +
    Parameter +
      +
    • val1: first operand for the subtraction in the low halfword, and the + first operand for the addition in the high halfword.
      • +
    • val2: second operand for the subtraction in the high halfword, and the + second operand for the addition in the low halfword.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the subtraction of the high halfword in the second operand from the low halfword + in the first operand, in the low halfword of the return value.
      • +
    • the addition of the high halfword in the first operand and the low halfword in the + second operand, in the high halfword of the return value.
      • +
    +

    Each bit in APSR.GE is set or cleared for each byte in the return value, depending on + the results of the operation.
    + If res is the return value, then: +

    +
      +
    • if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
      • +
    • if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00
      • +
    +
    Operation + 
    +res[15:0]  = val1[15:0] - val2[31:16]
+res[31:16] = val1[31:16] + val2[15:0]
    +
    + +

    Function __QASX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __QASX(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to exchange the halfwords of the one operand, then add the high + halfwords and subtract the low halfwords, saturating the results to the 16-bit signed + integer range -215 ≤ x ≤ 215 - 1. +
    Parameter +
      +
    • val1: first operand for the subtraction in the low halfword, and the + first operand for the addition in the high halfword.
      • +
    • val2: second operand for the subtraction in the high halfword, and the + second operand for the addition in the low halfword.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the saturated subtraction of the high halfword in the second operand from the low + halfword in the first operand, in the low halfword of the return value.
      • +
    • the saturated addition of the high halfword in the first operand and the low + halfword in the second operand, in the high halfword of the return value.
      • +
    +

    The returned results are saturated to the 16-bit signed integer + range -215 ≤ x ≤ 215 - 1. +

    +
    Operation + 
    +res[15:0]  = val1[15:0]  - val2[31:16]
+res[31:16] = val1[31:16] + val2[15:0]
    +
    + +

    Function __SHASX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SHASX(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to exchange the two halfwords of one operand, perform one + signed 16-bit integer addition and one signed 16-bit subtraction, and halve the results. +
    Parameter +
      +
    • val1: first 16-bit operands.
      • +
    • val2: second 16-bit operands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the halved subtraction of the high halfword in the second operand from the low + halfword in the first operand, in the low halfword of the return value.
      • +
    • the halved subtraction of the low halfword in the second operand from the high + halfword in the first operand, in the high halfword of the return value.
      • +
    +
    Operation + 
    +res[15:0]  = (val1[15:0]  - val2[31:16]) >> 1
+res[31:16] = (val1[31:16] - val2[15:0])  >> 1
    +
    + +

    Function __UASX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UASX(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to exchange the two halfwords of the second operand, add the + high halfwords and subtract the low halfwords.
    + The GE bits in the APSR are set according to the results. +
    Parameter +
      +
    • val1: first operand for the subtraction in the low halfword, and the + first operand for the addition in the high halfword.
      • +
    • val2: second operand for the subtraction in the high halfword and the + second operand for the addition in the low halfword.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the subtraction of the high halfword in the second operand from the low halfword + in the first operand, in the low halfword of the return value.
      • +
    • the addition of the high halfword in the first operand and the low halfword in the + second operand, in the high halfword of the return value.
      • +
    +

    Each bit in APSR.GE is set or cleared for each byte in the return value, depending on + the results of the operation.
    + If res is the return value, then: +

    +
      +
    • if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
      • +
    • if res[31:16] ≥ 0x10000 then APSR.GE[3:2] = 11 else 00
      • +
    +
    Operation + 
    +res[15:0]  = val1[15:0]  - val2[31:16]
+res[31:16] = val1[31:16] + val2[15:0]
    +
    + +

    Function __UQASX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UQASX(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to exchange the halfwords of the second operand and perform + one unsigned 16-bit integer addition and one unsigned 16-bit subtraction, saturating the + results to the 16-bit unsigned integer range 0 ≤ x ≤ 216 - 1. +
    Parameter +
      +
    • val1: first two 16-bit operands.
      • +
    • val2: second two 16-bit operands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the subtraction of the high halfword in the second operand from the low halfword + in the first operand, in the low halfword of the return value.
      • +
    • the subtraction of the low halfword in the second operand from the high halfword + in the first operand, in the high halfword of the return value.
      • +
    +

    The results are saturated to the 16-bit unsigned integer + range 0 ≤ x ≤ 216 - 1. +

    +
    Operation + 
    +res[15:0]  = val1[15:0]  - val2[31:16]
+res[31:16] = val1[31:16] + val2[15:0]
    +
    + +

    Function __UHASX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UHASX(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to exchange the halfwords of the second operand, add the high + halfwords and subtract the low halfwords, halving the results. +
    Parameter +
      +
    • val1: first operand for the subtraction in the low halfword, and the + first operand for the addition in the high halfword.
      • +
    • val2: second operand for the subtraction in the high halfword, and the + second operand for the addition in the low halfword.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the halved subtraction of the high halfword in the second operand from the low + halfword in the first operand.
      • +
    • the halved addition of the high halfword in the first operand and the low halfword + in the second operand.
      • +
    +
    Operation + 
    +res[15:0]  = (val1[15:0]  - val2[31:16]) >> 1
+res[31:16] = (val1[31:16] + val2[15:0])  >> 1
    +
    + +

    Function __SSAX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SSAX(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to exchange the two halfwords of one operand and perform one + 16-bit integer subtraction and one 16-bit addition.
    + The GE bits in the APSR are set according to the results. +
    Parameter +
      +
    • val1: first operand for the addition in the low halfword, and the first + operand for the subtraction in the high halfword.
      • +
    • val2: second operand for the addition in the high halfword, and the + second operand for the subtraction in the low halfword.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the addition of the low halfword in the first operand and the high halfword in the + second operand, in the low halfword of the return value.
      • +
    • the subtraction of the low halfword in the second operand from the high halfword + in the first operand, in the high halfword of the return value.
      • +
    +

    Each bit in APSR.GE is set or cleared for each byte in the return value, depending on + the results of the operation.
    + If res is the return value, then: +

    +
      +
    • if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
      • +
    • if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00
      • +
    +
    Operation + 
    +res[15:0]  = val1[15:0]  + val2[31:16]
+res[31:16] = val1[31:16] - val2[15:0]
    +
    + +

    Function __QSAX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __QSAX(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to exchange the halfwords of one operand, then subtract the + high halfwords and add the low halfwords, saturating the results to the 16-bit signed + integer range -215 ≤ x ≤ 215 - 1. +
    Parameter +
      +
    • val1: first operand for the addition in the low halfword, and the first + operand for the subtraction in the high halfword.
      • +
    • val2: second operand for the addition in the high halfword, and the + second operand for the subtraction in the low halfword.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the saturated addition of the low halfword of the first operand and the high + halfword of the second operand, in the low halfword of the return value.
      • +
    • the saturated subtraction of the low halfword of the second operand from the high + halfword of the first operand, in the high halfword of the return value.
      • +
    +

    The returned results are saturated to the 16-bit signed integer + range -215 ≤ x ≤ 215 - 1. +

    +
    Operation + 
    +res[15:0]  = val1[15:0]  + val2[31:16]
+res[31:16] = val1[31:16] - val2[15:0]
    +
    + +

    Function __SHSAX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SHSAX(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to exchange the two halfwords of one operand, perform one + signed 16-bit integer subtraction and one signed 16-bit addition, and halve the results. +
    Parameter +
      +
    • val1: first 16-bit operands.
      • +
    • val2: second 16-bit operands.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the halved addition of the low halfword in the first operand and the high halfword + in the second operand, in the low halfword of the return value.
      • +
    • the halved subtraction of the low halfword in the second operand from the high + halfword in the first operand, in the high halfword of the return value.
      • +
    +
    Operation + 
    +res[15:0]  = (val1[15:0]  + val2[31:16]) >> 1
+res[31:16] = (val1[31:16] - val2[15:0])  >> 1
    +
    + +

    Function __USAX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __USAX(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to exchange the halfwords of the second operand, subtract the + high halfwords and add the low halfwords.
    + The GE bits in the APSR are set according to the results. +
    Parameter +
      +
    • val1: first operand for the addition in the low halfword, and the first + operand for the subtraction in the high halfword.
      • +
    • val2: second operand for the addition in the high halfword, and the + second operand for the subtraction in the low halfword.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the addition of the low halfword in the first operand and the high halfword in the + second operand, in the low halfword of the return value.
      • +
    • the subtraction of the low halfword in the second operand from the high halfword + in the first operand, in the high halfword of the return value.
      • +
    +

    Each bit in APSR.GE is set or cleared for each byte in the return value, depending on + the results of the operation.
    + If res is the return value, then: +

    +
      +
    • if res[15:0] ≥ 0x10000 then APSR.GE[1:0] = 11 else 00
      • +
    • if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00
      • +
    +
    Operation + 
    +res[15:0]  = val1[15:0]  + val2[31:16]
+res[31:16] = val1[31:16] - val2[15:0]
    +
    + +

    Function __UQSAX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UQSAX(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to exchange the halfwords of the second operand and perform + one unsigned 16-bit integer subtraction and one unsigned 16-bit addition, saturating the + results to the 16-bit unsigned integer range 0 ≤ x ≤ 216 - 1. +
    Parameter +
      +
    • val1: first 16-bit operand for the addition in the low halfword, and the + first 16-bit operand for the subtraction in the high halfword.
      • +
    • val2: second 16-bit halfword for the addition in the high halfword, + and the second 16-bit halfword for the subtraction in the low halfword.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the addition of the low halfword in the first operand and the high halfword in the + second operand, in the low halfword of the return value.
      • +
    • the subtraction of the low halfword in the second operand from the high halfword + in the first operand, in the high halfword of the return value.
      • +
    +

    The results are saturated to the 16-bit unsigned integer + range 0 ≤ x ≤ 216 - 1. +

    +
    Operation + 
    +res[15:0]  = val1[15:0]  + val2[31:16]
+res[31:16] = val1[31:16] - val2[15:0]
    +
    + +

    Function __UHSAX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UHSAX(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to exchange the halfwords of the second operand, subtract the + high halfwords and add the low halfwords, halving the results. +
    Parameter +
      +
    • val1: first operand for the addition in the low halfword, and the first + operand for the subtraction in the high halfword.
      • +
    • val2: second operand for the addition in the high halfword, and the + second operand for the subtraction in the low halfword.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the halved addition of the high halfword in the second operand and the low + halfword in the first operand, in the low halfword of the return value.
      • +
    • the halved subtraction of the low halfword in the second operand from the high + halfword in the first operand, in the high halfword of the return value.
      • +
    +
    Operation + 
    +res[15:0]  = (val1[15:0]  + val2[31:16]) >> 1
+res[31:16] = (val1[31:16] - val2[15:0])  >> 1
    +
    + +

    Function __USAD8

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __USAD8(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform four unsigned 8-bit subtractions, and add the + absolute values of the differences together, returning the result as a single unsigned + integer. +
    Parameter +
      +
    • val1: first four 8-bit operands for the subtractions.
      • +
    • val2: second four 8-bit operands for the subtractions.
      • +
    +
    Return Value +

    The function returns the sum of the absolute differences of:

    +
      +
    • the subtraction of the first byte in the second operand from the first byte in the + first operand.
      • +
    • the subtraction of the second byte in the second operand from the second byte in + the first operand.
      • +
    • the subtraction of the third byte in the second operand from the third byte in the + first operand.
      • +
    • the subtraction of the fourth byte in the second operand from the fourth byte in + the first operand.
      • +
    +

    The sum is returned as a single unsigned integer.

    +
    Operation + 
    +absdiff1  = val1[7:0]   - val2[7:0]
+absdiff2  = val1[15:8]  - val2[15:8]
+absdiff3  = val1[23:16] - val2[23:16]
+absdiff4  = val1[31:24] - val2[31:24]
+res[31:0] = absdiff1 + absdiff2 + absdiff3 + absdiff4
    +
    + +

    Function __USADA8

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __USADA8(uint32_t val1, uint32_t val2, uint32_t val3);
    +
    DescriptionThis function enables you to perform four unsigned 8-bit subtractions, and add the + absolute values of the differences to a 32-bit accumulate operand. +
    Parameter +
      +
    • val1: first four 8-bit operands for the subtractions.
      • +
    • val2: second four 8-bit operands for the subtractions.
      • +
    • val3: accumulation value.
      • +
    +
    Return Value +

    The function returns the sum of the absolute differences of the following + bytes, added to the accumulation value:

    +
      +
    • the subtraction of the first byte in the second operand from the first byte in the + first operand.
      • +
    • the subtraction of the second byte in the second operand from the second byte in + the first operand.
      • +
    • the subtraction of the third byte in the second operand from the third byte in the + first operand.
      • +
    • the subtraction of the fourth byte in the second operand from the fourth byte in + the first operand.
      • +
    +
    Operation + 
    +absdiff1  = val1[7:0]   - val2[7:0]
+absdiff2  = val1[15:8]  - val2[15:8]
+absdiff3  = val1[23:16] - val2[23:16]
+absdiff4  = val1[31:24] - val2[31:24]
+sum       = absdiff1 + absdiff2 + absdiff3 + absdiff4
+res[31:0] = sum[31:0] + val3[31:0]
    +
    + +

    Function __SSAT16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SSAT16(uint32_t val1, const uint32_t val2);
    +
    DescriptionThis function enables you to saturate two signed 16-bit values to a selected signed range.
    + The Q bit is set if either operation saturates. +
    Parameter +
      +
    • val1: two signed 16-bit values to be saturated.
      • +
    • val2: bit position for saturation, an integral constant expression in the + range 1 to 16.
      • +
    +
    Return Value +

    The function returns:

    +
      +
    • the signed saturation of the low halfword in val1, saturated to the bit position + specified in val2 and returned in the low halfword of the return value.
      • +
    • the signed saturation of the high halfword in val1, saturated to the bit position + specified in val2 and returned in the high halfword of the return value.
      • +
    +
    Operation + 
    +Saturate halfwords in val1 to the signed range specified by the bit position in val2
    +
    + +

    Function __USAT16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __USAT16(uint32_t val1, const uint32_t val2);
    +
    DescriptionThis function enables you to saturate two signed 16-bit values to a selected unsigned + range.
    + The Q bit is set if either operation saturates. +
    Parameter +
      +
    • val1: two 16-bit values that are to be saturated.
      • +
    • val2: bit position for saturation, and must be an integral constant + expression in the range 0 to 15.
      • +
    +
    Return Value +

    The function returns the saturation of the two signed 16-bit values, as non-negative values.

    +
      +
    • the saturation of the low halfword in val1, saturated to the bit position + specified in val2 and returned in the low halfword of the return value.
      • +
    • the saturation of the high halfword in val1, saturated to the bit position + specified in val2 and returned in the high halfword of the return value.
      • +
    +
    Operation + 
    +Saturate halfwords in val1 to the unsigned range specified by the bit position in val2
    +
    + +

    Function __UXTB16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UXTB16(uint32_t val);
    +
    DescriptionThis function enables you to extract two 8-bit values from an operand and zero-extend + them to 16 bits each. +
    Parameter +
      +
    • val1: two 8-bit values in val[7:0] and val[23:16] to be sign-extended.
      • +
    +
    Return Value +

    The function returns the 8-bit values zero-extended to 16-bit values.

    +
      +
    • zero-extended value of val[7:0] in the low halfword of the return value.
      • +
    • zero-extended value of val[23:16] in the high halfword of the return value.
      • +
    +
    Operation + 
    +res[15:0]  = ZeroExtended(val[7:0]  )
+res[31:16] = ZeroExtended(val[23:16])
    +
    + +

    Function __UXTAB16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __UXTAB16(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to extract two 8-bit values from one operand, zero-extend them + to 16 bits each, and add the results to two 16-bit values from another operand. +
    Parameter +
      +
    • val1: value added to the zero-extended to 16-bit values.
      • +
    • val2: two 8-bit values to be extracted and zero-extended.
      • +
    +
    Return Value +

    The function returns the 8-bit values in val2, zero-extended to 16-bit values + and added to val1.

    +
    Operation + 
    +res[15:0]  = ZeroExt(val2[7:0]   to 16 bits) + val1[15:0]
+res[31:16] = ZeroExt(val2[31:16] to 16 bits) + val1[31:16]
    +
    + +

    Function __SXTB16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SXTB16(uint32_t val);
    +
    DescriptionThis function enables you to extract two 8-bit values from an operand and sign-extend + them to 16 bits each. +
    Parameter +
      +
    • val1: two 8-bit values in val[7:0] and val[23:16] to be sign-extended.
      • +
    +
    Return Value +

    The function returns the 8-bit values sign-extended to 16-bit values.

    +
      +
    • sign-extended value of val[7:0] in the low halfword of the return value.
      • +
    • sign-extended value of val[23:16] in the high halfword of the return value.
      • +
    +
    Operation + 
    +res[15:0]  = SignExtended(val[7:0]
+res[31:16] = SignExtended(val[23:16]
    +
    + +

    Function __SXTAB16

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SXTAB16(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to extract two 8-bit values from the second operand (at bit + positions [7:0] and [23:16]), sign-extend them to 16-bits each, and add the results to the + first operand. +
    Parameter +
      +
    • val1: values added to the zero-extended to 16-bit values.
      • +
    • val2: two 8-bit values to be extracted and zero-extended.
      • +
    +
    Return Value +

    The function returns the addition of val1 and val2, where the 8-bit values in + val2[7:0] and val2[23:16] have been extracted and sign-extended prior to the addition.

    +
    Operation + 
    +res[15:0]  = val1[15:0]  + SignExtended(val2[7:0])
+res[31:16] = val1[31:16] + SignExtended(val2[23:16])
    +
    + +

    Function __SMUAD

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SMUAD(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function It enables you to perform two 16-bit signed multiplications, adding the + products together.
    + The Q bit is set if the addition overflows. +
    Parameter +
      +
    • val1: first 16-bit operands for each multiplication.
      • +
    • val2: second 16-bit operands for each multiplication.
      • +
    +
    Return Value +

    The function returns the sum of the products of the two 16-bit signed multiplications.

    +
    Operation + 
    +p1 = val1[15:0]  * val2[15:0]
+p2 = val1[31:16] * val2[31:16]
+res[31:0] = p1 + p2
    +
    + +

    Function __SMUADX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SMUADX(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two 16-bit signed multiplications with exchanged + halfwords of the second operand, adding the products together.
    + The Q bit is set if the addition overflows. +
    Parameter +
      +
    • val1: first 16-bit operands for each multiplication.
      • +
    • val2: second 16-bit operands for each multiplication.
      • +
    +
    Return Value +

    The function returns the sum of the products of the two 16-bit signed multiplications with exchanged + halfwords of the second operand.

    +
    Operation + 
    +p1 = val1[15:0]  * val2[31:16]
+p2 = val1[31:16] * val2[15:0]
+res[31:0] = p1 + p2
    +
    + +

    Function __SMLAD

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SMLAD(uint32_t val1, uint32_t val2, uint32_t val3);
    +
    DescriptionThis function enables you to perform two signed 16-bit multiplications, adding both + results to a 32-bit accumulate operand.
    + The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications. +
    Parameter +
      +
    • val1: first 16-bit operands for each multiplication.
      • +
    • val2: second 16-bit operands for each multiplication.
      • +
    • val2: accumulate value.
      • +
    +
    Return Value +

    The function returns the product of each multiplication added to the accumulate + value, as a 32-bit integer.

    +
    Operation + 
    +p1 = val1[15:0]  * val2[15:0]
+p2 = val1[31:16] * val2[31:16]
+res[31:0] = p1 + p2 + val3[31:0]
    +
    + +

    Function __SMLADX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SMLADX(uint32_t val1, uint32_t val2, uint32_t val3);
    +
    DescriptionThis function enables you to perform two signed 16-bit multiplications with exchanged + halfwords of the second operand, adding both results to a 32-bit accumulate operand.
    + The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications. +
    Parameter +
      +
    • val1: first 16-bit operands for each multiplication.
      • +
    • val2: second 16-bit operands for each multiplication.
      • +
    • val2: accumulate value.
      • +
    +
    Return Value +

    The function returns the product of each multiplication with exchanged + halfwords of the second operand added to the accumulate value, as a 32-bit integer.

    +
    Operation + 
    +p1 = val1[15:0]  * val2[31:16]
+p2 = val1[31:16] * val2[15:0]
+res[31:0] = p1 + p2 + val3[31:0]
    +
    + +

    Function __SMLALD

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint64_t __SMLALD(uint32_t val1, uint32_t val2, uint64_t val3);
    +
    DescriptionThis function enables you to perform two signed 16-bit multiplications, adding both + results to a 64-bit accumulate operand. Overflow is only possible as a result of the 64-bit + addition. This overflow is not detected if it occurs. Instead, the result wraps around + modulo264. +
    Parameter +
      +
    • val1: first 16-bit operands for each multiplication.
      • +
    • val2: second 16-bit operands for each multiplication.
      • +
    • val2: accumulate value.
      • +
    +
    Return Value +

    The function returns the product of each multiplication added to the accumulate value.

    +
    Operation + 
    +p1 = val1[15:0]  * val2[15:0]
+p2 = val1[31:16] * val2[31:16]
+sum = p1 + p2 + val3[63:32][31:0]
+res[63:32] = sum[63:32]
+res[31:0]  = sum[31:0]
    +
    + +

    Function __SMLALDX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +unsigned long long __SMLALDX(uint32_t val1, uint32_t val2, unsigned long long val3);
    +
    DescriptionThis function enables you to exchange the halfwords of the second operand, and perform + two signed 16-bit multiplications, adding both results to a 64-bit accumulate operand. + Overflow is only possible as a result of the 64-bit addition. This overflow is not detected + if it occurs. Instead, the result wraps around modulo264. +
    Parameter +
      +
    • val1: first 16-bit operands for each multiplication.
      • +
    • val2: second 16-bit operands for each multiplication.
      • +
    • val2: accumulate value.
      • +
    +
    Return Value +

    The function returns the product of each multiplication added to the accumulate value.

    +
    Operation + 
    +p1 = val1[15:0]  * val2[31:16]
+p2 = val1[31:16] * val2[15:0]
+sum = p1 + p2 + val3[63:32][31:0]
+res[63:32] = sum[63:32]
+res[31:0] = sum[31:0]
    +
    + +

    Function __SMUSD

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SMUSD(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two 16-bit signed multiplications, taking the + difference of the products by subtracting the high halfword product from the low + halfword product. +
    Parameter +
      +
    • val1: first 16-bit operands for each multiplication.
      • +
    • val2: second 16-bit operands for each multiplication.
      • +
    +
    Return Value +

    The function returns the difference of the products of the two 16-bit signed multiplications.

    +
    Operation + 
    +p1 = val1[15:0]  * val2[15:0]
+p2 = val1[31:16] * val2[31:16]
+res[31:0] = p1 - p2
    +
    + +

    Function __SMUSDX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SMUSDX(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to perform two 16-bit signed multiplications, subtracting one + of the products from the other. The halfwords of the second operand are exchanged + before performing the arithmetic. This produces top * bottom and bottom * top + multiplication. +
    Parameter +
      +
    • val1: first 16-bit operands for each multiplication.
      • +
    • val2: second 16-bit operands for each multiplication.
      • +
    +
    Return Value +

    The function returns the difference of the products of the two 16-bit signed multiplications.

    +
    Operation + 
    +p1 = val1[15:0]  * val2[31:16]
+p2 = val1[31:16] * val2[15:0]
+res[31:0] = p1 - p2
    +
    + +

    Function __SMLSD

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SMLSD(uint32_t val1, uint32_t val2, uint32_t val3);
    +
    DescriptionThis function enables you to perform two 16-bit signed multiplications, take the + difference of the products, subtracting the high halfword product from the low halfword + product, and add the difference to a 32-bit accumulate operand.
    + The Q bit is set if the accumulation overflows. Overflow cannot occur during the multiplications or the + subtraction. +
    Parameter +
      +
    • val1: first 16-bit operands for each multiplication.
      • +
    • val2: second 16-bit operands for each multiplication.
      • +
    • val3: accumulate value.
      • +
    +
    Return Value +

    The function returns the difference of the product of each multiplication, added + to the accumulate value.

    +
    Operation + 
    +p1 = val1[15:0]  * val2[15:0]
+p2 = val1[31:16] * val2[31:16]
+res[31:0] = p1 - p2 + val3[31:0]
    +
    + +

    Function __SMLSDX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SMLSDX(uint32_t val1, uint32_t val2, uint32_t val3);
    +
    DescriptionThis function enables you to exchange the halfwords in the second operand, then perform + two 16-bit signed multiplications. The difference of the products is added to a 32-bit + accumulate operand.
    + The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications or the subtraction. +
    Parameter +
      +
    • val1: first 16-bit operands for each multiplication.
      • +
    • val2: second 16-bit operands for each multiplication.
      • +
    • val3: accumulate value.
      • +
    +
    Return Value +

    The function returns the difference of the product of each multiplication, added + to the accumulate value.

    +
    Operation + 
    +p1 = val1[15:0]  * val2[31:16]
+p2 = val1[31:16] * val2[15:0]
+res[31:0] = p1 - p2 + val3[31:0]
    +
    + +

    Function __SMLSLD

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint64_t __SMLSLD(uint32_t val1, uint32_t val2, uint64_t val3);
    +
    DescriptionThis function It enables you to perform two 16-bit signed multiplications, take the + difference of the products, subtracting the high halfword product from the low halfword + product, and add the difference to a 64-bit accumulate operand. Overflow cannot occur + during the multiplications or the subtraction. Overflow can occur as a result of the 64-bit + addition, and this overflow is not detected. Instead, the result wraps round to + modulo264. +
    Parameter +
      +
    • val1: first 16-bit operands for each multiplication.
      • +
    • val2: second 16-bit operands for each multiplication.
      • +
    • val3: accumulate value.
      • +
    +
    Return Value +

    The function returns the difference of the product of each multiplication, + added to the accumulate value.

    +
    Operation + 
    +p1 = val1[15:0]  * val2[15:0]
+p2 = val1[31:16] * val2[31:16]
+res[63:0] = p1 - p2 + val3[63:0]
    +
    + +

    Function __SMLSLDX

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +unsigned long long __SMLSLDX(uint32_t val1, uint32_t val2, unsigned long long val3);
    +
    DescriptionThis function enables you to exchange the halfwords of the second operand, perform two + 16-bit multiplications, adding the difference of the products to a 64-bit accumulate + operand. Overflow cannot occur during the multiplications or the subtraction. Overflow + can occur as a result of the 64-bit addition, and this overflow is not detected. Instead, + the result wraps round to modulo264. +
    Parameter +
      +
    • val1: first 16-bit operands for each multiplication.
      • +
    • val2: second 16-bit operands for each multiplication.
      • +
    • val3: accumulate value.
      • +
    +
    Return Value +

    The function returns the difference of the product of each multiplication, + added to the accumulate value.

    +
    Operation + 
    +p1 = val1[15:0]  * val2[31:16]
+p2 = val1[31:16] * val2[15:0]
+res[63:0] = p1 - p2 + val3[63:0]
    +
    + + +

    Function __SEL

    + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __SEL(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function inserts a SEL instruction into the instruction stream generated by the + compiler. It enables you to select bytes from the input parameters, whereby the bytes + that are selected depend upon the results of previous SIMD instruction function. The + results of previous SIMD instruction function are represented by the Greater than or + Equal flags in the Application Program Status Register (APSR). + The __SEL function works equally well on both halfword and byte operand function + results. This is because halfword operand operations set two (duplicate) GE bits per + value. +
    Parameter +
      +
    • val1: four selectable 8-bit values.
      • +
    • val2: four selectable 8-bit values.
      • +
    +
    Return Value +

    The function selects bytes from the input parameters and returns them in the + return value, res, according to the following criteria:

    +
      +
    • if APSR.GE[0] == 1 then res[7:0] = val1[7:0] else res[7:0] = val2[7:0]
      • +
    • if APSR.GE[1] == 1 then res[15:8] = val1[15:8] else res[15:8] = val2[15:8]
      • +
    • if APSR.GE[2] == 1 then res[23:16] = val1[23:16] else res[23:16] = val2[23:16]
      • +
    • if APSR.GE[3] == 1 then res[31;24] = val1[31:24] else res = val2[31:24]
      • +
    +
    + +

    Function __QADD

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __QADD(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to obtain the saturating add of two integers.
    + The Q bit is set if the operation saturates. +
    Parameter +
      +
    • val1: first summand of the saturating add operation.
      • +
    • val2: second summand of the saturating add operation.
      • +
    +
    Return Value +

    The function returns the saturating addition of val1 and val2.

    +
    Operation + 
    +res[31:0] = SAT(val1 + SAT(val2 * 2))
    +
    + +

    Function __QSUB

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Summary + 
    +uint32_t __QSUB(uint32_t val1, uint32_t val2);
    +
    DescriptionThis function enables you to obtain the saturating subtraction of two integers.
    + The Q bit is set if the operation saturates. +
    Parameter +
      +
    • val1: minuend of the saturating subtraction operation.
      • +
    • val2: subtrahend of the saturating subtraction operation.
      • +
    +
    Return Value +

    The function returns the saturating subtraction of val1 and val2.

    +
    Operation + 
    +res[31:0] = SAT(val1 - SAT(val2 * 2))
    +
    + + + +

     

    +

    Examples

    +

    Following are some coding examples using the SIMD functions: +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    NameDescription
    AdditionAdd two values using SIMD function
    SubtractionSubtract two values using SIMD function
    MultiplicationPerforming a multiplication using SIMD function
    + + +

    Addition

    + + + + + + + +
    Example + 
    +uint32_t add_halfwords(uint32_t val1, uint32_t val2)
+{
+   uint32_t res;
+   res = __SADD16(val1, val2);
+   return res;
+}
    +
    + +

    Subtraction

    + + + + + + + +
    Example + 
    +uint32_t sub_halfwords(uint32_t val1, uint32_t val2)
+{
+  uint32_t res;
+  res = __SSUB16(val1, val2);
+  return res;
+}
    +
    + +

    Multiplication

    + + + + + + + +
    Example + 
    +uint32_t dual_mul_add_products(uint32_t val1, uint32_t val2)
+{
+  uint32_t res;
+  res = __SMUAD(val1, val2);
+  return res;
+}
    +
    + + + + \ No newline at end of file diff --git a/Libraries/CMSIS/Documentation/CMSIS_Core.htm b/Libraries/CMSIS/Documentation/CMSIS_Core.htm new file mode 100644 index 0000000..aff81c9 --- /dev/null +++ b/Libraries/CMSIS/Documentation/CMSIS_Core.htm @@ -0,0 +1,1470 @@ + + + + CMSIS: Cortex Microcontroller Software Interface Standard + + + +

    Cortex Microcontroller Software Interface Standard

    + +

    This file describes the Cortex Microcontroller Software Interface Standard (CMSIS).

    +

    Version: 2.10 - July 2011

    + +

    Information in this file, the accompany manuals, and software is
    + Copyright © ARM Ltd.
    All rights reserved. +

    + +
    + +

    Revision History

    +
      +
    • Version 1.00: initial release.
      • +
    • Version 1.01: added __LDREXx, __STREXx, and __CLREX.
      • +
    • Version 1.02: added Cortex-M0.
      • +
    • Version 1.10: second review.
      • +
    • Version 1.20: third review.
      • +
    • Version 1.30 PRE-RELEASE: reworked Startup Concept, additional Debug Functionality.
      • +
    • Version 1.30 2nd PRE-RELEASE: changed folder structure, added doxyGen comments, added Bit definitions.
      • +
    • Version 1.30: updated Device Support Packages.
      • +
    • Version 2.00: added Cortex-M4 support.
      • +
    • Version 2.01: internal review.
      • +
    • Version 2.02: updated Device Specific Defines
      • +
    • Version 2.10: reworked core include files
      • +
    + +
    + +

    Contents

    + +
      +
    1. About
      2. +
    2. Coding Rules and Conventions
      3. +
    3. CMSIS Files
      4. +
    4. Core Peripheral Access Layer
      5. +
    5. CMSIS Example
      6. +
    6. CMSIS MISRA-C:2004 Compliance Exceptions
      7. +
    + +

    About

    + +

    + The Cortex Microcontroller Software Interface Standard (CMSIS) answers the challenges + that are faced when software components are deployed to physical microcontroller devices based on a + Cortex-M0 or Cortex-M3 processor. The CMSIS will be also expanded to future Cortex-M + processor cores (the term Cortex-M is used to indicate that). The CMSIS is defined in close co-operation + with various silicon and software vendors and provides a common approach to interface to peripherals, + real-time operating systems, and middleware components. +

    + +

    ARM provides as part of the CMSIS the following software layers that are +available for various compiler implementations:

    +
      +
    • Core Peripheral Access Layer: contains name definitions, + address definitions and helper functions to + access core registers and peripherals. It defines also a device + independent interface for RTOS Kernels that includes debug channel + definitions.
      • +
    + +

    These software layers are expanded by Silicon partners with:

    +
      +
    • Device Peripheral Access Layer: provides definitions + for all device peripherals
      • +
    • Access Functions for Peripherals (optional): provides + additional helper functions for peripherals
      • +
    + +

    CMSIS defines for a Cortex-M Microcontroller System:

    +
      +
    • A common way to access peripheral registers + and a common way to define exception vectors.
      • +
    • The register names of the Core + Peripherals and the names of the Core + Exception Vectors.
      • +
    • An device independent interface for RTOS Kernels including a debug + channel.
      • +
    + +

    + By using CMSIS compliant software components, the user can easier re-use template code. + CMSIS is intended to enable the combination of software components from multiple middleware vendors. +

    + +

    Coding Rules and Conventions

    + +

    + The following section describes the coding rules and conventions used in the CMSIS + implementation. It contains also information about data types and version number information. +

    + +

    Essentials

    +
      +
    • The CMSIS C code conforms to MISRA 2004 rules. In case of MISRA violations, + there are disable and enable sequences for PC-LINT inserted.
      • +
    • ANSI standard data types defined in the ANSI C header file + <stdint.h> are used.
      • +
    • #define constants that include expressions must be enclosed by + parenthesis.
      • +
    • Variables and parameters have a complete data type.
      • +
    • All functions in the Core Peripheral Access Layer are + re-entrant.
      • +
    • The Core Peripheral Access Layer has no blocking code + (which means that wait/query loops are done at other software layers).
      • +
    • For each exception/interrupt there is definition for: +
        +
      • an exception/interrupt handler with the postfix _Handler + (for exceptions) or _IRQHandler (for interrupts).
        • +
      • a default exception/interrupt handler (weak definition) that contains an endless loop.
        • +
      • a #define of the interrupt number with the postfix _IRQn.
        • +
      • +
    + +

    Recommendations

    + +

    The CMSIS recommends the following conventions for identifiers.

    +
      +
    • CAPITAL names to identify Core Registers, Peripheral Registers, and CPU Instructions.
      • +
    • CamelCase names to identify peripherals access functions and interrupts.
      • +
    • PERIPHERAL_ prefix to identify functions that belong to specify peripherals.
      • +
    • Doxygen comments for all functions are included as described under Function Comments below.
      • +
    + +Comments + +
      +
    • Comments use the ANSI C90 style (/* comment */) or C++ style + (// comment). It is assumed that the programming tools support today + consistently the C++ comment style.
      • +
    • Function Comments provide for each function the following information: +
        +
      • one-line brief function overview.
        • +
      • detailed parameter explanation.
        • +
      • detailed information about return values.
        • +
      • detailed description of the actual function.
        • +
      +

      Doxygen Example:

      + 
      +/** 
+ * @brief  Enable Interrupt in NVIC Interrupt Controller
+ * @param  IRQn  interrupt number that specifies the interrupt
+ * @return none.
+ * Enable the specified interrupt in the NVIC Interrupt Controller.
+ * Other settings of the interrupt such as priority are not affected.
+ */
      +
      • +
    + +

    Data Types and IO Type Qualifiers

    + +

    + The Cortex-M HAL uses the standard types from the standard ANSI C header file + <stdint.h>. IO Type Qualifiers are used to specify the access + to peripheral variables. IO Type Qualifiers are indented to be used for automatic generation of + debug information of peripheral registers. +

    + + + + + + + + + + + + + + + + + + + + + + + + +
    IO Type Qualifier#defineDescription
    __Ivolatile constRead access only
    __OvolatileWrite access only
    __IOvolatileRead and write access
    + +

    CMSIS Version Number

    +

    + File core_cm4.h contains the version number of the CMSIS with the following define: +

    + +
    +#define __CM4_CMSIS_VERSION_MAIN  (0x02)      /* [31:16] main version       */
+#define __CM4_CMSIS_VERSION_SUB   (0x10)      /* [15:0]  sub version        */
+#define __CM4_CMSIS_VERSION       ((__CM4_CMSIS_VERSION_MAIN << 16) | __CM4_CMSIS_VERSION_SUB)
    + +

    + File core_cm3.h contains the version number of the CMSIS with the following define: +

    + +
    +#define __CM3_CMSIS_VERSION_MAIN  (0x02)      /* [31:16] main version       */
+#define __CM3_CMSIS_VERSION_SUB   (0x10)      /* [15:0]  sub version        */
+#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)
    + +

    + File core_cm0.h contains the version number of the CMSIS with the following define: +

    + +
    +#define __CM0_CMSIS_VERSION_MAIN  (0x02)      /* [31:16] main version       */
+#define __CM0_CMSIS_VERSION_SUB   (0x10)      /* [15:0]  sub version        */
+#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16) | __CM0_CMSIS_VERSION_SUB)
    + + +

    CMSIS Cortex Core

    +

    + File core_cm4.h contains the type of the CMSIS Cortex-M with the following define: +

    + +
    +#define __CORTEX_M                (0x04)
    + +

    + File core_cm3.h contains the type of the CMSIS Cortex-M with the following define: +

    + +
    +#define __CORTEX_M                (0x03)
    + +

    + File core_cm0.h contains the type of the CMSIS Cortex-M with the following define: +

    + +
    +#define __CORTEX_M                (0x00)
    + + +

    CMSIS Files

    +

    + This section describes the Files provided in context with the CMSIS to access the Cortex-M + hardware and peripherals. +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    FileProviderDescription
    device.hDevice specific (provided by silicon partner)Defines the peripherals for the actual device. The file may use + several other include files to define the peripherals of the actual device.
    core_cm0.hARM (for RealView ARMCC, IAR, and GNU GCC)Defines the core peripherals for the Cortex-M0 CPU and core peripherals.
    core_cm3.hARM (for RealView ARMCC, IAR, and GNU GCC)Defines the core peripherals for the Cortex-M3 CPU and core peripherals.
    core_cm4.hARM (for RealView ARMCC, IAR, and GNU GCC)Defines the core peripherals for the Cortex-M4 CPU and core peripherals.
    core_cm4_simd.hARM (for RealView ARMCC, IAR, and GNU GCC)Defines the Cortex-M4 Core SIMD functions.
    core_cmFunc.hARM (for RealView ARMCC, IAR, and GNU GCC)Defines the Cortex-M Core Register access functions.
    core_cmInstr.hARM (for RealView ARMCC, IAR, and GNU GCC)Defines the Cortex-M Core instructions.
    startup_deviceARM (adapted by compiler partner / silicon partner)Provides the Cortex-M startup code and the complete (device specific) Interrupt Vector Table
    system_deviceARM (adapted by silicon partner)Provides a device specific configuration file for the device. It configures the device initializes + typically the oscillator (PLL) that is part of the microcontroller device
    + +

    device.h

    + +

    + The file device.h is provided by the silicon vendor and is the + central include file that the application programmer is using in + the C source code. This file contains: +

    +
      +
    • +

      Interrupt Number Definition: provides interrupt numbers + (IRQn) for all core and device specific exceptions and interrupts.

      +
      • +
    • +

      Configuration for core_cm0.h / core_cm3.h / core_cm4.h: reflects the + actual configuration of the Cortex-M processor that is part of the actual + device. As such the file core_cm0.h / core_cm3.h / core_cm4.h is included that + implements access to processor registers and core peripherals.

      +
      • +
    • +

      Device Peripheral Access Layer: provides definitions + for all device peripherals. It contains all data structures and the address + mapping for the device specific peripherals.

      +
      • +
    • Access Functions for Peripherals (optional): provides + additional helper functions for peripherals that are useful for programming + of these peripherals. Access Functions may be provided as inline functions + or can be extern references to a device specific library provided by the + silicon vendor.
      • +
    + + +

    Interrupt Number Definition

    + +

    To access the device specific interrupts the device.h file defines IRQn +numbers for the complete device using a enum typedef as shown below:

    +
    +typedef enum IRQn
+{
+/******  Cortex-M3 Processor Exceptions/Interrupt Numbers ************************************************/
+  NonMaskableInt_IRQn             = -14,      /*!< 2 Non Maskable Interrupt                              */
+  HardFault_IRQn                  = -13,      /*!< 3 Cortex-M3 Hard Fault Interrupt                      */
+  MemoryManagement_IRQn           = -12,      /*!< 4 Cortex-M3 Memory Management Interrupt               */
+  BusFault_IRQn                   = -11,      /*!< 5 Cortex-M3 Bus Fault Interrupt                       */
+  UsageFault_IRQn                 = -10,      /*!< 6 Cortex-M3 Usage Fault Interrupt                     */
+  SVCall_IRQn                     = -5,       /*!< 11 Cortex-M3 SV Call Interrupt                        */
+  DebugMonitor_IRQn               = -4,       /*!< 12 Cortex-M3 Debug Monitor Interrupt                  */
+  PendSV_IRQn                     = -2,       /*!< 14 Cortex-M3 Pend SV Interrupt                        */
+  SysTick_IRQn                    = -1,       /*!< 15 Cortex-M3 System Tick Interrupt                    */
+/******  STM32 specific Interrupt Numbers ****************************************************************/
+  WWDG_STM_IRQn                   = 0,        /*!< Window WatchDog Interrupt                             */
+  PVD_STM_IRQn                    = 1,        /*!< PVD through EXTI Line detection Interrupt             */
+  :
+  :
+  } IRQn_Type;
    + + +

    Device Specific Defines

    +

    + The following device implementation specific defines are set in the device header file and are + used for the Cortex-M core configuration options. Some configuration options are reflected + in the CMSIS layer using the #define settings described below. +

    +

    + Several features in core_cm#.h are configured by the following defines + that must be defined before #include <core_cm#.h> + preprocessor command. +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    #defineCoreValueDescription
    __CM0_REVM00x0000Core revision number ([15:8] revision number, [7:0] patch number)
    __CM3_REVM30x0101 | 0x0200Core revision number ([15:8] revision number, [7:0] patch number)
    __CM4_REVM40x0000Core revision number ([15:8] revision number, [7:0] patch number)
    __NVIC_PRIO_BITSM0, M3, M42 .. 8Number of priority bits implemented in the NVIC (device specific)
    __MPU_PRESENTM0, M3, M40 | 1Defines if a MPU is present or not
    __FPU_PRESENTM40 | 1Defines if a FPU is present or not
    __Vendor_SysTickConfigM0, M3, M40 | 1When this define is setup to 1, the SysTickConfig function + in core_cm3.h is excluded. In this case the device.h + file must contain a vendor specific implementation of this function.
    + + +

    Device Peripheral Access Layer

    +

    + Each peripheral uses a prefix which consists of <device abbreviation>_ + and <peripheral name>_ to identify peripheral registers that access this + specific peripheral. The intention of this is to avoid name collisions caused + due to short names. If more than one peripheral of the same type exists, + identifiers have a postfix (digit or letter). For example: +

    +
      +
    • <device abbreviation>_UART_Type: defines the generic register layout for all UART channels in a device. + 
      +typedef struct
+{
+  union {
+  __I  uint8_t  RBR;                     /*!< Offset: 0x000 (R/ )  Receiver Buffer Register    */
+  __O  uint8_t  THR;                     /*!< Offset: 0x000 ( /W)  Transmit Holding Register   */
+  __IO uint8_t  DLL;                     /*!< Offset: 0x000 (R/W)  Divisor Latch LSB           */
+       uint32_t RESERVED0;
+  };
+  union {
+  __IO uint8_t  DLM;                     /*!< Offset: 0x004 (R/W)  Divisor Latch MSB           */
+  __IO uint32_t IER;                     /*!< Offset: 0x004 (R/W)  Interrupt Enable Register   */
+  };
+  union {
+  __I  uint32_t IIR;                     /*!< Offset: 0x008 (R/ )  Interrupt ID Register       */
+  __O  uint8_t  FCR;                     /*!< Offset: 0x008 ( /W)  FIFO Control Register       */
+  };
+  __IO uint8_t  LCR;                     /*!< Offset: 0x00C (R/W)  Line Control Register       */
+       uint8_t  RESERVED1[7];
+  __I  uint8_t  LSR;                     /*!< Offset: 0x014 (R/ )  Line Status Register        */
+       uint8_t  RESERVED2[7];
+  __IO uint8_t  SCR;                     /*!< Offset: 0x01C (R/W)  Scratch Pad Register        */
+       uint8_t  RESERVED3[3];
+  __IO uint32_t ACR;                     /*!< Offset: 0x020 (R/W)  Autobaud Control Register   */
+  __IO uint8_t  ICR;                     /*!< Offset: 0x024 (R/W)  IrDA Control Register       */
+       uint8_t  RESERVED4[3];
+  __IO uint8_t  FDR;                     /*!< Offset: 0x028 (R/W)  Fractional Divider Register */
+       uint8_t  RESERVED5[7];
+  __IO uint8_t  TER;                     /*!< Offset: 0x030 (R/W)  Transmit Enable Register    */
+       uint8_t  RESERVED6[39];
+  __I  uint8_t  FIFOLVL;                 /*!< Offset: 0x058 (R/ )  FIFO Level Register         */
+} LPC_UART_TypeDef;
      +
      • +
    • <device abbreviation>_UART1: is a pointer to a register structure that refers to a specific UART. + For example UART1->THR is the transmit holding register of UART1. + 
      +#define LPC_UART2             ((LPC_UART_TypeDef      *) LPC_UART2_BASE    )
+#define LPC_UART3             ((LPC_UART_TypeDef      *) LPC_UART3_BASE    )
      +
      • +
    + +
    Minimal Requiements
    +

    + To access the peripheral registers and related function in a device the files device.h + and core_cm0.h / core_cm3.h defines as a minimum: +

    +
      +
    • The Register Layout Typedef for each peripheral that defines all register names. + Names that start with RESERVE are used to introduce space into the structure to adjust the addresses of + the peripheral registers. For example: + 
      +typedef struct
+{
+  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
+  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
+  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+} SysTick_Type;
      +
      • + +
    • + Base Address for each peripheral (in case of multiple peripherals + that use the same register layout typedef multiple base addresses are defined). For example: + 
      +#define SysTick_BASE (SCS_BASE + 0x0010)            /* SysTick Base Address */
      +
      • + +
    • + Access Definition for each peripheral (in case of multiple peripherals that use + the same register layout typedef multiple access definitions exist, i.e. LPC_UART0, + LPC_UART2). For Example: + 
      +#define SysTick ((SysTick_Type *) SysTick_BASE)     /* SysTick access definition */
      +
      • +
    + +

    + These definitions allow to access the peripheral registers from user code with simple assignments like: +

    +
    SysTick->CTRL = 0;
    + +
    Optional Features
    +

    In addition the device.h file may define:

    +
      +
    • + #define constants that simplify access to the peripheral registers. + These constant define bit-positions or other specific patterns are that required for the + programming of the peripheral registers. The identifiers used start with + <device abbreviation>_ and <peripheral name>_. + It is recommended to use CAPITAL letters for such #define constants. +
      • +
    • + Functions that perform more complex functions with the peripheral (i.e. status query before + a sending register is accessed). Again these function start with + <device abbreviation>_ and <peripheral name>_. +
      • +
    + +

    core_cm0.h

    +

    + File core_cm0.h describes the data structures for the Cortex-M0 core peripherals and does + the address mapping of this structures. It also provides basic access to the Cortex-M0 core registers + and core peripherals with efficient functions (defined as static inline). +

    +

    This file implement the Core Peripheral Access Layer for a Cortex-M0.

    +

    The define __CMSIS_GENERIC allows to use core_cm0.h in generic + library projects that are device independent. Only core relevant types and defines are used.

    + +

    core_cm3.h

    +

    + File core_cm3.h describes the data structures for the Cortex-M3 core peripherals and does + the address mapping of this structures. It also provides basic access to the Cortex-M3 core registers + and core peripherals with efficient functions (defined as static inline). +

    +

    This file implement the Core Peripheral Access Layer for a Cortex-M3.

    +

    The define __CMSIS_GENERIC allows to use core_cm3.h in generic + library projects that are device independent. Only core relevant types and defines are used.

    + +

    core_cm4.h, core_cm4_simd.h

    +

    + File core_cm4.h describes the data structures for the Cortex-M4 core peripherals and does + the address mapping of this structures. It also provides basic access to the Cortex-M4 core registers + and core peripherals with efficient functions (defined as static inline). +

    +

    + File core_cm4_simd.h defines Cortex-M4 SIMD instructions. +

    +

    Together these files implement the Core Peripheral Access Layer for a Cortex-M4.

    +

    The define __CMSIS_GENERIC allows to use core_cm4.h in generic + library projects that are device independent. Only core relevant types and defines are used.

    + +

    core_cmFunc.h and core_cmInstr.h

    +

    + File core_cmFunc.h defines the Cortex-M Core Register access functions (defined as static inline). +

    +

    + File core_cmInstr.h defines the Cortex-M Core instructions (defined as static inline). +

    +

    These files are part of the Core Peripheral Access Layer for a Cortex-M.

    + +

    startup_device

    +

    + A template file for startup_device is provided by ARM for each supported + compiler. It is adapted by the silicon vendor to include interrupt vectors for all device specific + interrupt handlers. Each interrupt handler is defined as weak function + to an dummy handler. Therefore the interrupt handler can be directly used in application software + without any requirements to adapt the startup_device file. +

    +

    + The following exception names are fixed and define the start of the vector table for a Cortex-M0: +

    +
    +__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
    + +

    + The following exception names are fixed and define the start of the vector table for a Cortex-M3: +

    +
    +__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
    + +

    + In the following examples for device specific interrupts are shown: +

    +
    +; External Interrupts
+                DCD     WWDG_IRQHandler           ; Window Watchdog
+                DCD     PVD_IRQHandler            ; PVD through EXTI Line detect
+                DCD     TAMPER_IRQHandler         ; Tamper
    + +

    + Device specific interrupts must have a dummy function that can be overwritten in user code. + Below is an example for this dummy function. +

    +
    +Default_Handler PROC
+                EXPORT WWDG_IRQHandler   [WEAK]
+                EXPORT PVD_IRQHandler    [WEAK]
+                EXPORT TAMPER_IRQHandler [WEAK]
+                :
+                :
+                WWDG_IRQHandler
+                PVD_IRQHandler
+                TAMPER_IRQHandler
+                :
+                :
+                B .
+                ENDP
    + +

    + The user application may simply define an interrupt handler function by using the handler name + as shown below. +

    +
    +void WWDG_IRQHandler(void)
+{
+  :
+  :
+}
    + + +

    system_device.c

    +

    + A template file for system_device.c is provided by ARM but adapted by + the silicon vendor to match their actual device. As a minimum requirement + this file must provide a device specific system configuration function and a global variable + that contains the system frequency. It configures the device and initializes typically the + oscillator (PLL) that is part of the microcontroller device. +

    +

    + The file system_device.c must provide + as a minimum requirement the SystemInit function as shown below. +

    + + + + + + + + + + + + + + + + +
    Function DefinitionDescription
    void SystemInit (void)Setup the microcontroller system. Typically this function configures the + oscillator (PLL) that is part of the microcontroller device. For systems + with variable clock speed it also updates the variable SystemCoreClock.
    + SystemInit is called from startup_device file.
    void SystemCoreClockUpdate (void)Updates the variable SystemCoreClock and must be called whenever the + core clock is changed during program execution. SystemCoreClockUpdate() + evaluates the clock register settings and calculates the current core clock. +
    + +

    + Also part of the file system_device.c + is the variable SystemCoreClock which contains the current CPU clock speed shown below. +

    + + + + + + + + + + + + +
    Variable DefinitionDescription
    uint32_t SystemCoreClockContains the system core clock (which is the system clock frequency supplied + to the SysTick timer and the processor core clock). This variable can be + used by the user application to setup the SysTick timer or configure other + parameters. It may also be used by debugger to query the frequency of the + debug timer or configure the trace clock speed.
    + SystemCoreClock is initialized with a correct predefined value.

    + The compiler must be configured to avoid the removal of this variable in + case that the application program is not using it. It is important for + debug systems that the variable is physically present in memory so that + it can be examined to configure the debugger.
    + +

    Note

    +
      +

    • The above definitions are the minimum requirements for the file + system_device.c. This + file may export more functions or variables that provide a more flexible + configuration of the microcontroller system.

      +
      • +
    + + +

    Core Peripheral Access Layer

    + +

    Cortex-M Core Register Access

    +

    + The following functions are defined in core_cm0.h / core_cm3.h + and provide access to Cortex-M core registers. +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Function DefinitionCoreCore RegisterDescription
    void __enable_irq (void)M0, M3, M4PRIMASK = 0Global Interrupt enable (using the instruction CPSIE i)
    void __disable_irq (void)M0, M3, M4PRIMASK = 1Global Interrupt disable (using the instruction CPSID i)
    uint32_t __get_CONTROL (void)M0, M3, M4return CONTROLReturn Control Register Value (using the instruction MRS)
    void __set_CONTROL (uint32_t value)M0, M3, M4CONTROL = valueSet CONTROL register value (using the instruction MSR)
    uint32_t __get_IPSR (void)M0, M3, M4return IPSRReturn IPSR Register Value (using the instruction MRS)
    uint32_t __get_APSR (void)M0, M3, M4return APSRReturn APSR Register Value (using the instruction MRS)
    uint32_t __get_xPSR (void)M0, M3, M4return xPSRReturn xPSR Register Value (using the instruction MRS)
    uint32_t __get_PSP (void)M0, M3, M4return PSPReturn Process Stack Pointer (using the instruction MRS)
    void __set_PSP (uint32_t TopOfProcStack)>M0, M3, M4PSP = TopOfProcStackSet Process Stack Pointer value (using the instruction MSR)
    uint32_t __get_MSP (void)M0, M3, M4return MSPReturn Main Stack Pointer (using the instruction MRS)
    void __set_MSP (uint32_t TopOfMainStack)M0, M3, M4MSP = TopOfMainStackSet Main Stack Pointer (using the instruction MSR)
    uint32_t __get_PRIMASK (void)M0, M3, M4return PRIMASKReturn Priority Mask Register (using the instruction MRS)
    void __set_PRIMASK (uint32_t value)M0, M3, M4PRIMASK = valueAssign value to Priority Mask Register (using the instruction MSR)
    void __enable_fault_irq (void)M3, M4FAULTMASK = 0Global Fault exception and Interrupt enable (using the instruction CPSIE f)
    void __disable_fault_irq (void)M3, M4FAULTMASK = 1Global Fault exception and Interrupt disable (using the instruction CPSID f)
    uint32_t __get_BASEPRI (void)M3, M4return BASEPRIReturn Base Priority (using the instruction MRS)
    void __set_BASEPRI (uint32_t value)M3, M4BASEPRI = valueSet Base Priority (using the instruction MSR)
    uint32_t __get_FAULTMASK (void)M3, M4return FAULTMASKReturn Fault Mask Register (using the instruction MRS)
    void __set_FAULTMASK (uint32_t value)M3, M4FAULTMASK = valueAssign value to Fault Mask Register (using the instruction MSR)
    uint32_t __get_FPSCR (void)M4return FPSCRReturn Floating Point Status / Control Register
    void __set_FPSCR (uint32_t value)M4FPSCR = valueAssign value to Floating Point Status / Control Register
    + +

    Cortex-M Instruction Access

    +

    + The following functions are defined in core_cm0.h / core_cm3.hand + generate specific Cortex-M instructions. The functions are implemented in the file + core_cm0.c / core_cm3.c. +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    NameCoreGenerated CPU InstructionDescription
    void __NOP (void)M0, M3, M4NOPNo Operation
    void __WFI (void)M0, M3, M4WFIWait for Interrupt
    void __WFE (void)M0, M3, M4WFEWait for Event
    void __SEV (void)M0, M3, M4SEVSet Event
    void __ISB (void)M0, M3, M4ISBInstruction Synchronization Barrier
    void __DSB (void)M0, M3, M4DSBData Synchronization Barrier
    void __DMB (void)M0, M3, M4DMBData Memory Barrier
    uint32_t __REV (uint32_t value)M0, M3, M4REVReverse byte order in integer value.
    uint32_t __REV16 (uint16_t value)M0, M3, M4REV16Reverse byte order in unsigned short value.
    sint32_t __REVSH (sint16_t value)M0, M3, M4REVSHReverse byte order in signed short value with sign extension to integer.
    uint32_t __RBIT (uint32_t value)M3, M4RBITReverse bit order of value
    uint8_t __LDREXB (uint8_t *addr)M3, M4LDREXBLoad exclusive byte
    uint16_t __LDREXH (uint16_t *addr)M3, M4LDREXHLoad exclusive half-word
    uint32_t __LDREXW (uint32_t *addr)M3, M4LDREXWLoad exclusive word
    uint8_t __STREXB (uint8_t value, uint8_t *addr)M3, M4STREXBStore exclusive byte
    uint16_t __STREXH (uint16_t value, uint16_t *addr)M3, M4STREXHStore exclusive half-word
    uint32_t __STREXW (uint32_t value, uint32_t *addr)M3, M4STREXWStore exclusive word
    void __CLREX (void)M3, M4CLREXRemove the exclusive lock created by __LDREXB, __LDREXH, or __LDREXW
    void __SSAT (void)M3, M4SSATsaturate a signed value
    void __USAT (void)M3, M4USATsaturate an unsigned value
    + + +

    NVIC Access Functions

    +

    + The CMSIS provides access to the NVIC via the register interface structure and several helper + functions that simplify the setup of the NVIC. The CMSIS HAL uses IRQ numbers (IRQn) to + identify the interrupts. The first device interrupt has the IRQn value 0. Therefore negative + IRQn values are used for processor core exceptions. +

    +

    + For the IRQn values of core exceptions the file device.h provides + the following enum names. +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Core Exception enum ValueCoreIRQnDescription
    NonMaskableInt_IRQnM0, M3, M4-14Cortex-M Non Maskable Interrupt
    HardFault_IRQnM0, M3, M4-13Cortex-M Hard Fault Interrupt
    MemoryManagement_IRQnM3, M4-12Cortex-M Memory Management Interrupt
    BusFault_IRQnM3, M4-11Cortex-M Bus Fault Interrupt
    UsageFault_IRQnM3, M4-10Cortex-M Usage Fault Interrupt
    SVCall_IRQnM0, M3, M4-5Cortex-M SV Call Interrupt
    DebugMonitor_IRQnM3, M4-4Cortex-M Debug Monitor Interrupt
    PendSV_IRQnM0, M3, M4-2Cortex-M Pend SV Interrupt
    SysTick_IRQnM0, M3, M4-1Cortex-M System Tick Interrupt
    + +

    The following functions simplify the setup of the NVIC. +The functions are defined as static inline.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    NameCoreParameterDescription
    void NVIC_SetPriorityGrouping (uint32_t PriorityGroup)M3, M4Priority Grouping ValueSet the Priority Grouping (Groups . Subgroups)
    uint32_t NVIC_GetPriorityGrouping (void)M3, M4(void)Get the Priority Grouping (Groups . Subgroups)
    void NVIC_EnableIRQ (IRQn_Type IRQn)M0, M3, M4IRQ NumberEnable IRQn
    void NVIC_DisableIRQ (IRQn_Type IRQn)M0, M3, M4IRQ NumberDisable IRQn
    uint32_t NVIC_GetPendingIRQ (IRQn_Type IRQn)M0, M3, M4IRQ NumberReturn 1 if IRQn is pending else 0
    void NVIC_SetPendingIRQ (IRQn_Type IRQn)M0, M3, M4IRQ NumberSet IRQn Pending
    void NVIC_ClearPendingIRQ (IRQn_Type IRQn)M0, M3, M4IRQ NumberClear IRQn Pending Status
    uint32_t NVIC_GetActive (IRQn_Type IRQn)M3, M4IRQ NumberReturn 1 if IRQn is active else 0
    void NVIC_SetPriority (
    +   IRQn_Type IRQn,
    +   uint32_t priority)    		M0, M3, M4IRQ Number, PrioritySet Priority for IRQn
    + (not threadsafe for Cortex-M0)
    uint32_t NVIC_GetPriority (IRQn_Type IRQn)M0, M3, M4IRQ NumberGet Priority for IRQn
    uint32_t NVIC_EncodePriority (
    +   uint32_t PriorityGroup,
    +   uint32_t PreemptPriority,
    +   uint32_t SubPriority)    		M3, M4IRQ Number,
    + Priority Group,
    + Preemptive Priority,
    + Sub Priority    		Encode priority for given group, preemptive and sub priority
    void NVIC_DecodePriority (
    +   uint32_t Priority,
    +   uint32_t PriorityGroup,
    +   uint32_t* pPreemptPriority,
    +   uint32_t* pSubPriority)    		M3, M4
    + Priority,
    + Priority Group,
    + pointer to Preempt. Priority,
    + pointer to Sub Priority    		Decode given priority to group, preemptive and sub priority
    void NVIC_SystemReset (void)M0, M3, M4(void)Resets the System
    +

    Note

    +
      +

    • The processor exceptions have negative enum values. Device specific interrupts + have positive enum values and start with 0. The values are defined in + device.h file. +

      +
      • +

    • The values for PreemptPriority and SubPriority + used in functions NVIC_EncodePriority and NVIC_DecodePriority + depend on the available __NVIC_PRIO_BITS implemented in the NVIC. +

      +
      • +
    + + +

    SysTick Configuration Function

    + +

    The following function is used to configure the SysTick timer and start the +SysTick interrupt.

    + + + + + + + + + + + + + + +
    NameParameterDescription
    uint32_t SysTickConfig (uint32_t ticks)ticks is SysTick counter reload valueSetup the SysTick timer and enable the SysTick interrupt. After this + call the SysTick timer creates interrupts with the specified time interval.

    + Return: 0 when successful, 1 on failure.
    +
    + + +

    Cortex-M3 / Cortex-M4 ITM Debug Access

    + +

    The Cortex-M3 / Cortex-M4 incorporates the Instrumented Trace Macrocell (ITM) that +provides together with the Serial Viewer Output trace capabilities for the +microcontroller system. The ITM has 32 communication channels; two ITM +communication channels are used by CMSIS to output the following information:

    +
      +
    • ITM Channel 0: implements the ITM_SendChar function + which can be used for printf-style output via the debug interface.
      • +
    • ITM Channel 31: is reserved for the RTOS kernel and can be used for + kernel awareness debugging.
      • +
    +

    Note

    +
      +

    • The ITM channel 31 is selected for the RTOS kernel since some kernels + may use the Privileged level for program execution. ITM + channels have 4 groups with 8 channels each, whereby each group can be + configured for access rights in the Unprivileged level. The ITM channel 0 + may be therefore enabled for the user task whereas ITM channel 31 may be + accessible only in Privileged level from the RTOS kernel itself.

      +
      • +
    + +

    The prototype of the ITM_SendChar routine is shown in the +table below.

    + + + + + + + + + + + + + + +
    NameParameterDescription
    void uint32_t ITM_SendChar(uint32_t chr)character to outputThe function outputs a character via the ITM channel 0. The + function returns when no debugger is connected that has booked the + output. It is blocking when a debugger is connected, but the + previous character send is not transmitted.

    + Return: the input character 'chr'. +
    + +

    + Example for the usage of the ITM Channel 31 for RTOS Kernels: +

    +
    +  // check if debugger connected and ITM channel enabled for tracing
+  if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &&
+  (ITM->TCR & ITM_TCR_ITMENA) &&
+  (ITM->TER & (1UL << 31))) {
+    // transmit trace data
+    while (ITM->PORT31_U32 == 0);
+    ITM->PORT[31].u8 = task_id;      // id of next task
+    while (ITM->PORT[31].u32 == 0);
+    ITM->PORT[31].u32 = task_status; // status information
+  }
    + + +

    Cortex-M3 additional Debug Access

    + +

    CMSIS provides additional debug functions to enlarge the Cortex-M3 Debug Access. +Data can be transmitted via a certain global buffer variable towards the target system.

    + +

    The buffer variable and the prototypes of the additional functions are shown in the +table below.

    + + + + + + + + + + + + + + + + + + + + + + + + +
    NameParameterDescription
    extern volatile int ITM_RxBuffer Buffer to transmit data towards debug system.

    + Value 0x5AA55AA5 indicates that buffer is empty.
    int ITM_ReceiveChar (void)noneThe nonblocking functions returns the character stored in + ITM_RxBuffer.

    + Return: -1 indicates that no character was received.
    int ITM_CheckChar (void)noneThe function checks if a character is available in ITM_RxBuffer.

    + Return: 1 indicates that a character is available, 0 indicates that + no character is available.
    + + +

    CMSIS Example

    +

    + The following section shows a typical example for using the CMSIS layer in user applications. + The example is based on a STM32F10x Device. +

    +
    +#include "stm32f10x.h"
+
+volatile uint32_t msTicks;                       /* timeTicks counter */
+
+void SysTick_Handler(void) {
+  msTicks++;                                     /* increment timeTicks counter */
+}
+
+__INLINE static void Delay (uint32_t dlyTicks) {
+  uint32_t curTicks = msTicks;
+
+  while ((msTicks - curTicks) < dlyTicks);
+}
+
+__INLINE static void LED_Config(void) {
+  ;                                              /* Configure the LEDs */
+}
+
+__INLINE static void LED_On (uint32_t led) {
+  ;                                              /* Turn On  LED */
+}
+
+__INLINE static void LED_Off (uint32_t led) {
+  ;                                              /* Turn Off LED */
+}
+
+int main (void) {
+  if (SysTick_Config (SystemCoreClock / 1000)) { /* Setup SysTick for 1 msec interrupts */
+    ;                                            /* Handle Error */
+    while (1);
+  }
+  
+  LED_Config();                                  /* configure the LEDs */                            
+ 
+  while(1) {
+    LED_On (0x100);                              /* Turn  on the LED   */
+    Delay (100);                                 /* delay  100 Msec    */
+    LED_Off (0x100);                             /* Turn off the LED   */
+    Delay (100);                                 /* delay  100 Msec    */
+  }
+}
    + + +

    CMSIS MISRA-C:2004 Compliance Exceptions

    +

    + CMSIS violates following MISRA-C2004 Rules: +

    +
      +
    • Violates MISRA 2004 Required Rule 8.5, object/function definition in header file.
      + Function definitions in header files are used to allow 'inlining'.
      • + +
    • Violates MISRA 2004 Required Rule 18.4, declaration of union type or object of union type: '{...}'.
      + Unions are used for effective representation of core registers.
      • + +
    • Violates MISRA 2004 Advisory Rule 19.7, Function-like macro defined.
      + Function-like macros are used to allow more efficient code.
      • +
    + +

      

    + + \ No newline at end of file diff --git a/Libraries/CMSIS/Documentation/CMSIS_DebugSupport.htm b/Libraries/CMSIS/Documentation/CMSIS_DebugSupport.htm new file mode 100644 index 0000000..96cc60d --- /dev/null +++ b/Libraries/CMSIS/Documentation/CMSIS_DebugSupport.htm @@ -0,0 +1,240 @@ + + + +CMSIS Debug Support + + + + + + + + +

    CMSIS Debug Support

    +

    This file describes the CMSIS Debug support available with CMSIS (starting V1.30).

    +

    Version: 1.02 - 25. July 2011

    + +

    Information in this file, the accompany manuals, and software is
    + Copyright © ARM Ltd.
    All rights reserved. +

    + +
    + +

    Revision History

    +
      +
    • Version 1.00: Initial Release.
      • +
    • Version 1.01: Internal Review.
      • +
    • Version 1.02: Removed product specific information.
      • +
    + +
    + +

    Contents

    + +
      +
    1. About
      2. +
    2. Cortex-M3 / Cortex-M4 ITM Debug Access
      3. +
    3. Debug IN / OUT functions
      4. +
    4. ITM Debug Support in Debugger
      5. +
    + +

     

    +

    About

    +

    + CMSIS provides for Cortex-M3 / Cortex-M4 processor based microcontrollers debug support via the Instrumented Trace Macrocell (ITM). + This document describes the available CMSIS Debug functions and the used methods. +

    + +

     

    +

    Cortex-M3 / Cortex-M4 ITM Debug Access

    +

    + The Cortex-M3 incorporates the Instrumented Trace Macrocell (ITM) that provides together with + the Serial Viewer Output trace capabilities for the microcontroller system. The ITM has + 32 communication channels which are able to transmit 32 / 16 / 8 bit values; two ITM + communication channels are used by CMSIS to output the following information: +

    +
      +
    • ITM Channel 0: used for printf-style output via the debug interface.
      • +
    • ITM Channel 31: is reserved for RTOS kernel awareness debugging.
      • +
    + +

     

    +

    Debug IN / OUT functions

    +

    CMSIS provides following debug functions:

    +
      +
    • ITM_SendChar (uses ITM channel 0)
      • +
    • ITM_ReceiveChar (uses global variable)
      • +
    • ITM_CheckChar (uses global variable)
      • +
    + +

    ITM_SendChar

    +

    + ITM_SendChar is used to transmit a character over ITM channel 0 from + the microcontroller system to the debug system.
    + Only a 8 bit value is transmitted. +

    +
    +static __INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  /* check if debugger connected and ITM channel enabled for tracing */
+  if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA)  &&
+      (ITM->TCR & ITM_TCR_ITMENA)                  &&
+      (ITM->TER & (1UL << 0))  ) 
+  {
+    while (ITM->PORT[0].u32 == 0);
+    ITM->PORT[0].u8 = (uint8_t)ch;
+  }  
+  return (ch);
+}
    + +

    ITM_ReceiveChar

    +

    + ITM communication channel is only capable for OUT direction. For IN direction + a global variable is used. A simple mechanism detects if a character is received. + The project to test need to be build with debug information. +

    + +

    + The global variable ITM_RxBuffer is used to transmit a 8 bit value from debug system + to microcontroller system. ITM_RxBuffer is 32 bit wide to + ensure a proper handshake. +

    +
    +extern volatile int32_t ITM_RxBuffer;                    /* variable to receive characters                             */
+
    +

    + A dedicated bit pattern is used to determine if ITM_RxBuffer is empty + or contains a valid value. +

    +
    +#define                 ITM_RXBUFFER_EMPTY    0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */
+
    +

    + ITM_ReceiveChar is used to receive a 8 bit value from the debug system. The function is nonblocking. + It returns the received character or '-1' if no character was available. +

    +
    +static __INLINE int32_t ITM_ReceiveChar (void) {
+  int32_t ch = -1;                               /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+  
+  return (ch); 
+}
+
    + +

    ITM_CheckChar

    +

    + ITM_CheckChar is used to check if a character is received. +

    +
    +static __INLINE int32_t ITM_CheckChar (void) {
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
+    return (0);                                 /* no character available */
+  } else {
+    return (1);                                 /*    character available */
+  }
+}
    + + +

     

    +

    ITM Debug Support in a Debugger

    +

    + The Debugger shall offer a dedicated console window for printf style debug input and output using the CMSIS defined ITM methods described above. +

    +

    Direction: Microcontroller -> Debugger:

    +
      +
    • + at the beginning of a debug session the debugger shall enable ITM trace on channel 0 and continuously snoop for channel 0 data on the ITM trace + stream it receives from the Microcontroller's CoreSight ITM unit +
      • +
    • + data received via the ITM communication channel 0 is interpreted as charater and gets redirected into the dedicated Console Window +
      • +
    + +

    Direction: Debugger -> Microcontroller:

    +
      +
    • + at the beginning of a debug session the debugger shall seek for the presence of the global variable named ITM_RxBuffer in the debug + information of the application being loaded +
      • +
    • + strings entered into the Console Window are written by the debugger as a stream of char values via the variable ITM_RxBuffer. +
      • +
    • + the debugger writes the next character into the ITM_RxBuffer only once the value has been read and the ITM_RXBUFFER_EMPTY value being set. + (refer to: ITM_ReceiveChar()). +
    + + + + \ No newline at end of file diff --git a/Libraries/CMSIS/Documentation/CMSIS_History.htm b/Libraries/CMSIS/Documentation/CMSIS_History.htm new file mode 100644 index 0000000..a906ae9 --- /dev/null +++ b/Libraries/CMSIS/Documentation/CMSIS_History.htm @@ -0,0 +1,472 @@ + + + +CMSIS Version History + + + + + + + + +

    CMSIS Version History

    +

    This document describes the changes between the different CMSIS versions.

    +

    Version: 2.10 - July 2011

    + +

    Information in this file, the accompany manuals, and software is
    + Copyright © ARM Ltd.
    All rights reserved. +

    + +
    + + +

    Contents

    + +
      +
    1. Used Toolchains
      2. +
    2. Changes to version V2.00
      3. +
    3. Changes to version V1.30
      4. +
    4. Changes to version V1.20
      5. +
    5. Open Points
      6. +
    6. Limitations
      7. +
    + + +

    Used Toolchains

    +

    + Following toolchains have been used for test / verification:. +

    +
      +
    • ARM: MDK-ARM Version 4.21
      • +
    • GNU: Sourcery G++ Lite Edition for ARM 2010.09-51
      • +
    • IAR: IAR Embedded Workbench Kickstart Edition V6.10
      • +
    + + +

    Changes to version V2.00

    + +

    Added CMSIS DSP Software Library support for Cortex-M0 based MCUs

    +

    + The CMSIS DSP Software Library provides now also libraries and examples for Cortex-M0. +

    +

    + For more information refer to CMSIS DSP Library documentation. +

    + +

    Added big endian support for DSP library

    +

    + The CMSIS DSP Software Library provides now also pre-build libraries + and projects for big endian devices. +

    +

    + For more information refer to CMSIS DSP Library documentation. +

    + + +

    Simplified folder structure for CMSIS include files

    +

    + All CMSIS core include files as well as the DSP-Library header files are located in + a single folder ./CMSIS/Include. +

    + +

    Changed folder structure for Device Support packages

    +

    + Device Support packages are expected to be in folder ./Device located at the + same level as ./CMSIS. +

    +

    The new Device folder contains the following subfolders:

    +
      +
    • Device
      • +
        +
      • <Vendor> +
          +
        • <Device> | <Device Series> +
            +
          • Include
            + <device>.h
            + system_<device>.h
            +
            • +
          • Source +
              +
            • Templates
              + system_<device>.c
              +
                +
              • <Toolchain>
                + startup_<device>.s
                +
                • +
              • <Toolchain>
                • +
              • ...
                • +
              +
              • +
            +
            • +
          +
        • <Device> | <Device Series>
          • +
        • ...
          • +
        +
        • +
      • <Vendor>
        • +
      • ...
        • +
      + +
    +

    Template files are application specific files and are required to be copied to the project prior to use!

    + +

    Removed CMSIS core source files

    +

    + The CMSIS core source files core_cm0.c, core_cm3.c, core_cm4.c + containing helper functions for older ARM compiler versions got removed. +

    +

    + For the ARM Compiler Toolchain version V4.0.677 or later is + required!

    + + +

    Changes to version V1.30

    + +

    Added CMSIS DSP Software Library

    +

    + The CMSIS DSP Software Library is a suite of common signal processing functions targeted + to Cortex-M processor based microcontrollers. Even though the code has been specifically + optimized towards using the extended DSP instruction set of the Cortex-M4 processor, + the library can be compiled for any Cortex-M processor. +

    +

    + For more information see CMSIS DSP Library documentation. +

    + +

    Added CMSIS System View Description

    +

    + The CMSIS System View Description answers the challenges of accurate, detailed and + timely device aware peripheral debugging support for Cortex Microcontroller based + devices by the software development tools vendor community. +

    +

    + Silicon vendors shall create and maintain a formalized description of the debug view + for all the peripherals contained in their Cortex Microcontroller based devices. + Tool vendors use such descriptions to establish device specific debug support in + their debugging tools. +

    +

    + A standardized System View Description shall provide a common approach to + capturing peripheral debug related information in a machine readable files. +

    +

    + For more information see CMSIS System View Description. +

    + +

    Added Cortex-M4 Core Support

    +

    + Additional folder CM4, containing the Cortex-M4 core support files, has been added. +

    +
      +
    • CM0
      • +
    • CM3
      • +
    • CM4 +
        +
      • CoreSupport
        • +
      • DeviceSupport
        • +
      +
      • +
    + +

    New naming for Core Support Files

    +

    + The new Core Support Files are: +

    +
      +
    • core_cm#.h (# = 0, 3, 4)
      • +
    • core_cmFunc.h (Cortex-M Core Register access functions)
      • +
    • core_cmInstr.h (Cortex-M Core instructions)
      • +
    • core_cm4_simd.h (Cortex-M4 SIMD instructions)
      • +
    + +

    Changes to version V1.20

    + +

    Removed CMSIS Middelware packages

    +

    + CMSIS Middleware is removed and no longer focus of CMSIS. +

    + +

    SystemFrequency renamed to SystemCoreClock

    +

    + The variable name SystemCoreClock is more precise than SystemFrequency + because the variable holds the clock value at which the core is running. +

    + +

    Changed startup concept

    +

    + The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit + from main) has the weakness that it does not work for controllers which need a already + configuerd clock system to configure the external memory controller. +

    + +
    Changed startup concept
    +
      +
    • + SystemInit() is called from startup file before premain. +
      • +
    • + SystemInit() configures the clock system and also configures + an existing external memory controller. +
      • +
    • + SystemInit() must not use global variables. +
      • +
    • + SystemCoreClock is initialized with a correct predefined value. +
      • +
    • + Additional function void SystemCoreClockUpdate (void) is provided.
      + SystemCoreClockUpdate() updates the variable SystemCoreClock + and must be called whenever the core clock is changed.
      + SystemCoreClockUpdate() evaluates the clock register settings and calculates + the current core clock. +
      • +
    + + +

    Advanced Debug Functions

    +

    + ITM communication channel is only capable for OUT direction. To allow also communication for + IN direction a simple concept is provided. +

    +
      +
    • + Global variable volatile int ITM_RxBuffer used for IN data. +
      • +
    • + Function int ITM_CheckChar (void) checks if a new character is available. +
      • +
    • + Function int ITM_ReceiveChar (void) retrieves the new character. +
      • +
    + +

    + For detailed explanation see file CMSIS debug support.htm. +

    + + +

    Core Register Bit Definitions

    +

    + Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the + defines correspond with the Cortex-M Technical Reference Manual. +

    +

    + e.g. SysTick structure with bit definitions +

    +
    +/** \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
+  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
+  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL << SysTick_CTRL_ENABLE_Pos)               /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)        /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
    + +

    DoxyGen Tags

    +

    + DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation + using DoxyGen. +

    + +

    Folder Structure

    +

    + The folder structure is changed to differentiate the single support packages. +

    + +
      +
    • CM0
      • +
    • CM3 +
        +
      • CoreSupport
        • +
      • DeviceSupport
        • +
          +
        • Vendor +
            +
          • Device +
              +
            • Startup +
                +
              • Toolchain
                • +
              • Toolchain
                • +
              • ...
                • +
              +
              • +
            +
            • +
          • Device
            • +
          • ...
            • +
          +
          • +
        • Vendor
          • +
        • ...
          • +
        + +
      • Example (optional) +
          +
        • Toolchain +
            +
          • Device
            • +
          • Device
            • +
          • ...
            • +
          +
          • +
        • Toolchain
          • +
        • ...
          • +
        +
        • +
      +
      • + +
    • Documentation
      • +
    + +

    Open Points

    +

    + Following points need to be clarified and solved: +

    +
      +
    • +

      + Equivalent C and Assembler startup files. +

      +

      + Is there a need for having C startup files although assembler startup files are + very efficient and do not need to be changed? +

      +

      • +
    • +

      + Placing of HEAP in external RAM. +

      +

      + It must be possible to place HEAP in external RAM if the device supports an + external memory controller. +

      +
      • +
    • +

      + Placing of STACK /HEAP. +

      +

      + STACK should always be placed at the end of internal RAM. +

      +

      + If HEAP is placed in internal RAM than it should be placed after RW ZI section. +

      +
      • +
    + + +

    Limitations

    +

    + The following limitations are not covered with the current CMSIS version: +

    +
      +
    • + No C startup files are available. +
      • +
    + diff --git a/Libraries/CMSIS/Documentation/CMSIS_Logo_Final.jpg b/Libraries/CMSIS/Documentation/CMSIS_Logo_Final.jpg new file mode 100644 index 0000000000000000000000000000000000000000..e045601759b70313d4e8035ce9b120090e38d84b GIT binary patch literal 123676 zcmeFa2|QI__b`60d6qF`3Z-Pa=20g-}`^x&-Z!$o%=cath4sod#}Crc=q1wE_@IE9kfGNOGgWW5y4=> zFkuM7zh`CA3~+IRAbovE2!bFAh#bZU5d#PYeh`cUBHe}|$N{$NJM0SE_mzeS(7++! zLfqi?hDmJ0%mBU`?gEi~4Vwj?Zy}MFk0D5K$G4}Nqo)Is*YKpLk0<)1rx&lfu_Uj) zJ;DV=c!wm!#pM;m;R5_mEY zlk8@Mld2uFXW~0`R)UQATKa=S`~oaSPaGtrywA0&lkbT&UU>frftF^?C_cYeBgn;)3(wkpN0+n&Z)9D3827y6!*X`%i_WnXGbg{W_&a4UyT(^#wauOV z!xM7K>$@k`7$71dz%9u(Pvm5z(%UTThBJ}?4o>kgkxHDs#!TSgiBaoG~K{0!V$GZj#@Q|{T@2(L~ zdoKK#m5`!WrM_|)(;yXPwX!yef|!u9%`7~$C+$$(jL<-!#Nh>Qw&(&Lf0e*j_Izw3 zZkKQgSixPmpcVSfD1-H8+=se}B11e>(Se6<&Cl7;Zw-G;TO&(bBC=b;WMBq3FpU(O zfq1ByWK(H){ry(mlfe1)=?>L7Y1IkE&FkgUWnR41j5)Fu^j@l=-J<7lp34TC=MC1+ zYT_YtgfGwq^I9eb8K2i+ z%Qb>A9%<`KI9l7 z%c3eMiLug^(m2yDzpk$P90$Z9;$%xaWYm=xx~lHYn8$B0FHJ9*H!!3wEf&;9mgaSUKbn(&auL#<)m zx?$@U>sRtN`fF%uV;*8-QPuU8H{G4=*oXXShhA+?X*eY|9NY-VyDQ4sW!&g>IY{oa zYvy8qc1LJs(tL;obJg|-iwA$&U9A6SF6oM+Nb%ZzhMuuZdQNt@3{`?P)&dbxE(ju-dTFwRV9Up9Zkecvu zW^nmtGG`_7o__MW607>nai=5c2jcLM4784!w`s2K9&9@*n{)6LJ8ay4CMq>;M}t3V zg~=!8o_@^(gyO8^XcX#QB5kb#!EMl^+kEiQqgJ4Y52EY8zp#1%mLG_x-=M3XHDLjwjRuctHeX8 zGd3GVZ??iWhaY4w;Gyws>=GW*64DWf3!A!H?Cts@eSIfaX_r9StJbZY{WY@)y&-jr zw|cjZK;!~(FMU&sgQ5?6Xha^5`53+{hPxyg#MrS_CyLfByR;rNvD23VNoo?jT9&nT6J6A$ziv3#`JFrH0=;|pvRN#pVd7#-iMxH2_nFZIXd%BE=T3xqPjO9`O zFZQudW6_jWPk3%)x~t}c?)Y~OoUSv-HMc63k!rXr!*!wBxu&#t{mFFroAl3X!;$al zv*+x|kJ6WHt$GC2bZ={>mpr0_J%=jVR{8t;{$71;ynxZ zGlSVhIQVx}3M4rta5eIhrRNyS{3sq%sc6T|R?Oxn`w0 zJOB9u-NnxN$x721pAqZTh&)v-PW2F{(6Pu3yM?EG3VD%n+(2m733mkE&e9?6V(*>i4Q@RK#SczQaRp7<}t*8lm3ZmAUe^ zs?v_WaT_(ijhm}ylx2CG>buymjX1aADdFLK)x}joEE){oJyk=Mt-YP6WQf?WnN&s4 zLupx{WS;b{zd9`uFp3b?Naug*e!5O9_f?p1`yITbu=2=D8uTb)>1q`Xj)at6+ag1DA_lgCd)&%O=n>V-QDv1; z1uf`&=ePC(4>6`WeVqlWVWZa=FEly?o!-Eh>APcgHBj6fd%h=D!EPzEX!=FpG#;|x z>aafbAiKgtA(i$*C^~$+b2Ad;!0cm+G*(Z_#L=+Dcb+SG^ZI5NmPMUAq8No_ma6Ti zfoFmY@eMcIo^K06+DI}ylpI)^t7;hvoY+*YNNaQqKX3_ApOwA1_UZLrZUZt~Orm^= zTQqs+W?knqa_Z^o<9!PpZ#lY>A>xCOn-sO)RKnKz7_1v+X*NP}x~26At~Bjhg!WI^ zw3y8d3}|RIexNt0_Qn7)n`TVsOjR!uDx z&PqS2ZQ6PhrusT_X%!E>2xbmK*$V1U+Zg%^Mg|v_gveN~cQUR)AV22L8y(?^*TRN! z+p2D!^gP_R+BJLiWsiPZRxeNH3eRNU@KjLR&4;yPml~}FLX=L2rgG+-A9zooyWIV0@R--@yd3hH)Qtg(4N(y+%ayvL znNtn-C54|tBNk5^pX%3X7N9F0ZbV_Z3UMB$cc##_CB1QH{6{+@Ew7_P&);%(^T+vr zR^3DzejF4$AV|(UdTmwsefeEi0VQNO`jHiMajYY)}G1r zirpU#h6MLtc|lW*b(b6ENjo3TxraV^<+LTn3b!lYa3eRSU9_qWMdx;rwR*Y!)JY%7 z!40!eOsmnynT>m5q1t-Y_TzwnXQyCM3TxsrkSqXr3QWYZaM*)QTQJX~JDSfV)B1^0QquRj*K*OleT z+^M5ROe4!)xOw^lR#>{CH!!iJhUD`pjyht*p8%eVN={B>V$q|UsVesSvc z>r;EvPnJGCPK}F-@=zJ9yLEZRE`PbN%4{!JA`MFK*7%hi%aG_E)zV5?-6;#PjTas6 zD0ONvkI?Hm+ClDvsNv6LrTy3Uygq2445T;n)O0DRLfJOPe7-oiVq(oD#yMs`_iXfj zO19wCG`l-?>C>a0zB0=+15@JYS0y61liU)@WTTqbOv~#0GuP*I(|VMd1RP94Tl{R> zIP{|ja|`Q&v09RYTiH#=(GrudrhO3>6T4n&${RJ^D@;RJSZN0le4v}HrXWY)bqVGRa&+mGN0{N7vO)f7vA*7+BkY&@SRhu zM=~6oBLr$HHtK>mh6M{sIu=y&ss(vJH0^9_MXBX?pkhSaY{$El1?A^3wzy=J}x@#D0Wriik9-&lQ=o3grU?QpZX z0t0!0Z-J9Y5okEYYjo>uszR&)<3S0t!Z`zVOd<#b@@$A_oI)DXQ0j#WANXjl{a$T_<7rrq`- z4jUCSYat~xrIjbtduDf?;L#pjFDqZN!-nG_{^Wu*i=fl(#**-U!Jd~jjj5Y5)Gm0a ztkWXVe(zp^=gB1U3pds+b;-yqJ_Ka$tBJArXpv%irf%7ihQVf*@gTOod~1(ef`6yz z!~PoHHv=upPu@w6w{LiEQIgNrS=O~V;h}y{(ADdNluyfU92ws9z(X54R?j|J-^_f* zcAfj&q0gAAu5tS}ON^tb!q*Zk4`tS4Ckj5M&_%~tN=|*~;cLi{!b92?TW|2tR9Dgx zU=9l+)d90Ak2>(&>u1nqrG3Zd*1Nfb$TMll2i$HjP0)Nm?%sd6>=fGK!9jIyb}e|1 zY;C1;>$QZVB1h>qc~4b7JG172mjxI=j1}(p@F6@~Zp+`1u#n9u-gT4O~Iz^+&JGzV_FxNy{vJbJ95{Bmpb!T~{bO zHcrE#;8|poV5u%a{OoQZN^&W$Af9ZdxL^2A-=N(Fy@BACvQVvRH(j-NK}qZd2)nSrmoU5(b6i z$MH~!)yB?{O#1fFP}z@IYlAj^$!TpP-V;@&I9F%F2JO_&ZvELhk0O*v)H0Y? zl=_E;^K6Ob9H@P;GNZUi=X{j){s-eIEfu-ag<-9Gw+3QLv1#pfZp9%AmXnB}G^g6S zMkAi%C3>Hxxc2mmy!Iu{dc=`zbE9L}DpYd6lT$-VoSCv;zh)c)7cTMKeNCGtm=x0z zeWU+CJzJN1`R>mJ?j4*mmbUzBBSC2{$ii2zP>nl{SGz|y5`uU#mreb!A(OK#whF;h zFPW`^ht}HqcUi%wrhKjldBh-Bk%-}~mLi*bgs+m^mDIYfg`nsVi<_mxw#p7us%q#9 zXAjn_2ePEhV6r`ioi}Af^~4J647ykD)@E5371$V6OC)P+g=+WOY91ARkp8}O!U_>S z6|Y=0*j^)K^#E7i|4A7S-NEt}Cvn{zTxsV@oPX-XG}(x}Vd_T(b#td-K+? zeu`FF37D3?Mb1>WmMmkkcnmhyF9sjDb>OJ}GxkE3pc4vPVa6v5QfnTnwqadT<5o9C zi!eEOh+>_`N+H`)zN;j=rejoGB1zw$+P%CJ%|1Oe;NPk)lC#{?R5WYXY&vbDpAba3 zRQu33sMqD?q-b8fQfG{BLFHIKyUoJJzL&#Oy{j<>jCEEst3mR%g|@0W8%WpmUVJZp zR!;ZFvaF=2I3#ySN1tTR_L|_1ZTBaK;72?~KyV#ZQVsBM=k-H+qg^~v%6xE9aXwxo z3gPMKf^t^oGd0l?k>gWUp;FqdVW4heX{gET6mkC*SHkB^svn3%u6zo7im#D*d4q*#QA2xYq?V_*hrN&JmxmAF z+>qdf^i~ohga84*M)2n`__!e4kUpXaZ=}7C=l3v_N@yPti}Ozjx_UZ%p;Z$5>PJQS zw^6$IAU)K)z3l_PF+!tb`inUJos1Ep`O1o>p|QbHJGCQr>T)vT;y-iv z7x911HrmJD2dU+5@BE!dKu?gKGtyfH#Pbc@W?AeT&q`w7GNSYi_peIFQ2(%}w@Z*G z%E#W_2#Nld+;=hjY50GB+5APe2qgn5l)H+ogp$}cKoH>H)|UT=C1K$0f&}H@1KRw5 zPdWTarU(-MR)Ik|d;|YUMPZDvcL&|fe@`*|E<@iN0{kD?4$Qz9M{g_PsRzAx#49>tOO_4&-GIW@UCRC?`+5FC*`tcT0x)hK3r3 z1X^`ZN90j^59BwxpJp}xJLCEHSDEu2eI17XCKrSf`Z}+2 zL3@hWOa68~^|x&N*)aZN6#Ctait_vP38eUaPW2OZTZ-G9nt0oz(C*t~w(<7Nbh`ll zqlN!(Wa%GQ5+*L5&i4P|qW_CL{KI7Zqc8Zwm!6@%nxm^P+6U=K_)0QDB7FW6JD~qr z1_`C~?c)o;;BEW!LR=JdEk8aq{smeNE-4BJ2e#ny@^A@RxV$Xr;rm{lB9R`TML9YKN1(I~pmry$JOWXtqE2{f{11|JWb>UB(E-@DG|` z{vGqCDEt4)vGzyt{7nx3qBH&98*Kl@F#5IY{TD;>KWwo5bLj!>f6r+9?`82XYRJDe zkbWDJ!Ke(Ela>^h_^WBy?*`LvHHI(_gBhHhq=Y;i4CwN5{|Q5`mzN_LcK=KJ`oGHD zKfJ&HI!#wI)B#IYgq^@2Q=zY;l(@L4#BX+${%*SO6X^BRiqO{>{&I}@vi9`T3d{F3 zk-tmhkGy^xP=C+r-^KDXr{BW=k32M+xwO(RNFhNv)fy(I|#};K>dX1 z+jDzIcJHB0n(O zaefBx5ab0^X#Vsf{z<Q!o7gi60?tf{4IH1i`l72#QS5wi?hEiHL8%18u2oUjpBR zyb#oYwxvNrv5g@}3gCzie!0Jv0YM?^=eRfsuf#gQ`63O%D@0INA~FC^D##Q1oRzWiK)I26EFlH9S>(-@c6%-e_~&6cN0wu6Ohzb;Sz-Z zTZ}&18TlIwnZ3J@iM{i0aC8VH2!{;t(LoFG|0km4KqH^h`DJ-vg}++Cc% zNs9hU=E0u%7c>Y-?uc}<_jUIHAf+GJx%v}w!j8i>`nTlN4$kVH?w;O1376qZ{D-u^ zdw?L&QBM>>)|5V;UIxBCXynfohsqsPq(5M396WtMh57@Y8Wi!#-;-~*$$f-`AR2JP zR2R14FD;j#g7~Eh6K~TIC?Mu_;1I-i8{7v0_zrZC00c^YY(Pctmr@@XVSXv~{Zi`t zrPTLJsqdFk-!G-UUrK$yl=^-t_5D)n`=!+POR4XdQr|D7zF$gxzm)oZDfRtQ>iebC z_aCR!_hnUdH(2b1z)k~L`Xnra(nD%sqrnq$02>axkRfyuz&_wcZ$n;yg6UsS@Iva4 zF(gTd@Jk9`_BP1DAIWW}fqzf`?5pA)3N30+_{+C#y}bZ?FEN5@9|Tkez3d4pbG!~n zu!^tDH(y=H$Lr##%x5mGFRt&Ujy&mdILI4m9CXwK5#)xDcLW-Qyh;HI0Ull+NFRG% zpmB&oD+DO>ZAY#EU;piT;wJ zp5D%4U;|xVOk6@tLP7*kh@b<3VpM<#3eEp51`Q+{;qBr@P?q8)#ApvTV0@JM0K41y za728M)eCGLY{%({5JS2nJ%ElC8psSz$l8}Y+k1T{{!`)pM5wR-_oN;k-=jtQ7$JY; z?N1{{6PEtPfS!w|uQvjmn04a+mXz1Gzw`U^61LXN7+r zHNodAsUt$cX#O%Ek)WNw_pqFU^wokrQj3275zxfBkpXiYq zU_VKjkMNg-BI0lnxP-~Kza%{Vg-Rc2xH<*?ODa$=9qoPW{{@}CzJi7)!k19qIvUD+ zzP>Jw3UIjiA$fTz2~7z}SvXunLrz>nGZIa}O3MgKNXvp-4&3s>5;79P60%a@1~@q>VQ@kQ+;9K`yqu)4guINfq&Qqy z5-taBd0}Y@a7#)69Ee9&9Nd6bmhdhO{J||LB`Kk(0gf}vN=Zp;YDh`SNsGh9WyICR z;d0<9DI+IwNCW6UgL z$bXwjkcf)8hL2|%SsUNvY-%v3yMk#E)U`)xP-9sa)hw*as(QAIRcHm z{5Fj|d>bajCchmUXf@mLc31)@65?n(CH8wG}0SXO-C(nPY>Sh{#C){_bpZG5d4tDAsIQ)Ql5`j~N9w;Ag!dHQX<#Ar}W^k&I z5*%;@=LhW(XfJ(ZEyB?^2z)W{5>s4qYL-;)ax zAxaSF_v>F0e5d?t;HUIN3F&?Rq~+E4ax#*aP^%H(q@%AlFPiWb#w+ssO8h?#_!C<{ z@gWSBQjp%@AG46WW}udVe{uoEjdFC^UM+G#{pQ2_rx^Z+!G4N?0Dh_00AR|(LCkid z(2f>nh>xB?x&NK0)-UAr;Z@a&7h+@Di5!z+@v@N7= zWWtN^_4fNhLPB_uf}_v$5HrLMEJ*M}`@peh2}l-F1jjQqAzjD-GJz~1TL=MGBt0N+ z$R9clorS`n2OIrIp60=@}Pb9xbUPsh zMH|Hg#U|wr$~}|{lm?WJl!25nlv$Kjlr5BFl$%rxRDx8>R3=oeRA;GfQWa9Ypc0~d}*R-a%djY^wKQR($emwJxF_; z)`vElHkbAp?GWu}Iwm?%IvqMkIt*PhT^U^)-5fn7{T_NXdRzJ+`gr;h`WE_`9h5uv z?oi)hzaw-<@{YA#;1`HkykqmhZuNgivk~8jQ)MRvIyug^r_>6IsiI|C> zNu3G7be<`T=>^jmGa0iWvktQ>a|Ck%b2IY-3nPmZiy2D*OEOCh%R5$L*1fDctnREa zti`NdtQ$MIcB<_}?!3ISaA(`jHMU)B2icHpSJ;Z!I@vbZdD%7D-Po_Om$MIYkZ=fb z9OLlkNac9JF|&(#m*OtOt}DBWclB`+aSCx7aRzf{ayD|VaB*{Kb9r$kay{dk;b!GN z$nDB~gS(b{l81>$g~x^G22UN&6fX;}8m~L=P2T6c3%faYAKvY|JAHTa?oB>HK2yGP zd_{bN{8apM{7(Eg_@DAG2=EB#3!E0n7wFqVxkql#$vp{s>i4Ye72IpSH+*mT-j9N8 zf;xghg8702`)K#6?mM+FV_(O9vi)-V-S(&Ke=9^JBrSAOC|RiG0MP-N11<+r4zvoB zf`t*3aE5TV2#tuEh@VKl$a_&%(IcYgM9W3z#012Si(M0|7sH85i@S?wiTA@9;kxj1 z@GAJCgpdS6B3YtCl2%en5+hk5`AO=46jCZxsz;hhT35RzUWI z>@C@DIc7OSxk$NJ@}%;I@{t@2KFx2nBrhU&;c{)3JO?;M;^+pp%Tc28~YkoY0*L#2n-)D_f2)E{dQ zYiMg+(P-9W)HKyh(j3y_({k3z*ILk))(+Nwe3NI?TGuM$jg}=Cv({t-EcF9lf2sUC9a36XqxKPHfp5*k{n zn(LaIfm@Cn-rd~2$b-V;ghwTc5#@$@?#b;L;MwYRz$?t_-6@4raiFM34&z^oC zq85@K3JY}zeTw17T)>Q-(LQtcEY(@JvrXs3&&8fwK5u@$>H^n=GZ#iLYG2F`qYLv6 z>kd~8PrF2N$>mb>Wy#BlmvL7due^y6kBE=hibO=diGoMnjKW7dMK{OD#H3y&yNbHn zbxrl!-B^a$pxDvt`q#^D@ZPv`V>!+)?sdFWd|Cokf^WjRn@4U|Bnl*6P25U4nbetl zD7oks=dH`P)>0f(+ENdu7N&8fMWk)qcDdb?uAN?%u{R?=lPuFOb3Dr|t3F#UJNFL9 zorpWw98}J`yGD1P=gQ{h=5gl5;>)PoZb zx{CFRpO(m#6h7SZ@Kz~P>6J2ASzy^h`N{Hk6_ypPmAaKrs}!qBt3|7G9_@aVT*Fcm zQ%hBQp%z~kRJZcj>+#GJ=O?32?Vk2Ovv}6={Mhs67kV#Vz0`X7tX{3Y?v?VZN3RuL zSH6*ZQ{EucP}V5jSlT4rRN5@lT-GAnQt?*)ZB?sMYi*lq+mm*U_Lm(x9SxmFJ6pR< zyL!5v&NroE;&XToL~W^c{yn|nBaaK3TDVqxr) z_b2>fGBL05;6p~;Qi0He=zYE~Ett3qo84$yOS)m_Rl5~NU zBrvUo$cTWYpYInr1sN#`B{3DS9|f!=L1e@r{qLT@i zW8)JaC#RNIR@XkSZ-DF*>^hMUlai2-kdcvk0G1hmT_;jF8N|n=c8pxYp7|8Tp|kwg zSd7vgSS2YR2s~+3_g>if{+tvr@5F}C_>@t+SDM{KM$=J{3Vr^%mJfknQ>3q%?1hWl z3@`2HxRLdcVBjh4i-o6s+U8Dj-;F%|u<&%);$*<3n|CW-^?dv+uVd*FcsVh*@^$az zx{!kIao3?|so=TXrabY-UQB_4Fn$s?#Z z8_0TJ6!^Wr8=*&U;?r1uLd;uKvl=b)L-FZ(uj)Y2b?WcLX z^SYn&Do%IbfXI_gEjRJ1^TAM&^7z;;Z?hrAN}LOuDIUs;j>1FiQ@aLm%eX#E$vrm| zquwvVpWe+`N;-Ute)Ymu#oPV4INy{bC9fW)zHR7T0+Z}1asTOokMUCp<>r4U%aVJ=bS5xm}o^|_T zw$_!wpT(z>4dJ1p&}m$)l{uEJP<5z15A(#gA#M2;u%^*$QMI~9V%cwHYJ-q_(W zzp*wyJUv#5X}vOvomE)d+G!085*@iXzcm(7^v77SKVmKV73+Vj1QN8jrZz5)9k@DK z`|8elH9lRXJ3WO7uTNzkk?b73x_f7Jps2{Q?8xMNbfeXZjNa9{y@xRN2XNde5%cIb zFLG6dP*gWYil{lT7ZbKr6Vye4nIa6sn$lb2387&6q9hyYJzCSfBV}Rx*(~dVkssEO zY8O;n8xK4oJ-39&7YnFVn2d9FOLjQ@Av$yQc^gl23bjmH4SCtFhzwgDjDrD_6vqvo zGV+`46IrJpfBfuQ?&r(n)hdm#@RNBvyyIok)b7VlAM+)o4or^jxy)E-&W5}1)1l5} zdA9V@8m~w4cuS4;h=)7 ze7MQ3_Wo`9Om{lZZw3#a!-kfZObzwmybx3=kO~nGJr+1a7Szg1q;s2#rMZ4szrr<{ zDe^|-9?nNqyD*Hok=G_1HIAric6T4fcD)?X-r%Qyfx8jPF!6~;h=NNtOsc|lpfTS?qLhfkTYD?RFyYV? zhFdr1Dg&^hR)2p@e&}=g)!zNHmt8UK()5eRL)+ix_s>3hQa*s9t68eqi4`(2UvhYi zhqAe7QlF$8Rwf%v8L+Wwms6eRaq%puEQX7WF}FKQFg!867R$V-XK?AI_ShRI*H-z3 zHg%~oTuX6NcTiv1VU--ex+@f?OF39`VvC;Ff4H5NpoVi8FSH(0R4p3UAE#Ede*5Y% zE586A)uSkbr&pR5r%E=d*I#V~_s2=Jx^pG>C`T_;!>+r!(x#lr)#IYqQL%L`c&sP> zK|k``<8z`Y5}V54&W89#V^ncvCI2Twt?(IPJzP({#d;moaKWW<4Y|UDoc%tV9Ltb%z`|YcqQ>tf1 zH>csA?PJ;0OSi6XW$?WFNGUsno2l_wr;?7@FpsQXjX?6msj8$d*fozNrtT}3t+#w1 z4Qvrvott?zW&6^RHDc%0UgmtC9ARKU<>+lob;csK`HWc7Zjl{IZ(8hB-^1y}CQsq? zgmG)FvH2C=?9}6}gXbqcM4@U;w*vX!RLF8!ZFPt4^W)N&kyVZ#z?xpa3x8fWJRl^> zsvA#iq+Q`R<`i@;J~0qGg@+y-m4Cp?5ZyjEv2X6k18aSetQ_n{O(`Badhs!jY@5Oj zdCz&V+0;z|zqN96MUQ8On8^AK$F1zkS%#|Ff?+Dn_dKbSpP`gY>HIyBpAu*G8l?z* zN{kc<5jAGHmL2>tH~p1igYq65#h%_#KV#3LN>R#pl~)uaTw)J%npz%4@^>&8YB%~S zAGbYj*RLLk@a63C7R`#4G1ubGd!u`Q{hapE(7{P&d3lg{D5GMSgI=fp%pS?{Pay(tlkICk*f#dH0`3f?WE zHuZ={bGEeYFFD1+4|Gx@$?itV=98 zwir~J@lZQ3c;=KayxP=V_r67i77Tv#c&Nv%e;9ivcx_{Hkq66znYvhyb(tPs(AZSO zL;B&^Bs)yMEEqAvl|IV?18KnWi+zzNW)%iT%b$|~qaf4FJXVHh)di&LJ{XMSTzWUW zg~LPGu$mf>3V9u-Fl{%mL9vFrYmMnj1vnCelDg#{OmFrYw!|k09;m?CCCPR3*2I=XY5K4#pStHvz^d{Ui-{}p8LrQ#*mw*z)tbE( z5cyy`w)^%p;q4yu?85 z#_Ix(4~sV}jzjyzA6jx|>vfDth#$(QVU)>*@j{2St5ET~L@vIZs2m6|gBu$kOG>)A z?`asq?1VTycZ7WSO}|jn-g#LpZoz6+=KX0Msp`qDX^z#Gh2w=&w}q}7PqwQ6QEW3@ zxT@2@0Fd_ZMmn(Obv!5n^X~GhKQ5VmQ>qr2*g*lg&;>4d;xHK8Gut6NG($XG*KKeW z4}IJOX8S}{rwu@1oD=LF-f&l)Y1_p0f{D!U%Rdwk*{FcTGv~2}6~I8Daxjh}%^5R! zADD>Io8NQ-#XFHkhKDBBK>X6P^SH;#n^>Q9dR$E1%Arx*!d^2lUUts za{5vx&cMg>6&{*b-CzSu4U5frF4)ZrZmyPx4&ruUM{purJUEp{WYqI2OP^WHx5yVi zZ`sx;TsJ&#KVA@?Sew7L2M@)(bLsBobLq}ESiKZi820|SvDDqW{nxS2Kg@+C4N zljYrB;U8vdG`EK51<_zoSOYzmG8Wd`Nz2mLyj*chX8p22X$_wfXPP-@y?N;R?8oO8-dk;g_hN;eSA`mI z+_z^N<^zjg?B1oiXV8Epph?M#BjhsI9_Kk%kGSO?wj zqoO2UvY#o!hKSZpCdc5=JR99_1F-Yu97*27z#3EP9Z;HF6q|1Ay)#LkVQxMCOj(6Uika0wfk53^Dh2>@6HFpmy?mQtD7-Z4jxyO=z#xZ6~nP(Oc z1vh1A6Z?KhzKJMeD`Z3%JQz6>YRcoOU6iAG)9!`JR9@EechwxUxs?ZO_vNm(I2fg* zUrP#X5N3W@N%b1pZz=RT#pj+>>C&6VgVcUjF=ckA*7Z*Ngbky249b$+3~<+Z2UCtT z$f#5mj=p1SvewdXi;6wqri}F{C+DRo3_tTB6_R9Pdhm`#0C60_m*dinjw9bO$~CLuLkinW(A1G&3Qop@PM zsNE0CQ>Wf9KVg)7kS=9P^58Z}5~L3azV(UUSnc;Hel+0e*y`-b^qSu=W#1LcC}vhE zLw!hK0ZP4uhyKuhP8h7Te^A{}!9$(YF&ph2%D?TaeCI!-Th3#aK!aT6SOsn91UL3~ zt$OYMu)|f)IlOiEqvy3atFVYW<-=<)b6nd;^GZHp{AA;YHYp_9Okc!Yx1H+mk(;U= z(WTT(mtbz4f*8=V5y|qHMB6bL{b%(j4<*c8+sE+`*UDO&{@yN4UDR+*Fm`=a?_;1r z;6|lL+>!H7Qbl$*kg66ipXkUxEuAfS#ODO|(gx=WVcCGCaBe;AQ{CuHDcjuhnOoMu zNhy?ylBlfBWIsybdsjP0?oS$t7YT74?q%OM>LrJm5v*OR6JDG=SuWC~au<`n$JXF} zUbjJmrC~@=w0zxQq1p$(0NFttykZ~jDK9dqHuAC^U9FbUnRV{`XZ{$4xw7p_ zHU3gmhoeKzut{C2W{W-gswiF~ z^1<68p_v{tZPWY03~EX}A<8$>LPT9%8cwz2+;}!R-+I)p^@rVQe|7(2;Q^oL?c=9m zc4g;hCIibcDTSSPC`p)z!%s_Q=WUojHl&SktVSh`xZU!e4AvxohZtbkbA zT662Aowus_#PW_5Z6)$!9=+Ay1J`rV?rtN8m9EZtr3ZU?ZltbLAjC zqX6R8Ic*&V8+IEm)7IAW{F#tx+}Yi6XDj&6DaV{8A)-@Ad_qIK|E{w4T5WkZzV-VG z#M=Wy7~YMX(bTsIfvb1MbDp-!#tR?a3za6vc$;eg>tJECGZG3WjzUo#im^8q$Y`Y= z?CD{c->QG;-FdBMu<)GV`(p{{t$mMluxCy=kOfgJB`7U+@AlBIM(=%h|EVhjxli%^ zEe7ouF}Y6*TxT+s-O?7#*YEfjoigb@QT3*{Bzptf`#y}T+S)t>d4lGNa|3G1H>`-Q zEjy-vlvX19jZ#U>v6r>96g&TDQr{{#7oSpm~tdnBBbyfuL1;py?xi%Kpp!+f_R!88Iz^&L20}JKu zy#Fs&;d~~-n#TRckH$!s7XypZ&O8zwhRFM!D;AGZXeQqnXxpg^vzWB+-;hwakEe4c*{x6vQ_Xssg$I9mB_4OTj_GV}S zRgKnkYZOAwcqyr=NyHp~r-SQ@JUy^5Em%{%*}TMEFR;sBksoEHMIO0NG?P2)y)zW3 zl1R_A|9#gpWkg>vaivVCWXMY4#LKyw2R96Qi|QK!_vf*g=F~fW{6J}W<&Duak*n*4 z=##H^TJ1Qh?O|0mSktRn;o+|*oxi~UYCVk8G(71l#qzX*ynmw1QMbN=wL-fAL}h;# z8&aOU$wr@@3&SW*qf~#0zJxnQfw1Ct2Gu^STN{#p`6fFBbz*K*_-sCe3DK~!HJEj#CSS)X51IP~#>4i`5M zk+DYB`vu5rPh%b?g|^rwXa}>$oM(y7c-c;^rmjyb<@A`9f!CPdYSUX>xPI~Z=J~=x zf$GZCal5FV2U{)l_r16rFUH+7lZo&0ifNA`ib)}7T2eA-T(PcGQ912^6B&8m)6c;f zIx<)AB1YQhVX32ugNzK{Z5Fddx8ned)M8VN$#O4H)U?R(KnfF1>vi)=4HYfbp8YqvgCoPm z_*tbEO*vV#Ni|_6_6OM}S!U@qxqe>R_HkB`IbA-d8qpsuTx2&fp4;!sq9^lydaH3o z+DhH)xsPy@ikxmHR~(#|p}XyK9-@sUaip8+N+9BvY@ul-lSem6KhrQZBLZ{0=z5Ss zYj~pxJN;GVmhn22XV(OxR;0Yd%*usQTvutTbT-KA+P;x9jAnU$wV(SJRf}p3R%+<& z-4zlpcDD0W$uzlNLMv)}3BVhSFTEBbwHy(8Kbd!xBJcL@ZawlSiRpOxWYl;;v2uf_ zD>q&ENYtcJ!SvKU@n>?<#CJH)w)FEGy#XMTQyOn2la1nH<*uy_t}0z4-Ky$2WEgb%n9~>bEZ@4g2grh`o*yO!DrXQ z{N_B_0mUw{?Xmrv;JQ8z)5#tjQe~-ColuI9it4mdXEGIf=<%VbKj5y+kXrw9UEwI3 z%U6pdT-+jvge8Mx3op*^_nukF-8kHVy_-(IWZZqcCU-z)cGkynBv^?$U4COl^jI*lC&HRW;lwxE_PL zH8(yGvg@tYxlB*@En3r~^nt5nba}d`yJp`Q$LGAUU!5}|(|Hi=6n0yQvE!hb`-Mw= z0?avEnY%(>u1U;|OikF2O<(7_;dt-*?##o_Xzo6Hf6(i2!?p97BTwj0V>bti{CDAw zen=ia?|Ly37y~~X>(3T2a_YuKeUsufUA4>rJ1)Uki+Bgin_#$z)d9soSTQG!b_gYx{ygeI-_Ak z;)c<^jzCT)tt5pijy}tT_C3m`Qg1#!o4Thwc7f>`nnqS;k^Gz{%{>XK`*-<2s1@1p zJghFOdstRmoPsP#lJ@bHHq(a1on0c?q1|x1{{#8ftI!!d^jy1_XY=KFNZiuSt^CdT ztxrvO$gKZ19s=tTZxX=Ea()#a%4hV=qJP9R9aHnIE_Y5~1kyflgdW25oiD^gYl!Na zme3c#u)H;B4pQ&&5KW4c>L4{vR|%N1l@h^>wy)fGespD8ZX;cFTx9EI`QDwUCaQ>U zONP_*IHxi7)WlqgYnQ0>5upuj>odKa^V#sleR#L|i=gYq0k;D*jxHhQD{aTDpP)}Q zJgQcSVzInqJeYqrTJp2cf1={Gk?sVntRb2c5kWL#mRJ zB|vveUq?x2McE!v{c2Vq^0<~jtiFz*Ky1ME@t_xTHRiwB+qy^meqsrl6^l%4G$WUd zeKTK}5TC(u8f<-lv1xLGpTacRP>yl)1$R-@8{dKGb=wq0CZu z1&#$rT}_hG=(xRdDeXeEf-6HY1xXl_e`)C2l3;m4e3y9w>GO_}M!n9mzI!(Cr^belPGBGZ~w{6c zr+c|hTIZc|xi_(QiT&RBhdw5*i}hjsH{;@U_Wv*T-UF!Vw(S>;ilPW&LqMt&>4H?L z5$W(CHFQL!g8}KCCC$UxO6VkXLP%l%&vWMW?EB4ryJzM*XZFm_ z4l|h{LlW}OeP7qFU3Y{S+!zlAm<6eoP*RqE0Hr1oes8@b3&h z)3RCs{=@$jmZtDIh_+MDQ>8nAsMXd8dDAd+f7AZgV#fX2O1o+X1kD{Gp-IJD#k@hC z{Fn)`O$JR3_FMK366~z+x>kuh`4=?{tVX6Zy(X)Q!CN$`!4ntIf@O!D zApJDQ?LKuR#&I>-uZ?-Ub^6-ipi6 z%i1ygor^V-wf?<=uQY%TfbkePasj0%_*(EcoDF*Gaw9K7`;_~4!ZUG zCJX#t(d8o!_ux!it(;lyP19!S`Yr#*J&?lA$E58NQvFedQAnu{F4_IpU2X}jP}Nm9Pa zvYm6J+ym&867h+05}>DdaS==5rz1xj>S#>=x1(Jn=g!f2)=oZ4^yk7r2WuE(3q^#K zCy6DzD6WhbvL-A*!_OHS&p+UI9qz(>*eYL(HVxf&BSzg4iQjtqEjHsmH!dsxhW*<0 z=lZJ)>z{V(ptep2@n33m=H8uy?ldNu{4VE%>}EI!j^uFaay+r z(tkgeHA{_2NDwyCv)n)GPdXZ@%BAp55WApH?Jd!QkudH2<<(-LR=H)%-?Qc)mVNQP z3XrtERH@{QUt1Y$`?-p68c&m8Xh~O*gII>>ph~%m^C+^pzc8_Nsx?1ikIs$XN0zw4e>Al@hn429^K_zy} z;!z?)sw2icEu#u)ig30$sr=pD8*f!D9Z6#zGPr_D0Lozb53B6L@th5bdTqxT{11o{%9ZX8gs9t$**MnGd9fA)pjRf#Z{?(o0>~{k*=a z<>J{U{wcc5-J>DRKT?v7{HSzL->{FV2X1QbH$ZB2nW_bBbuUtX7+^B|CYuA?h&{Z< z;v+xgIf(DY(m6=|6!;$bBcj{%E?{A4F#tCO9N?2=pGjqWm~S`f-=Y|E+c;gP*j?%_ z^Nbk#ziQtMjdwP-heXyDCBB`&6u-9dpuIKjPHC3~2biFR9QnWt7Vo7gihsk{lK>>=pvI>y5ptIZQvoQJ8t`HLIcP$H zSniRIaN8x&!H+MTgB&}I*MG_(%Qv+m&6_&*X%e(C55K51iVtbZ1o8HpVfHHvkfLe# zX*n(!e~9Gb^d&-1@@M9L=&cX^I+4>`6wGmLl4JhB{?X^^)2_AFNZ?z_x7lQWule|> zAY<$n1*~~s%U55qj($k24mXAs(7CamgVff$D#SW|X_@8z3B-g@wT+qgv^Az^1VWw4 zcc{8+t2brRm?lH!BgvZ>f(@(Ow+bgD#<8$H&t#LL?amC!r z&>U>!G1ujH>gDNarm)T+r+$bjfb4_iDa&N`!1xE`1(8*B^ z#xU;#gI!D#_kDc}eq#1KYF_f0w2x70edcePmBL6il7g|$#=T7UL`)xIs2y)jmE4t* z>eQApe<$(R=tHeO#RA$9Rz}bU+8-!VY19kw(~o%ebCCD^aLw>zSU;i@u*evfj-joo zElVW*PG?}vnokpr5-V5(mf>are=b{+pO)H8l?hcv*RAqz#J$opm@a#}V+s;bqA<@Z9YqM9(5}XHLz4F>89(N3B}7*+3QhNKKEb@xG#m zwfB$Z-f;)r8#yjGteBg@mgjTxMF~aG6mGhrGf%YEDN@kb0>kyViN_Tz>PD%l5$UM% z7_Me<^s8#1+p5Y$M_*qbG6CpUGLsO9o`w$KU-1p;=;(;lCu+%ziKy|9^>(LyO0nTc zgn2(1{5gpE-Xg|F!r{{{G0)n$f9_HYMciDZ3D|<2Udqqxl(hSfVf}$PVxk5UE^$; zbbB6+*Bm_A+!t2f$y?RFS~U>+OrR)9vMR8?88IvAbcX5Y-AZXRIIbKHYT1d^@imm)_DL4P6D{X9bZb186`eg1GSK=Ek zHBi--^jjyqfq8y0;8k<&(L|)HX6UcHevMO>4(Fcs_bAyROh@gyY^!ofLsQH6ff}pl zCE|`MOs-C2c8Fx&GsEH`&V%AddPI|AH@ao>D``otSG!`2x~g* z2>}XP61qrbcBOBfPHT>xj*Ctb zJbgEB%p~@)lh?xvWsGn&a{8B&0#^@7D;NpU#oeZml)>96`*%KOlWkgP+WwA5+(}gD z*1m30jnFv<{cUiMER2Dfq+?OfmjgN`@Ph2kr~*4gM{12R+e+%S9~+9z>l6YhCOXqqa0uEeJ0uUBo1I7IIuMVKiqF zx=Iz2ccm*MD>iTM%+zoP%Z+V8E|kY6QT5$`mJ^gGScc&Os#sc%m&% zgm?(}$C6rqKi&WT?Ejy?GVkL_+5p9Hv>y~5J#k`IC?ixcb-YT+c2L%_9(X03)EWBn z+df>Iwz*kgU}uR-wN>Bz!LhLtY(=#T=MJb}9>b1nnzt%f?!a!(Uxcl=G~@P2MjN>& z*aOq5{JhdWcjq^h4T`G6S0;C&{6+O9HrnondA(%AYqiAr>Tq^<-EyAfy{Jm=EZ3|0 zacoDrvyqYglQz6ou{+>G6t%8YBrXq=D5In1(lb)hxtxP4?l^+6uYdk)zjP#8rmsQ6-v6?DbJvag@n3n^ zrtin6IYvylGvN6*g8xSSTivjf9@s7^W0&mf@`kW<>MLgx-j5QCvq1$93iD$^ud&d# zKS;ZNNK$%7`14ouK6BHlCwBKurLzOG1L^W!NKkrH-^lju ztfGXZ*^A@pG0f=R`H|5s%2WoXv0E-zMQODCC6hk$vA=|Wj~aM3r`k0CW4jMCxZva` zD3MUxYHocuo=TK`{4%HTJ?Pz|{dc939IgPx-#kv4gx1e=y|POReT++7>zPPQ#9!f- z`c&1ly?}LVUT{WLe6KL^;U@6r_36J19M@G7G-^ulVGHH7=S&{sUU_PaN>ILjpY6S; z?Q77bt$@51ijNr7WgT5D5cwUPJM=Z0BmDkF^N*k#9G^jQRk8( zZTZ?4CuDSviwuQLsM*(4^0I@ffiDfzVUtoMbNO?S53zfvqrADvFuSd@>BIWR%SA=Q zLcv&xzb9xPE@-m$HCrDm=d^wLyXT;GHsWWg&8mei$1tap zj8~a#*JbBZ@2I*M$jQX#aJUe;$757(l;z>3p`{dZJ)2ZWDz@&p;hlxa;L36%_kei@ zOOdGZobYwfwfq9<+!xf`wSvpBE=`>VHHGUnFL-s;SmUo1-D2PY#za2CoVCG=+s>gt z6H3I2MkEf~i@upS{UFTFU6p1*M|>BXs-KLxzJ2qbXnLlQPXxLxqYFc67Q~oxohNqC zvf!m^L>s*!6_n!xAN$SZn>@?GJ=4e$P0sqgc}07ECpwn&^w>2i9a|5vkcEolHr?O! zG!tjSLe}8=8%>Shtv2h7KHI#G4jx^tIWm?qpk{nuQnr~}`u;<_$oJ)L?p33bvmljr zd?+M~u25lSi!R`UzQ=5v=|>E@0+TBiVKh1Yz6+$R{Dg(yqXK*g7-6+JGqBV5;s_E! zZVVg63=p0E>85kgSSR?b18hdX&%(xk%)&O+sEGwHJajsLE!M#PO`>e%BdJRlVb0px z#GeC=&8z8TX+aKr3|?aDc*te3MOwn%Uy?ryEZR>9{IRe-*Mz)(4zhil0Q;#pehxBf z1qA=rN2|XN)+Nw1q;DrYCFdZq-#q6ahjY+C?h0W`f@Q%=MF+~d97St1<#aonS^*P1 zp4h`s9d+B-Gh)wd#;w5FlgjUxTb18z`SwS&20&od=waI|Rd`mxze8)`L+w=!(>KvW zf`qlS>2cCcnRCzsvvJyHm2%BL*#B?hT81X6vS39JI3)zG9N!Cm4O_Pd90zB-(Y9FN z`qJrR@YW^Lw675Or=IA{IVeh6;m+MTj$tqH`A~270sQGs;MgMWT1!9U2YuwAvJ}{)D`0wmj$}TftH4 zJF@TIYh6$M6W{F+G~J0(G1;L?n?B_=agcfb6Zr(%rb5N<$jJHFU1+RN`&qt?+V;cf z!W8BEtI4yAJKyoc0kz+ls+?+&6(jsYip3z($BPJiNv?2?#H=>1>Nh9th+3#LQ<6i< zRLcJM93}GC@3fLNZW;mN6c@*FK@|+WC6KqoG+V!4(|tqwjpvdTbjM$aD}t`Lx@|xt zx*&!Qv-l)0DD7Fr(7UGg2WxzGJGfx~x{nv`8YZ$9<@WZ2VHj0lcn)gNhrdPLm^`!!2y>p%7P93|K?wUx+Z znad#r_xS8v#&b{ZxAY=juT44*zBT-n0N6vmx2bW5<-hScX4}Y?wPC{(x48};62W+? z0e9*zQ*yX9-}w|a7={@pC^})$@zH89pplTO!*dswSb*c>p7XGTn8sM`*7GRU% zQe)(c*N%G@|D|7S9U>C62m!#1CR%RkF;04hGOW5I-+gE*Oe zfIIFX_BYRD;6t%u4+VcUZs({aaL#A+yn1D$>>91ZNWal^GgOR{ET(qZK$GKE!L^1j ztUj2dHD>j;sQcb^-w{w23j)q!pd@xz#B*wK!s%@o$jlt69Qaa|Gy8b(B{8Ve+#zH4 zw$xhHpHYCVKN3eFFCb zIBS1IqmuT;(u$L2PH6Da^Teq0#NxhHrIG>nR!S#4eAT6sJo#kJayz(ze}U`_exOe~i~Rco;r$waKzCoQB4T zxp@w5YcV6;NEg3WP*4(28om&6hwtm7m7ftliky?Vg%Ofm@fOb%xR>HvgttFSh}_6y zo~5E3yTQtQwbNuVH2K>*qpA0Q)uCA$GQwK$hbCcm;@6=9ZcpebwBG1UUoqx(pDK-@ zpSgb-S}!$S-pHl>X6O00?dYbMIi%_Jt1*cTF(0^6UVp4Z3DXFa7I7t4SW)Rfr2Axc zw>-HPEuelcmgkymqb zW4MMs?Rz=#?`S;k<0@FMyAktGH~iP``nRh4Z@uLI{x8VzyDL~@LhOtO{(9}+TNDpx zjE_)DGkd7)*9PG+m0bSC`92w4H3ic>EN_Hq2xtJ)Hr>e*?7L?N-NmmZL7 zP&h^-!Wnwca6(-dACD+x`mm(7;H@*P)~*Zf-~7uJL{{BGm%x?7+eJff$W%$M#^fMy z;Jgxga@sNH^P+L_fn&DOG*5$EMf0Cu((=SjJg=f#!M+oo%qPTnk`>D>jgfnR~peI)8|(0)Um1gcJRVA zQI%gFGf{S*Hu* z^#Ka?lMX9E&|g`qyiJ_0caxs>7nJPP*FDO%+h2S}pEPHm20z-kJ|$=skll1rm7FYi zizR)R<^@JxA%CpQDe6f+gf%`aKx=RF`s0JnS>{Q{`3r3cA;YJ4{lg9=k2Yqt^#df& zL6=B9n>Z~0FcXz;T*bp*Scd;#COU6M2S*>d(HEaD>#{ zlL(c?xJo)Z#_naTf@^tH2n645SV#F_d-%WzNK||$D!`!;3koz}L!_=(7`DIKhW~e2 za~U>}N9wK1IR~NT;pd=5q?_O1Fch|`G6P=A0Me$jQd`c|OGlfMf+RaYRn zBc}%6@)1dL(%2G)dRCN8>)%Qzc~qGI0>0!Do|g%TuYbG)=$N}*XhHAIU1vgtAB@Pi z0+{mS$HDOb$I!_n;Nf#dkDi#1BmE=`uC_&%Z%SNbzkAXCBx}7#JGZi6YOI{0)qtX0 z_CffSY2&6Dde915UcFw3S{vDGxv<&cj%6Ub<5^f_*TM3W2RsO~eFpEStwCj(y)AmW z@RY0fjH%v^ z8%@6-8X@BPvl}tj&&=0mgeoqiE1oL+L>XH`_d4ooc9BW2e<4yjArH0Q+qaCwwPa^> z;C+p3B55o*bi27;VrXNG^3`1vRM>7p-m?a~>{7MV&aJi-r5Qu#OXeSeubqQn;DJh0 zzxbvlM6>_drsZRW4vU-59+NSo*~u5mZ(Jp9Il*yjb>|@58ZdfrEKv zXvEOuE{tR6xgITPuxFp&Nr7qo9Hbz}(wSGBf9Q=EYf9|K-s(Z^<7gpOP{8fb!N5+0 zd0vz1y=#Q0H%qit2>HIpKq$~%!!ZMP{Ov5#D+VF2scukz)<2eQkj!L8-Aj#&BhCU_ zB(@fejUL3O`9zW+L@dc0fQ)6(DLpp?p~U}hKdi0ltcJ_vDgLWmGyc!8_6x5AVB^OY zp}2^}QowYMr*zvqcE zcZ!vZS7WZIn8p@!_;ou4HZ}*kuH7^B;&r<53@(4LotbrLWTAnHl~!X)Di1v_e)gEW z!TY8Z4}3urAc`_mFyLmEg;aQQ^Gu@(r<_Pc0iddQ0BZx(EM)-ituy?svwBEq5e|)k zaezZB*jdI>XTml~Cm&EHz-!w}Z4xYJ62pLaj3g`=8-DrghHGMZpl^?1X#ZG;#dn~f zX{jdDZS}q=%sC;U^n)_3LjD?m{PJSOOyUui3-9MF1r1yd3;8N7^F{xbUe2DZmhq*X z%w&{V+pg|_J#WftWL$#*jojU48hY@9>GMf2Y|ymUb_bD4?9g}M$Y82-dwkr;M*i9$ zlq#0uSM9{U#U>-NP$op4MboXRT@1_T1|9#5O`Z7bEjTD|L{SvjDWB7a*QW(!PnVWH z$&Rn3$vk^mpJb9vy5%GzaS3H}yJ@Z`S83s8a?n+FADb+D zGnKnS-E_7I#!Nw_#T<#RF#Y8_rKK8oo|4}VAU9C-VX}UO>FfxSuQI2w$o$8I&N>$DFMl0{ZM30t5P5!>!$&9sRhUWxIOjLMBM$4&@MJ1^8|$Ay)ZejnA{UNrS# zf~*Ry3MDPQjn95)GI!s4*<#)W6DCke9FVy4{T=4s%l@#zVwPgKC3i9No5%?oY%od{ zHxO6lEbxomcdpCqoBh0wl5ONvEZqcXg~KJLcTg)J`;9X>QH-Qe-Cp`r-W}-WuEZl^8Jr_M0GjKtCie zd4l(C=&YOFtQ8OBqv(eRTH@#1BQ00^A*Hga6HnX=FT7H~seV1fcgtBX-oUn-zXX;NONk?UTc>M$UAopg#PFRkX{sLhWwx)1w zNa6&f>qQASd`JgS3zK1hsFF2&*285~fNcbR7fd+^0jK_KeP3{d?$VuodGx12zXh+3 zo`bB6M}QHXY+&E+LR&i4Y#R{=c{?nJnm`a?C(}b>#`(vtTf?-9pbuzaFHRT! z#zjR4>>_l@r?21QpwxAk$cIL3^?OWPKw+En2joN^ei-`Rqhbvlfa+$ocff?F85ZZD zKo)zyo+Urnsv{D3Ll!K=7w~f4|5QDb8h<`9HpOo>E-x!9TD$NjaZ*K3K*q{KM_5IL z=ia^hl7ts?MkT(ULF8+WT6@fu>~0L|v`1e-@HDdbxDaq%IrH|U6i^{nty^!*}!Y=30T`$hB; z=@2WC<w70A!q8_;HZv*Ky)`5>KlWr`Mq5G*ps&3#J`JwLB(^xhG}=E+qYUv1`<@ z{!oiIBExBB%iUlcwHGbIs0izu8W_Jr8pA1cpAOuQ|z+t zf{BvAZu7xA6MqeurVr&)-)2XOD&o}WF=i82Xq0nC21Q1;flP4DA63)+7U4feHENvz zeJvRV;O#6)#1_(>b{&S(#UV(^UKYo%pVz;~1_iia|7Zp6yQoA!;nC{V!fSghk#@Yi zT6Sj;SiVm{a{M#+S7Lb&J_pvPk_B4}sUr9WmWSbz-jqh8_r{x+bKe(LBHcd;Y(Fof zi|f&9Xu2oJng01qgY9e6?V3n|kD&R@W?|cwDS?1K>Hgd))nrZ>xofRl3s4QJ@zGD^gU-$X*dm6_~2W$tLur9yY495>?>yR zX?6ouwQR0SCgSe0AetOX5GB>!@)ophJL6Y$$V$(f-0jrD06mkMY=NgTs_7qk9>rY{ z<=p~#aOx!5I>&W=m3WX>A9FiZGA7p!#`x!8!O5a@uA1U*i^TI^!!lp3 zCq_aZ<(=^+z0Di2RHj?_EiBtYw${YFqWxEb?^~l>$M$w65 z2Bhc65ZT+-9;sJvA=f#@Y)ndNsTnkN#S}CcqWRDAC5-yptI%Oh>luO>Z|9e*1Wg+l zZ-v7@My}Nl!bfvSyiozz^#yN925adnlfq4+OFy1Pv0S`TT0i*2;Z44}cjj}4I~w|n za*$|UQHqc6Av8}R`q~#mwE0U*`9Y+tgYI97N-?4o5!}GBrj#IZ;796yM z)7fR2%$>5m&j=Ar2PVssDQy#zM+Y!U|B&l(#jL$zZ#VDouK|VXr z$a*4n=7i*p(s*4u?9z(tdB*p2tkfW@HO(E)uD3e5kN?=ZvGn%}o0Nb_SpXaj0vJ3l z07aW8{c`pL+M&f9Y`uKKvfJUrptRl`#sLyI7Opty*S31EblTBB~C}PuCY@0U75#c!bo| z>kJ^cGhNbtKy={kuv6Rp-6J;w*8stiE9QW>yXR0LC+q940;z1e=GQV{y8aku2&fED zG&p!=J4dI;BDmm-2DL>1gC}r1VsW3~#$8LbnrU5%!n3{kwd#*X! z9#N}6nFiz^^0`2r;M=k-@a_SQ+XK-8U!rV73h_tM#DiRdTu_&PRlyNpu*Wss2ScD{e)E3XDuEiS0vhlkR5Xz3Ww%{X;6 zrgpn6RgT-`SBp6;$zmF?{}&@v)BjUlnR|B2fDvLg&p~}{pKC7%3G^?SGG7#rH&B2p+Q^dOyTFgO7ut&4 ze_Dw+nfGK24_Z%H3$F=#7}HZ0td+Pu@J%c|P<1}GIZNqpM6w3=B?xaea*=y`EHLaWdb;VAuOq) ze%zqXUXYkXp4DmQuTBc|_XWv@`I7wu!Y!N+06n)Q6R@8JfL&+1D38Abj0zXH%EVs zF?Je?9$Lwg`lQ)+?O{qC--Te{&?c{Hr=~W|tub%2h_Uynd%&=hQV3l@y=0YH)EdTc zzD43w(+ksuJT}anZbQyR#oq}9FtSJ$i};*g_UxuvE%~4SVnLhcHC`u2+XADJisOA`j z(^=})s4r5<)3L@xi$ixkSJ6L~JZG@ipkCb32C6e<)Y|@OT2~A%8|e$N#!r2N-+-n6 znAwr&_E_rOe4N4Vr}-n(kBa<7L^x;i+P_~@- zCdU?UX=f3dpwkilc{aB$M8CKkV)pZ@&<$5S1e=U(8i&@n9je&2rSqCo2(%Zy+xO3Q zBUsENnsv_=uEvik8Y&yAK-}G5_HKNkv3{v){nF{`a;%#X>pS@#OIw?L_ncZ0!aS0FudTApyvYmD{9pwW&C{J*`T)KWdm^CLsZ~ zvWdF}m=m2_W zl2MXU+>72KbU<7GQ8Qmnn!2%_8W z_nN#6ByO3{n#mY)J5+usyL7+~UZ>l1T4-@%P(pXEHoO>cZdROBV}Bh}6r#XGrvLIR zNdD^U#T zu=TE{=HToDT@)ObGZ~AJ?;tlS#%|2$v*=$JfbcSz{!Qhp?5t6@ zreL01MA-RsAa=O2x$JMs=^lVcVIih+slrwPI=ZBQAojkPg7xESV1TxWSIHqIn9TKIOlq!i!}t@KJ{{);Q94+RAlsDPm5{T zWU%1*fYdn>qJX2?HYJ*TwZhjFYg6``Bc5TTs{4i6KCGv!+a@=lid2c6MlUHUq%|`Cc zkMf?u1Ygw2_D}{wVz({qv2&BM`Ohs)C+`cW;^4hpZi+}$_Km_(tuxJY5Xxc~tN?@t zpZSW^XN3CdKUB^NO7WfRTPe)X3oSX1BH z*`8)u7b@<<6isvMf{l%wy#8&iIPx6XiZ76fAticQLxhPZjh2o7(njXsuHfDY?$Y=K z-F+W1>V~hQo)4E|LS&#M2lY6UT*%qALO&O0f0y+eF!(&&S3okUE)XMK&~8xdI16R$ zuc2W1&|F?AlOIngnZz+4R}n{1#(g_P?CZO}+^rGtb+EASyvpKV9#esTf7Yc=BzMH& zgR`=8(CyzqNoyf~Tf_p55K#|+JzJt>V!19J3F}WCfF0Gd9KUvIXv9VZyrliZw3=BC zHUO-~zX8K*+X7Rwjq{6#B1j9I&IvWH5HMXlpSNc0ND!r-YXBbCZP=XR0u#(KtKd)E z<*rgS__luXGL#mhQ&Q5*HM0X zp)--~Ai8MEwW!%ew*Z=*NOI{NV?h;_Adu#5*rF!66J$u)!zEiGocEpf@1*bGWM#+a zW%zlIi3ighUeS}IX-vSmCv;_bC6|qjZbFhGgCxlpzp@71@ZIB7wH9RuYW{yaAGVwv zmk6z?>wF4b$gTNk=y2qv1+BRWx*AIDs1$YU9rM$R6sCcNX8~H%^Whk1)u;`SOZPwSB9@`CappEv zieYQc-vq)BkkGF>V(QT6W5^^CJt);aBb5#oCCS|Q9--N6(xvS;M+sG88 zPl!^%faQ|zd_}?g;TWq3?a@lE-F8Il!Roe=(^R1(?Aq@ba5zIS_1Y7mD|wa9hcM1V z7B6u9M|m14|Np9#(cHMHH7?N80(+k_n-`@ ziif>+rE3MtM@1RRGSi&OdY9Dt5Y`=p&edyBN!tu3=0H6TUR8%N6CVl}K@dS_HIF{> zQWrFxyUeauUq6k}!~Br~OI$%wMRrwgaYSiEV?-%OR!U_;DR}}#y2&RF!x%*y6=ky9 z)a|)3ipjTu+W+PP+5Mm!@?`!T&WaUe#)dZ9)^4jT0h#&s|w+!;nupTEcW2ggz%MIR+)Jn zZ(QS-Suaq4+mo=97svAQjwW^+={trOi#=dJO)9gkfCN4zIHKXv4ByQ2X7RozoM~%s zZmebBfuJ=fRqmMX3P}c2>P*n+7Ml3n<86hiKa3C_@Yh&-WVC>LaWso*?3O=e)bC+E zRt82^?FLTYZD+{r1AS7&FQBz?deDIL0#{d>!^mLXzVZbBxzX4Z|`LE-qF^ig{CB4Y9nsZvv3wL(<=zJ)@N?u=oiCe z59>H#AGloPGGXT<|NDT9Le0MBJwJs@Df9S5PR);BmWyqBSB1si7~D5ecYlO=7V2Z= zW*s9+#ZfDyXkY`XKzbt4i==T!BsAR-hr0T)-8hyyj@c^xGAQ9G*^yr7ZiW{B4j%A; zI+r*bhwZOx@K@RuNAPNua0QhH4SokEuP#+-^@8IhWAHl^Q3QmGLW2ub4s7$XATcVC zyI0I$QaS21N$}HS{s#W*_7B)7`);!YTtC4h@p8{rPj~KUU}{G(oR?M-;1pSMj2^tf zGy`$;z1vY)`+h?$eqVp;?cR0_ORX4CvAzJF?Xrk|*Ap#vsb9$+NoQj;aYQ?!AD9Kp zJ_kjxytZHI+hA{+Cp_#BDCT`c4n6?)67U=?5y>0QmM+>Nqy9MXtjgtvoSD=9XnM_Y zmc)nJXPYNG&-?c?jPk4Hl}kI4M$(tj0gD{|Bo4?YB7! z64qfm#hxrAR?Vt&5Q4hCE7GXgxwDZm;QG&aWC zArb!2PBiqsJP&`ZVs9BEDrGADDVKJ`*Tyc#W8~Vft@>$`4i|nR0z5Dhn+PzJ#d%~u z{zW?R`3jU4b;t&PjPjn)n{f9A!V9*&e=K^>2a+hux%06W!RX zb5K!<7Z7?dI0x;IPg>(6eS7}lZ2yBf_0A=q%To^j@ZQVBmT_78#WuM*OV5;v9?a*< zI>O(Q)%Q@3Avx;ZiQla4)A>VLIInVC%Z{gyOM>du@zFRlJe)?%%7&utYLRd=8u0gW z;c{7d=Fsf;5w~9>z1~WChQ1XSWfhk1`SnLr|;Qo)?!b;h0Cd)rw(?8<2h!}do{d~y(5PIKBKnk~gL2mp z>xjmn0!oihgURB#uSyFOct4sZdB}}80Xg4x6SY?@a~xAu-9|7W?=tF#x>pZm?>G}W zYTcA)<%SXH8gu9vWnRPxPBhvJn{VXFp}f>Hq#E5tW9^2-vhu=L7%#Q*<-mVm=xi+tGy(zc~EB zhi8ulFDR?f_IA{PRYfIsXj&KYEm)6Un1*Z?qS8_q*Al9RlgRXOT2nuj_V`{s-ADPH zL+5}J^6uDkn~#{W?o&yuz*@u$7V$$HrMEL2K7X9McF(&fw>&B)Z^~Ha-S+wD{~rCj zm4llj4n&rq`R-DJnhb~>al!0{tX0G6chyeHZ#h}26MWPoUptmk9>b3FC>YLRWU2xlB8EosE9q@aI9%LBm4Rfe%@+ojT)fMBPU{uS_EgpDG zae?DTn5jp%`#ZNuOXmQjMF&>d(ADZXc~vnO`rN2iNBbL@zP`(WKL6dVOSfJQm&Ec1 z>{-rd`OXvj*3Ge>C7vm!>XJSKc~cs6DCa>gD=1!5tE9J#IVLUgepU!|1pGuF%z)UJ zJ;IU*vTZvVNr+X)Rrr~aDQpt8VUMmN$~XZ!cfmp|u|R2Rn{=31+4@h7*7G_n`1|;R zNsH4|K=}4v7{=VgB7o3g5y=m{&6xQ*brA`iUSJA57JwsVcRVVZ+AX(1t^YD5E54kA zQdNlYwt&eo7YqjC5RGftw5&ORY{XW>h5$XZtkz><=@nvg%+-Q0l1LhRxYY^+!0e!R>kgjyMK6I?C8$tdA9GwvRdZa$T6)zI& zbD&Qx`7{NrbMe6XO9sG4RgJ()@l2Zs0P1OxTQAE|ehrY!F#-ZN>j3kyRscdP`xl`w z;%Pv^E=vH=@{_Bafj8w3JN6B%F8j~V6)F2kQUmWF5k3IXTypbs5T?h=FN+ungne3K zN%mbNdZ|HJD=i_(XPsnc0-WPev<3GodP9{sA5c>VA+xW?^94ZbmF`0<)8aJ~Mi7#q6Y)ik!6!b(MYg9bx z{L(zx=^FXW3ewM_Y#kaTEL01iwx3THdJc7P#{&2}O{4>?Z6YflL?bMT&`xKS#4;BI zm!g&nWmy9_fpthaVE>U@!Z1`?byeQrRd+ba2Qd6DY(W0YAfX8!4`%gr{^8VEie|z^ z&Eud5wbbrcR(W%xMx}%-K383j1^zZvWsC)0AsJgvf zuoV>r1yoSUND#>)Q8G#tp^==CBspgqXo3V$a?VK3NY1oM&Pav^T4Ix%+&~BK_MN%s zo-lW6&U~lpoB7A8-dZKqti9H=p7a~iGN@`0+-Z{KfQM=3n zt&Wexgke|1@QtT80kOwoZxl!A3A^Y7Ad-D11W)I=g2o>B0lZia%m{im4#<*w>)=bF zefr}l`b)$N>{rbh692gsfn5exUc*THZxE^IAq4Lw0UWkt##NFSYe4)wJ1W9aqe(A% zNpX&V*r^L~1q4(>6y6DVQQ($uvbmv2XT28$4NUv6XyJMBkF(7~EP~tFRtgE{?TsBX ztg;W(gbRv7t)1ceo?!CtzGGi=iZkZ@SeD9pMoBP7Dd6vHI_Fb2tu zS7=K-qeR~yCm$##;~nb{PRk$by;^x4QyGJzO5+bmYudXOkw#$n zf3e7C{&A5L{5LIfLu|r1^%Rgp@j+cVx?k{Ay#gZywcCC8Zgsg&U2WA_bSc?wxkTs= z#RGJ&8Ee&-E{EpFRhr2xa>q9^z7`8`FoWgb0Odn}!a4j18 zGvskMU}|j~#6LB=LL@zx%Np=Vcq&zfisPNwPu;rFRr#(oV*@!gA`3Q(chg>|hRK<~ z>!sx3;1s%Zfmh=^H;|MBPzxawhW4Ej()vM*3wc)kkkY3x(SF*%fXRb!J4w zncjTdruAzMNQrPS)h8|zd)%T*!{ zfYnGvUikY#e~aHtFgH^j+7sd}*Vzza)ghXG{Aud!}+TNhv?K zGv`c;WFOhc-~BYm;pKwZKi=J1v}i=)Er9LRJyyVO#ROMYQWOQ?j4wT%C*RN4s5;20 zE(*|#n4hfN-~D!B4EvHt3|Zo$1znbcV=cia&cIPGpL)lV3G-A(j)OUJS*@EKJ?@C_ z#2up30Ib)nYbpLR?W8g{du#OMH^>hUpW{C~+%z+DK1f3rgxtnfNgAUOtGl@?BEe%b zj!nNfq5=Q{1Yv)60;dadJkBM;9y38r6q4zse)$PJyWb=>D+gsoJom@q_ilzH*HLqQ zo5s_Q{L(m}AhowcSQm5#r`^2SNteGDD(K~3aPCCEF1dzlr!e-N+LRqb1CVAQ41hGO z9e*HASfgLKw-R2fLl*!iA&odAmCz30jF{+IBfT`71u&L|p#u!{LS*N!RPK}*R7B)O z_UeqTcCm3|;l2&g3q?nrv{rLR#T+7-S^@8o0sbca%mOdUhj+cb68wWF06U}>izk@o z@Y^$W?Q3g)cK*;qQ_@y{;Vxib7q`_#J@P^RFE8D{ukdJtk70nH0&rChO#B87r7zf{ z8nN4m)BAw#jgtZz!053Lp{Mk~CqvcbHs2kh|AizM@uF(4qR(+Z-N+9gS#P$umRmD? zsI88mvXB1|`t;N5VU9;XL9O?C7Sb^z9eUFA+;(@1b1M=+q%|zG?!Q5?j0!L4<4q#1 zKGy3!rTq5bFn}+^_jnp+{IA7wqW@ehXF|9%h|dxn1RSmk&^`9!(nvJP=_lMD3hUn% z?tc>EP16nbcv9PuQcOQdl$=%?Wk?9DQXCemgBRTIJ+@k%Dr{tB7YMv6W8zUi1ld zNB=REZBIetm*yy|5}RozdcDp(H64bAT*H>>5IM)p6{ zN@`E7KfGvB?CTPY6WY+dk0tRF!;jQ}_p2Il#?7vaiF@_%_c2udPrPyo0>5xD`A`w0 zX^^9j?EsnY$1rp`xEhAOQ8W+zJ2bdOx&*;z6(F#Oz#X9%teL#ewF9(k0d1oHkDHY@ z7XWpB6vMPIil>KD1CF)Q_Rr$LJs|P9B($!bwQS>`2r66iK-op@V^~m;i1R=Z2(bTdETS_qfJ-QQ5$B)&4>-QO$k6?42A?^~ z03DC(#s4(j4uECI_2$E~S)YkkhNiwV`nL0iPKk}ZYm>dUi6+a;0nDM8FU$EUIH&h< zHRshxsjK;`qitum?1u%>&J_}cQ3ImZck zeXP3bD-iCpDxq0|a3<9m{_DcY9Z_RLndNo$q0j3}!RdnJ&e$)-y^~~DjCF!a>asg^ zj!)2Tu9Tc@R`Pq-=+}H)*z_K7CzNOz_a~I#WhRg_zbF3tPhkdxh=l2?zmVN>LqokG zi=z{Yh%MPsbvrc2{*C@Nki)@x67vM$Jfh_PEVWPRM=}NvBsB|^qIR*Ox>H(nwgmf3ijRW6V>bD zHKsH*6h@h&x-)0v6eTXz8e;VHJ8f;R%G=(%CZkHBsR1f2eR{PR1iB6)r*+b8R2m*R zLpd)vtYtejB^D&2G^<2FW{g{z@FhhxS=9`v)r=a zx{vl-uxZ=jZm!q)2~Txai0jztxSwm@` z9v^$0Sk2~V>ZY@+NF%eFHN4S6BW5?BZNC0XoLrZ4bh^M5$q<``E8F&G>2Zz5E*CSV zYkP&c`X!LH0-0x3ZsUyu{MP~$Cg)YDzHWwLKmQoptBNrMydkC*-S!>7b}L#VqP(+m zt(FI9-g&RFtUps7mrE9l>A?Hox)-a^Oa4f4gloni)Val=wfdA#9CV@yVlVzt zO!SOUJzHq^Ossu4w&Uc% z6V&`%<<*%j$Gvq7M&)=-25OZ;;yKYZfC&fK~Ndh1d`@4aAQufwj}W{)JZyYT+^ z#RON5a>pluOs^`g)IM6&34}m~qV3Fey{Sz&)@lgOKIYT!Mkk7FOD^KQ_QiA8Ha=r{ zM~XtE^-~iLs;D%)$AXblz%e1}o1N_H>)q*{*wJ}?_Cm7pmgT4Oj#rjy-f7BAYNOcu z3i_E(p4;&ZS)lUkTh^Nde0hf^0fVy{1r`8|+&QG}r#%&&vGxL3vPE%mfjVM6ELL(L zTcQ}YaBG_SFO+W{!Dhn}agz}k`Vz|+`Y1L(N!R>cY&W?TaX)jElqM)nIjlWEC*-Y` zxV>g(;$1}-D^Nc$Qp!7i`V0=f?XfWh7xk)k4T7KB@w%+ML_Ulv{K9Fjv#ibatNq7Q zNqy3yHf(M1Rt1-R87{*HhGHiioTwb$OUjmR*gF%b3cluii6wd%Nm!JF5t&B(YhtVi z{Evw-g8yA&?Egh2%{9P*Yc!3&a}?&de>1O+y0cVp-K}P8oSr3oc;A3lMrOy){((qD zWWBCz2Cp4VF?>uOrQLvIZJHJuXiwHRe*-=lS2Saa zjsrByqC}s++omD({T%kUT(cP(KYTQkj@ZG~E3B~{-L5y<8Zf`BQlYerCw{Hmovu^; z3zO~lslFWB?IWl8SQ-U+4zP01xm)D7syXo!s69GpaiUj!g~S#aND+c9UjaY%6UvmLWM_15U`W)ry662dT74~=OO=ODH6S2N>V?9chRMKjYy={OH0#?vy)fY6La^un*Uv!`*0T!DSzG5jJ%;nSY2Hkd{Qku zhtdeg&RLb(^qW1BWLkNH`1KAd@l^3s*K=OUFXO%H8}bP^k(02%WKMU|8ZM)3;jV%tv!ud`Nv zSgvKglj2Ya_QBp`0?KIxE}VB5amV#S{u8d{($b7`#*DDJVVcC_zMrbT;gxJgb%*Fs zT9?MZMNJmfSH$fAtoT4ec=SzoUUXhd!^e*g7=0ZEeyo-z&4{sRas)sbAS2vh_xOYh zi-grp2KuzFoZp~lK09Fz_nGnVqx(G&xzYEqH2t2Ui{L3%pro{ATURu=i1*|3dUsZR z^PN%#`brUlsLk@Cyj0k{W%@&r=)=#LVDZCPlGB6Hfs+;|B_;i5w9nJ)fd){f)yYfu59Y+YSEFDbq(e>Wv`z_qwX`5mY z`>0ZZsc%;cN)j4_)!MsKa9$g(!{>Dsd(&0Ft?z5h`V;^bD z8FMdqYCJ0V*xe`~3+b|RY|P+l)JbI1oc8mx*|bgx=d0sba_zxrJ#8|L#CMtrF@I?H z>T7h;giEBS{a4w70XxS|)n6~1F1T}aL$R%c-OgvEp>hWceQ$?YnVKu7s|*+kYfxue8)WvoY*&5dmZ?=a@+E{nRhoO!yDG4<>O z)=nC+de#++BUaA|=3&rAM|%%%Z-4tJ@lNYQJ%#THKMrdr)WQzduiv7oOSs0zJM|L8 zWz6oc;z*y^o&}-yFe`rcY;3tia0w3ADJd$>1*%uKZ8?%|loj6vst`&m`;_@lIb%~P zf0Qy?g@1{%-$-9_ScG~n$yAr-$jCB(kWwrF-&16+zwV_90!8Ec(f8faJSi}!gA?=3 zSkAXH9}=SgS$5J&_Y)tV_;nl56)8|XhWM2Jufv8Cpb!jobr+zlBA)NR%bj|iE(y2y zH-qSFA571y7p{&{eFW!TE6wQ@;I~7Rdap`*Sg5hDWfq_-t>^3#Iq0J*@mVyM`ZMES z+@eznK5omLr6;X#R5`!UwpREgeQM3w5%dWBi3OafNpux@|0xACK{KKazEl2R^d|kA zx#R@Nkr~@adV0@t-XrR-f*mi_9>#RqT6{e$xf{Bw>@1QJB^M(uQ;Z&;z-z+S=~0`b zICX%9$i6g2x5KOZFfCQs{2#q|rxp_WWA)Kp8lNwuK&b)wU*DizJvQZR2FSEW(}py! zN!2>2%vI)oK6;aaYp-t@|NhvKgMl8JSgP7W5t<(Nt=J&@?Db6NdV9}i)RyB-Y#e{l z@%y8loNTv6*ta#qV`mfjriD5AVbf4{I?1kmVS=b9xrwz{xa98FTI2I~yN zcc9@a9|#VPK0GH?CHyb*QQHf6HTN}K#opg{%2oVx zF7FO|Wm6cEu}V+%UtY~Sr+vA9|7z-20c5G*@bQG9e8Xj<Y-dYT3q_vO z_Nl*qn3-VgXdl>837+|g6&?5pM5PG^+0bf?<$j%}l1sUOED_`4E$inU1V1!Cle;H$ zNJLf^a=V3ID^`}AV;-~`pCA^G&Rp^aC!XOA+SgO6(#G$SKR@5Qdp9TFmeEU%aI8*B zGq3b1VN1EKS+l6CmuHoQL**nQk$;Lh*+ZMf(7=sX5gge&KA|ox{kh9@YdtMjhqo!i zo>SwXte?4n=?+s{NM;@_%BvlLR%(Yky>lqENi&fGUDu@G*Hi_SJPBq_%K|Q$X%~6! zNQrj~&B;Eo`c5r=Z^+3aKt$mIaW5G`WopXTb&{B4dgrvI_y6*6^W)Xvj74s~9X}i% zEnDXAL?*YPH4WCDg$nhrjPw?S!|vA0)Hsayg|3yW{PMYVFS+)N)N@4DAY`{8NcYy! zzVS_eXi4A^>tJ~Zrh50tL1If6QL4p3thiyeCQvjHxTR)UOcxN_NzL*vV;$PkHh3ZEr+BD_$ZyCi^UB2Zo#7N4X-Z zq5ImrK*&%S+R3ULjehwX6c;T9d?q$NKfxIp+wG=6ILcb7t61+^A*iX{?WHC_YLu?$ zBD>}k55@8(l+|iDh@U?Xy+%gbjP$Ig&YEc6t9T7|WQL+_H0b-%PE)YMbv(~pHgMJA zY~GgqFOHte^^vYAFkIYyJ010ch-g96&x40WS>S;@wXV9fvAk;Ni!BbT4IiIU>s7J* zF)%d~!O1(nU%s(z&lSmwwKPp{ib>!2K%XM+Jn!|SAlU zDrPS=Crco&{7U{gj!dZ8HPLUbV|_T6HrKDjAvYpd@bI=>PMlk#StuwT{9!zJusrc> z2gTBQB*dlfGK}QzZPJI|AcIAjxXG~uNp8KSVPjS1C#%!@MHimjr*g3bV}>Y+&Zlqw z>`WNwReUA=vFFyz{l){Y*&*QtL0+YwV=s&;rv7JMVnFcEIXU9wRx=CvJ+*XY5`ubf;t*CTI_Zx?H7BayhvhgmHV=rl9 z3kt6p1ONmn_pAVJ5%-|FvvF|%!H{%hEs3%qM2-!{o>>b;_Il^L2hF@+sH7QhkghA z#7}}z@@;MDyV{KVG^ZoUZ@A1PXvkP@&uHJi6}3bm%ssF8-iFzVO8&9NX^Fg_=Lq)V z;p~M&FJh|nw7$jq*}0Egg2`DA$qm<6L7nOY`zHBCB)SXub(#HRg*Q>X2z_tjmGzH=rz`F zb&YDiqF&_j1^4o6>9&|H6Z<{Q#-#6Wy@OT}&NffyMCE$HU%7qBOW)+#ZP8dAix{`# z{-4NqbqL2Fo;6oK9!elH-SNZLYJGmaVF ze{-ir@8Mcxo^1CaQ_U;&UwYm_4zw!O(PL4jH|-gA2TF@e!@s2nqA;(MbMDVVaFM_i_oZ#!aQiqzP*e?D;mziKH5yIj$z1c5=5cIPF`THphp8|&`R~}J|Jl>@=jWT~ zAaFzqY1vXX3QjXIWsPpwKF;Y{t|oU~d#+102Y;h6>E_nYd_06aDD^^aio+Zo#TO3s z^?r;Sh=NLUl1#loHx#!t6C*d)JsnLN=ljKX%PD}tzPr5vniR~qOnW74yZ_yy?uu-~ z7Iaf?<-Q^MmC^(ElF#n^aG`7EiOzOdcN@L}L!~M9;ke@P^Y_IO!mBehxA>ba_eL3` z)NA7QF-ne}L;@3x{Hx2s8@99ZNz4t_Ano@gaOKTlP9skuF-oINw*m}`r4_!5W@HKUF<%xafJlv9n^P8yG;hcfQ z8vOL`v)fD>$&cgnMZ%e%gSd(p^ii@!(F0BfR~GNg3qW%RHlgV}yW4LtQ}zh$z3$BI zD!)SH{dgSE9T|QyC}Oz|P|LyS2%Kx}U!;gVYW-tF6#QI&62<7X-AE1}beW9gYzdY3 zMw;Y6)yjn8N#)baF z%LKsel_dqMr;uE!oe~CGt)8xelM>#9hflZ*4##O}YFe99+E0;r-vqUW=V~@LkLUP- z(8QP_(8hTmrJysQmFDk|<4?Bp7B&@t8Fy0Pp`8@VBamNkX%+h3Y2@O+K_s5~bsQ0w zPwi-DZzvzci;kxszgTD`z9a6ajQU(Jr_bzsz}GtiN$1gFF7Gxs{pj{{Z=q7IxIysU zHQt99xv{}p=@jB4YxpTlOPVg)n zv76(fyihw*L*;Ae4eV*j6D)sRn0|6D>&x`=zM&@OqfgJsAEfp-BI=J6T(nZHE4Hr^ zOdQgywSIJ=H{k2f_b{>`tMzeAWm)38g1p?kLPd7=($XhR#o^^cT_B#lK9i&spi)rK zJ0qYpCrBph}*kjTO=5?e2unu zL)9VDuiISDWyP?v-=~ z(Z&w*y+db$LiE(5nzf!5zC#zv-CWNf$75=n*%A9JS-Whu>j@I!`5$h-M{CDAa5_48 zXWM>gSmd)wm3!kt|8WaT;sRcFv6a#;zk%t-NJ8rN8?nG_gtJ2Bs4c8g{#*5HLy&c* z=nxK1K1-R;-+ttz1TtovsH|Fx~#`1nM$gtM_Rq?MMIT9s^-l&pA{va>&N zk9x!qDqzi$ru&HfPv#25^QS4YI6^62>V_g~0KrU|JoUg9xq_Y?1L(RUD+u&lQ5fXB zV}gi45H>==zS0*=Esa_W70GR)dASfK`(F*_HOmIz@`d2G*^;&NxcWl!46@~t>FDl(d9JHMy@>rku&-3ZN~ z*Kx11*pKSybXVD5(twLPo1gVqI@4_MIlhvRzh!j3P_}$ntGb3P&kwE4()_p)moS(^ z%U*tSaQ`hP$5ryV%k<39!;C3wOP2K(Wg3b511}Z6tlkqgC+dEkL`1KwP{Nq$8n$4J zqFXakK>DHM&k&Ai+JQR_XZpI8zFrlbinl{wyy2~RJrc3KtW+nvc?TqL)l&;92>!Sj zCN3fBwB9JMVZq8l6?ySNJtWR`B&G4jeCg<0b*YCqxWUu76@8bSaL2T1JfB>YhSi!nj@jvvzghX{oabVEsvz7Rne6#VAD3&QgKSKE^0BwH zpZdAbnvd^USl(aS=0EIK|FV4rRU-HO0>{z`cxQ3ZDQ~oh$+LtRqGg&5_O&!(i=Bk2 z9>fXuSsdM=yxT*R%UD-a=hVv_&b~JC262Ig)~=5j)ILWH*eDi9F<-Mu()#j~N*frw zOz}#TJ!NN6((Qt8uH((Z1v1N%*Rd8J!5%?b`Gg^5Z*P^E@<~i^fz8!oYi9G0v@>eJ z=obX5Cvt$hr+f)gldH#hhrHem!t}mVb=V{<P~7z4B1`$8Tx5 zXqj(0-Hsn+EN%uFtp$$O&`uu>+E%wMps7Pbf83l`{6G2<%#J|!cgBvBJcegd8vUx? z&F-4FEIC?6J$fvy9jE(|$9WDjx6%T^ znAAnhpR(AO<{lazIXMdBaWNF?XJbsyrboam?PEwd%-Oru2~jYa1UmQlnSCNmo(YPg z%7|x972lN-c^P<8kA|E%+MkKS#gpUh>lE8!R}m_C7)U?p@X@_1yggSt??_3I+vwQ7 zXYPbVi=5!#(0-#hI8WDZhcTP6ULtessc3rYMFoXiGVJ3ajX zr;OUkRR|C+-h`Z&{K+dEwgRJX5nw2)6W-A!2H0abjQ`kUe!%fntgrr5g08v{;<$GK zw;Fe&F*+mDedcd#I4ri;?D)~;f{I>HG~1_sH4RmB=VmG$4(AIZs-`reQjvL)gruy} zxWb3#aW5!hCu5`u7g-`+n4Vm=!Ywv=CC)B@RpS-Vc_%cpkp}_Fb z4J|El_5mA8h40tMukErd4sh+QrsUyl4-3tI?@y;M@Or z)ZXiTLXuO_<7@9iLbI5!_;u3s?oQA69~s&`G*)~u8v3nH1{>Y`NCNtZhC-@Wr)t#L zJwOx66tG_5BFNiTvr4;E0<)lxgX3VuH+VK%Tj{Z2n zZEU)4_e3kpwYaoScqmhg+STeEk4KIw;dF1bvoa9f@ZB*TdT6H~-n;T~DiA{v0mGV= zyDa(dckJx$FAH943!sl$vRa_8rs?I``|NuODwANs7JW&Pmh7cF^n6-X8eQgDDM!nx z0Gc#As8=OCIcljV?OTJ8O0piCTPnE>zcx%PffaJ{hWN35Ro4ky{{@s_P9A+xJr zKQTSm5`l5|eb!^AyyNBZbV+N!;f{A-U7l>_r}-DO#YFSGcu8a#Y27Omn*e{U{WrMi4O7B{bDUg8}_oZpC3E_(xwNCwby{`lX7`Khd0~NGw5K_2U;_(p%T@Io_^=loU@;9cttd z--F76nAP=PP;4$iDBYj_MK5baj~cHZ&OtdvgYD0_hnHF(I+z}`+lS4mkL`PmMqJn) z!t=b47G)nyzg`eQYkmBB?{OEARtmKQnwp@T{F)bEz`Pq4${j0KK5}U>(i_@TF-=-) zk>^E=Owv_{EmfI$hb@d)e?>H8E{!bB)3$RB46kf+)`B0KQhqXn0UlL|L-3Tg9g@iH zQ+jN28w~RZNRh;BkY0)cF5fBeU6PH z)K#{_Io;?JJ>9h3gredTqB0@zSJTi3-Db%$g9%b;#OWpNO>OaeGmH*mnSwhkr)&2< zg?uI@)#88nq$Sa7o4iOJR*fHZ%$hNDCC79it(_WUf0RBxWH01W)a#$9#AA%>66MdMPfcrjj{LO#esE)474y z+MD2NOJO@TS03(tQU2$Q;HS!*Q#ovm9agtS(%yNWGGj9Pk6n>WDBlWOF=xYt@By*J z@d}!s1GmO0LtawwQ+#0x+>Vu8PHJ7n`&YdMdgdU23%5GjN&B+Tl@Lc;4wM!Z;cRzE zfmqnzeMLZqX3+2u=&05Pf?{j!>%T#>y)bBb*fZ$Q`B8i+bh@McH|Q!@1UjKuj|Yy0 z9k4cHY|)Vwd;-&U50RDSvhe7cg}XXh*jfqTA{}hPsIR^+v+}JwsZC=as!mgAi!JXE zr0OZd^hp@QNrtQUMAe@?mv#v6a^fVnVa%a=P(ndbM01+9ko;AM!zG#9WjBsv*wT_* zW$>UbBDl+-%k<|M85{wy#u?OS z<1~O}=_gBnz`(^L-cVR8Y2;+7Pz$Kjz*>@l@ z!w*08R$<}WjSu7fn%Dd~Xeax4#k2$4z6?r9!*4riQCLW4RvAVR1*U0?Fb@I|)JWdnvN+BEg_UEjl0ot{M z#RbI345bC?C)rr)A~b&nSXh|6EHC_$@EOSXzB^T=e+)}_sErz!UmX0|8rhQ0r!gvq z0Y6rLn=$JyK!ReT@hhTi|60?Q%t5WC)>B$?N9?tDrvY%qj{ zU3B1H|Ky_g$K^w=uZ>Trd2g?EBwF#lAj*)~eA=1bATC8;iU2zcF7FwO%<@^ouXmXp z%4~nbMZE3@K+z60x~jFY1Y_1ukF=k?8JxJPj$N7S;bF?2j8(Gl&9uIrU!gLnGl=G%z77|Om=`X#c zh>y(dB%QC0#a{Y;^L=_@+sv#`ji3|N%gkqH8{Okfn)*!P_IW4WO+GA?w^Z76=!*W= zU-!uMkA#E`$*PYQXIalzt^Q0MkXPbt&qa$m0p}d|1|aCc9(&0bQ3hS<9m1Xy{OsP& zUc(#-d1|VS&ZXMtO*YAy3seushWR)oMAq?=r(`y(p5M}8W4Le`OMEA6vTI!j;Tvj< zifmE7lR@YALsydJRo+>jq(p&(9;V!Ne~a01NJy*IB75cfhhz0iwz~(T$me4hbd^=B zLf;+2&)Z_x1(P254Z^b0ziZE?H|`x#2g<~@XmkdJ3Y+%Yr?GWame<9WA9cM1^M98{ z3m-K;wxcP&*5E|xNu)Z=LX7=E^!Cc=4|X}q^zx=N^jzhevo)@fIjb4!IX!{NNo$v< zGVeguY$fDUk1A=GGHJ5Sj0*f?X;T~6(J%v#8$-R5>T25id$BEN-4vRZ$$M<2$LCa7 zO#xZ$&=>D9R`1KS{D_A0sjqsS1-sQjaJA0WkpXd5%%AUnd-yUZ?R`MT33y1e|H{{;qT z{vsG3H4Qyg$JYaU&OPr5e429A8DQPl^Qq=pM;}1HN-(|`m1Ju7bQoFq>6r0;Cbze@ zKAnGDO);o+cvST?ySrLv{pa&_vL`_s+l~%A%oz8+^k`P)mVQ6)Yq`s21f4)fLw{v~ zkw^&JBx)C03rE(^7<5aZn&%C;)|^VieP5S+?o+9-%5aYW_7b03s7tc$ooTjTp@ozs zr6v)%S-ETsS+`adO|mFedpY@J8O-C@?ncynWe7Gyy(!%u7$Ay$NqSYBRMSoIZeHvw zxo<%?iy3|ek&^lLYQ8w)yLf$qu$nR#l2o;zF7(tikDnS1E6Blf%%l>f3MgoC5`h)9 z>#^f8Jg?aDLnLJ>C06Jx&Y%{HMoJZF#$Q@(;&N<0WS=D70Ja6GErKBT&utjA>AH$p zoL_HZrKH=wiqfMWJN2fn;oB8=z?j|5w?DW`UBAK-VMF4d-U|2bzR@;WWqePZJPS#` zuMP|?Af<|Ev?w6)7#?lxZ!wD z5oK6e5viL*+oI2}V<4^OjIOe(l>OeN1DJ^|?K(Gv@6h zf6c1wl&wL+gUxmlWsMukZD{mvyVh<(b&>s`plhPV6ED zjGs6BGN}!1p8O$SRIJmle#TcdlBtMoMjN6ZdUzoqwuY6H8Rv1g3W`d5Z<({Mjej}f z7dIsA0k0p9!Kher7jzcv<*>UER=vOp*y!taJY|ODur{AR*9q*gueXhNHaq67#Iy|DFgC7q?@p0+;TTx4 zwT#`?HR0_R-P80tEfQy`rp*>b3I+kpZ&6iHPZjszOuw@A)s^68`|65>oeiq%#P{j> zR-~7k9j*@+m#EK-fD!WZJ21O;9FpbW=A2MTx?7!(M~z{t*rr%mu=}dqz52W1vjMa| zOms-PYRNB3WulD@ElPY?DA3;Fvg`Y)MnJXGoR+tlm;R!uR_Ar#+mI3UFKe>8U@?;b z5r->h4>z(D*Cjk^FG*}?xvDC<-OfKQC9asos409rjhvjI*o5>+Y+}OpJdhX!9PijM zUv-PBjq+xcp3{A)`7fFBWVLcTdQ=)Dm7i7-$0@A4U+J086vV!R@i8s?DW8Zr-OLbJ>^5ck{n0zBzYgRJif_gb6}&!vD7f z)ju#^*F|?=m+;l79~B5(VhTAwZz`M9Y=kBS<>JrOgMIubhl%@R8q z%_!Fc`|D~q)mv8f{aBKSy|x8J)j41HQcbP9N$J>x96{H?=DtM;LN`Z|*ywMjOO@I0 z?b2@L+i_3#XegKG8pvbi`828I(TPWlgQ|TwoX*T|<)=_~;$`bFTS3W12){oI_KR}& z;FT4XU(RA~a)li>?cJB9=0w!W@gm)ujjv+%2{3+ z`Nb3I^o_qj>I#$2>dV<89C9JfC*bDx%WQPC&niH4jR21pZ*Jv^B>s_rXX)))Chtzi z)(M|%1K>GPyZcAok#Ew{Il=%23Ez%jZ%Wwu;BDpFIwtok2KYX%6C2Pn7AiCIlcESD zPK~y-r1uJYT>}f1Hq?=!5%VxkrKhI{N%bV{9=4b!iTy5p7;ItDWMPR}RLnv6cCRz^ z)y|^5gOe3E-3NZ~6aw>uq~-80(!GFi00t2B3~>>K)s$qpl*p~M8;i)A z*glL|z|hEin0jAAm&MfVVRQG?7e`C3rcP`yGp=5kFCT;H<7v%q35FYaM$wM=iB+^% zg>JxZ+ub^FAjOWq2kvMGCCvPsr6Qe(j_9xQODNkX&9i#~$NSwYhB{-OZ$jiJ=b|%z zFxHuktUT2!Ek{2^;z{qo*Av?*K{YsFQ`8I9=$3t+~T;$ zN@o7_3H!CW#J?y>c(^mHjoxk9# zhlY1z+yF+D$MkI{*Z?LAum`p7owDj4_AaBJkgkw{fGX_noh0Nv!W>?JReI ze=hQJ;FG8$9?(V95|#*9Pr6T%T0q-s_DS<+amTY_RtK=QT{6zBv`V|uyS2#>t*C&v zTn48ee!2@d?Zs9z723(BATRwpBAZmf{oCnA5_d_M{eN@mh39h%*L8(mcv=5>~+Nv#yT z^I6;+>J!Omlm>IxmaFY;a2guAX{}jW`rtRn@phnLoZVUaY==EsWnc7@S7bH^$GCn! z`BpD^pz`f;--HjZaCs%{)D#_uP>8XEKdRMj+B2EB8579t9&8uVQ~egsvJmjBK8zvg z*C0bx@cn?@v=($W(0yscoz9d<*y<)DCE{UF{khftkCaB6rc=|0P zVG!>IWX21$2Ook=>rq^pqwO6<9j@GxyFDCnN}}~f+MX=oVnv6$?|dSnbrbO74L){J zwI!GIXZRhYN}9=Jh-CEH(ut2%RODzU_;WKfK^zu2-@;xZD0pqc5<)EsV#7*0%8Msc zDynMq(%Cu>QWoaZYTf}`{M;O0e}styA!4&f;GA^D!pk5Odq{om+j zx2a^s&7&8M_tDL`W!%`;_4eno{bza(LP{aMVRqCQW{0bg+}o;$9GCId<{`cM&dW|s z70qGY_E-{$})k!&wDI}*}y%N(*{KCb4PA22R-_x5%DyE**W*~ zbs5!Cv4E}7d85xFf3)KeLKHf(-{TZdYV07S^4om>saJr5?K<72uL0O%PS6k@t|J>$SO$yW}%>eaDUmJk>r2erPxG~`E0a_=NTIn&b zKUK`&kgSI8e_N`tnSrwqrqZ)4ec!Vu>)m@?MISyW#|^C)@=kOYZ-w4ujASXTtSpWB z5Sn#!JvKVi1M*P!1%?J5(+tLCTpB%(BrbN6NOAQ|77W%|Wn z;ss$cn#2alwSNbeyr)&8%$6JRi#>o?wEBlUFnD`XL(7y% z-n)dnj-Q0elxzm^M_lB;K|L*@z@E^CSX$52L&d+)+^f}8;Q861;o8(kIQn&F{b&6a z0x3U3dD&uT?0(u{S@n5b{??+XN_%6{4K6!^Df6!=*~o=Q+d9(g)^ciEjl{zrlt<`Y z>CC={DpkJTQ1Ap@k+`;Va+EErNFb)tJB7V|DsIjL{92c+`yuUJf^^6u<&hDcz*DU_ z>b~neRnzF*yg^NGxTxk6eH(C1{kd#}g zk5fe-F61SfhVl(9AR%JNl?T<`SEFOBWxw;|8Ow~9XIXR|UYi?Bq#~uuelWJui8ec@adG-$_a*t?M?HCQ0$?-#Y+$JZ$%2{#3 zUA5hHXcm$0vT0f5%^2_8+{#$ZC1KjTi_VUVlC8;N5DRflSaan}-gnyWnV#kXu zCnXG%mDu=qRr-V!O?SKxWS)Q9b9@t(&&Qrr-$!?J1Kdo9ScZk{llSORY5kO{;MG%6 z=I9AXa}PTJfQQ`C`)~t@s2#(kfb{}RLmE;+FyQ{{v3u9OVy7*!gGX+_t@(=UCh8U-J}rX_vRL%fC1`Tf$`X)xMt&04PASAEn-th>af zdZ-J`n1ID!71{9s2sYo*>RoJajUgvS99OPQrqD*m7Hb|EHeXIU7-qDnpMI;RVPtuU zI;n;8{nGsGo5JN0^Y;w0vL8EtD#uinKw|#~ZQmKyRM&0`3ZfJd0qI40N4j)S=_0*1 zrAZ4&??gem^xmaNFH%E~3P=Z~Lqd=)C5hAkA@T0_8{>TUoO6HOanJq9fIT*2@3q%@ zo;l|;r#FSLyi|YX0yFk}zQY!6RlL@U{LBzYRx`tw>g~$)G7egBPYx)ifIBreqnU^M zR)v@pqw68mBk=ot1{G;3OSO8_vBpdW*J#M?>OwvzXF%1pk$&B16kC6;e~N%{6(+= z)H`-4ylM&X?^)FCE!Gq3FXFhsp`pM+nFRQ;h=N>4C~osiYW{ZOz!kXa6F*med(ciV zf7Mjy1ZB6^KPv?-h>N&F>BhR^#!uzKnb{ zCE5sE!DyIFbApWxJ%w(OzY-LmS%2j>sV5|C=wAA9q`Uob!g|;fFwIUv%1ABwMfPa4n%*f6kqSyY*6;1!`0!F#%%Xxq2P)?l`^>6pizVZ?t7W8#$T<3@k z<1ceJ^HNhk;{5<2?|D`=(Pa1<7;_7re(1TFYUzuCEMgTzp5!5SbuJd8ZJ&u*PE?C) zCh@-ES96#jIGo&T!%};^!W0j~>HB`R`<_CBi7nbyH2ZJp}xJ#kjZ{4o0-+NQJMsk%$c(CiF>N1wB!}y>9-aAz}Z~|fQ_#` ztg9dk5+r&~)_FFdAjB$Tnd+i(qn@-om4R9OGx=>Iuic!<>#6~}Q*>$W ze|7(&#Ndp!!7=4U34u|Pf3VTxW=soq#tydvtyX?I`Wdy>-``^v@3VlX`-x-WuVnDQ zC^2@ok@LGN_nA0M1MeccmSMBq(H+rK)y(vyKsgznHCni$AZckh*N|OYVbVKQCclk6?3TzD`lwjCyeiu1j@)XBx_KXe^aT(>1x!b$#wn zgF`6c3LyPT`yR#cRjjucL^Y6NJa6V`$LSAy@LQ^aps#aAT5{2X)_?YYDQ?i&F#f9; zYfvsyRstA0N*U)tm^q^LJGu=aAIMpl-Pq$h|I+r|Zyy~M{&f0Bc?S9|H>;Z+*^eB~ zFzLnLLrGlGw`TiMW(t$sQ5JA6;I-tKRxBDmkJo+Ct@73$69!K;u8hqEC@7DAtQ7zIXM?`DeGa|m3uHUjEII$V2>owY*ie2?-l#$2 zlMYb7>c4#La0~2^=d=+a&F_C+L4WeJXl(tx_u{yY8n;TCcbQIZ`Vexm@y$5AUoRy! zcr#b_3DbF3^4K#2ewFC6XX(b(&NuS+j#z0ADs4wX)0BJq=a0dii}Kp$)7?)wb00hv z7%mHb^)a>fL3N4=kZ@6K^4tHMc;9rtMhW1iBxo*LVUnvx5V>8ZB@0qe^M@%<%ay)a zgLm}SG0v7O>*POc#d?b;((r@#U1mTYU(*F$`O~UTcn{(?ZC|gYLpT`~~{@i-_ZdQyX zB=Ww!*3IWN+B?yKfESs(N3`d!uLdZk_(6N=Guzh;x<%s#=-%jXTTu!{4=N{d$u{Bk zmzFE}0uO=>Iev3FkyYE`w<(5EdR}+e!lhTIjdVM?MC_9q3{192wK-*y{bJm1%t_vA zQ&eS=!F)tmqnS)PPLOJS{nOkNItn%6Tq!g{``l^NduCP~51e$L8W0$p0^#M<14iUh zlCx?CdImJUvvaB(I^=)GA~h>x%*VN!wLdUeXpvJ4_uldgD%wmV9jS=CT?!;w+*KtZ zV(s3hY1X6h{mRiRQks<+SzqxV`9^6AcK&-)wNH0MPb8+oEK&KWs*n3ZFOI9qVN2w{ zCKtR&Cxm8{+=?w$3V#ehTKMW-IDGcv7Y2XCWcN>puLyH;<6zEECXF)p;J8)R`0&gYqJ-Kvhtr#vK`$%x*BX5Y!OPj z|5;`FlO`q{n^mA&;?upmw$`3J73{ZZk zqi6NhN=w|>aKT{yS;nl1ksh_A(d^t)j&8a1`igrV;lDEf=z=5{7OBLo)rWwPnz1pL zu`gQyiOn3fXx`x2(A3a?_Sn_(*h#Wsx$WrphQY$zSiB|GIO@r5&NAhbsvRDk^_{t; zf()i+zCak7Wgz|QxRy;x2|?x^)g;R!{S4KFvHY0Kj`UCZgp<>=@YTcDt>=h8o;@g- zZ+~CpGOVIB`=LmKUgdi_ZKEW&kfEkNJH!(VYJL2=rf=D&!m8ENEM3K5*M-Rb@wKi> zz2SZnslHKC$PN4hz#h_iZT#-9n*HloBl`|x8mx>|cZ_{Xpvf+etC-Z1n^c*k(J!&M z``%eXcBB43-I@N#V#-l#PDl+twaEw9%fg3A!OW~oR`pNPg_7#@v!)~sGbe*KtE*6> zn8j74KT4a^BRR!uR!DCinAGBj94}cO-sl@H?m^K^LyZmQvtJhPvdR1<$nAIE;B`mh zJBIyDMZ>-p98A2p@M!lutoy2?C!*uyIYH)-olbt&fGe2`ro)#yaz}!8MiO3iu7N^2 zp>_p4nMb`R4VQYE-e)5izqCZ&r{`X*9?RtYE~p*BxF|^$aas}vI4vVlx28v>t)p%o z&@N2U9%Z2rH!5`sIu#Vjh(5j*j&hs3Bcdi|sQZ`T|J-fa{_Aeb^#8uw{@?GQm^8xS9sEcNr)So7U|7 z0Hb0YY9}$ptKqO>ny^Y2Bh4DD!>-^keW&2U$Id;?~{}<^PoFd4n6k4L}Fz z4r~@pj^!J@838Ufbej&xzUjiDL{Z+?VnlfDJ{WafaHrR8OK1Y@$z0xIqxPICIUP6O zx6M4-u7;czTV2c*D*H=76Cm5!p^7WgV-TLxzbkzER_s7p_lCwA1~moGf=;6~xRG<) z6fh?8TN==> zmV=YO*|bKiG@zw1o6JA!6D_Iq=@}n2(i_CyQ~mvyAUn7vUd42S5$g(M>NLW z)s}%@-!J zck}WepDti?$!$=@r_YT_-BquA=1ECS?jPHK0uH9^?A-(fHe;5~!ZmOLxcIeV=Wt_!G|gx;Asf@z|m;+S5ubwP9@A$Hd5V%O_Z%>!5}9 ztX*8Poz}m--B8EK#Kb`GK`@tdfV~!1Nw60P1bPi3{#4Yh=6*l=nHp)_M*|ZR71EC{ z2?%b+TCc-Jn*!y>8^(Qlvp3%qs|Ryut!QxtNWBj9u~?4h&Wi_T1m~QTQ#^}P({>k} zl+moeHFVP!0RJ8sXXVK8fjFQ5_v5UL+cRhj=vZHq&mnF-FBYhi=?dg|kwF-qQ z;V{~-jzWRor-sqZy*JtP@ejaslqeDj^M`dPwqS!+8`CK|R(R62m?Fy(GWH`>ZfJcZ zNGDP6?HLbUlR;xO1dkD`+z1@_O{yxneFIneBNKxyVqJ^eXcOYxXriQEJmd_7czmXu;B-1VMQq_Q&TAXW`EJpRbjqfXnl!4({%a~PaF)B0*jEa>( zcxCLTxFt7RK6%0MmimdB<`I|TaT>sZu-twdE*-wy_kOt_ZM%dlEOlLe2H}h}%z zN*EdIbDgyaK{h20Kjjn_u?u!s(WY4La(6HTESX-8)Gu9WbQxDfSrSW8yX`|)qhL%g zw729%9D5)nd4aj6uYKgpAt93YYCfs(S6Yxza~jlgYQMROhM_ArQQ#i=DsB+wgDhuu zBkKa+ToJXchB*pledDS4Xd{9;wOOOaFRx;bHjMMaq+7`jtx%+VB-@c=1)^-r2}To_ zW4kk?UZ?%;*jbGy1V~cI}S__(T>W@7r@Z2iuQSI%$)6lM{ZDmzc)^<$H zl`Y4fa>gtsHYB_cJW0OkSegsHb;EU;Gk;Nr`RfF(dZjZGPt+%#akL=D$U^by8;WhQ=E3qKd#7Z$U80S$fo2{KCGwwoi4#& z$u0E6AAstEygKP*v9F2XlgKcP_3)Sq=Ii=C9Q5v&7+C6W$AMC0xkBO~bI$eOO+Iul8j=5ir`gax!v0 z*@rsKuU|W?G(O*^C`gm_a^DV*fpbT<`8C|CVcytWiclbKdcnAc}2l5p+Im`wN=`J+_K0A?tC? z;ce--i>Q6Ba29k&NBF@n_;PGjbv?~;Cp02CI|aFhoG?;+dgnQRyzOQ9Z;XiX4iidu zi^)BpuMI>eW7rh;z~D%Y+@H*R+9QRhw8`-H_oCOOP=C8l=TQ_TFDPO=v?nyEzDcwLS+;wFl~KLmjA0EFMNLM{?-kt8XPJ2xn%P%; zz6|?CL#-!L-s;mVw_Z9q)J-`gc_cJ9SktQUpFMC3uBTCFPQiTL4Tt)7q!bGyF%3O(Wv9F8h{3Ww^#3@js|{%gFHQ}Wi8-!J}%k22P& z`Dk4CJ{g&Ep_ytWCRDl63oTa00sArD6pD8&KBh(iI*BM{{3qx+bb%SblLPU$o34t$ z2;SP;m=YEr`G#C*#`K6NdRl+?N?xv zPPXUzW`^n=1cZ~y{Ui{;5BRcspxEP8`eOiKyEd`gh&&(F(S;=}fP&|q) zNV&mw)e}GO36X;o+hh!O%&FOa+g^$`IAW{pT&RCR%L`Fe;a^nVy>oo~P^tKzN= zQkToHtdlq``s*H4(ld~WSLo!yiA&s~X*L}-`x|Y#1m3i#1jbq1DnPuq;FG%{>)?ln zriDMJne)cw-=}lOZ1z}Mj{MBJFBC{eHMmVCSpB9^JKI!$j@$g@p+Od2dyUz-v{-@H zDbQ1yXGBfd)=aQjLh{k5!>6iYLk|U7HSJr?0__I(A9r3Q2d>~w!@p~7x+5%?xjIO? z3`EN9m0m0wzB|wKYHb|11KJ?vmKjU!0z3JWXEK8Uy)8?V^hynk<|-3PPfV~OWo(&t zEEv%t#QL+gDzU(W9>LGC>OE&@%OIpV_wKJ>ae9I{xjsNgMZNiv7yZ3l{XOMe_{QRzUY5|^pJRn+ z8q%JGRVIFVLJO+RbeAYr-T^VKs@XyIOaJ1v)p*q1L)k<)rF)}D(Ye`Yrb0d~LGor@ zineVM!cE~pM%;4&m5UT@(Op2U>I40!CIa${cw5jwLy0E`2=8pbBp)z~P(}dau1Gf=>kaKtJ)#P+TE zLqUo_Abf!0W^omK2JHn2vcIy}jQ5j2kQ*4_=jpx8$!g;^dW^1>hH6|VA@9~Mr#m^p zn3M$*$_Gaa>SB8Mek>q+MJyf6%=C2B$fpEa?z;-!w-8dMQ`9_9$;Z41Jm1ZhtqV4f z*$t*{iGMIXjZ;}j(gn0=;uUls&b7EQYL8^nZ1DLm7=@23 z9Ym~z0>$z5L9g!|Hs1z`IeJPrGtI11x*_5p8)NvQk%%fqq(fv6QN4m=Tj(*X?QqPq z2>3o-QTM-}!q!2{EMs?fh$WvhxO+s)zL`7y8{GP&wNSRnZ#TkmHTYi-A!vW*_FS!r zfdiv)E7eL=BJ*P7B-RUwA3}O@9WqCai@t%e!k8-511b3_1;_lmYj5~#&Xs-854*B< zK6yOZ6+Mn(UUhtYC{03Vmp8s8K+mmsSAtGU*gxD66{P7}^D@xk!bE9Qs2&Ajg6Z~; zQFCt{S9pKim^!324qJ}9xf4QzDkw@G@9>oWzUT89nVqU7IU`NW5l=R97#3NUt^9By zrD%IaR^;HH|H-;KTdwG+yCtuazY?UEGNdIIMG_B9x2ohMBUTi+Dww^!g+;D$9``}G zePTt98)|OJGZ}yQ{0l|wl<^in^91!q94>e1iZLn?4WGs^6<*@69~Jn+xr>aCk~vmh zCdLmws`n-@WFOsQ>y-}JUXqV&a`!yceL?+3-^jkUPAu!Ku&$(Rz1m%0W+xM&k8=*< z`eQ+R8L!WUBVyOYW9Safw5@==P7m+)J;}ZDGXbs~zD!WMEJ_ zZ&1mGfuz_p3wTzILuM%irhMrhXpRCW$dfOcBos|9jNo2%-PCII3FuQ42aSzNjhx-j zM}9JRGV}cWcwT6sKLecs4HnT+$U}8pu_wM*?qX|*rN{Y%Infii7HZ!}i6#v>JAH`Z z#yk$q!+^IX{JopPmI+}ZZf)7Gq2aJfs=)aUZT4J1G~GOB)ARbi*&0JoPZE`Gilzzd`T)fU6aDW-uT8B zwo>*-&@240TUlFU$k%+vo6r55y^fPF17LMG*61)hI-{M^#Y$D&^ZsWU*#*Mw{9e*} zE(dvuIu`9&NotHYCcHoWG;t{J+Vw)fR>a!vQhd*u+&~x~qJA~{-|hc%=%lm|`8BEs2}aHUTD-kBI30;L|PMzefti}S4VZusJn{pF!aYh?}LVn0F7h+i}9`i z+n;cM*lu50!!$DNmRpN}?&RXp%#caekfE8e#`6sS4=3Dmy0W)fRwLg9@B(--0)Jt< z1L~PVLsXj&)yYC@91MS~J`hM3j~ujpXG#8p(3Zd-cGnD#Tyuc*TWqiH9OQR3cs3q_ zcHZR32dNwnCVy3h(MJ=<>02c68@>pUQk1yvzS1iXNb&dRtLm25;Y>t>;>{L&y2FPG zR!saa4uzd1loPV+Jav+m=@UW}%4Sjg%eJ)wBT==~41`f?h1;08UE845OVQxfj=o0u zhJ;H`buXrVVQt|V7Q%?BQcCqamWUpSf$u+zm z*~r@#%o)8=%(3uYkk5pB_RW@LowysR-@V&j|5G_e73av6(74UDM8_U8Q$65 ztK>yxN1vSyWwWAwsvs^(p7g0P`ID^-;g1-7)tK2HPx%MC4!uY^uUoqyfl=lJm$7}f z+W>4JMPz(Wm9s43)i$mm|6Fk~`!d!u8ST*jZoQa+*i;j4ka-mnL*w+4LG$J9IqIF^ zLB;VS(KeoMR2JC>Hb1$Y^%^ja&0^RIdu$A9Uy&!Wdk%&DLN3OxJevDs1YbT%8TY_MN~BT<=@^ z=wcNL{Fm97Ut+Arz7W$%pP8hRl03=aGvIm86S4E6xuEH$19~-Rx4wV>QAm{y7HWCG zzPlPyWj%*ioI5jGWcLU^s4YCpSq0|$5BQWzLigYMXR?)Ip2&Hmh_vzpmcD+9(i;B= zGk=^epB*@OZ3q9EzuNUOx{f|9G>8rNJap&z`fYJ`uVy7wyH99&bR)~(XgAPA;wC+T zqLS=eUXy3d!&7>Fl)ZHmq3??kKJ$o%gc-e~ntL0;b3i+Ady|GFC1c{wjkIzZZ{?m{ zR2w|0WdQwJ5!oFK^^Gj>yD#crR2U^ge!CWKQ-eH7UV8hYX6spJN>K2k-qk<4$bZi; zXj5i^fiz4m@R1^h5=g@wLf^WC0EtS@|0F6+<7^|kXi;WB9wr$0c@=~Er1Rs>q2dq0 z|F>|2%Io&PKfSg(yc;Kf3GNOrm<35)^sc$;acd-wmg%u&41+8!7yD9XR}wXqYWG)Q zrX}~)EN9y0{t+#iMQdnc$esZaIS$uP}?-7IJSZ8*n)JTLmeuZ zTD0$e?B8xdx}Qg}RbAguwD0!XC!$GcMuP1~2|EDtqWIMNpyT%g1edY?V`BXq@6HKG z?0C!|Ir2%{i1lFp(5`J)7QoioeqwmXJUwIueW?d}9)P&8Yi^Z%^OVK*3f_bDb=pq4 zF>YY-w5O#<{8rIvOh5`#+b@$YX??}x0<=vx9L0Kq&Nh;Lv;?yppywsDTos{E6gX*C zR_cEX?Lp@pc7S_i1W*A#1>l~LMU2Ef@o5%#hqn1;8cP}B_ozBljvh|GGv1Pvb^k=@L{$DdCX4F%&?c0I5yC!oGAc3Z@f$`<3j5)bae?D zFni3M&D^QlebFCLFRXiZmK7Jy<7yzNJ!?e_yfo9cgRpuYHa5tc&Ln93J6CUW1)E!J zOwZq$@E=`_X;xSNGEsX*Mj=W1k$^b%=Gtv9FA*6gSl>6~nT?*{2of;e&c!=sEH1oQ z>{#)DIj^>Xj&2_czf7jjd}F?$5?7W=#~SqQ47Xg#s&Ec-spOtV}g zoxB~yse4228Z`zx%L}GQOmlnMR8>2F-f<6Co3@EKgk@q&THwVPAxraTf98q>X(#IF zFNssM3306be*M=yES1BUA`FK-7a8%-wk`o;ey(#B7LR%e72nGRn@2foZr|uuf=T>7(ow)-cEs-i&t+2K6L#!Vyb#>a^JTyyVjPnHy2Y-YzONr$&$@0Oe9(Zm3Q5g z>c|#+UvM*CO^Jh2M(uzk;t)TthL#Zr00&MXw?Nlm!*h2YNk%WwZd>+R=d~bbQxs>g zn&7X~(LdPU7B+?m4UZ(O^?Vz>rFDIeQM1@Y`haAChLpGihKM%vL-Fg9JK`Ft$v0?| zY{*}(46m#OUb3#ir#%DvVhGZ0d!K}ARI^*FlMR~Gsc;buT5%3!#Wksc1KIpV6_YUK zS(hEZ$L}t)d~Jg}u-8auJW5`-;jeBZf3U9qHq87Uqu=&%59FjoxZlvzW(eX?H(}&S zF$#!e>IT)eT)AO${sScK{4O7Jxl;8y4{BNaHB5fqq_-nW#w$ zEQ)*&c>2vfmRWA##Hi{h{LU)$cMgqxnl#w5^U&dDCMcNZefI)g36 zLpq2p0#-{rw5;D`uOF6X?-=ZAd9rE{Y~3Q;o-YMnQwlbp^17_#dI7fquq#o2fzJ&0 z9EyBekHjCaU9&>ZxBlW|dkUFb3!?sY-f62#0#j~9+UdvFAijz{HD}4PNEf*kJF)Az z2r36Yr@AtvN9B5T@|AaPMAxB~fuw(()!EX&8Nkv2Jb;P4om89~*q*3qTH8|0-lkH0M07bY$Qh zt8h;`VcT*K`-HX`S~0#z_;8o7+PlElbwkjWU);FBmyEeA>$pjet8Hzt?m)mz;FD(F zW^~n&;0W~yj^R8ImWB-EK*F22SEeIac8b-AICUQ~M&7vTqGqBdMEJ5h&c;%MF5=ks zR0gVa;H7YR7k*x#l^__ZX&uF3_2g~_zoFS++KQHqan_Ton~!ZkE^DJkRjpJ`p;mpz zlKwQg!Jpe!9oqLl#Z_1Y*ZTO$r}&RPpDHb8w$Al%44KPxql-v;UgK>(%`*Ym&)1H!}C0FDX4FJ2kp_SP;qp!@y+ z15+H&b`1Cxv@9N!VD$so@J9?#UoS)xzOYFQJgruRs~BDo4gaEi#M>o-55iDlpOiGT z^&NXPm5ThkYI%X)kq5>)0IkD06yUS5fHP)z6czxiX0x`GFL!hBGtLJ)SadnS2r8nc zug|T3y_vSjwDme2ykiy!29omv0cGd1;zrY&10I0u{t^`5f$sk~P=q0%A;A#fn|!7sbalH-0HfUL^Pr zYs+qOJ-+^sjji=D-zo6}$ynvKgJ6>Cdv#wXZ5|w)$5VcQo;*7PzCSS9H|1d{W#{1o zqu+?GZ10zuir)~$!kc09r3RjBCo{^z{{8Hyn}O3K_?iQY8vG_jCcN!Zccy_p2-+?0 zDJyepE5UG3gKcf2xyA7Nr1wq{ac*i=87ta1ZcEuSxGwL$u1uO0O_ZdP!l2q6*4NLI zncrQQB&pCcyJEYr9^uQFs#IAXO@CzTnh?ai`by`er-*7JNjwecenygK*#}J{0BoKL ztxQHBS^H7FHjKlGYuMn9#3)2 zwj*9{)z#Gbzw$n#x&i(nqVx#Lm1j|~`}jZt+&cg>YCT!w#g;gDJQxmamChkn`Pkh$ z;W4~m_1f6(_eya(;A%78ojifI8J=AhCy?!?Cq}{Xt)SHe3NP*gy`)m?kKBm%_MH06)j|mGm6@g|xV7F^HyKe!} z*V$iO;3Z~}{hs<=sAH3WVJ9nha~F9~E0<28kux-G>Yx+%e+zZYL~UROMru4-vfjty~ zcn7%W?QJ0QL9_9@X3Dj*H|-bJ&&_hb?}$mhy|Lorb*Q&`tQ;P3ptPwp>C%9DFgYP^ z4MM)1r7UZcSbm^n##cU2LtxFt)lwC2`D2Bt)$gqF_zPON!OjAL37DEPbUKo1u2VBg z8Qa)@mXPt4op4i>AvuW4F#WrwEKQwwVbDU! z$-CNo@l+MXSCk^YcX6Z4<83D*1A*KnVjzf?SGyDSlLC|5v27E7^IP%5sqS3$G|?1Ifgg&RtNO)kJ~4=%(T;dbF3{(ORjOL<#292 zFd4M#*@al;wBwPXY2z|0#Xro|xZ4Jeh9R!7fiMUCQZ0gSBlX0l?@z7Jv1s*CG<0=y z`9<)`sahw?$_5k6UrHL1w$haN!1v?4Q*^Q=11C>Xjf(4aAplx6_}E><1?J#U=dsPA zYn1pRDF{v&33w%~4y%Asz*#mJ-3R0>2AtrVR{Yya`fdCXwuy9;%2=+ZG%#=_6u&3X zH`)&%KC{c`Xngkh+L?DqB>n_^kz#uS-sl0KSW~73LEL#_Qywd%aUXn{RRok~F}EfG zW+;#a9euqB?23ATLS^RLCNNoSXIi`lptrH3%BR)9(b^VtWrt<|ZSy}Gg7}*WUHoAQ z%+Wn7zrYfmf~|jHDW;^%NuV}{>_y6HT}ybs5}>EnOCQ#GxOojfk{I9%a!jLl7zsOp zh6YY_C`^xI7(F*6{gjD*GP=j8?j)0})YHzzns7*A+*cY6F$HND&u6<#%G92njOA%A z+#N-#e;V1n2Dlu7TES14=3RN9Q5AHQGPwZA`(kr;3fYV>%v0d5lSXV;Ruv0LqhZIg zG{L>k(j$ew1ns|^Lu(l}QQtR~@W;YZyrn69gPj+1&-q<#mrL!*vyb1cGQW+Ob0hfu z^sS)k2^ekH%Di@Hr+{M4n#?|%T?6^leq$Q<3FUoXg2}u8sVr5}Lzj@9tr=~=_D{?H z8)(@@LrEI^NA)(>QcM&bnL`&%4tTr$Uv$-6hyL8J@J|DN(c4|h;$(DzDW82^KL%#~ z9pZ83p*(K2E{_TLU5QE_9opa5Ey&=dNN9+@wu$Pl<|5_~^Q_Hcav;{fxzIl0PkXzq z!ylW*${W6|cxbD+vc1)B2_U0spe?)VeP7p`DGB8q!RnmM26wVQUW9aWW2mv!04e{K zq}v*pEr5XB=y5PTh~CaP?d++;&PO3lYCqmv$oHBmGEBKtS-B;0?jew*;7p z87;1i;+{DIeFB=BjW}$>zwF-r?ID}VCIGDZ|K>}6@?U+)1^++zlAF8nuh&%-XIDz) z7gsX4?#5qgy~<;hb#OP|^RuVCU<*vvNO+blU6G(l@*_$g%sK1(ly*=YHu0|1U*O9h zfp72G+8F)IG+ueYb8G;i-e+H`-e8-o?pCZBdkck-+h+u%L-y;NY3cON$riYurX)cW5uvC-xOinV=w6w8GcVqQ$SY_7ZG-B zI{GU3Om9hhjwUXc#@#;c{nsh5t<$^-q z0S8yw1i=RmhZZ5ze&u1?*gdFb@uq7qr?rMaRFSeihN_*IrZ&4Y%^ie45^Rk1i#@a* zTME}|JC@&Vkx>_P0X;W}7W9>M&42vBEsscYuIz*IwL;G|(M`&$ZZ_>s4Me4mB0Eqo90d>8nr4k5|+!LFGlm+pV*J zvC{0VrG&202knhPB=BYoXsvWfacldIrz082=h(8DC$BSpGcLlHe)vM-MKc=RK4!+e zhH=9%A^=(k`9Xh;??#)I)@HV^s*zd;b^fJc743okW8VCH7dO|fpx0H|vcK}B1-Xo# zZD?+(GuM?@v*T}L7Gs~KvC7iWFWpo9rTUcw$r83RB$TSd{G-dlAc~)!JxX8on0?E? zcTwj&hPqp>>Qz8CqPW;2;0$IyF|P4^M{Rh^`JKbW`Zia#Wj&9r>>iJymc^@AzGs+$ zM&Ip3)bpJNY!-&-m9LY}(OiPNiaT@EmAJa8nv&Z~px7up>dQkT^!kq$Pfhse`c zmgUE732K!p&qTgFdVK82sSrY~MM@?{T6@PC5LnT1WqctBB`44#AU~DmBG8h&*&x>M zd)_G8g*U~pV!xPZSV5}blCV%h3!)@pZckq4_2wS+65c0=y1!3^qumDE-_g>2?&~|Z zTSAz0Z%w;($=gHYDt~n#g=*Cp96Qrcq%x=FM?|l2+;W$t*twIl*sfxr0M3{UeZFCn zhkk%qol8%lEfiZ3s@D6J`_0+T?tUBXJ^&h~D}Aerr9-Ti80m8SSX=}NCq~zbeNMJ4 zG-h~?-->n={Io)UywvifSnA}A^~eF;3VnjHP8_GwBtNRa7z+E`%uJxx%S(<>$~`$y z0(YNeHgYy&tct7NCt7@JYmTmo{3+B5e;YP(eEQn@5h)w`@5gkPJUSK-MdibQ!xp&0bF*3$3sF9L=mkEq=>^1q z=S2?z!Li1Z;=D`Q0=RiCr(P>I{Z0=F`O!y97l|_|9+sm7b>k$3Kf6}w1io2j20qiR zCn^I zvy$W{wvLw^&p3<{D-v4SN$>qIo;9K#NK6e!UY=aFBd@I+UP~9vhNOOX@#$!$4NiXS z?!as@z&S!fP6kZq_N*99;n8qk)V6!wtL?aFwVFuxy@6qmE`~p;y59P3=^A$)ztTUr zZ1_vC?0znTtCj;$)SwT%&1|biKobQJP}6E_xQfvq5&)C+PX{ywJ{g7p9S{u*%k&oT z7JOCz5@Z?y4{)th2mKWw{s-`tcITxF`oIig3ZByL3aG&mR^`FhtICJTzRDM1fbg5F z#Zcj9l=uED1654_0bZ`p(F_v@m=#K+z^9OAfB}S9c7TN2(-5I`9*5WRMj}=Lp5)Ri zL+y?Y6dYT=T>>69)F#iE0!M`qZ1DlxF(# zJ{^cX_0CLXWLedO|JQ!oWl`Az@Y1E1C!Y+(w__%k#PpgCJ&wWr5u)h10Rw_m0hb{E z*LHuVfZ+07r#a;-1^~MT#tc6||GdKL0xSd!ipv1jB8cU+%yoe;8hFI~y*)tpm;v|@ z@v1v~f~NO@r0p~K*Knn=4TFZyTc+DWz6({949#1Aj;RVnk&;WjkjsjE$1(81waEN^ zJ`dr<>#34(ddJrM#Z*~)#~yE0?-2bUu$ULMCQBa~5XmHve23+Q(lR(eaY8<;57X0& z0g0?K-B>7inRzj%OlE7XL8e}r`7(QG>HY)F5ppjF7Z64B=Ya3j&K?sy%AO!lS4u41 z`)~H^_YCw6RPN?(TD1Z}xI^1n<2sV{Gnx~J6L0JSS22JP!nY3*Sg>AC^y z{@-mtDVuvWgzhB4b76SE)2!=23vG1Pk<+hxcFO&4v90Us^)UFb9eaRZ!~$qRP*M~6 zGdNKB%BL6j@;`T7#=M4KAB?LsDH0F2WN3UDKnnihLWHA?rY0I zR3ES(7RRn7UZPbULbWDT*~BA|pG`YfFXo|D=H29tvej;_OegYB8Rzu3+}JavB(f7s z32Isi>;TR@F!{wfB)1?h*f(?)anyi#ptTKgDV7l!6d!h{W)v3`W;Vz)Eoad}oQEIx zjbIKk%+h6Nvo3vvyF@v=lC8`|?+0zi$wekfUH_KiN>@MoFmL@{H1syPM_LI|(KNV@LA*MEA)DCPHa*B#!ZC<2?xr zV^<5BY;$++HI@!^x!35b65Y71=m6&SwcQ=*T^m=}ZB>-fZM-6@K2fn`c%UmBwQ}Y6 zm_4#ymFT`4LfOHKT;>(P>q4csfN$y@BGi|x`_Tz2!%-L9Ur9SHy(&ZRQ2uAMpPK?*Hk3!nts^st2H*tqtHmUzVZR zsm;DWP~d59yYAQl?lNG&TxNe3D19#VFL{Ai2|iC@(*bV9Le~BFe>#5`sH*t-#SYoB zSX?bW%TzeWK74+>6%c@~s7mnY{{d&EW;Qu}HvtYzuC>yzQlCnjANXF8^)R2GZ3S5I zfqx0yWwTj;=jU~Q^{q}~0GEb0t(!@WjYzLU>J0}k9>d>1nxL%TeNv#kDZXP0Q^m9! z)Z9fId=eIL!^me1Qs0*>)`cDzpJ+XhrPfDX{eJQNVtXmrw)3#?ss7gQysDvX*TI&T z7$t@+zw&A1{vPKC(@nQ;CvRH5^0`!MZfmF=*8}Bx*@nqy{%2aHR?Tl|#3w#?q8is_>H=F6WW zH5@H(UowRp!WtxvFQP=<_cGK(zYx9Q}5d+xI9Im zgF2?&WW(B=cz1d}y>cfUVO0-)%O0nHr9Xm8d~yD~3R{a?f~@uG$p-nxgTi}YTc&W4 zFQx2TmM}3>)9%cW$j|D}8}Izt%mE44wRfD4z=Cv3+nQ;DSlS_CZJi$g&XgfJgDs^z z-o7f5eW=2R)^qA`MsusRRgCM{&VMzK<;16N72^)+grgi?xzZ*rR+F@p?0{h#mNW*Ujc%QooYh$1}U|)jrPnkZo@fFErT91;vW~-u-tX!hh%k z8u*k?Lk4 zaPlCq7c&4$YCvtJbK?$NNwf2t`PBMjq=-iP8EfHX6mI%@8Wa-T5Bh;=@e6Lj+6ncZdTbW7YPZZ7Og339-Eu!gkJSkJ8%p@*%bMkMEjo2A z$rgAdqh0ggmmBM+ME{(N)v!G87XMsRS}L^-41{BdR& zW>{oM7SCGix$o<~iY1q!)=e#m7osFE2kx%}EmeF2FXbVt>0+87all)qU*3h@REw-8 z_4BR1N8z8PSvs;RT+1lK6rk9sp|HKZYoMkpMCQo=aVtLrL824CDwRT>0NW`vG4qT zLCaaqk)5-7zOlP=d8-Q=F3YL$HC&a=O_#)A^|p1S^!fO4bO(XI*Cc#ze?(ZMwsbeO zrS?6Dk1xGrp8mGDz&w-xgo(9ilhe+cmMDWpk#**PojMtt9&7WP-Xqo)SDM);rh|76 z8FtJ|z3&fa8-Ke@m{7Sf<@>G2<9Y()MnPg}l+ zNl&L}Kl|Q95?MlbowE|GNa#3+WDR25${Ag8EQ4Tr7&IGZl<6>c@38JzODxZgg6=uH zoms9JhiGi{7?c$vwjM(0b-7#nODCo*^EInPS}NZcc&jEAN6l~=qFMS!qCEJ9M$`|j z&EoI3vemh4l?9J6O-!|@KV9yf$AU+_WS==A@2}}Rq6??yq_x&FILO9$8{Q0&hp6uZ zJqcubxFI074`(p!v0vag_oT7zTl%Oc&kZ#?q8)lax?8IzF$vnMODz6ME&*P<%vn>d zdZ{H5u4C1G8=GGrl_KOmcNmwA*q5xS#`Qi{W8<%LPl`kBbbkopXUGch$KJ`nD!I$F z`fd(SIi_ylI7mvVHN<-!q#Lpm-Oir5O#k@$^dxK_Q{PHktBCa2YHaKHqv^~O9VVh% z>F&-ZERVh>F8Wg4Xljw^9Xq)Zso@s>5SZGU0D-&pK+H2IHW}*vUy+yQ=Kng2ji5aO z+PRwge&{OOq7|-nfn^=j!Fna@47xN23YY0tSa#?C9Ff#Y?#?k%1?E#jmTX-G*OUJg z1vt3@4u1&VX#eV4B~Dy}<1=Kc#ngvkkZRUlilDcl?QCwi340B1hrj2gR+&3`L3Cqh1@&81|=ls_E<@Ga` zofZ&e>i(bc8}*|8YTbHDE~8wN&ycP4C&0V=T+Yr zj=2EI~x`D3yp`yWWuC3sJ~lZpvYe2xQ!`M0_y->D*z=Z&_d7RxGl(V ze^=kDI)J;&Aqwy<`bw(i`Co-T=m)q1=yDZ6&Plo|0>>*M0R~0zEFrHGo4CCQmD0g+ zq>mCkc6I80z(8?r76wd^y;YAtSiBN=o)IK-ilReGw>voz=Z}@ zd2#d(Ca+@|I`9=3*q;;uAF$3(c2%bq_~ER*0+?+@xB`dz{1=s$C@(KF{@k4wQsf9&)(J&I1+b)E?nb!GKg9t9pJ8P(yq(NB5c!>)@q#G!t@v zqzOhx^S-Fsbf1=P8RufE2;-38GWg1QY1Vs)5tEsXlhlT8>~*}}3HJu+62ylYUz|RFsu1az&UE72xq={A zLq{-xZQJ%80KS@5T%kOFppXFoS^NOn!v{JB$9EpNvjTlP(^)i*P3Q7X{+lj>bCyse z$@zRT6U_d-q>@z28JfNQ{XDgZ#+08xJ2SI>FHiAf8FDI#`vIDjqWSiXY8PLYiG4kL-PD40$T>o%zA5Z&R{W zUe!O26kb;zvtD!}mZ%#W%~9y8{COj4#!6>fPZ{Nw58w-@ucbMIg4FDZ8uBxO@4x&G z)G+FI1D#`GKu0ZX<0pl*j7yQaYoB;(U)S<-@@E1EgPDSwuESzM2bgY8lyC|4*YUXe zxCzskzj#Pdjgq=^+b(H0JJxt6_6q}<);(gKd(TF*%(k(#&S==de);r5>xjIed6uuy zgt2YzZ+$K02-BkKchB2>M(YO`zd`4)@IW% zry$F_OALx2tW=Kx%O?Elon}o5kCdHpoLIbEA*oejky#6$n98mE*l3A}*FT;#7Hc#M z4);#ZQ6Vb-K7Dgk?T1Z2kTK+Cs`vrd%Rh;(|D1grg{o}ARSa$dlC)1U-Qj|dAelQ$ z`}$i;c={Pd)o>Kp4MuukGyemD+x`Xgi^v>Mt=S@vHnm$pqgVbrCGT!Ze+=CYpirTz@YvN`4Oo zt6PVy$MhN9P^CwVt2rHTN4o~LV`nZg=z4q1sC<4C!T`udOkp#IamU^+gwf?1+w<8u ztVJ4)LT0j=obELH+%@-clPBzrPPYg7cy89ThDum+Uko4`oLT}BH7c}qDhg`y5dcby zoegXR)h$TwQIz~M`cXY~=Uwju__ zqc~wfF8keA?Jmb-tOI*%*H0SFG!Y60Ld*NRsKUrWkVPbJt@_}oz*CHVVCsDqb0Zce zMtSXL`TMaqboXBJ);AQ|Sr5U2aAS~kzsVGXxQjCLqi!D%bIl!R8Pc!xW2_bp7`8*N z6iD*qo0z9W%wuN}XtsUbv%y$SEbDiMjzuQwg2l z23_nbe;f1)Or!P!JL+(17^6kQGKB;mESq_t1huF8;s;T(y?*rb>!t97lNy<+8E^LW z&w(d$p4PEW5LfLSGJEBc=bVOs|-<<&pt!WF<-hRj5-$FQJp8d&|=@Pei^m7Uie7TU!sz>yCgL(x? z|EYg zRYI``)hgqvm3AhMfi_J*jWCAtudf*2vn)m^1h)E*LdM8L<`$)$$`myoap1z;MMLxZ zt=AJ}V$=A;%3-o4>UGs2Ih-HvX89Hm;QL#Spif-o2Wxaz(B7T`-#nFd!kDh}#q#p( z=@rw5W|;!BhxE8X!W!_hBPDS&UpUK#%h-TOv2%Q^=(9Tl+7Dl6hQ9b#{tBGm*vArs zgtEvv`<$v`qB2|EY?!P)N^gHoa!2jv*!@Dw-W2AcZg#p}Lw$GiHu(2eKjWu)!qY9+ zQiP(xf=s1@(=$(2f8%oU(y(_fcefXF>KKwVVKdAD12{lK^#me?rWJueha9w~<9oZ3 zwBwr^-L{1|XcTICRVVeW1NEwBBCnnNFEtP4|5WpsLjRkXr#$cKXs_bv3?D zMEnglwF7ZP>PBd-Gb=*oXd^HU0T9yCh$&iZ8t_~HzrWMKmoBT2j#ijD%YeSqb{_*^ zB38C%g?}OmA{;ki0)#g^FUJvV5q1LFey~Bu5x=PfcGMOj_&+x zT31%yt#7w)dk6;0w`5i)FUz}LmiIciPx0dH*^SR)votUHG^&0uyJIWb#}5gnM)xKI zR&r?%bdCKV;ZwI;Be;~s56PLFHZVFpI|F>@V4-s#>GvNFA>`WGq|7GqwZ^0WMyEtZ0 z<)cxrIS}TWPjnykt(0tr8y=2?KPX65ap21#lHGlcBqbmqaYG$*o;M&^Aq3fzNpWEV za-d|r5q_(06?V(UCHVQk7~nt~)OV!TfzOiS_00HD5_>kQw?q3dPCt`V=x6woYqn9J z)J@1G_(XTDj(k?L90QCNN9!BUlw!9oEH!aBv zhjrMN`|qfTXIP&NBDGDhI<}UR@0!LTbk|qs`wp|MEuOGG5FzbKfLORsti%NQx1XF5 zX9a%R44Lz58SREYwv$X6C%JTP>Y>n$F-*92-GQ}3a`}yDtc(-D9O2B&?wVElzeJP8 z(SL|0mH(G$!uvPTq%aqJNVzI>b@8s#gf!T+Dvj~Bgg6cpIQnX0?5%_C`$6UBW%}}o z>;0;cypGD0KN9t0IHa1AkfT1{td3{IfdMaY`^ypLx5Mz~6>hX3(g`9pD|QS{>rJ>p%ov4q{8E39xgBW5Cv6a;R3 z^PY;bL2^U*b0Yh1vw?*axsM(p&BCq^TW?1C>$>|`r#w#B zCXdrtZ-YH8Wgse{c^a`VGY0=(SkpfT)H~zjx(tp$>y}#bVd6B*D0uBJaTf-ecR+3& zc}!oVw2jx>XZT+Z>C>3eRrKbWs6 zc3lz6vMTa^UgGJHBD$@#vsXC$k#inG3KC;cBFovjr2H>FF~Cmrk55ca$C}4YrR`Io zHg^;Ow_w}W_bS@|L#_FHh~;G{XSIy&aog!LwDVcgM)lX8ddQ!e2ZPk(=9^0fieJ|y z`0*hNEkk6&3kBRxKWAr+jzJQd4FG+B*M-ocoI*spknt~~JJdgfIEGZ}yd;KA0Q+#$TqXmi*>@IA8QD8r@PG;@D_qw(ptF*%UDK2b-#^QLd#aXXN`t~ycZ}nV@-K+LOQKr#A7?RJ9}0!XJTLbViQR~YvE@HH zl;Hj`J4ah=UgSp}NMaUJNuTf|w|~ufXCtqocb)e~`H%Aa406v&qY1;j_*3y?)gDV` z)7OmmQG1Yx2=&$G`i#})s9^qF8ryf@2Y`?%nHvnSxHqN?ZVwwDN}W}Y+KN*9t{ZuQ z->I6Y-ZcFum-W_mB&KsC_h2;0Xf!6PsMx#Vd49dRV)ux>cLuvF32i<&5eH!aL# zMr_m}_)4(NBM@L@)qjM34hw9>7ZYgTIzOx_tvtph|JmU*ghvFRQ+UQF)}0EwZ9eSi zf4R~Ju}hSxRNO9D!xm#R2~^}3zd$axemsFcrJLPiSJ$a`P%HOmn+F;`Z_9!WH~Wn{ zt*f`#+=MH_uPYeSvym$(?;89JH}vwC6t>(~tp26kAd9hgZI5eQ@#I^T{KFDT@#2)c zq{e7UMfnDMNyFRRe({!#??*#Aip$93WFNGBN8o63V?-MA*H?M9&&DV2&Fx6DUce(cK&h%`$_B^Qb@L1xb`ou zc~&+8iUepe?j%vkWaWH8|MBdK^TFOK$E41;lYIVCi5_;0M_}Sv7cinhbne9r=%TY) z+dzefoEh@MtiKP7mj{`_=OQM?B@Wd2S_bWUhg54xYUnVjEF*9bzdhQ|-N;v6bjr`N z-(2kdUO|3QY2K5KT2nIJI4u>bhlhI%(i~~Y$5yR?b56%htCWPNd}G?%1e^Oc&vVT} z$fjZ9E+p^%q^yifJqkp&C!IA02HCB%yl8~`{Au(hFBTk(qe`&X&=ik&uBYWSODFFy z%CZJ4sQ7!|%;}oXBJU9Od5Ec8YEPItkD6|+`L1hVvRQJ3%Zc^>CKCT)ZQI&GBxQg> zg8Ia3`(xSL?~PLOxVUELMJrDkC5Pa58x_u}vkqa&WzI|j*Sv-PR8mR4j*HuZWq0`E z>Tt|xH4)@7NDcx8L5B?ToH<7&Cd33@ay&KW9Vdy`%?am!HMNx=s)hfsqZGZgsC1%G zRgL4o!SNipo--Np4d|iLvQm%I7e8p^hUgpN8iIsTVQ;QU{BC<xn5{6S7M`sPg$7aIwO{S zJ17DiZ3?0p%p4~z?dr303hVsSD&-2Dw5oB+E)!^EsRH<+hJ}Kyu_}zVqPJCDP1mkx zM%O6h6XN@gPg)nG^H%)F_D_!9?51rAxVbvEl!)G@(Ss#*k;&FF~i#uA5cp#R}GEYUAo{P~?hw&`dy(BaH#Oj09Aa-SQVR!}0LYeo$7e7PHA3eOX zw>E;|<;)p)U$RosJDul=R(~6_Q?jf^w%eyM_gNbI$O^cEF(ezdevMY1bw{QaFAn<( z_&?AyYqZ3&-7r$8d$dJb1a-n?Um+y5CS4aBI-See5GWyzO!^zxFL~9{u~OG6G-4}$ ze0&uA>a(mgVP&yK^WUBD1|)7RR2~0`fQA+Tgk4~_Knep|9pq9+pFNLK2$Y3Di?`~* zGxA0qU11K)EZ=DP2PkV*%rbiTG$Hl?xCz6$8+64LJ$)V|86Q@EZibgV|8_FDs=%wU zJM8|l6_I7zUWJ8Xg)i4VfNmU(Vcfy1bL-scJ!o_C745YQA~%{YNxjKypsPk;j95{_ zpIeX;zAyqr<(g<~&^dnw0fR6BkE+>K9ULhQSeyu#N1^y@?Cve*J7Q65dkm$0h zz6h{aT`u;JF4=vRs8}opA74mq2=N7SNNKnbl~m$l-DSkQ`f87&T@Y6*3Ttf*O?Ay% zVT%ifHsFKuqcXCp?nmnno;XjGvNkUvD_z@b5iWtHb+EHV!&phG#n_5SdOBi{XKWv3 zZdh~t&}>o^K9LHtsk#VS+$(cC?SIQ-|7T^lw8r$3Hs?oix{;1{Sm>a2Zj4R3Q)}rH zC1ub%H(jh!mJHd#(P+G1xF)}IC?$Kzi-i=`?>b?OG0!6J$+AGA_I2tOQH!Y7=%%(b zk{yU6mD(Noq+5FQ^`f81tAmY)Uvh7aDg8x6(Q}YX2oNIvi|9E8&}Gi6RYURjGf$zD zegH}eCVt0m-rtw<2iLyIj|UV?;_wrCo!9D%G!+Q2#J zK^)M5&8uLp>b<0m13Y*93E2hPvh7i7+`1Ejvd?N%4HO>Ab3F#(dUco*zHe9$>M)rO z8h-T;VRv5wjyRdQeFHT-%y2nBTU+5}}clDdk?BV>K zZtu=w*AlEjZnL_21zKdXPDh}1~s zOXk~Icr|la6lGtKVD~jMv(Q6RNA~tTOHNf)rYDbL_U)w>Sr?tZ*?xWlX%dl55QiZc z?khiMyJ0;ba(imM=-vIes^{!YM@6^9i|;k@EUy$q7i9)*uB$LR8O!Ykhe=A9*ZbRw@>*XJ6BfA3O~7{knyX6fFp zXbg*oh3G2ZBp1Dwd(RA_wzBl6V+ZL8f{pIBX`_$^W8>C#L&mm^5=^5iFjW{Vy(?mP zO#kL5rjIZDqb|4?I!v&kh)m6eIO`3VW8$QfiT(Yu4^`xwWlo2+Hu#;LaUaD%_*E=c zDw%UL(|?^YuovnZD<(GR5veco!cs(sLGKxX;WBOlSL82TB1?Na4xXV_Th#D|RwO~D zE#W4On^}u&*^j(}9}=L))@(5utSDX%Exv(7^93wtXj=1D>c!C++@ijtfStikyWy1S;?4);b2I2<+kc?tOUr>fI2-zt6j zw3lr5hy9#R@ty2DO^QM%v_Uq9^cBcG3(1qgw+@ecR%;{@{L%w$C1w4CjZd@`X}P2P zQ*DdwV#VY8*d3V)GC)O;0hVn~44e5IQ;%p-En7$VPe>YTun4y|uuPk^xp-{UPJj)bfn~KXpjS zW~YzBpRK@hZ#O3ZAC>&Y*T-S=Rkfa+rj*HHj=U>MtSgV{6W068Y5{qAk@ns1!IJ9| z19Dk3uTkigwowMJz=Ys!6^TiUw};z(5SVOgi#8gS-{`YBJL)nFkBpFLkW%EUy`9-T zD){Q&y1U;kv&@=U^`gzfk|y3P#_>uGrnlGExB^{h{@34eNxXWOZa z_gP|Ide+XLa%dlcW^uw?78ukELjo z)uVbRa^>-`7WL0S!4klK%`ia*od&C03meW{ z1_p3eH9j4;!6XbTf81UraLEsruUj*n9P$?n%o>wyVzHkYPk&S`Vk6jE1K*&5bE%Nz{_?uiemCja|yjTSSrREDAR>2mJ4PiQ&QfHoJ;vyKnk4hP)Wn zf>1*RHeaVuK+XHDORFh2($mrIm!Tnh8neL9xrN118D~#M#lMJZ(JqcmQn!W)vDr$f z=W5SKl$S#JkFx|oXvdr7`#RkCiK!de0YkPQFHT#%{+r$WFZl}v6wvbooWLpHl8Qo5jTtz^|<_b^36biK=fxL5o|hJesB zr45+FQnQ?2{n7=NV+&+b85i?ecBJ!s4eu3JEWA z)aRvyL}6lhO&T@rf(wlo_dk9uVJ~FRJgJ?>w2caS9+~Y2jE%ddBcAHg7lS)$~738ZDW_d0#{ENw{Ekp9KJ|Bu>8d2c!-K#X9O5pxvG{j5c-de%idv9Or(`=XIy zzNlQLtY5g{s<$As#@9Z>K~7idl-tx}D%Hx8D&k|e`So(DRHxE&7yHmT+|R+V^_Hg0O#@RKZ#yMP&a6%UwS?1k_*c}% z)u8dJ-y1c>vVGHN6n8Vr%alFSTwaX zz2RWn!*~795W3V(fI6zZrOtT-JjX%2lH3>cT*6UlYY7g^kGA&SLMqIz_tB`|N2Eme zJ!2d;*oi0Jd`Vw^cZG1QR8jozZD*7=uQbAc;dV;duinAt&E4~=H%wtCr=HpcsOBw=>Mp|&(FCzDX$Uz$X z|04Qv*$L3Do$dc3YH4?#VKfnG_Ze9y(4>t(iQ#l)GWhL=Z((w9A;%KA$fa5mvUqp{}a6{2oNm&V2SGj?>(sO+%rLpZ4R7g?MXGvq7 z@ZzM?-32|o)Am?SCT;|ykY%Em5>3o9-}4s{`PbD0pe5J*TdoGbVdDdmDLVr^;j|k@+od=fYN2Tjr ztR`n9>kIMlHL8a9dlkr~=^B(7qQd01T2fh3*%`@EZjXv-+^^{#aB3&me zx~*u4k3^Ohhue%+$NTi`JNgK~d;Q%O$9s)7Wd}=JTJ1L)3vEFGk`hla38Q+;k2GX0 zo9jPxE|T4-7`88|mUg1wD_+hlk=bQ~>43BIPNmi`gCpe^lqm=tKV|s7b{#4z?%OZ4 z0(_Ervc^NfXFfTjv^ldtu)WQ}9UN=?&L^aQaB6&5=b`g8tArjw8&Lyw-2|R-N^nh{ z{a~&p25C|fd%=%Ch9;8suyhZCg`M!pJx1P-ktK=2o~VwN1;(w~k=ee zqbJ0fKK)0LYIq^bX(v=&G(MAV?mh--p}G&8s5mPnG+C{yGxMB@09j4)UY1k$PC7Vj ztx}Ifq#5|STCEloiyYZ|yPf<-A&1qJ%_VNW_+T7Zs%O}Cmo4>a9u8|}Yr85d({VNZ zFT*dV`fzJ=s~hmnr*A)QAjtR>^r8?Lv%pa7F@0T0DPWV?d8pBrL85e?I<2QK00ot}|#i!+6vgFubnZ0Qi@WmsVz-@lm<+Q140J12&m7la(O8b3H$@`IhbrqSAOkVq> z7xy*UAthf097y~H2Jy2UG@Bg{y^}^4o0i~l4T{oW63a6JdIWX1W06jwAMef7Fwt%F z{t#kN=WgkfP!8nEqoQK~^JBYk)p3p*QA)5YMG^1X*w#Vqrm#N#==`ESNYm@9BqndK zd@T+so&Jh(k3!`WBEqOn>Y53fa^RIP&nKY3d0O*~ z{HV-x{piW_7QJ?l=%Br~4;-XVrpGfbCbJ&PuHArbA+RMqeG&`Ywj6TEs$oI~LbaMiW^=fji?Z(}w)4*Xi3Mu`)k}jVTE{wL$GFe%xHh`2Tcqmna59NX7FRd2mBZ-A0nIbKz*w3s2?^5dS zUBjC2JP$eATOxx3kE0$;W_$l4GyV8EVJdGii?w49hZVY9@C_h&0IEYuv_7|5rkO)c zW)$^V2|iu-dsNsa2`ZjYm`x%3sFP)Ei$NOviy-|qTMydonK}mev;zUKgM$2nWr!!} zy^kwXb%a6WrevyMbF<^kerSsXU7vG4Vfg5d_353k4vZ_Q+h)J85iiJ(p-(}AXKW2s z5~8$oxw*AypJ-)`We=Q@-mz_Y8duCD|Kd8Y393XO3NWKmo8xCin9j)mvrD=1<0}=7 z#(hk*$HCg0{VIgG%V1iyP$$3jdgHY@@dyeM1md0_UAx73(QoU$fjyg;N2$*#^rQW( zP$rVS9WKRnmKsX_^Vw!B!uPV(Sn@wa_p+&<_gb<5UKI(HQXXX%^-UI(dk<$B@^23{ z461|!u7ufn`tFau*hzc`J9KQg)rkH3fB4T*{d=IIGM05vY;87Z(5mUfiRdZoTVr~= zB+va4KG5<7U;oR;x$Z8ru}L&B9vd0!d2y^JV)g48=PXAY@aVSACW|lMU9oXdOGy(S zl|6d9RakTpL?f9`Ngw2VQh7E*2bssxpMj7&LfDL!>1LmFu2RNQPAd`qs&UiD~O`Cy_- zcvdDkV_LOT8a&L?6iXNsZ{^6whnN?4*0!%jiFG5Qy=a!*n|ix zVK*tB{n+Lo?EJvmwh2(xs7=z-oa@a+3Zwi2owIengSpBYO^7+Jj+}1s>pD-D;@t>( zSDG_M$yd`znNJA0oS2o8LU>NtVIZJI(4urocc~eUK^D-*O*k!*$>=5|hBX0m`aT@o z(_T#3z23tz3msVg%RsW+$E}d=!}Vu+y1ACNA8}k)NEYOg;BY3ucMRINvR%sM z8+6U?X;fVeZDBXlZ0EH8Bl3ITW$b*@sq0jHd>wV&l(_iRiJ_t4!GzxUgfg>&AeW%L zGlhbLggjr&Go2eRY3@HY(j_9I^i2?`85M{d<&a1Bq$I}S^si~>K|qE7J}>^g2>)|cmb@UiW$_hNr5RI3 zLZlwoxG|5+;b-lK)p@un8yxc^IKINg)T#C&*qZor!Yh3H$?KlvRN0g~{M^2}IrVwm z&uqX9F{qlE^_9eka(I|7dgXdkP&F||8U0EU;so)jLl_g*UM1P;{JO=K`z_{I{@aSK z0SThdTzhXQeV1m){<&Q(qmQh1{c74H=C4LAUoCYtz!nPT=4A497LpWNN|yUK?DIbe zV_!!K(XfAiKotF0niFZSWaAwyw9$g`5Z>v!7p64Xr!2xMVMK(_IC#$TR4}3P; z+FISnUsk1}r^xTHyypp~re^(c*ehxBn5RdAQ)*hlu=-DSEm7di&tl@rq`OwDOKwn$W|`G-CE?qOl0?oZ{W@Xqq<1#GrG?q z5j3%|5$aS|uZkb0x*rP7E76$5gMj6~h`y|2mHNW=a>{@i`tp(!iZF7kk2AQw;qlbq z{$jVEqZ(SbClN8Hek2~FRJzaq_JgUVW&6e?^&}6gVm&Lt9Kda%2|B&eA3NDvA~top z(oOo7V&S9Evp4o-Qk+QcXll0rVs-qy5M_6YSS+2@@HMSewH@S` zktBk>Ik>d61zJXUwMLNhK?}3$2uxB$&znE8E#0yGtR&z^xdvBFQxK$0xX&vl?N57i zJ@HBA&g`{MIsl+~k&H%iD280v_f!A}+{65WWb`DvUGpVO%)p^WW#!RvD5M=)% z5~BE2r}*NGndT-)`$W}w6*Tzgf*66Lt#$U4^8uq2a@F8hpv;24BmSN_N?v!TPfRu}wimQDXH?rIzDNiB(5f`JIajpEuZZ z48B?M9hTB;#zrI!>v&SJ9_qMx_;NH3?pHoCm8KdEUhA{HH{+@{3Vi@Gp8DR-6O%Bl zk#YKh#+J0)qjN=AX>e&Z$t}Qie>5?0Z4yV-)@uI&8??7qCSl_0`bvn<#d- z(3S=zZ7KGoYx0p?9zusVJ9`w|e?7HFBk#&^dswx_+wRdxZSb3$cNGhC8PB5lm!|%iII_ver=??kMO!b=@Raec)UOGT6BCRH8!ls zT2w_N;jw!DlHtufzPwXqOUsVVtk41B&&*MHgkD`tO=kGo{Zo4m8jq-0$ z0>lw^`J`c?A|&0L)Qfl1fE}H;Rd2^If)VPtUp^c%FvAd_>Qw0YUJ~?f*#|~TAHA4n z<)PaaJ~dKzLFY7)FdLSLwO)T<1YvR+{;pwb2h_SkQ|T>@y5HA33fz zFXFNoHH^NRPwPW5&p)fd+57Lew1+lPNPtOzSTQju*{@$;a>TtZxpNbb#5+dcyn8UE zUswVVKfVyW0H*xS{R-R#MCV{_V`lJtEomWzr6sLhlrgv1+vmkrmjF>|;w}yD4ZWYwHd&i%lsR>m4Ax2Pl{!cP=dP zZ_k&$FEO%u`;7R!x5h4B?sp9C;ZN_5AH~3sP;}2_F3~x zGk2QY+7^qK#y8CMxt4A4yB3z0C1!by+cTsoz^I1}Ox4*;uy4GsDS!QOvdy%pG|G4Z zgYw^bi}9m7%Y@TXf@@%55~?LD5q?Lw zk#k!X6+CmL%>Bm8`vPw2+8W#K<`S*#5>&rv2*FmLo%x$OzjyhVMf%e5{WpCZ<4WyI z*MX3ICfTa;!GqS-v%}yZ@=+XvO8~j^cuR~Oh zn6$%tQ}$L~W}}Sdq}5=hJyrz%x-ZApXUNSz@Z{xj#mto`n|B{dicj-5I}{yW z&&+?tuVdB8zj_$+k{D9S_pM*Ckok4v(GYrM;2hAf-j2VBL0T$h=E4D z*~L|1LoK?r&t6gP9p8GE3nraqV! zDcQBC>FC_#pINspbP9=iwb4G)_QZyNW3pG#drBnbXK);Tf3r1 z;aT)j#=rIkC>mqu(+a``dm29&osNO)Ae59XVvHam*mz*OFkIuXOGukLdXTbZT;#fm zw(MO3K;{<{-dqYHKmwBvXjek6=F&P{C4`W@r%)AdyTRQ6w_aGK@IfcYyJLOS9>RP! z!cogCnd#Qb)$-^In)N8Pgl9XzQ(yf|A5vbz9YWtZof!|6QcBr6HY6Cc4gx!@H)a4i zI4jq+wbV!0N9`(v&Ba5Y6*aAz75>8SP!+AIrQ9$$oYvV@DSYV&%>AwwSnj@J;vA{j^ptJJJylO z^@??5)^$aJzla3If4X$6T`WyAGr~`hQLROig!S@yLnXG-KirjPH00*dv`O>lZ56UP zsTEp1F{Qn;sXRsxZ>?t7@}uiw!bO6JbM411CGcB856(6h(MpM|vS&Jjpb$EWGz1Q_ zeuj*&b45HnpEqpPEWn-}!RNKUT~Opk4%vtVL#?+R$))ibj}Bh`I9w%~FaVWPF=rUl2;QtCo2BcNeL;~Ixpj)vrzQsIlLe&JbQ;87*Y?A_*3{fuvq-DCQj)aU zRaZ>zkKZ%8P}-sOB{m8b6{`y&-ggu?WOw&DU?0nMlu3V4Zdo4<0t^9Q-XolgYMbGA z!_S=yPe2O&P!-eJ3vkiYQV(;g)?!}K3*@KAERFBfTUr3t5X#`DUj##Pc%O4I>B63A zsuj2(l2jvrI|nrRx8K#uGbORk#3gt9!u*n?f3(wS@1K&98Khj^uc|Y}Va(lMKXzSn zzb(Oke}sZtEG20kle)P2nORuM>+2cXmgE(MH0M3j%tg9fz?ZJq^`->9HCP!{9S`qb$rR(;V???^Ng0-6JH(Bl<;(O}7pjL*~K`2f5g|HxL59UOt zreN_Nh>QVsp`w}f7m<4He!tI)DwVkyAuH4p-&h?7YJjfOd8uV8AAG;CHOCs?-kEHL z=Yd~@pEiP5gCxB%x@dd>;M`Ajj&(g_={rBIm3rJ0Eu!9J_hSLBd`)dOo>5tZWY@xF z(!_B6z|Zupne;@ald8`#M8PzXi#<2D^$2?r0u@z?u^NJuLgOjB2=E19AHa?v=gbx3 z)^+-BOQIrN0_ot(t0qILhBR<7JH!zm935zt$ zR0oZ2r*6XBn$0}k1Qvk~M#eOxAeAjokq?Q!U9bN1COcxhwb-TlTu;{l|c zy~6AXW2ju%(0cXh$w|{xez=B8NdYWvBt{usx>EF=^0)u{-K?aggIvW`z}NGlhtl3_ zX8L@kszWRwVSi}kGJ63@Dr|e^s%GJ$J=Oo-=g-Oly~5Y@?lt}@#!^$*BvQM38-X!Z*oOyLRYbWAMU@qyYD<&LH{O^#-)UUMq14ckyDY8JTZeeY5=g z$ujd!kU>dE!V*W=C#Uz}Pu}>q+~Qy@!od{AHVQUbEMmYVU5jUB-l{k%?AG+km-D zwdvJK%X0`EP!YG>3)bjAuI=Mi5qoczMGPjVQS$9h`tPuU?sphRt3B!`zVwl$C}_eG zbyn|Re@c}@KVt0R(`>FJrbbhb2y<>5BW7ga&w8DFSb0EI27O6k>17YxL_soES=o(M z2)k&|W-8HGt0T;K#oWglX%KT?k?-KzPazjgMBEhSUyq#sI&A%S4D`1T{QvhWEFVxm zd{1NeK>ZOBQ8Q;I5%E&Xp?Lqwv`)Yv!9D{zSw|lgIzcaB^6sol;QZp)5cE*fX5TDI zn0lHf;ZRHuEq_HF(yy#NVbCKQW5k|3EFVKDiz{w)sUB|J*Uulpe1Gkua{rV&xamkw zm-3H$-kMY^t8Yeh!XqGPOwqUUB8|_+OrgDbS@Q`hQAM6Z-|&ed$MpiqnP7J}flc(N zos{b4z|5A^-Q~XNjbqcuc#MHnY`@9SDGfNmpjnV}a+r<#K=E@|v~Q=Ur@}_}tcihm zlBkHCorC~@zXYo9Wzk}>Y5Ay`wI)Q{>}204M{}uMb*YG=P28kZgRJIM2^j+-AIu`g zsBT~t(>FaiHl{n?#ieEG>T1!iqp7Z`^PsJEYHE}{hyC-=5D~2+h6yAPM*Y&v_z}@f zbdRHa zk%X9=CDwq7zx>VVsM?K-1XJDZRC0Z_yNb7oSTy{l=b~QVhJ!RWHa1|E)$m)aMp_j5R$C_zlF12Nti#uit&SAW5Q!>(Yt%ptjodo%pfuz4+Jh7kN&;v$@LqCQ}jr ztT|v&JldPD=#0-emy`O_`30$II**HPlp}VTJnNpi`Z^N`d3dMPJHE1&D-Y0bcS!2n z@cBGG{PX_ZlL>{VPCQPDU?VR|bb4fwQ}u4EtO?-(^q{6TyJZRs+ri*X`dmU^qXuB3 zan5HChXb=3aRwZX#U)aL52mzK6vFQDyv7orRUG_)J>nw9~!Kn3)2WpOyd0rv` z;+EuVeJIT^pnl9jtD<#Q&*B~K_zjrU^_kMKgjj9F;9=Mh>kBPFUZRQr?e7*^EXQA? zs16bu+|%mS$^dxs$TV_T!A=>=ul)d$wY}l#mTF*6>1y;|82F_Z5yz$_;d-s4Fy%pJ zqebSP4!5tZbfLD@fX*82vG4iUsjSBxHv$s3Ns*n5o^r&k0P~JnF76JJnJv8+rLYn6 z6V1S2LGgI8c>mnzird&5X;Eq(rG7{~{aU_WyJX-sTX|V(Fw$>8g#4~Qh@c7WkFJpn z{S8f8qJpM$_9nnvmD?cp6;f{e&V_a^mcPFD>$#M909Fh7S+MAk0I^6I5P}kD4eY*A8aOS_S&c5D8eUpVk-j{Fzy4 zP#x*E`GIqR@jIdRT?3V3dE02}q{C&+iUO+C1s2-ckB%l(j67WgIYaK0C*l3alWDveL(V_^D~K!_Hwm zWF*UFT~4l|5&H(ya@84~n>Wx?${m`)YyC~raLi!paZ5m*hi;tmbQBoV1={Sw_YmX* zPUozKr6j5^rS2b@m$wYM1o-VLgeG-wo?$f6nQcon$dqVA3Po|w5nB9 zd4~(Gc$D`G-05xW^H>=wDJvg>>sGV4kj>bNFZ#1yI!R;xO=D0;b@KTqh3WopRe_ci zmcjU_Ae~dnBhG&O<6W)hujtN%jD#a)hk)SyAr=G@C+C9NCHsr$AvdYf=bvtieM2q* zM&4o$D8WjYI(hA%X?l9T^#WCxN@vU1cX|odkPH_we7V0tZIBF9I6B;t83DJ)Wh^K- zPscNY{87*~Ip_z#(tr3_+<>8`3f|di!!yl?qk!RyqJ~EEs#KNpXOc_DK7p4jGgV8s zI{Q!uG1@+h~lmRm1s;dHEc) z7^WCH!TDfYvhL5aa(@w#ia>`Fb-ug8uafZDghzOl-Jt)|-FHScxqWYPEpSDJYe7VW zT*U?`2vVd*uOcEMA|L`nl-`RFYQk#;1PKTN0zyQP4xxu073oc+6GA{rkQPE9g%s!b zU+Z^g&CG{cv*ydJ`9MP6ygBDR`|MNpKF@wOesQw5xOHmFdM}M4wk}kyrI725t{xt% z_d|6xe28_MQKnxXoOi=cUE~;_CXE=0ujEz?S?irSnlR+!Rw5$H=`0HT68n=nvD3tnrl~I`>Bp;7uz}o zHGj&FV_ML}R0?K;H__M*6fhK|l4%*Snb6x`0@ocGcbPwhM5^wAYzVDk8Z{S#Rqc)dpWbmQt3Z_I61fu_5?1w=j z&UkL$D)4Zf?u(T=M%&Gf@x(rr+IL94f&XA5fH&?P>G@OfnR-V1?bX!A z#>(oJTc8wwU>-9zule~I6lClw8|CQVI;E?5Puq4ev%_)FN3)0;19fsJx}SjGjD@OY z>C}g4v5Y$v`c|}?W=Ba6`SDv}1lIha!bclk{|J+*B^OHNL+BE-Sz}|TX~T~Bb1+Z4 z%5lCdUeaO^LUk={UTR%xIDp+n3)1>LEe073g83{eTb1>9!c0RClt5C-H`M9;Ur~#hASSW1nAR_DKHEPcjLoiaR%BE(Y zO;v6%Ag;3y5S?Oaz;w*PvUYL!yx}Uv7degO{V*f#gS$~kHiIQPQ z>DGNp<&1#o_V3e5QW4c0kpvG@Z=FKHDO^UH_>+lPlX4pJ-eT0q4RN>Nzf-RtdT4TJ ztH|rG)HNM*Sof_2J{szw7wf`NdQ>Q!6i9;{JksZ$kaemiCA@mZ#e!`5>(%(%RV!Wb zHrFOUt@7G3vRW_4ki<5(3q|L4rWQRf>vRr3e7mKjBuC}sGm9*7F7TVg8+Y71wayY- zPiDIguB?zJ5IZ!}vO>b1l?1k$?!>#}tKlW3*j&OCmI~@Rtjby>dqyL@QziKnk%PZkC?0$m_2L`pioVk>lB{7YC33%l0kyPPpSjyN4CvOUzJ zr@4VSuO8|j@oR!sW)zZKA_w;u-(9S1 zlH&UC1IZmu-tll)*hMaUiJZc_Jf@ZEIWvr|Fea##jAXx`h_eePwXQZ`MsVcAF&(0l z(=H28)XG-n%R2>e!rEzHZCx9O-nO0G!?ZmOO&Gkf9I;aVArQ;D*X zUBkR`ULWP#Lgzz-*hf$ktUx0A3U7cdNhDg#E2x)jEpY&e1)ECU>+R+*0(V$G12qzz zL*@fcon|p8Px7lQ9A)E^CT~33bJc)~HXpkg^=U?G8ypzEZ=Ac)cCgK4Znq(m-3-NqxgozLvS?uJyEp;y~%GW;-R$vmhkWN$ueYLZIQ1l<|F% zSNlq;dz+4zPHEl+04{}kz86AVvrBwUv@vY&N^t^h#>-xdQC?4w(=x`Dr#*Q@Y?i1G zJT(5<-uJL{TgP{&4_(ydS1N^;#>R42^e(z4oiDz~w2jNueCC`f#6Muo1=9=nk1^Oe zCD^&G2;KpQP<12{*cu@28QLO*L6RTFSpY*|n4Z=(96A#GIff%a_b<#T&Ywh_n-LM~ zq!!=k9QV(7ip65PA}IJa!h9{BkQTU3T|(p5bt@j7lVc?7QSgUE-DhdY@0-Pnw^sGC zlYPCU8frZo>#OVZEq5C2HLGG3^~D>=p8Rl0(#F&BhKv2J`1E7kM(8b>F2MIlcjUJJ z5_k*0;faXSai`4zOWAT$>J*DuPw{t{U));Gm|JQ%q_d`RlXXx9{VXl7XYNt$A2F^O zYyIDM#u*r|R$H12%jWBVWqccyEZ)7E#77}ibe#j7jlgQxq{`^yC_xLrQhpv+fozmddnM-m_x#{+v^4^+l17>XF#Iy?_ zl020$#tt1EvN0KescaD{LfRa?twcU8rc)5shJ?V@<-CXsm!FT;b9|kY5=R?!osK@2 zjei<*+#8<@rPRrt&ojPEK3Y)20^nf!fw%YDvca zrj3Gkf={+n<_moG__SSLtr1BvmAkb5@4B-&?G9!BkvpIJBM(mNZ)+ayb7cypRXbcS zR!=!H;bS0>=%O87YN_9GebID|5YpH^=Q4vQ2Ish*O?s?<(fYZ7k2&p%recRgh!TjY zzo?k>@`#KHQl&ex;5)!;e=)E$+b$D{H!~4>q~Kpr+$SKS^RlgBVp2d*OBtF^gNAz} zx|q4li)RF-O5-lRmCmKSe9U_+QVTVIL6!d!NDnjt3_Mb)AnFTGCX8UyKsKqn5Iu&l zlCmbq%+?W5?TKFk#k^3y^ntl#?ou64{!7c?vSSmE-@qmFw?F{cJ8&#$t;yty zNzeZhXi_7vKcD7#gD|Ew>{$ZEW)RvEaw2ffF{zsr@I7+~%boGw8UrC@c}#U44NxBS z?t(8tw!Z`-p0mMXtGSx>OW>Q9Du{maCO|ki*ef-G&@_r9Xb{*8?9{I%P-Ad>AFxxh z-ePjKPj@M@N02c7lQA5>3(esLvkAOS0EN9s4%B$%gc=J`&4bj1^IzWd&v@@w^W3Hz=jz7*Kt zjo<=UC(1#n!oO}Z@SI!Iyu#1FGbEfZ+XNH_ohRj z-+)l?cOIr07PBKqw&-S+W`S8=xL{H!BLU?8vY&4pKJpKCRr5S6jmN#bj@W?Tr5^mA zJ#S3HjT@Ye~#<;*VTC6 zGEppj%w(UTR+(@?fkJn;hnU&!_^=G#NS%GNS9)1Zsy~qvyFER`Jf=YoG1W+E+6 z$-*-BD`lt{_DtEB)sgYKLk3ntR-JCHbE%2(j%ThEj6H!NK!}VEKqLPb%IQBX z&M~P~TXM4YDuINFPsB~9!tXwxH!;#27W8<4rJ5Vby!0~Vj_utt;&E`uU*G?0y)x(_ zRR;9(h#HM)4W(}+W8GIZca^0SDcstpBZfXW<&L>p=K{<+{QhBS``E zFNzozrDv<-^Y7jj+X34&+ZX3@d58Zq|8WLy$-7}Z&|L-Vl`d=`8C58|4u_xD6ONO( z{A9U%6 z+*Ren<0x|q&eOZrb#5Y{C75yC-BwYw^U_6J_G8nI%2YRsMLoaS`{)bRUS_HONy_O2 z8^pnCa{pTadDvRFAXZjIEq*g$_1u#5zhLnHLoN6Z_00bu=zq(og`N_+By~m;@7a#A z_eB;F8v`W=W*Jo5;i5|GXtdm$j0_z7)<0%bYHzq!YW>!>$#Tb@WTm=R#G#97CQ|p# zq#Sdp?!R{ZmNer0ec$VSITCGq<*umR3sq$XHIf}F=fgs)g4F)L(&9E`>80I#<6_$% z8!GXaKgo$Xjm}3!MN8@#VA}57nW3?^tU~03h2?_sUGnns?XJtZ%E~^tK9%z^=c(%T z89lSB0A(23;WBgm_3@Y6THgx@ycc*NASke1Kt#&9@_dW;!P}SjXaAXLZno3h{GjlA zaQFM|0uPY#q%FUH8=GTH8CxG|YB~%l*nVBXVUVKFmycG{#-x1Jcuz5M@RG`#csd%aCU`e*y#1%V)BzVqik4Ahl751Fo@!Q6U* zJBd*Rv z!b`bt%Txd4gb)$Mp|_IR7ooFtQe=AH?4;jpk&ZidqB6}JJl$CalWfx$F-dGzO8D7R zTrJDY2q-DX`3`ytN6J{~cLU(Lzkhs9`w?NMe4CBW(lU%Fr1c zz5c8yOqwAQmbSYh?1p{~Q3ErfWOgK8PASNv&2qUhEv_J5PB`~z1{T>ZH=N|X2V)nf zP)B$%d(>?~1ndUE`g^`%a-Q|@n~o=K1~$5xzH7ZT%`SlC-H~1_;w(8>Pk&(kBaozb z`k&eI*qD#9b?ck{K|P;sBJwkY+w+wsd|VD^X!$3fKB$wVz; z;AY=LJ*l22bZ(-nQawFA78JbNs;$8`#0qH@pJMW3ce{^FWz+4iaY`tll3MlBr$)_E1gjLXhX!`KlU5ti&8SMfm6W z(b11*dR~Kg7DHLB#T@0sia222{6)w>w2_kljfFM0^*vx!AF07b9$smFOSbW?xlkW^ zx~}40-QFl7!QISGj}6{?y;d~z z=n5XMZ-LCv#Vba?XxO~hiE5}S`yTuEHM=r=9sarKm#K^*aW?SdY3RP=Tc`Wc`YOvw z-gTTV7j9BC98tDzy;~!^`O;gElGfEr?&u&6`&?B|I#8ni=j>y-!aUQw-A||_lfP<@ zSLR-B`$DDAXfTQ>6lh_x*+e9V!f{)QGm{LqSbaUYyjR@AV`Pkk#E!CzNai93hX8@f zC<-O{?QXHxqrnSr1rPD8U#5{1^GXtUCMvY^QLo^FE0`-P1P7}>j zmZ(G1*R5>6HwH)Mw61hsm#5cu+Ya5TChxV0ZJs%yI+U+)BQ*;o{VR~4$=)v(YrZ%s zF3`Iji3G+g-){p)|BLk#uY29!p|${BpU^Q|-847O$%q#|*I%aIDy%76k*4pXr*C47 zNh*&|K51yaXJeper;*tG{rPw14xrUQAjigYz9V@L4N?!gsBSYCnq0G`qsc*L%x00K zPS*Tnv{Jfe)pEX)-)f?9$+-LvB?ml1X!S=vd^l(pkeB`B*u@$lG)q$Mgtd- z9znyFhsg!Lxwq06H%{~m^*T7w^)7#`vcgGSWVB~s$W!WNjanEjn|RyswUq{q{^{GD z!9ug_m%@YII2Ffh@7**lc?X0DF7CbrbXCFh1hOMCY9FScV`NUX z*+5VIY5se%(OJir?eFOeyMWt*GGYnu zvrAXV_0F7ovOSXLbUfja*Wonry*4K#G(%8XXH`9oVM#8H!`(q=i*IX&vH_w+_#kU& z&2%0!$9hRhHy#&Ec6o4KgG+Vy3|{C}+F zGsCn|!7GaCHL$0E<=WS#r=K9^r!mg&C&~DTG_gI6>I(}m)Hc@AmiC!E&L(OYPm2)+ zw-nT(~lippk6r$vd6`HjcclUv^+kM7zTg7*So6hPYh zYzouQf5^cG&gU+8HGf%I>}||!o&J$f8dx$v(Qi==FY!rpt2m~AgE*grQu{}9^kfkx zKGNQ8J}J|6DmbFfL*~!`Wk_!Y#<~-**?rqHV+4?nc1F*OjIxsJ{qA+&l9_Ehn>dzU zaYEx}Ly(KIF_Ywp*92z%WO>1#Kaivtv8#NStk)TWdspABHB`meNK@0{z0OW3OZGl| z(_w#D8|E9kf-a*KmD_8+5oO~PIhsec zqpdAY?9Iy9H$Nvo&h;+S)@4C;yZItbhm*6#e!C2R zqh-xbLv^f<5z?^qKd6WZj=s2QVs!o%(O#;>Xe7Ayuyvv;2NniWIrTJqc+CGC)mWj|s;v(6KA0MK)$Ein|0wSJIjK8+7p|

    }V9HnF2*ZI~LN*(pO66J5Zq`qbXKZeA$Zi z{Cd{_i?Q!@(|zIbu{YxmU)=pZG*{|Sbe!fGbAE(=n=MMi5$F(%uM3@3On_e~5A}2Q zEFODHP7hY|{$s=}-pk*0VJ)WC*XH49>8WcOe|}WXeyU-Zw@b1FZ?y6K{qc{VerB;f zAgz*OHjiZUgccg;4|n65v9(6tzN((;K&rcn6}c@tP2$>S0;P6H$gXiL)L)S}j|xxk z9=3aQFGQl{Ldrwe=jO*nk(5_?f>lytD^xH6m@mc@uES^BS{fVI`eyrF8OfKZw}?yc zq)!*h`i2hYR;WW}0fxv;XX202%BtY>;%fKlj|ClFuah#$^8bFUH z3(;$aY%@sPwv_MGm^dzV!1}x7z)W%|GJIQo;PA54P)$A_DUI-$#*1jVdFg-biK(wB zzqis>g%@;+66QKODeRIFyV2jFh8i_&Bnt_x8x zvrA`7-1m*Ln^I6|RVO&MRWz+~yn`pYtW-+|-ry4&c(LEa=ym>0y&V-5Di;hypIXHr z%MNY7@W+rh^u>t@ZC&O&Vte4g{S%0n?&ov*YVZ)#ILICxo_UeVcyrXAz7#&y>zzfs z_jFq9ZYIIg#<;jaRY~*yPXa*%r}!xyki0qp{#@@j^_sZSK#^~JL#(no;Rdp4n#5|L z_?i!Up{pVbK6`A9ze0zt0dnIIxc}{0wY3b4rBnXRJ0W7ERAS)P4)N;Gtq#O7SolskUnv({z z{pd9qpKzdRGQkU-#Ob1HxVie)DYH=|BPliI_>7W#DBSp*p=tITf^Welw6jr9^CGre zhRxW_ZHD55aN#6bT3cn43ksW9x>Qp)Qn)n#wL}mPkBacIt8UzTP2M#?WS$f{?^$ai zeVI1OJ^T8yp-R||#N>{H){BJ_5A#wLtyVS^yKGj*U~5?lWHwr{#g;M3dx>HF97|h3 z=}p$VD@IVGNW>vT*N>>D(v?}no~NkUvEDD8%bWMNL%TVti}%xyeu>j=`lBRWZpUS$ zuth8dr0M-HOZ~sx1iNG~E|an*C!@?8Z5pgel$&WwyDMI%W zy7^x@>7CSLX~`!VDiIsjHzs7I>kbBW3hlQ&Dd7BAXa91z*0GmGSXkow;#P|R4NOkN zF+&|ON9|{e2?J)?ephF`4MLB7>D%#%ViaM$H~y)_B8>MG>wVeV z7x{P8xKO<5XLCc?=pQxy~YdF_v?^kiQXUIK;lJ)C>izLaSb9Fp5K8N5a zQbeqHJAR+yWN=Eb_?X?1%YuW~3j!SykL#K^W#ztj``FR;I&8UVm>#fZl3liCXwS+8 zOHpuqQ{ru1`~0*-U8?RJT}$r-M}L*L{YFQ?O;2OZD_4|MrX<9S_g*Rd#A@MIZk?X# zxu)emZXVSn9us8g-_yQSQMFJ0zm5FkIn6@_0F-BX6v>E#x# zgn#ae5u2DD=g zX!GQo%@ab?Va0Z@LiPpA*bnVU=G_@3spo1M6G)94D!9zagS=SYBJpjvuzl(W1M%G% zk)}i&Ndif*F4&^&UN5g zbbA;P@jjs+vOEX>?z9VF9C$==E6=~Rh98^qJ7;@SCHij!@_pA2Y(-`SrH$^#g0G9S z5BeuJWAb_(nBpBCIbT>6L!0R9YSOD&9mufIY{yaWy7Hw|4?XF=c6;Srl?chmi(7Ra zh573sF-3;v$7~Qb@bH*@bG9-4;lgAWiwsWD7Ww8j@QK3{B?ro?nU6;10}qjVAEy*o z1~SOhTg_irP*rM?lh0(TeL_o8pSoEdG%`4;5pFyY0~lwI30lZRSpUIY7`ILc{Uz|l zySzp!Kcb{}UVKWw^%Y=Cnm}qNn#a5xKdg{RB1V;8JZ=$xwPj^O%G@kzN943Ui`kTV z-;lil$d@j_;QZ4@v;!abe{_v*%FNxKXruzONALTxCu?I<3&}jRvK-!>!?3A1ZHvY- z?f$u`?0BcNI|lZcWaxr)HLp69qdDByRBi0Xz0G#yeu5HWjqR;sx6>`=jN8%^s?KDJ z{dLF0U)+Kd-zyXj2Xv_V zToTLu`$ek;;8eguuqG8pwH`4gH@8=winiXK^*Uz#sTX?`Yzr#%)?=m{t$m4&e$Q3+D)ERKse;ti1_NMQdfbCN+@Li*le zTYPi$Qh&NmEXIi0*mP!aIzV^wz0yppx1wRi!Xtm{Ymc)A?hF{$g?*ZNxL?Kp%Z-og z9E6zT7gQblZP|1er`47Si3$9m=jd6viWEd-D7fD(!n)< zeZTpgo)XnpdT7ksWb1?C0D87JJQprdPk5ufJN9(LXLpSF{-5xDmua=T7J_IwJ$Lkg|k5J)Y}_o zsa~08id>B{IA6c?BjeTDp*x1;`RJU9n_F92`u8TKV}QY%fV>VkE2S#{sq`2FyoRNFG*#fDQOITK?03}4^Wz4IZER)6^@ zE;F`{xhOz-Eb=Nh^v=Lt=u2Y=Mz}6W?!Ds3qqlB$n4njcz(rVYesKNp++E`nV*BJX ztA+;8mk9tW7}zLaxZiXmtmP|mkbA3F7xFk>{ebE`{nXc?AKUI z3$ZbM9jeo{<{B>`UYjRsMLVMkSea=PlHS4kV3>6irK3hdHSSZX`-CE|CrkY}3~_oYI}-o7Q)+D^R9n(mw8&rcf@0jYw~2>@^ah zuWDa&^K3N0jO%P48@M~b@Y-0FZWv9Ej?avCe(2CPGu3)z$kI6{2IR26-LzzcyRz-Q z2tJhAl(3m;@qi0}q0i?arHk&IEAwq_w+2`#>k;Q>bz)MNPx&z<_x1b^rm)1R1) z!pN1H-!V7d5yYOdLHMYCJ+Zdb`>|gI69JpwOAoA6@1wt2LA=DO^8HY8e8ew-KQ$R= zTp8H}X*s4-SMfy9Z}tjtjmq_uSFPP&oYzy@>xE*+K;9s1UtN+urYkMJYC~+N{SHO z?IoDG{Cx85a*}TCAFU(J279O%uB`zMD=$5TgE)~GaqelqvU15>urCW=>8&MdpfDD` zE30kGo)Hy+r!-NzA%tVetLUG#)lFl4KTuzC#ghy2^PVOZVB4j4r6iaS0|4ensXWoE zGBbp3sZ6?E^lZi=aHw@NDL6~Ukce<|9orFx|V}JRDwqmK_q(?mT{PCAxBp8N4Fr z>ZYzzHhrqOO8R)Q>(fR(`{NC9p@m}dMt{oo=kxU-#w>x72v+kejd0ff`UB*~kU{LY zJ_Crd5FkIEzx+OMdVP*6H<0=WE()!pcIe(9Jarr_jAM*-Isvd<1JW@YHhdScR$XOd2eqbvd;NBc~)p zvY466eQme*{N>dKv&g3aa9lC+Yw*7t!C;H}@8S6+I8f)798q@MFM;{lUjiv$h#$iC z!`ZQHJim~aYf;MQ@gjj|9};CHu7RQo85_GPFs1~2HX0y`JFZO8r`I>RTYvu&*m40- zS_)sI@gHbQev8RZg_8-io+a}C;~!oFjM27y!pe8BJ{*U!044G^La!oM5FmnMH(@Jx znGUQ0zS*iw1gwklbKo`P3gcH5tAKR0#5C5D5NcGb0*- z-`TeBmw*=xBvoqm1QeX9aiCn6HavgCA%?46Hf< z8NkwSVXrN8GsJm`P9xw4yFpncT|kpx005iimMjQo0GA7K+@H|6f9MF-imMCFF2OtD z>=YfaiF7#mOF+OCTFwLd?*N7Zn=o(lOJG2h`v@oi2b>Tb6_tLa*iK--PXG8jzL>AQ zjN`pQaNGOnSNKlJycF^}p5ISJyZB1ob+!OaKcfdk2TDr$Mxe_Bhx{A(%t+5~>M%k- z5573U)ZGZFWf8Omo%&p~NG17c?+flz_el!^SaTFLygSOyB}#PiOhDUH(A4JdFR_mXlQ6gfIdVEja| znt&{n_4!V1Y+$s`w18$&wqhAEwmgpJ*i@LpE87En5R9S-df_s76J?b{V_>~)OBd&Y zK48u8i?-05zTz+#d>u*UyrXjBMfoTyI}t%8teb&FtdRw3?D%%JtA&EuM+{!Nj zZy9io1OZvn$Q;qoC07b9%trEl1TVe;V%#Lt6#(4d2Q&xt)dd5-H=ozXEda?DgLs?* zHha^OuoId`0u?64z^8yJjR}L+EN+P9#eN}lmMPxI3V6g^M@LY#o~`--x$Qr82)Ipc8pNy3kz zH=qhJ&^y+Ag<3dk16myVB_NO37@B9U<^^RG$bj*%T;u|+H2)Hyv4C}>91CUz{!Y*~ z0cd#*q`1V=115Pxea$RF$51>9>}66!fg+V(0RkviJa+Y}1~3;cJJ z>`Nt?2eJ7!VzF~zgo=AEfuREC>5sDuPuXmg>#oLGx`}*tLEt$&=fp*jH%JT+JVn z;x2>Yn-zIARPI*-!v;&g2ErpXt71u!lMa5H*mjoqtri{_a@m3)czOLjRqwe@;eRr z@NQ#n519|-KE(Mkt%r_SfzqSZKwM4v<}!}skK?u?XcTBH1PD1P zjqhXuViTaB(fW;>6>Avy?1J|Kjva3UI^F>+s)w|x+;;F8LHp?d%?Cq6v3zj!}c%D2F>IBz6oTQtBvJvgSz?P aiVhH6G?vG~Zo(PPL5)kr!NHrq#{L_D?!t%w literal 0 HcmV?d00001 diff --git a/Libraries/CMSIS/Documentation/CMSIS_System_View_Description.htm b/Libraries/CMSIS/Documentation/CMSIS_System_View_Description.htm new file mode 100644 index 0000000..fe5d71f --- /dev/null +++ b/Libraries/CMSIS/Documentation/CMSIS_System_View_Description.htm @@ -0,0 +1,1157 @@ + + + + CMSIS - SVD: Cortex Microcontroller Software Interface Standard - System View Description + + + + + + +

    Cortex Microcontroller Software Interface Standard
    +System View Description

    + +

    This file describes the Cortex Microcontroller Software +Interface Standard - System View Description (CMSIS - SVD) concept and syntax.

    +

    Version: 1.02 - 27. July 2011

    + +

    Information in this file, the accompany manuals, and software is
    + Copyright © ARM Ltd.
    All rights reserved. +

    + +
    + +

    Revision History

    +
      +
    • Version 0.91: initial proposal.
      • +
    • Version 0.92: revised proposal considering forum feedback (e.g. consider + IP-XACT constructs and naming scheme)
      • +
    • Version 1.0: new elements: peripheral version, vendor specific + extension section, interrupt mapping information, global peripheral disable + condition, naming of register arrays, enhanced naming schemes, etc.
      • +
    • Version 1.0: SVD versioning and updated schema file
      • +
    • Version 1.01: Error corrections in the example code. "include" has been removed. Restricted to one device per file.
      • +
    • Version 1.02: Adding the use case of device header file generation.
      • +
    + +

     

    + +
    + +

    Contents

    + +     + +

    About

    + +

    + The Cortex Microcontroller Software Interface Standard - System View + Description (CMSIS - SVD) answers the challenges + of accurate, detailed and timely device aware peripheral debugging support for Cortex + Microcontroller based devices by the software development + tools vendor community. +

    +

    + Silicon vendors shall create and maintain a formalized description of the + debug view for all the peripherals contained in their Cortex + Microcontroller based devices. Tool vendors use such descriptions to + establish device specific debug support in their debugging tools with minimal turn around times and + manageable effort. Device support across many development tools  is + essential for silicon provider in order to promote new devices and device + variants entering the market. Device aware debug views provide fast and + convenient access to all registers and fields as well as a detailed + description. This enables software developer to + develop and debug code most efficiently and adopt new devices early and + quickly.

    +

    + A standardized System View Description shall provide a common approach to + capturing peripheral debug related information in a machine readable files. + The scope of the contained information is agreed to match the level usually + provided by silicon vendors in their device reference manuals, however in a + formalized XML based format. There + are other description languages already available. IP-XACT from the SPIRIT + consortium is a prominent example. IP-XACT covers the register description + sufficiently, however it comprises many other aspects of the devices like + ports, bus-protocols, modeling, tool flows, etc. making a direct use of + IP-XACT too complex. The design of the SVD language is + taking some guidance from IP-XACT thus allowing straight forward conversion + from IP-XACT to CMSIS-SVD where IP-XACT device information is already + available.

    +

    + In a second step the CMSIS-SVD description shall be used for automatically + generating CMSIS compliant a device header file. This enables the + information in the header file to be consistent with what the debugger will + display and CMSIS compliant by construction. The header file generation will + require some additional pieces of information and therefore a future version + of the description will need to include some extensions for this purpose.

    +

    + Device aware debugging support is only one aspect of device + support essential to software development environments, however it is one of + the most time consuming and error prone ones.

    +

    Motivation

    +

    + +The software developer of microcontroller devices is faced with a growing number +of devices with an ever increasing number of peripheral blocks providing a wide +range of distinct and complex functionality. The development of drivers for +these peripherals is in the critical path of every project. Modern debuggers are supporting the software developer in getting the +software to run according to the requirements. A debugger providing peripheral awareness improves the +ability to access and interpret complex configuration and status information of +peripherals. Even though this is only one aspect of device support within microcontroller +development environments it is essential for the successful and timely adoption +of development tools and the device by the market.

    +

    Today software development environments address device aware +debugging in various ways. They either use documents or proprietary file formats +as input for providing peripheral views in the debuggers. +Extracting peripheral information from written documentation is a very time +consuming, tedious and error prone task. Having a file containing peripheral specific information to generate peripheral views +is going to make device support more affordable, reliable and timely. +The challenge for the tool providers is the support of many +different and incompatible file formats from a growing number of silicon vendors. +For silicon vendors it is time consuming and costly to engage with many tool +provider in order to achieve device support in a wide range of development +environments.

    +

    Standardizing on a System View Description aims to ease this challenge +by agreeing on a formal XML-based file format. In conjunction with supporting web server infrastructure silicon partner +shall upload and maintain such descriptions in a tool vendor agnostic device +database, hosted e.g. by the web server infrastructure + +cmsis.arm.com . Access control to sensitive information is managed on a per user +basis. This allows silicon vendors to upload information for devices that have +not been made public. 

    +

    Such an approach provides benefits for silicon and tool vendors as well as +software developers of Cortex-M based microcontroller devices

    +
      +
    • timely and accurate device support provided by a whole range of tool providers
      • +
    • tool providers become more efficient in supporting a multitude of devices + and device variants
      • +
    • less interaction required between silicon vendors and the + tool providers
      • +
    • silicon provider has control over and maintains the System View + Description during the life cycle of the device
      • +
    • high quality device support in terms of completeness and correctness of + device aware debugging
      • +
    • improved productivity and user experience for the software developer
      • +
    +

    Requirements

    +

    The debug description shall capture the information about all +the peripherals contained in a specific device. This section describes which +items of information are deemed relevant for a debugger. Silicon vendors are expected to +provide the System View Description for their devices, matching the information +contained in device reference manuals. The System View Description shall be suitable for straight forward +generation from existing databases like IP-XACT descriptions or SIDSC. The size +of device description is a concern and therefore redundancy in the description +shall be avoided. The size of SVD files affects the efficiency of +distribution as well as the loading time by the development tools. Last but not least manual editing of SVD files shall be possible for +the purpose of customization by SW developers.

    +

    Required content of the description

    +

    From a programmer's perspective a peripheral can be seen as a set of registers +with unique names being mapped to fixed addresses allocated +within a defined range of an address space.

    +

    From a debugger's point of view read accesses to a physical register need to be +executed in order to display its current value. The debugger executes a write +access to a register when a user edits its value. For this purpose the debugger +needs to know about the following additional attributes:

    +
      +
    • minimal addressable unit = smallest series of bits + identified by a unique address (e.g. byte-addressable memory)
      • +
    • register size = number of bits forming a register (ARM Cortex-M usually + 32 bits)
      • +
    • access permission = read and write, read only, + write only
      • +
    • access side effects = accesses by the debugger must + be avoided if it has side effects. Some side effects may be + reversed by the debugger to compensate for the side effect
      • +
    +

    In many cases peripheral registers are partitioned into chunks of bits of +distinct functionality. In this document these chunks are referred to as +field. Each +register that consists of fields shall  be described by a list +of uniquely named fields (Note: field names are not required to be +unique across registers). In order for a debugger to extract the +value of a field from the corresponding register the following attributes are required:

    +
      +
    • most significant bit = highest bit position of the + bit-field in the corresponding register
      • +
    • least significant bit = lowest bit position of the + bit-field within the corresponding register
      • +
    • access permission = read and write, read only, + write only
      • +
    +

    An enumerated value maps a number to a specific descriptive string +representing the semantics of the value of a field. The debugger displays the +descriptive string rather than the number to simplify the access to the +information thus +avoiding the necessity of a look-up in the device reference manual. Each item of +an enumerated value has the following attributes:

    +
      +
    • value = value of the bit-field that corresponds to + the string attribute
      • +
    • name = short string that describes the semantics of a + field when the corresponding value is set
      • +
    • description = detailed description of the semantics + of the field when the corresponding value is set
      • +
    +

    The hierarchical structure of the description looks like this:

    +

    Device =

    +
      +
    • +

       Peripherals

      +
        +
      • +

        Peripheral

        +
          +
        • +

          Registers

          +
            +
          • +

            + Register

            +
              +
            • +

              + Fields

              +
                +
              • +

                Field

                +
                  +
                • +

                  Enumerated Values

                  +
                    +
                  • +

                    Enumerated Value

                    +
                    • +
                  +
                  • +
                +
                • +
              +
              • +
            +
            • +
          +
          • +
        +
        • +
      +
      • +
    + +

    One file can only contain a description for a single device or device family +sharing the identical description. Devices consists of a one or more peripherals. +Each peripheral contains +one or more registers, where each register may consist of one or more fields. +The values of a field maybe represented through descriptive strings and detailed +descriptions, the enumerated values.

    +

    In many cases there are multiple +instances of the same peripheral in a device (e.g. Timer0, Timer1, etc.). For +this reason the description has the concept of deriving a peripheral from a peripheral +that has already been described. The attribute derivedFrom specifies +such a relationship. +Similarly registers or fields can be reused within the device description. The +grouping of  peripherals providing +similar functionality (e.g. Simple Timer, Complex Timer) is controlled via the element groupName. +All peripherals associated with the same group name are collectively listed under this group +in the order they have been specified in the file. +Collecting  +similar or related peripherals into peripheral groups helps structuring the list +of peripherals e.g. in a drop down menu (tool dependent). Devices with a large +set of peripherals will benefit from this additional level of structure.

    +

    Each of the items (i.e. Device, Peripheral, Register and +Field) owns an description element containing verbose information about +the respective element. The description field plays +an important part in improving the software development productivity. Instead of +searching through the reference manual the detailed explanation from the manual +could become immediately accessible from within the development environment.

    +

    Details about the exact display format and layout of the peripheral view are +considered beyond the scope of the description. It is up to the tool vendor to +visualize the contained information appropriately. The +silicon vendor provides details about the device's peripherals that is commonly available.

    +

    System View Description files need to be validated for:

    +
      +
    1. syntactical correctness using XML-Schema checking utilities
      2. +
    2. consistency  of the provided information (e.g. multiple registers mapped to the same address, + all registers located within the specified address ranges of a + peripheral, all fields are within the range of the register + size, etc.) by a utility developed by ARM (SVDConv.exe)
      3. +
    3.  semantical correctness of the System View Description + against the silicon specification executed by the silicon vendor
      4. +
    +

    The SVD description format was extended by numerous elements during the +review period targeting version 1.0 and new extensions are expected for future +versions of this format. A new section named "vendorExtensions" has been added +to the end of the top level to allow silicon vendors and tool partners to +innovate and expand the description in order to overcome limitations of the +current specification until these can be incorporated into new versions of +CMSIS-SVD.
    +

    + +

     Format

    + +

    + The following section describes the SVD file format in detail. Each subsection + defines a single hierarchy level of the description and lists all mandatory + and optional language elements for that specific level including type + information for each element. Each element is discussed in more detail and a + brief snippet is provided as an example. The sequence of elements shown + below is binding. Optional elements are highlighted in green, blue elements + are mandatory unless they have been already specified globally on a higher + level.

    +

    + An XML-schema file is provided alongside this document for syntactical + checking of descriptions being developed.

    +

    <device schemaVersion="xs:decimal" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_0.xsd">

    +

       <name>xs:Name</name>
    +   <version>xs:string</version>
    +   <description>xs:string</description>
    +       <addressUnitBits>scaledNonNegativeInteger</addressUnitBits>
    +   <width>scaledNonNegativeInteger </width>
    +
    +   <size>scaledNonNegativeInteger</size>
    +       <access>accessType</access>
    +   <resetValue>scaledNonNegativeInteger</resetValue>
    +   <resetMask>scaledNonNegativeInteger</resetMask>

    +

       <peripherals>
    +      ...
    +   </peripherals>
    +   <vendorExtensions>
    +      ...
    +    </vendorExtensions>

    +

    </device>

    +

    The device provides the outermost frame of the description. All other +elements like peripherals, registers and fields are described inside of this scope. A device contains one or more peripherals. +The optional elements size, access, resetValue and resetMask are used as default values throughout the +device description unless they get overruled on a lower level of the description +(e.g. peripheral or register).

    +

    Mandatory items:

    +

    name = the unique name string is used to identify the device. +All devices of a silicon vendor are required to have a unique name. In case an +SVD description covers a family or series of devices, the name of the series or +family is placed here. The device names of the members of the series or family +are listed in <memberDevices>

    +

    description = string describing main features of a device +(e.g. CPU, clock frequency, peripheral overview, etc.)

    +

    version = the string is defining the version of the +description for this device. Silicon vendors will maintain the description +throughout the lifecycle of the device and need to ensure that all updated and +released copies have a unique version string indicating the order in which. Note: this must not be used for +detailing the version of the device.

    +

     

    +

    addressUnitBits = defines the number of data bits for each address +increment. The value for Cortex-M based devices is  8 (byte-addressable).

    +

    width = defines the number of bits for the maximum single +transfer size allowed by the bus interface hence the maximum size of a single +register that can be defined for the address space. This information is relevant +for debuggers when determining the size of debug transfers. The expected value +for Cortex-M based devices is 32.

    +

    peripherals = next level of description (see next section +for details)

    +

    Optional Items:

    +

    size = defines the default bit-width of registers contained +in the device. This element can be overruled by re-specifying the size element on a lower level of the +description.

    +

    access = defines the default access permissions for all +registers in the device. The allowed tokens are:
    +  - read-only: read access is permitted. Write operations have an undefined +result.
    +  - write-only: write access is permitted. Read operations have an +undefined result.
    +  -read-write: both read and write accesses are permitted. Writes affect +the state of the register and reads return a value related to the register
    +  -writeOnce: only the first write after reset has an effect on the +register. Read operations deliver undefined results
    +  -read-writeOnce: Read operations deliver a result related to the register +content. Only the first write access to this register after a reset will have an +effect on the register content.

    +

    resetValue = defines the default value of all registers +after a reset. There are scenarios where SW developers need to know, what the +reset value of a register or field is. Even though listed as optional on this +level of the description, silicon vendors should ensure that this information is +provided for all registers.

    +

    resetMask = defines those bit positions set to one to be +taken from resetValue element. All other elements are undefined. If a register +does not have a defined reset value the resetMask needs to be set to 0.

    +

    vendorExtensions = the content and format of this section of +the description is unspecified. Silicon vendors may choose to provide additional +information. The assumption is that by default this section is completely +ignored by the debugger. It is up to the silicon vendor to specify the content +of this section and share the specification with the tool vendors. The new +elements shall be considered for a future version of the description format.

    +

    Example:

    +
    <device schemaVersion="1.0" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_0.xsd" >
+  <name>CMSIS_Cortex-M3</name>
+  <version>0.1</version>
+  <description>ARM Cortex-M3 based Microcontroller demonstration device</description>
+  <addressUnitBits>8</addressUnitBits>
+  <width>32</width>
+  <size>32</size>
+  <access>read-write</access>
+  <resetValue>0</resetValue>
+  <resetMask>0xffffffff</resetMask>
    +
      <peripherals>
+    ...
+  </peripherals>
+</device>
    +

    The device description above is at version 0.1 and uniquely identifies the +device by the name "CMSIS_Cortex-M3". The peripherals are memory mapped in a +byte-addressable address space with a bus width of 32 bits. The default size of +the registers contained in the peripherals is set to 32 bits. Unless redefined +for specific peripherals, registers or fields all registers are read-write +accessible. A reset value of 0 valid for all 32 bits as specified by the reset +mask is set for all registers unless overruled at a lower level of the description.

    +
    +

    <peripherals>

    +

       <peripheral>
    +     ...
    +   </peripheral>

    +

         ...

    +

       <peripheral>
    +     ...
    +   </peripheral>

    +

    </peripherals>

    +

    This construct sets the frame for all peripherals and peripheral groups contained in a device. This +creates a container element which ease-up processing with languages like Java.

    +
    +

    <peripheral derivedFrom="xs:Name">

    +

       <name>xs:Name</name>
    +   <version>xs:string</name>
    +   <description>xs:string </description>
    +   <groupName>xs:string</groupName>
    +   <prependToName>xs:string</prependToName>
    +   <appendToName>xs:string</appendToName>
    +   <disableCondition>xs:string</disableCondition>
    +   <baseAddress>scaledNonNegativeInteger</baseAddress>
    +   <size>scaledNonNegativeInteger</size>
    +       <access>accessType</access>
    +   <resetValue>scaledNonNegativeInteger</resetValue>
    +   <resetMask>scaledNonNegativeInteger</resetMask>

    +

       <addressBlock>
    +      <offset>    scaledNonNegativeInteger</offset>
    +      <size>    scaledNonNegativeInteger</size>
    +      <usage>usageType</usage>
    +   </addressBlock>
    +       ...
    +      <addressBlock>
    +      <offset>    scaledNonNegativeInteger</offset>
    +      <size>    scaledNonNegativeInteger</size>
    +      <usage>usageType</usage>
    +   </addressBlock>
    +   <interrupt>
    +      <name>xs:string</name>
    +      <value>scaledNonNegativeInteger</value>
    +   </interrupt>
    +       <registers>
    +   ...
    +   </registers>

    +

    </peripheral>

    +

    A peripheral encloses the description of one or more registers belonging to +this named peripheral. The address range allocated in the address space for this +peripheral is defined through one or more address ranges. An address range is +specified relative to the base address of the peripheral. This information +allows to display a memory map overview for all peripherals. Please note that +such a memory map does not contain any information for memories and unoccupied +address ranges.

    +

    Mandatory items:

    +

    name = name string used to identify the peripheral. Peripheral +names are required to be unique within the scope of a device.

    +

    baseAddress = lowest address reserved or used by the peripheral

    +

    description = string providing an overview of the purpose +and functionality of the peripheral

    +

    addressBlock = a peripheral may occupy one or more disparate +blocks in the address space. An addressBlock is a complex element consisting of +the mandatory elements:
    +    offset: specifying the start address of an address block. It +is calculated from the sum of baseAddress and offset
    +    size: specifying the number of addressUnitBits being covered +by this address block. The end address of an address block is the sum of start +address and the size - 1.
    +    usage: the usage element is of usageType specifying +if the addresses within the specified address block is used for +registers or buffer or is reserved. +
    +Note: registers must not be allocated +to an address within a reserved or buffer address range.

    +

    registers = next lower level of description (see next section +for details)

    +

    Optional items:

    +

    derivedFrom = this attribute specifies the name of a peripheral +that has already been described for this device. The description of that device +will be copied. It is mandatory to overwrite the name as well as the +addressOffset. All other specified information will overwrite the respective +elements in the copy.

    +

    version = the string specifies the version of this +peripheral description.

    +

    disableCondition = C language compliant logical expression +resulting in a true or false result. If "true" the refresh of the display +for this peripheral is disabled +and related accesses by the debugger are suppressed. Only constants and references to other registers +contained in the description are allowed:  +<peripheral>-><register>-><field> (e.g.: (System->ClockControl->apbEnable == 0)). +Only the following operators are allowed [&&,||, ==, !=, >>, <<, &, |]. Warning! +This feature must only be use in case accesses from the debugger to registers of +un-clocked peripherals result in severe debugging failures. SVD is intended to +be fully static information and not include any run-time computation or +functions such capabilities may be added by the tools but is considered beyond +the scope of this description language.

    +

    prependToName = all register names of this peripheral have +their names prepended with the string specified

    +

    appendToName = all register names of this peripheral have +their names appended with the string specified

    +

    size = defines the default bit-width of registers contained +in the device. This element can be overruled by re-specifying the size element on a lower level of the +description.

    +

    access = defines the default access permissions for all +registers in the peripheral. The value can be reset on a lower level of the +description. The allowed tokens are:
    +  - read-only: read access is permitted. Write operations have an undefined +result.
    +  - write-only: write access is permitted. Read operations have an +undefined result.
    +  -read-write: both read and write accesses are permitted. Writes affect +the state of the register and reads return a value related to the register
    +  -writeOnce: only the first write after reset has an effect on the +register. Read operations deliver undefined results
    +  -read-writeOnce: Read operations deliver a result related to the register +content. Only the first write access to this register after a reset will have an +effect on the register content.

    +

    resetValue = defines the default value of all registers +after a reset but can be set for individual registers and fields on a lower +level of the description.

    +

    resetMask = defines those bit positions set to one to be +taken from resetValue element. All other elements are undefined. This is the +default value for the whole peripheral but can be readjusted on lower levels. If +a register does not have a defined reset value the resetMask needs to be set to +0.

    +

    interrupt = is a complex type that consists of the name of +the interrupt and the associated enumeration value. A peripheral can also have +multiple associated interrupts. This entry is mainly intended for information +only purposes in order to display the interrupts and respective interrupt +numbers associated with a peripheral.

    +

    Example:

    +
    ... 
+    <peripheral>
+       <name>Timer0</name>
+       <version>1.0.32</version>
+       <description>Timer 0 is a simple 16 bit timer counting down ... </description>
+       <baseAddress>0x40000000</baseAddress>
+       <addressBlock>
+         <offset>0x0</offset>
+         <size>0x400</size>
+         <usage>registers</usage>
+       </addressBlock>
+       <interrupt><name>TIM0_INT</name><value>34</value></interrupt>
+       <registers>
+         ...
+       </registers>
+    </peripheral>
+    <peripheral derivedFrom="Timer0">
+      <name>Timer1</name>
+      <baseAddress>0x40000400</baseAddress>
+    </peripheral>
+
+...
    +
    +

    <registers> ... </registers>

    +

    This construct sets the frame for all registers contained in a peripheral. +This creates container elements which ease-up processing with languages like Java.

    +
    +

    <register derivedFrom=xs:Name>

    +

       <dim>scaledNonNegativeInteger</dim>
    +   <dimIncrement>scaledNonNegativeInteger</dimIncrement>
    +   <dimIndex>xs:string</dimIndex>
    +   <name>xs:Name</name>
    +   <displayName>xs:string</displayName>
    +       <description>xs:string</description>
    +   <alternateGroup>xs:Name</alternateGroup>
    +       <addressOffset>scaledNonNegativeInteger +</addressOffset>
    +    <size>scaledNonNegativeInteger</size>
    +       <access>accessType</access>
    +       <resetValue>scaledNonNegativeInteger</resetValue>
    +   <resetMask>scaledNonNegativeInteger</resetMask>
    +     +       <modifiedWriteValues>writeValueType</modifiedWriteValues>
    +   <writeConstraint>writeConstraintType</writeConstraint>
    +   <readAction>readActionType </readAction>
    +       <fields>
    +      ...
    +   </fields>

    +

    </register>

    +

    The definition of registers is the central part of the description. A +register may use its complete size for a single purpose and therefore not +consist of fields. Otherwise the description +of fields is mandatory.

    +

    Mandatory items:
    +

    +

    name = name string used to identify the register. Register +names are required to be unique within the scope of a peripheral.

    +

    description = string describing the details of the register.

    +

    addressOffset = value defining the address of the register relative to +the baseAddress defined by the peripheral the register belongs to.
    +

    +

    The following elements can be omitted if the corresponding value has been set +on a higher level of the description and matches the value required for this register:

    +

    size =value defining the bit-width of the register

    +

    access = predefined tokens: read-only, write-only, read-write, +writeOnce, read-writeOnce strings defining the allowed +accesses for this register.

    +

    resetValue = element defining the value of the register +immediately after a reset.

    +

    resetMask= element specifying those bits of the resetValue that +are defined (bit positions containing a 0 bit are ignored, bit +positions containing a 1 bit are taken from the corresponding bit position of +the resetValue). If a register does not have a defined reset value the resetMask +needs to be set to 0.

    +

    Optional items:

    +

    dim = if this field is specified the value defines the +number of elements in an array of registers.

    +

    dimIncrement = if dim is specified this element becomes +mandatory and specifies the address increment in between +two neighboring registers of the register array in the address map.

    +

    dimIndex = this element specifies the substrings within the +register array names that will replace the %s within the register name. By +default the index is a decimal value starting with 0 for the first register. +Examples:
    +   <dim>6</dim> <dimIncrement>4</dimIncrement> <dimIndex>A,B,C,D,E,Z</dimIndex> +<name>GPIO_%s_CTRL</name> ...
    +   => GPIO_A_CTRL, GPIO_B_CTRL, GPIO_C_CTRL, GPIO_D_CTRL, GPIO_E_CTRL, +GPIO_Z_CTRL
    +   <dim>4</dim> <dimIncrement>4</dimIncrement> <dimIndex>3-6</dimIndex> +<name>IRQ%s</name> ...
    +   => IRQ3, IRQ4, IRQ5, IRQ6                 

    +

    displayName = when used, this is the string being used by a +graphical frontend to visualize the register otherwise the name element is used. +Note: the display name may contain special characters and white spaces. It also +uses "%s" as the place holder for the dimIndex substring.

    +

    alternateGroup = when used, this element specifies a name of +a group that all alternate register with the same name a associated with. At the +same time it indicates that there is a register description allocating the same +absolute address in the address space.

    +

    modifiedWriteValues = element to describe the manipulation of +data written to a register. If not specified the value written to the field is the +value stored in the field. The other options are bitwise operations:
    +  oneToClear: write data bits of one shall clear (set to zero) the +corresponding bit in the register
    +  oneToSet: write data bits of one shall set (set to one) the +corresponding bit in the register
    +  oneToToggle: write data bits of one shall toggle (invert) the +corresponding bit in the register
    +  zeroToClear: write data bits of zero shall clear (set to zero) +the corresponding bit in the register
    +  zeroToSet: write data bits of zero shall set (set to one) the +corresponding bit in the register
    +  zeroToToggle: write data bits of zero shall toggle (invert) the +corresponding bit in the register
    +  clear: after a write operation all bits in the field are cleared (set to +zero)
    +  set: after a write operation all bits in the field are set (set to one)
    +  modify: after a write operation all bit in the field may be modified +(default)

    +

    writeConstraint: has a set of options:
    +  writeAsRead = if true only the last read value can be written
    +  useEnumeratedValues = if true only those values listed in the +enumeratedValues list are considered valid write values
    +  minimum = specifies the smallest number to be written to the +register
    +  maximum = specifies the largest number to be written to the +register

    +

    readAction: if set it specifies the side effect following +read operations. If not set the register is not modified following a read +operations. The defined side effects are:
    +  clear: indicates that the register is cleared (set to zero) +following a read operation
    +  set: indicates that the register is set (set to ones) following a +read operation
    +  modify: indicates that the register is modified in some way +after a read operation
    +  modifyExternal: indicates that one or more dependent resources +other than the current register +are immediately affected by a read (it is recommended that the register +description specifies these dependencies). Debuggers are not expected to read +this register location unless explicitly instructed by user.

    +

    fields = next lower level of description (see next section +for details).

    +

    Optional attribute:

    +

    derivedFrom = specifies the name of the register to be +replicated. Elements being specified underneath will override the values specified +from the register being derived from. Note that it is mandatory to overwrite at +least name and addressOffset.

    +

    Example:

    +
    ... 
+       <register>
+         <name>TimerCtrl0</name>
+         <description>Timer Control Register</description>
+         <addressOffset>0x0</addressOffset>
+         <access>read-write</access>
+         <resetValue>0x00008001</resetValue>
+         <resetMask>0x0000ffff</resetMask>
+         <size>32<size>
+         <fields>
+           ...
+         </fields>
+       </register>
+       <register derivedFrom="TimerCtrl0">
+         <name>TimerCtrl1</name>
+         <addressOffset>0x4<addressOffset>
+       </register>
+...
    +
    +

    <fields> ... </fields>

    +

    This construct sets the frame for all fields contained in a register. +This creates container elements which ease-up processing with languages like Java.

    +
    +

     <field derivedFrom="xs:Name">

    +

       <name>xs:Name</name>
    +       <description>xs:string</description>
    +   +<bitOffset>scaledNonNegativeInteger</bitOffset> +<bitWidth>scaledNonNegativeInteger</bitWidth>
    +       or
    +   <lsb>scaledNonNegativeInteger</lsb> <msb>scaledNonNegativeInteger</msb>
    +       or
    +   <bitRange>pattern</bitRange>
    +   <access>accessType</access>
    +       <modifiedWriteValues>writeValueType</modifiedWriteValues>
    +   <writeConstraint>writeConstraintType</writeConstraint>
    +   <readAction>readActionType </readAction>
    +       <enumeratedValues>
    +      ...
    +   </enumeratedValues>

    +

    </field>

    +

    A bit-field has a name that is unique for the register it belongs to. The +position and size within the register is either described by the combination of +the least significant bit's position (lsb) and the most significant bit's +position (msb) or the lsb and the size, specifying the bit-width of the +field.  A field may define an enumeratedValue in order to make the display +more intuitive to read.

    +

    Mandatory items:

    +

    name = name string used to identify the field. Field names +are required to be unique within the scope of a register.
    +

    +

    description = string describing the details of the register.
    +

    +

    There are 3 ways to describe a field to be used mutually exclusive:
    +a) specifying bitOffset and bitWidth (IP-XACT like)
    +b) specifying lsb and msb of the field.
    +c) specifying a bit range in the format "[<msb>:<lsb>]"

    +

    bitOffset = value defining the position of the least significant bit +of the field within the register it belongs to.
    +bitWidth = value defining the bit-width of the bitfield within the +register it belongs to.
    +

    +

    +lsb = value defining the bit position of the least significant +bit within the register it belongs to.
    +msb = value defining the bit position of the most significant +bit within the register it belongs to. +

    +

    bitRange = a string in the format: [<msb>:<lsb>]
    +

    +

    Optional items:

    +

    derivedFrom = the field is cloned +from a previously defined field with a unique name.

    +

    access = predefined strings defining the allowed +accesses for this register: read-only, write-only, read-write, writeOnce, +read-writeOnce. Can be omitted if it matches the access permission set for the parent register.

    +

    enumeratedValues = next lower level of description (see next section +for details)

    +

    modifiedWriteValues = element to describe the manipulation of +data written to a field. If not specified the value written to the field is the +value stored in the field. The other options are bitwise operations:
    +  oneToClear: write data bit of one shall clear (set to zero) the +corresponding bit in the field
    +  oneToSet: write data bit of one shall set (set to one) the corresponding +bit in the field
    +  oneToToggle: write data bit of one shall toggle (invert) the +corresponding bit in the field
    +  zeroToClear: write data bit of zero shall clear (set to zero) the +corresponding bit in the field
    +  zeroToSet: write data bit of zero shall set (set to one) the +corresponding bit in the field
    +  zeroToToggle: write data bit of zero shall toggle (invert) the +corresponding bit in the field
    +  clear: after a write operation all bits in the field are cleared (set to +zero)
    +  set: after a write operation all bits in the field are set (set to one)
    +  modify: after a write operation all bit in the field may be modified +(default)

    +

    writeConstraint: has a set of options:
    +  writeAsRead = if true only the last read value can be written
    +  useEnumeratedValues = if true only those values listed in the +enumeratedValues list are considered valid write values
    +  minimum = specifies the smallest number to be written to the field
    +  maximum = specifies the largest number to be written to the field

    +

    readAction: if set it specifies the side effect following +read operations. If not set the field is not modified following a read +operations. The defined side effects are:
    +  clear: indicates that the field is cleared (set to zero) +following a read operation
    +  set: indicates that the field is set (set to ones) following a +read operation
    +  modify: indicates that the field is modified in some way after a +read operation  +
    +  modifyExternal: indicates that one or more dependent resources +other than this field are immediately affected by a read (it is recommended that +the field description specifies these dependencies). Debuggers are not expected +to read the field unless explicitly instructed by user.

    +

    Example:

    +
    ...
+         <field>
+           <name>TimerCtrl0_IntSel</name>
+           <description>Select interrupt line that is triggered by timer overflow.</description>
+	   <bitOffset>1</bitOffset>
+           <bitWidth>3</bitWidth>
+           <access>read-write</access>
+	   <resetValue>0x0</resetValue>
+           <modifiedWriteValues>oneToSet</modifiedWriteValues>
+           <writeConstraint>
+              <range>
+                <minimum>0</minimum>
+                <maximum>5</maximum>
+              </range>
+           </writeConstraint>
+           <readAction>clear</readAction>
+ 
+           <enumeratedValues>
+              ...
+           </enumeratedValues>
+         </field>
+...
    +
    +

    <enumeratedValues +derivedFrom="xs:Name">

    +

       <name>xs:Name</name>
    +   <usage>usageType</usage>
    +   <enumeratedValue>
    +      ...
    +   </enumeratedValue>

    +

          ... 

    +

       <enumeratedValue>
    +      ...
    +   </enumeratedValue>

    +

    </enumeratedValues>

    +

    An enumerated value provides one or more enumeration items (enumeratedValue), defining a map +between all possible values of the bit-field it belongs to and the corresponding +human readable semantics of that value.

    +

    Mandatory items:
    +enumeratedValue = next lower level of description (see next section +for details)

    +

    Optional items:
    +derivedFrom = the enumeratedValues can be copied or derived +from a previously defined enumeratedValue that has been given a unique name.
    +name = name string to identify an enumeratedValue. Named +enumeratedValues need to be unique in the scope of a device in order to be reusable +throughout the description of a device.
    +usage = possible values are read, write or +read-write. This allows to specify two different enumerated values +depending whether it is to be used for a read or a write access. If not specified the enueratedValues are valid for read and write.

    +

    Example:

    +
    ...
+           <enumeratedValues>
+              <name>TimerIntSelect</name>
+              <usage>read-write</usage>
+              <enumeratedValue>
+                <name>disabled</name>
+                <description>disabled bit</description>
+                <value>0</value>
+              </enumeratedValue>
+              ...
+              <enumeratedValue>
+                <name>reserved</name>
+	        <description>reserved values. Do not use</description>
+                <isDefault>true</isDefault>
+              </enumeratedValue>
+           </enumeratedValues>
+...
    +
    +

    <enumeratedValue>

    +

       <name>xs:name</name>
    +   <description>xs:string</description>
    +       <value>scaledNonNegativeInteger</value>
    +   +    or
    +   <    isDefault>xs:boolean</isDefault>
    +

    +

    </enumeratedValue>

    +

    An enumeratedValue defines a map between a value and the string reading the +corresponding human readable semantics for that value in a brief and a detailed +version

    +

    Mandatory items:

    +

    name= brief string verbally describing the semantics of the value +defined for this enumeratedValue. E.g. used for display in visualization of a bit-field +instead of the value.

    +

    +value = defines the constant of the bit-field that the name +corresponds to.

    +

    isDefault = defines the name and description for all other +values that are not explicitly listed

    +

    Optional item:

    +

    description = extended string verbally describing the semantics +of the value defined for this enumeratedValue in full detail.

    +

    Example:

    +
    ...
+         <enumeratedValue>
+            <name>disabled</name>
+            <description>Timer does not generate interrupts</description>
+            <value>0</value>
+         </enumeratedValue>
+         ...
+         <enumeratedValue>
+            <name>enabled</name>
+            <description>Timer does not generate interrupts</description>
+            <isDefault>true</isDefault>
+         </enumeratedValue>
+
+...
    +
    +

    Names

    +

    Names shall comply with ANSI C variable naming restrictions.

    +

    Constants

    +

    Number constants shall be entered in hexadecimal, decimal or binary format.

    +
      +
    • hexadecimal is indicated by a leading "0x"
      • +
    • binary format is indicated by a leading  "#"
      • +
    • all other formats are interpreted as decimal numbers
      • +
    • the value tag in enumeratedValue accepts do not care bits + represented by "x"
      • +
    +

    Comments

    +

    Comments have the standard XML format "<!--" starts a comment + "-->" terminates a comment

    +

    Example

    +
    +<?xml version="1.0" encoding="utf-8"?>
+ 
+<device schemaVersion="1.0" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_0.xsd" >
+  <name>Cortex_M3_Sample</name>
+  <version>0.1</version>
+  <description>ARM Cortex-M3 based Microcontroller dummy device</description>
+  <!-- Bus Interface Properties -->
+  <!-- Cortex-M3 is byte addressable -->
+  <addressUnitBits>8</addressUnitBits>
+  <!-- the maximum data bit width accessible within a single transfer is 32bits -->
+  <width>32</width>
+
+  <!-- Register Default Properties -->
+  <!-- the size of the registers is set to a bit width of 32. This can be overruled for individual peripherals and/or registers -->
+  <size>32</size>
+  <!-- the access to all registers is set to be readable and writeable. This can be overruled for individual peripherals and/or registers -->
+  <access>read-write</access>
+  <!-- for demonstration purposes the resetValue for all registers of the device is set to be 0. This can be overruled within the description -->
+  <resetValue>0</resetValue>
+  <!-- the resetMask = 0 specifies that by default no register of this device has a defined reset value -->
+  <resetMask>0</resetMask>
+
+  <peripherals>
+    <peripheral>
+      <name>Timer0</name>
+      <description>A simple 16 bit timer counting down ... </description>
+      <groupName>Timer</groupName>
+      <baseAddress>0x40000000</baseAddress>
+      <!-- the first addressBlock is occupied by registers. The second block is reserved -> no access permission -->
+      <addressBlock>
+        <offset>0</offset>
+        <size>0x8</size>
+        <usage>registers</usage>
+      </addressBlock>
+      <addressBlock>
+        <offset>0x8</offset>
+        <size>0x3f8</size>
+        <usage>reserved</usage>
+      </addressBlock>
+      <interrupt>
+        <name>TIM0_IRQn</name>
+        <value>34</value>
+      </interrupt>
+      <registers>
+        <register> 
+          <name>TimerCtrl0</name>
+          <!-- the display name is an unrestricted string. -->
+          <displayName>Timer Ctrl 0</displayName>
+          <description>Timer Control Register</description>
+          <addressOffset>0x0</addressOffset>
+          <!-- size=32, access=read-write, resetValue=0x0, resetMask=0xffffffff, volatile=false -->
+          <fields>
+            <field>
+              <name>TimerCtrl0_En</name>
+              <description>Enable Bit activates the timer.</description>
+              <!-- Spirit like bit range description: [0:0] -->
+              <bitOffset>0</bitOffset>
+              <bitWidth>1</bitWidth>
+              <!-- Writing 1 enables, writing 0 has no effect -->
+	      <modifiedWriteValues>oneToSet</modifiedWriteValues>
+              <!-- The write constraint is defined to be that only the values provided by the enumeratedValues below are allowed -->
+              <writeConstraint>
+                <useEnumeratedValues>true</useEnumeratedValues>
+              </writeConstraint>
+              <!-- there is no side effect on reads, therefore <readAction> is not set -->
+              <!-- oneBitEnable named enumeration that can be reused in other parts of the description -->
+              <enumeratedValues>
+                <name>oneBitEnable</name>
+                <!-- the same enumerated Values are used for read and write. This default is assumed when this tag is missing -->
+                <usage>read-write</usage>
+                <enumeratedValue>
+                  <name>enabled</name>
+                  <description>Timer is enabled and active</description>
+                  <value>0x0</value>
+                </enumeratedValue>
+                <enumeratedValue>
+                  <name>disabled</name>
+                  <description>Timer is disabled and inactive</description>
+                  <value>0x1</value>
+                </enumeratedValue>
+              </enumeratedValues>
+            </field>
+            <field>
+              <name>TimerCtrl0_Dis</name>
+              <description>Disable Bit deactivates the timer.</description>
+              <!-- Spirit like bit range description: [1:1] -->
+              <bitOffset>1</bitOffset>
+              <bitWidth>1</bitWidth>
+              <!-- Writing 1 sets, writing 0 has no effect -->
+	      <modifiedWriteValues>oneToSet</modifiedWriteValues>
+              <!-- The write constraint is defined to be that only the values provided by the enumeratedValues below are allowed -->
+              <writeConstraint>
+                <useEnumeratedValues>true</useEnumeratedValues>
+              </writeConstraint>
+              <!-- there is no side effect on reads, therefore <readAction> is not set -->
+              <!-- oneBitEnable named enumeration that can be reused in other parts of the description -->
+              <enumeratedValues derivedFrom="oneBitEnable"></enumeratedValues>
+            </field>
+            <field>
+              <name>TimerCtrl0_Int</name>
+              <description>Select interrupt line that is triggered by timer overflow.</description>
+              <!-- the position of the bit field is described in the bitRange style. -->
+              <bitRange>[4:2]</bitRange>
+              <enumeratedValues>
+                <enumeratedValue>
+                  <name>disabled</name>
+                  <description>Timer does not generate interrupts</description>
+                  <value>0</value>
+                </enumeratedValue>
+                <enumeratedValue>
+                  <name>int 0</name>
+                  <description>Timer does generate interrupts on interrupt line 0</description>
+                  <value>1</value>
+                </enumeratedValue>
+                <enumeratedValue>
+                  <name>int 1</name>
+                  <description>Timer does generate interrupts on interrupt line 1</description>
+                  <value>2</value>
+                </enumeratedValue>
+                <enumeratedValue>
+                  <name>int 2</name>
+                  <description>Timer does generate interrupts on interrupt line 2</description>
+                  <value>3</value>
+                </enumeratedValue>
+                <enumeratedValue>
+                  <name>int 3</name>
+                  <description>Timer does generate interrupts on interrupt line 3</description>
+                  <value>4</value>
+                </enumeratedValue>
+                <enumeratedValue>
+                  <name>int 4</name>
+                  <description>Timer does generate interrupts on interrupt line 4</description>
+                  <value>5</value>
+                </enumeratedValue>
+                <!-- this is the default element. All the valid value not listed above (6,7) have the following name and description -->
+                <enumeratedValue>
+                  <name>reserved</name>
+                  <description>Timer is configured incorrectly and the functionality is considered unpredictable</description>
+                  <isDefault>true</isDefault>
+                </enumeratedValue>
+              </enumeratedValues>
+            </field>
+          </fields>
+        </register>
+        <register>
+          <name>TimerCounter0</name>
+          <description>Timer0 16 Bit Counter Register</description>
+          <addressOffset>0x4</addressOffset>
+          <size>16</size>
+        </register>
+        <!-- a copy of the counter register TimerCounter0 with the name="TimerCounter1" and the addressOffset="0x8" -->
+        <register derivedFrom="TimerCounter0">
+          <name>TimerCounter1</name>
+          <addressOffset>0x6</addressOffset>
+        </register>
+        <!-- ... this is a restricted demo example and a real timer peripheral would have more register to be complete -->
+      </registers>
+    </peripheral>
+    <!-- a copy of Timer0 with the name="Timer1 and the baseAddress="0x40000400" -->
+    <peripheral derivedFrom="Timer0">
+      <name>Timer1</name>
+      <baseAddress>0x40000400</baseAddress>
+      <interrupt>
+        <name>TIM1_IRQn</name>
+        <value>35</value>
+      </interrupt>
+    </peripheral>
+  </peripherals>
+</device>
    + +

    Questions & Answers

    +

    Is there any relation between the System View Description and the CMSIS +standard?

    +

    Initiallly there was no immediate link but both initiatives had a common goal: +Create a sound software development eco-system for Cortex-M based +Microcontroller, giving the customers the free choice of devices and software +development environments and all resources required for a successful product +development in a single location. Meanwhile we have started to generate +CMSIS compliant device header files from the same CMSIS-SVD description. We will +introduce a small number of additional description tags in the next version of +the specification. The benefit is the synchronization between symbols used in +the application and the symbols displayed by the debugger. 

    +

    Why does the format not provide constructs like macros and +conditional statements?

    +

    It is assumed that the description is generated from other sources and +therefore such concepts would only complicate the language unnecessarily. It is +recommended to use a standard C pre-processor to generate the debug description +format from a redundancy optimized description.

    +

    Do we need to consider endianess in the description?

    +

    This should be specified on a device configuration level and is not specific +to the visualization of peripheral details in a System View. Endianess becomes +relevant when using bit fields in the CMSIS compliant device header file.

    +

    Is the System View Description limited to Cortex-M based devices ?

    + + +

    There may have been assumptions made about the structure of the device due to +it being developed around a Cortex-M processor. E.g. that all peripherals are +assumed to be memory mapped and to reside in a single address space. It is quite +likely that the description format may also serve other architectures +sufficiently. There is no intent to limit the format to Cortex-M +processor based devices.

    + + + \ No newline at end of file diff --git a/lib/inc/core/arm_common_tables.h b/Libraries/CMSIS/Include/arm_common_tables.h old mode 100755 new mode 100644 similarity index 100% rename from lib/inc/core/arm_common_tables.h rename to Libraries/CMSIS/Include/arm_common_tables.h diff --git a/lib/inc/core/arm_math.h b/Libraries/CMSIS/Include/arm_math.h old mode 100755 new mode 100644 similarity index 100% rename from lib/inc/core/arm_math.h rename to Libraries/CMSIS/Include/arm_math.h diff --git a/lib/inc/core/core_cm0.h b/Libraries/CMSIS/Include/core_cm0.h old mode 100755 new mode 100644 similarity index 100% rename from lib/inc/core/core_cm0.h rename to Libraries/CMSIS/Include/core_cm0.h diff --git a/lib/inc/core/core_cm3.h b/Libraries/CMSIS/Include/core_cm3.h old mode 100755 new mode 100644 similarity index 100% rename from lib/inc/core/core_cm3.h rename to Libraries/CMSIS/Include/core_cm3.h diff --git a/lib/inc/core/core_cm4.h b/Libraries/CMSIS/Include/core_cm4.h old mode 100755 new mode 100644 similarity index 100% rename from lib/inc/core/core_cm4.h rename to Libraries/CMSIS/Include/core_cm4.h diff --git a/lib/inc/core/core_cm4_simd.h b/Libraries/CMSIS/Include/core_cm4_simd.h old mode 100755 new mode 100644 similarity index 100% rename from lib/inc/core/core_cm4_simd.h rename to Libraries/CMSIS/Include/core_cm4_simd.h diff --git a/lib/inc/core/core_cmFunc.h b/Libraries/CMSIS/Include/core_cmFunc.h old mode 100755 new mode 100644 similarity index 100% rename from lib/inc/core/core_cmFunc.h rename to Libraries/CMSIS/Include/core_cmFunc.h diff --git a/lib/inc/core/core_cmInstr.h b/Libraries/CMSIS/Include/core_cmInstr.h old mode 100755 new mode 100644 similarity index 100% rename from lib/inc/core/core_cmInstr.h rename to Libraries/CMSIS/Include/core_cmInstr.h diff --git a/Libraries/CMSIS/README.txt b/Libraries/CMSIS/README.txt new file mode 100644 index 0000000..cc69e2c --- /dev/null +++ b/Libraries/CMSIS/README.txt @@ -0,0 +1,34 @@ +* ------------------------------------------------------------------- +* Copyright (C) 2011 ARM Limited. All rights reserved. +* +* Date: 25 July 2011 +* Revision: V2.10 +* +* Project: Cortex Microcontroller Software Interface Standard (CMSIS) +* Title: Release Note for CMSIS +* +* ------------------------------------------------------------------- + + +NOTE - Open the index.html file to access CMSIS documentation + + +The Cortex Microcontroller Software Interface Standard (CMSIS) provides a single standard across all +Cortex-Mx processor series vendors. It enables code re-use and code sharing across software projects +and reduces time-to-market for new embedded applications. + +CMSIS is released under the terms of the end user license agreement ("CMSIS END USER LICENCE AGREEMENT.pdf"). +Any user of the software package is bound to the terms and conditions of the end user license agreement. + + +You will find the following sub-directories: + +Documentation - Contains CMSIS documentation. + +DSP_Lib - MDK project files, Examples and source files etc.. to build the + CMSIS DSP Software Library for Cortex-M0, Cortex-M3, Cortex-M4 processors. + +Include - CMSIS Core Support and CMSIS DSP Include Files. + +Lib - CMSIS DSP Binaries +--- \ No newline at end of file diff --git a/Libraries/CMSIS/index.htm b/Libraries/CMSIS/index.htm new file mode 100644 index 0000000..40e52b3 --- /dev/null +++ b/Libraries/CMSIS/index.htm @@ -0,0 +1,115 @@ + + + +CMSIS Release Notes + + + + + + + + +

    CMSIS Release Notes

    +

    Release Notes for CMSIS V2.00

    +

    November 2010

    + +

    Information in this file, the accompany manuals, and software is
    + Copyright © ARM Ltd.
    All rights reserved. +

    +

    + +
    + +

    Contents

    + + + + + + + \ No newline at end of file diff --git a/lib/Makefile b/Libraries/Makefile similarity index 83% rename from lib/Makefile rename to Libraries/Makefile index d6105ea..c624147 100755 --- a/lib/Makefile +++ b/Libraries/Makefile @@ -3,12 +3,13 @@ AR=arm-none-eabi-ar ########################################### -vpath %.c src src/peripherals +vpath %.c STM32F0xx_StdPeriph_Driver/src CFLAGS = -g -O2 -Wall CFLAGS += -mlittle-endian -mthumb -mcpu=cortex-m0 -march=armv6s-m CFLAGS += -ffreestanding -nostdlib -CFLAGS += -Iinc -Iinc/core -Iinc/peripherals +CFLAGS += -I../Device -ICMSIS/Include -ICMSIS/Device/ST/STM32F0xx/Include -ISTM32F0xx_StdPeriph_Driver/inc + SRCS = stm32f0xx_adc.c stm32f0xx_cec.c stm32f0xx_comp.c stm32f0xx_crc.c \ stm32f0xx_dac.c stm32f0xx_dbgmcu.c stm32f0xx_dma.c stm32f0xx_exti.c \ diff --git a/Libraries/STM32F0xx_StdPeriph_Driver/Release_Notes.html b/Libraries/STM32F0xx_StdPeriph_Driver/Release_Notes.html new file mode 100644 index 0000000..3c0ed5e --- /dev/null +++ b/Libraries/STM32F0xx_StdPeriph_Driver/Release_Notes.html @@ -0,0 +1,340 @@ + + + + + + + + + + +Release Notes for STM32F0xx Standard Peripherals Library Drivers + + + + + + +
    +


    +

    +
    + + + + + + +
    + + + + + + +
    + +

    Release +Notes for STM32F0xx Standard Peripherals Library Drivers
    +

    +

    Copyright +© 2012 STMicroelectronics

    +

    +
    +

     

    + + + + + + +
    +

    Contents

    +
      +
    1. STM32F0xx Standard Peripherals Library Drivers update history
      2. +
    2. License
      3. +
    +

    STM32F0xx Standard Peripherals Library Drivers update history

    V1.0.1 / 20-April-2012

    Main +Changes

    +
    • All drivers, function's header: update comments and Doxygen tags formatting
    • stm32f0xx_pwr.c
      • PWR_PVDLevelConfig() +function: remove value of the voltage threshold corresponding to each +PVD detection level, user should refer to the electrical +characteristics of the STM32F0xx device datasheet to have the correct +value
    • stm32f0xx_usart.c/.h
      • USART_Init() function: update baudrate computation to be in line with the formula described in the Reference Manual (RM0091)
      • USART_AutoBaudRateNewRequest() function removed
    • stm32f0xx_i2c.c
      • I2C_GetITStatus() function: add test to check if the interrupt source is enabled or not

    V1.0.0 / 23-March-2012

    Main +Changes

    +
    • First official release for STM32F0xx devices
    • All source files: license disclaimer text update and add link to the License file on ST Internet
    • stm32f0xx_comp.h
      •  Correct values of COMP_Mode parameter
    • stm32f0xx_rcc.c/.h
      • Add new reset flag V18PWRRSTF in the RCC CSR register
      • Add new MCO clock sources (LSI and LSE) and change value of RCC_MCOSource_HSI14 
    • stm32f0xx_flash.c/.h
      • Add new function FLASH_OB_SRAMParityConfig() to manage the SRAM parity enable option bit
      • Flash and OB keys moved to stm32f0xx.h file
    • stm32f0xx_tim.c/.h
      • Add additional input for TIM14 clock  (HSE divided by 32 and MCO) 
      • Miscellaneous enhancement
    • stm32f0xx_adc.c/.h
      • Miscellaneous update to be in line with bits naming in the Reference Manual (update done also in stm32f0xx.h file)
    • stm32f0xx_i2c.c/.h
      • Miscellaneous enhancement
    + +

    V1.0.0RC1 / 27-January-2012

    +

    Main +Changes

    + + + + + +
      +
    • Official version (V1.0.0) Release Candidate 1
      • + +
    +
      + +

      License

      Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this package except in compliance with the License. You may obtain a copy of the License at:


      Unless +required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS,
      WITHOUT +WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See +the License for the specific language governing permissions and +limitations under the License.
      +
      +

      For + complete documentation on STM32 + Microcontrollers visit www.st.com/STM32

      +
      +

      +
      +
      +

       

      +
      + \ No newline at end of file diff --git a/lib/inc/peripherals/stm32f0xx_adc.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_adc.h old mode 100755 new mode 100644 similarity index 97% rename from lib/inc/peripherals/stm32f0xx_adc.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_adc.h index b0d6241..8a25afa --- a/lib/inc/peripherals/stm32f0xx_adc.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_adc.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_adc.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the ADC firmware * library ****************************************************************************** @@ -181,7 +181,7 @@ typedef struct * @} */ -/** @defgroup ADC_Scan_Direction +/** @defgroup ADC_DMA_Mode * @{ */ diff --git a/lib/inc/peripherals/stm32f0xx_cec.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_cec.h old mode 100755 new mode 100644 similarity index 97% rename from lib/inc/peripherals/stm32f0xx_cec.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_cec.h index b36ab4d..d44deef --- a/lib/inc/peripherals/stm32f0xx_cec.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_cec.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_cec.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the CEC firmware * library. ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_comp.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_comp.h old mode 100755 new mode 100644 similarity index 97% rename from lib/inc/peripherals/stm32f0xx_comp.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_comp.h index 719aa20..67bc01b --- a/lib/inc/peripherals/stm32f0xx_comp.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_comp.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_comp.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the COMP firmware * library. ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_crc.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_crc.h old mode 100755 new mode 100644 similarity index 96% rename from lib/inc/peripherals/stm32f0xx_crc.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_crc.h index 0685e25..4569f31 --- a/lib/inc/peripherals/stm32f0xx_crc.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_crc.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_crc.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the CRC firmware * library. ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_dac.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dac.h old mode 100755 new mode 100644 similarity index 96% rename from lib/inc/peripherals/stm32f0xx_dac.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dac.h index c1331b1..a881c15 --- a/lib/inc/peripherals/stm32f0xx_dac.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dac.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_dac.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the DAC firmware * library. ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_dbgmcu.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dbgmcu.h old mode 100755 new mode 100644 similarity index 96% rename from lib/inc/peripherals/stm32f0xx_dbgmcu.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dbgmcu.h index 720a6fa..03ec516 --- a/lib/inc/peripherals/stm32f0xx_dbgmcu.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dbgmcu.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_dbgmcu.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the DBGMCU firmware * library. ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_dma.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dma.h old mode 100755 new mode 100644 similarity index 97% rename from lib/inc/peripherals/stm32f0xx_dma.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dma.h index 779859d..65e5976 --- a/lib/inc/peripherals/stm32f0xx_dma.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dma.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_dma.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the DMA firmware * library. ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_exti.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_exti.h old mode 100755 new mode 100644 similarity index 97% rename from lib/inc/peripherals/stm32f0xx_exti.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_exti.h index 0069f0a..b3fe109 --- a/lib/inc/peripherals/stm32f0xx_exti.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_exti.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_exti.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the EXTI * firmware library ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_flash.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_flash.h old mode 100755 new mode 100644 similarity index 96% rename from lib/inc/peripherals/stm32f0xx_flash.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_flash.h index cefd0ec..bb20740 --- a/lib/inc/peripherals/stm32f0xx_flash.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_flash.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_flash.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the FLASH * firmware library. ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_gpio.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_gpio.h old mode 100755 new mode 100644 similarity index 96% rename from lib/inc/peripherals/stm32f0xx_gpio.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_gpio.h index 27723dc..98ef239 --- a/lib/inc/peripherals/stm32f0xx_gpio.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_gpio.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_gpio.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the GPIO * firmware library. ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_i2c.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_i2c.h old mode 100755 new mode 100644 similarity index 97% rename from lib/inc/peripherals/stm32f0xx_i2c.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_i2c.h index 2052281..0364ce4 --- a/lib/inc/peripherals/stm32f0xx_i2c.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_i2c.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_i2c.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the I2C firmware * library ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_iwdg.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_iwdg.h old mode 100755 new mode 100644 similarity index 95% rename from lib/inc/peripherals/stm32f0xx_iwdg.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_iwdg.h index a6ac107..6cb94a9 --- a/lib/inc/peripherals/stm32f0xx_iwdg.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_iwdg.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_iwdg.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the IWDG * firmware library. ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_misc.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_misc.h old mode 100755 new mode 100644 similarity index 95% rename from lib/inc/peripherals/stm32f0xx_misc.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_misc.h index 60d31ab..33d33bd --- a/lib/inc/peripherals/stm32f0xx_misc.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_misc.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_misc.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the miscellaneous * firmware library functions (add-on to CMSIS functions). ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_pwr.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_pwr.h old mode 100755 new mode 100644 similarity index 96% rename from lib/inc/peripherals/stm32f0xx_pwr.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_pwr.h index cb31fdb..5aca7e7 --- a/lib/inc/peripherals/stm32f0xx_pwr.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_pwr.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_pwr.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the PWR firmware * library. ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_rcc.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rcc.h old mode 100755 new mode 100644 similarity index 97% rename from lib/inc/peripherals/stm32f0xx_rcc.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rcc.h index 2fc34fd..5dabc15 --- a/lib/inc/peripherals/stm32f0xx_rcc.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rcc.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_rcc.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the RCC * firmware library. ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_rtc.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rtc.h old mode 100755 new mode 100644 similarity index 96% rename from lib/inc/peripherals/stm32f0xx_rtc.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rtc.h index 8315d43..01dec94 --- a/lib/inc/peripherals/stm32f0xx_rtc.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rtc.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_rtc.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the RTC firmware * library. ****************************************************************************** @@ -555,8 +555,6 @@ typedef struct input tamper 1 */ #define RTC_Tamper_2 RTC_TAFCR_TAMP2E /*!< Tamper detection enable for input tamper 2 */ -#define RTC_Tamper_3 RTC_TAFCR_TAMP3E /*!< Tamper detection enable for - input tamper 3 */ #define IS_RTC_TAMPER(TAMPER) ((((TAMPER) & (uint32_t)0xFFFFFFD6) == 0x00) && ((TAMPER) != (uint32_t)RESET)) @@ -629,7 +627,6 @@ typedef struct * @{ */ #define RTC_FLAG_RECALPF ((uint32_t)0x00010000) -#define RTC_FLAG_TAMP3F ((uint32_t)0x00008000) #define RTC_FLAG_TAMP2F ((uint32_t)0x00004000) #define RTC_FLAG_TAMP1F ((uint32_t)0x00002000) #define RTC_FLAG_TSOVF ((uint32_t)0x00001000) @@ -640,13 +637,12 @@ typedef struct #define RTC_FLAG_INITS ((uint32_t)0x00000010) #define RTC_FLAG_SHPF ((uint32_t)0x00000008) -#define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RECALPF) || ((FLAG) == RTC_FLAG_TAMP3F) || \ +#define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RECALPF) || ((FLAG) == RTC_FLAG_SHPF) || \ ((FLAG) == RTC_FLAG_TAMP2F) || ((FLAG) == RTC_FLAG_TAMP1F) || \ ((FLAG) == RTC_FLAG_TSOVF) || ((FLAG) == RTC_FLAG_TSF) || \ ((FLAG) == RTC_FLAG_ALRAF) || ((FLAG) == RTC_FLAG_INITF) || \ - ((FLAG) == RTC_FLAG_RSF) || ((FLAG) == RTC_FLAG_INITS) || \ - ((FLAG) == RTC_FLAG_SHPF)) -#define IS_RTC_CLEAR_FLAG(FLAG) (((FLAG) != (uint32_t)RESET) && (((FLAG) & 0xFFFF06DF) == (uint32_t)RESET)) + ((FLAG) == RTC_FLAG_RSF) || ((FLAG) == RTC_FLAG_INITS)) +#define IS_RTC_CLEAR_FLAG(FLAG) (((FLAG) != (uint32_t)RESET) && (((FLAG) & 0xFFFF86DF) == (uint32_t)RESET)) /** * @} @@ -660,13 +656,12 @@ typedef struct #define RTC_IT_TAMP ((uint32_t)0x00000004) /* Used only to Enable the Tamper Interrupt */ #define RTC_IT_TAMP1 ((uint32_t)0x00020000) #define RTC_IT_TAMP2 ((uint32_t)0x00040000) -#define RTC_IT_TAMP3 ((uint32_t)0x00080000) #define IS_RTC_CONFIG_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFF6FFB) == (uint32_t)RESET)) #define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_TS) || ((IT) == RTC_IT_ALRA) || \ - ((IT) == RTC_IT_TAMP1) || ((IT) == RTC_IT_TAMP2) || \ - ((IT) == RTC_IT_TAMP3)) -#define IS_RTC_CLEAR_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFF16FFF) == (uint32_t)RESET)) + ((IT) == RTC_IT_TAMP1) || ((IT) == RTC_IT_TAMP2)) + +#define IS_RTC_CLEAR_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFF96FFF) == (uint32_t)RESET)) /** * @} diff --git a/lib/inc/peripherals/stm32f0xx_spi.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_spi.h old mode 100755 new mode 100644 similarity index 97% rename from lib/inc/peripherals/stm32f0xx_spi.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_spi.h index a9a34e1..cb05754 --- a/lib/inc/peripherals/stm32f0xx_spi.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_spi.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_spi.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the SPI * firmware library. ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_syscfg.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_syscfg.h old mode 100755 new mode 100644 similarity index 97% rename from lib/inc/peripherals/stm32f0xx_syscfg.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_syscfg.h index 3a5838a..7f0ca82 --- a/lib/inc/peripherals/stm32f0xx_syscfg.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_syscfg.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_syscfg.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the SYSCFG firmware * library. ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_tim.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_tim.h old mode 100755 new mode 100644 similarity index 97% rename from lib/inc/peripherals/stm32f0xx_tim.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_tim.h index bd6d28c..e9e1009 --- a/lib/inc/peripherals/stm32f0xx_tim.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_tim.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_tim.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the TIM * firmware library. ****************************************************************************** diff --git a/lib/inc/peripherals/stm32f0xx_usart.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_usart.h old mode 100755 new mode 100644 similarity index 94% rename from lib/inc/peripherals/stm32f0xx_usart.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_usart.h index 4e30294..f27b248 --- a/lib/inc/peripherals/stm32f0xx_usart.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_usart.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_usart.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the USART * firmware library. ****************************************************************************** @@ -129,8 +129,8 @@ typedef struct */ #define USART_StopBits_1 ((uint32_t)0x00000000) -#define USART_StopBits_2 ((uint32_t)USART_CR2_STOP_1) -#define USART_StopBits_1_5 ((uint32_t)USART_CR2_STOP_0 | USART_CR2_STOP_1) +#define USART_StopBits_2 USART_CR2_STOP_1 +#define USART_StopBits_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \ ((STOPBITS) == USART_StopBits_2) || \ ((STOPBITS) == USART_StopBits_1_5)) @@ -143,8 +143,8 @@ typedef struct */ #define USART_Parity_No ((uint32_t)0x00000000) -#define USART_Parity_Even ((uint32_t)USART_CR1_PCE) -#define USART_Parity_Odd ((uint32_t)USART_CR1_PCE | USART_CR1_PS) +#define USART_Parity_Even USART_CR1_PCE +#define USART_Parity_Odd (USART_CR1_PCE | USART_CR1_PS) #define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \ ((PARITY) == USART_Parity_Even) || \ ((PARITY) == USART_Parity_Odd)) @@ -169,9 +169,9 @@ typedef struct */ #define USART_HardwareFlowControl_None ((uint32_t)0x00000000) -#define USART_HardwareFlowControl_RTS ((uint32_t)USART_CR3_RTSE) -#define USART_HardwareFlowControl_CTS ((uint32_t)USART_CR3_CTSE) -#define USART_HardwareFlowControl_RTS_CTS ((uint32_t)USART_CR3_RTSE | USART_CR3_CTSE) +#define USART_HardwareFlowControl_RTS USART_CR3_RTSE +#define USART_HardwareFlowControl_CTS USART_CR3_CTSE +#define USART_HardwareFlowControl_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) #define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\ (((CONTROL) == USART_HardwareFlowControl_None) || \ ((CONTROL) == USART_HardwareFlowControl_RTS) || \ @@ -283,8 +283,8 @@ typedef struct */ #define USART_WakeUpSource_AddressMatch ((uint32_t)0x00000000) -#define USART_WakeUpSource_StartBit ((uint32_t)USART_CR3_WUS_1) -#define USART_WakeUpSource_RXNE ((uint32_t)USART_CR3_WUS_0 | USART_CR3_WUS_1) +#define USART_WakeUpSource_StartBit USART_CR3_WUS_1 +#define USART_WakeUpSource_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) #define IS_USART_STOPMODE_WAKEUPSOURCE(SOURCE) (((SOURCE) == USART_WakeUpSource_AddressMatch) || \ ((SOURCE) == USART_WakeUpSource_StartBit) || \ ((SOURCE) == USART_WakeUpSource_RXNE)) @@ -528,7 +528,6 @@ void USART_StopModeWakeUpSourceConfig(USART_TypeDef* USARTx, uint32_t USART_Wake /* AutoBaudRate functions *****************************************************/ void USART_AutoBaudRateCmd(USART_TypeDef* USARTx, FunctionalState NewState); void USART_AutoBaudRateConfig(USART_TypeDef* USARTx, uint32_t USART_AutoBaudRate); -void USART_AutoBaudRateNewRequest(USART_TypeDef* USARTx); /* Data transfers functions ***************************************************/ void USART_SendData(USART_TypeDef* USARTx, uint16_t Data); diff --git a/lib/inc/peripherals/stm32f0xx_wwdg.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_wwdg.h old mode 100755 new mode 100644 similarity index 95% rename from lib/inc/peripherals/stm32f0xx_wwdg.h rename to Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_wwdg.h index 0b7beda..d501010 --- a/lib/inc/peripherals/stm32f0xx_wwdg.h +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_wwdg.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_wwdg.h * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file contains all the functions prototypes for the WWDG * firmware library. ****************************************************************************** diff --git a/lib/src/peripherals/stm32f0xx_adc.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_adc.c old mode 100755 new mode 100644 similarity index 81% rename from lib/src/peripherals/stm32f0xx_adc.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_adc.c index 69bc10e..7154cf7 --- a/lib/src/peripherals/stm32f0xx_adc.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_adc.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_adc.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the Analog to Digital Convertor (ADC) peripheral: * + Initialization and Configuration @@ -224,7 +224,7 @@ void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct) * @brief Enables or disables the specified ADC peripheral. * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param NewState: new state of the ADCx peripheral. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState) @@ -250,10 +250,10 @@ void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState) * or div4 * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param ADC_JitterOff: This parameter can be : - * @arg ADC_JitterOff_PCLKDiv2: Remove jitter when ADC is clocked by PLCK divided by 2 - * @arg ADC_JitterOff_PCLKDiv4: Remove jitter when ADC is clocked by PLCK divided by 4 + * @arg ADC_JitterOff_PCLKDiv2: Remove jitter when ADC is clocked by PLCK divided by 2 + * @arg ADC_JitterOff_PCLKDiv4: Remove jitter when ADC is clocked by PLCK divided by 4 * @param NewState: new state of the ADCx jitter. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void ADC_JitterCmd(ADC_TypeDef* ADCx, uint32_t ADC_JitterOff, FunctionalState NewState) @@ -304,14 +304,12 @@ void ADC_JitterCmd(ADC_TypeDef* ADCx, uint32_t ADC_JitterOff, FunctionalState Ne * consumption when the ADC is not converting. * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @note The ADC can be powered down: - * - During the Auto delay phase - * => The ADC is powered on again at the end of the delay (until the - * previous data is read from the ADC data register). - * - During the ADC is waiting for a trigger event - * => The ADC is powered up at the next trigger event (when the - * conversion is started). + * - During the Auto delay phase: The ADC is powered on again at the end + * of the delay (until the previous data is read from the ADC data register). + * - During the ADC is waiting for a trigger event: The ADC is powered up + * at the next trigger event (when the conversion is started). * @param NewState: new state of the ADCx power Off. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void ADC_AutoPowerOffCmd(ADC_TypeDef* ADCx, FunctionalState NewState) @@ -337,16 +335,15 @@ void ADC_AutoPowerOffCmd(ADC_TypeDef* ADCx, FunctionalState NewState) * @note When the CPU clock is not fast enough to manage the data rate, a * Hardware delay can be introduced between ADC conversions to reduce * this data rate. - * @note The Hardware delay is inserted after : - * - after each conversions and until the previous data is read from the - * ADC data register + * @note The Hardware delay is inserted after each conversions and until the + * previous data is read from the ADC data register * @note This is a way to automatically adapt the speed of the ADC to the speed * of the system which will read the data. * @note Any hardware triggers wich occur while a conversion is on going or * while the automatic Delay is applied are ignored * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param NewState: new state of the ADCx Auto-Delay. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void ADC_WaitModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) @@ -398,7 +395,7 @@ void ADC_WaitModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) * @brief Enables or disables the analog watchdog * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param NewState: new state of the ADCx Analog Watchdog. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, FunctionalState NewState) @@ -423,9 +420,9 @@ void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, FunctionalState NewState) * @brief Configures the high and low thresholds of the analog watchdog. * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param HighThreshold: the ADC analog watchdog High threshold value. - * This parameter must be a 12bit value. + * This parameter must be a 12bit value. * @param LowThreshold: the ADC analog watchdog Low threshold value. - * This parameter must be a 12bit value. + * This parameter must be a 12bit value. * @retval None */ void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, @@ -445,26 +442,26 @@ void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshol * @brief Configures the analog watchdog guarded single channel * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param ADC_AnalogWatchdog_Channel: the ADC channel to configure for the analog watchdog. - * This parameter can be one of the following values: - * @arg ADC_AnalogWatchdog_Channel_0: ADC Channel0 selected - * @arg ADC_AnalogWatchdog_Channel_1: ADC Channel1 selected - * @arg ADC_AnalogWatchdog_Channel_2: ADC Channel2 selected - * @arg ADC_AnalogWatchdog_Channel_3: ADC Channel3 selected - * @arg ADC_AnalogWatchdog_Channel_4: ADC Channel4 selected - * @arg ADC_AnalogWatchdog_Channel_5: ADC Channel5 selected - * @arg ADC_AnalogWatchdog_Channel_6: ADC Channel6 selected - * @arg ADC_AnalogWatchdog_Channel_7: ADC Channel7 selected - * @arg ADC_AnalogWatchdog_Channel_8: ADC Channel8 selected - * @arg ADC_AnalogWatchdog_Channel_9: ADC Channel9 selected - * @arg ADC_AnalogWatchdog_Channel_10: ADC Channel10 selected - * @arg ADC_AnalogWatchdog_Channel_11: ADC Channel11 selected - * @arg ADC_AnalogWatchdog_Channel_12: ADC Channel12 selected - * @arg ADC_AnalogWatchdog_Channel_13: ADC Channel13 selected - * @arg ADC_AnalogWatchdog_Channel_14: ADC Channel14 selected - * @arg ADC_AnalogWatchdog_Channel_15: ADC Channel15 selected - * @arg ADC_AnalogWatchdog_Channel_16: ADC Channel16 selected - * @arg ADC_AnalogWatchdog_Channel_17: ADC Channel17 selected - * @arg ADC_AnalogWatchdog_Channel_18: ADC Channel18 selected + * This parameter can be one of the following values: + * @arg ADC_AnalogWatchdog_Channel_0: ADC Channel0 selected + * @arg ADC_AnalogWatchdog_Channel_1: ADC Channel1 selected + * @arg ADC_AnalogWatchdog_Channel_2: ADC Channel2 selected + * @arg ADC_AnalogWatchdog_Channel_3: ADC Channel3 selected + * @arg ADC_AnalogWatchdog_Channel_4: ADC Channel4 selected + * @arg ADC_AnalogWatchdog_Channel_5: ADC Channel5 selected + * @arg ADC_AnalogWatchdog_Channel_6: ADC Channel6 selected + * @arg ADC_AnalogWatchdog_Channel_7: ADC Channel7 selected + * @arg ADC_AnalogWatchdog_Channel_8: ADC Channel8 selected + * @arg ADC_AnalogWatchdog_Channel_9: ADC Channel9 selected + * @arg ADC_AnalogWatchdog_Channel_10: ADC Channel10 selected + * @arg ADC_AnalogWatchdog_Channel_11: ADC Channel11 selected + * @arg ADC_AnalogWatchdog_Channel_12: ADC Channel12 selected + * @arg ADC_AnalogWatchdog_Channel_13: ADC Channel13 selected + * @arg ADC_AnalogWatchdog_Channel_14: ADC Channel14 selected + * @arg ADC_AnalogWatchdog_Channel_15: ADC Channel15 selected + * @arg ADC_AnalogWatchdog_Channel_16: ADC Channel16 selected + * @arg ADC_AnalogWatchdog_Channel_17: ADC Channel17 selected + * @arg ADC_AnalogWatchdog_Channel_18: ADC Channel18 selected * @note The channel selected on the AWDCH must be also set into the CHSELR * register * @retval None @@ -494,7 +491,7 @@ void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_Analo * @brief Enables or disables the ADC Analog Watchdog Single Channel. * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param NewState: new state of the ADCx ADC Analog Watchdog Single Channel. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void ADC_AnalogWatchdogSingleChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewState) @@ -546,7 +543,7 @@ void ADC_AnalogWatchdogSingleChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewSt /** * @brief Enables or disables the temperature sensor channel. * @param NewState: new state of the temperature sensor input channel. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void ADC_TempSensorCmd(FunctionalState NewState) @@ -569,7 +566,7 @@ void ADC_TempSensorCmd(FunctionalState NewState) /** * @brief Enables or disables the Vrefint channel. * @param NewState: new state of the Vref input channel. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void ADC_VrefintCmd(FunctionalState NewState) @@ -592,7 +589,7 @@ void ADC_VrefintCmd(FunctionalState NewState) /** * @brief Enables or disables the Vbat channel. * @param NewState: new state of the Vbat input channel. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void ADC_VbatCmd(FunctionalState NewState) @@ -656,37 +653,36 @@ void ADC_VbatCmd(FunctionalState NewState) * @brief Configures for the selected ADC and its sampling time. * @param ADCx: where x can be 1 to select the ADC peripheral. * @param ADC_Channel: the ADC channel to configure. - * This parameter can be any combination of the following values: - * @arg ADC_Channel_0: ADC Channel0 selected - * @arg ADC_Channel_1: ADC Channel1 selected - * @arg ADC_Channel_2: ADC Channel2 selected - * @arg ADC_Channel_3: ADC Channel3 selected - * @arg ADC_Channel_4: ADC Channel4 selected - * @arg ADC_Channel_5: ADC Channel5 selected - * @arg ADC_Channel_6: ADC Channel6 selected - * @arg ADC_Channel_7: ADC Channel7 selected - * @arg ADC_Channel_8: ADC Channel8 selected - * @arg ADC_Channel_9: ADC Channel9 selected - * @arg ADC_Channel_10: ADC Channel10 selected - * @arg ADC_Channel_11: ADC Channel11 selected - * @arg ADC_Channel_12: ADC Channel12 selected - * @arg ADC_Channel_13: ADC Channel13 selected - * @arg ADC_Channel_14: ADC Channel14 selected - * @arg ADC_Channel_15: ADC Channel15 selected - * @arg ADC_Channel_16: ADC Channel16 selected - * @arg ADC_Channel_17: ADC Channel17 selected - * @arg ADC_Channel_18: ADC Channel18 selected - * @param ADC_SampleTime: The sample time value to be set for the selected - * channel. - * This parameter can be one of the following values: - * @arg ADC_SampleTime_1_5Cycles: Sample time equal to 1.5 cycles - * @arg ADC_SampleTime_7_5Cycles: Sample time equal to 7.5 cycles - * @arg ADC_SampleTime_13_5Cycles: Sample time equal to 13.5 cycles - * @arg ADC_SampleTime_28_5Cycles: Sample time equal to 28.5 cycles - * @arg ADC_SampleTime_41_5Cycles: Sample time equal to 41.5 cycles - * @arg ADC_SampleTime_55_5Cycles: Sample time equal to 55.5 cycles - * @arg ADC_SampleTime_71_5Cycles: Sample time equal to 71.5 cycles - * @arg ADC_SampleTime_239_5Cycles: Sample time equal to 239.5 cycles + * This parameter can be any combination of the following values: + * @arg ADC_Channel_0: ADC Channel0 selected + * @arg ADC_Channel_1: ADC Channel1 selected + * @arg ADC_Channel_2: ADC Channel2 selected + * @arg ADC_Channel_3: ADC Channel3 selected + * @arg ADC_Channel_4: ADC Channel4 selected + * @arg ADC_Channel_5: ADC Channel5 selected + * @arg ADC_Channel_6: ADC Channel6 selected + * @arg ADC_Channel_7: ADC Channel7 selected + * @arg ADC_Channel_8: ADC Channel8 selected + * @arg ADC_Channel_9: ADC Channel9 selected + * @arg ADC_Channel_10: ADC Channel10 selected + * @arg ADC_Channel_11: ADC Channel11 selected + * @arg ADC_Channel_12: ADC Channel12 selected + * @arg ADC_Channel_13: ADC Channel13 selected + * @arg ADC_Channel_14: ADC Channel14 selected + * @arg ADC_Channel_15: ADC Channel15 selected + * @arg ADC_Channel_16: ADC Channel16 selected + * @arg ADC_Channel_17: ADC Channel17 selected + * @arg ADC_Channel_18: ADC Channel18 selected + * @param ADC_SampleTime: The sample time value to be set for the selected channel. + * This parameter can be one of the following values: + * @arg ADC_SampleTime_1_5Cycles: Sample time equal to 1.5 cycles + * @arg ADC_SampleTime_7_5Cycles: Sample time equal to 7.5 cycles + * @arg ADC_SampleTime_13_5Cycles: Sample time equal to 13.5 cycles + * @arg ADC_SampleTime_28_5Cycles: Sample time equal to 28.5 cycles + * @arg ADC_SampleTime_41_5Cycles: Sample time equal to 41.5 cycles + * @arg ADC_SampleTime_55_5Cycles: Sample time equal to 55.5 cycles + * @arg ADC_SampleTime_71_5Cycles: Sample time equal to 71.5 cycles + * @arg ADC_SampleTime_239_5Cycles: Sample time equal to 239.5 cycles * @retval None */ void ADC_ChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_Channel, uint32_t ADC_SampleTime) @@ -715,7 +711,7 @@ void ADC_ChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_Channel, uint32_t ADC_Sam * @brief Enable the Continuous mode for the selected ADCx channels. * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param NewState: new state of the Continuous mode. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @note It is not possible to have both discontinuous mode and continuous mode * enabled. In this case (If DISCEN and CONT are Set), the ADC behaves * as if continuous mode was disabled @@ -743,7 +739,7 @@ void ADC_ContinuousModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) * @brief Enable the discontinuous mode for the selected ADC channels. * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param NewState: new state of the discontinuous mode. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @note It is not possible to have both discontinuous mode and continuous mode * enabled. In this case (If DISCEN and CONT are Set), the ADC behaves * as if continuous mode was disabled @@ -771,7 +767,7 @@ void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) * @brief Enable the Overrun mode for the selected ADC channels. * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param NewState: new state of the Overrun mode. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void ADC_OverrunModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) @@ -905,7 +901,7 @@ uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx) * @brief Enables or disables the specified ADC DMA request. * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param NewState: new state of the selected ADC DMA transfer. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState) @@ -930,9 +926,9 @@ void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState) * @brief Enables or disables the ADC DMA request after last transfer (Single-ADC mode) * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param ADC_DMARequestMode: the ADC channel to configure. - * This parameter can be one of the following values: - * @arg ADC_DMAMode_OneShot : DMA One Shot Mode - * @arg ADC_DMAMode_Circular : DMA Circular Mode + * This parameter can be one of the following values: + * @arg ADC_DMAMode_OneShot: DMA One Shot Mode + * @arg ADC_DMAMode_Circular: DMA Circular Mode * @retval None */ void ADC_DMARequestModeConfig(ADC_TypeDef* ADCx, uint32_t ADC_DMARequestMode) @@ -1032,15 +1028,15 @@ void ADC_DMARequestModeConfig(ADC_TypeDef* ADCx, uint32_t ADC_DMARequestMode) * @brief Enables or disables the specified ADC interrupts. * @param ADCx: where x can be 1 to select the ADC peripheral. * @param ADC_IT: specifies the ADC interrupt sources to be enabled or disabled. - * This parameter can be one of the following values: - * @arg ADC_IT_ADRDY: ADC ready interrupt - * @arg ADC_IT_EOSMP: End of sampling interrupt - * @arg ADC_IT_EOC: End of conversion interrupt - * @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt - * @arg ADC_IT_OVR: overrun interrupt - * @arg ADC_IT_AWD: Analog watchdog interrupt + * This parameter can be one of the following values: + * @arg ADC_IT_ADRDY: ADC ready interrupt + * @arg ADC_IT_EOSMP: End of sampling interrupt + * @arg ADC_IT_EOC: End of conversion interrupt + * @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt + * @arg ADC_IT_OVR: overrun interrupt + * @arg ADC_IT_AWD: Analog watchdog interrupt * @param NewState: new state of the specified ADC interrupts. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState) @@ -1066,18 +1062,18 @@ void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState) * @brief Checks whether the specified ADC flag is set or not. * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param ADC_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg ADC_FLAG_AWD: Analog watchdog flag - * @arg ADC_FLAG_OVR: Overrun flag - * @arg ADC_FLAG_EOSEQ: End of Sequence flag - * @arg ADC_FLAG_EOC: End of conversion flag - * @arg ADC_FLAG_EOSMP: End of sampling flag - * @arg ADC_FLAG_ADRDY: ADC Ready flag - * @arg ADC_FLAG_ADEN: ADC enable flag - * @arg ADC_FLAG_ADDIS: ADC disable flag - * @arg ADC_FLAG_ADSTART: ADC start flag - * @arg ADC_FLAG_ADSTP: ADC stop flag - * @arg ADC_FLAG_ADCAL: ADC Calibration flag + * This parameter can be one of the following values: + * @arg ADC_FLAG_AWD: Analog watchdog flag + * @arg ADC_FLAG_OVR: Overrun flag + * @arg ADC_FLAG_EOSEQ: End of Sequence flag + * @arg ADC_FLAG_EOC: End of conversion flag + * @arg ADC_FLAG_EOSMP: End of sampling flag + * @arg ADC_FLAG_ADRDY: ADC Ready flag + * @arg ADC_FLAG_ADEN: ADC enable flag + * @arg ADC_FLAG_ADDIS: ADC disable flag + * @arg ADC_FLAG_ADSTART: ADC start flag + * @arg ADC_FLAG_ADSTP: ADC stop flag + * @arg ADC_FLAG_ADCAL: ADC Calibration flag * @retval The new state of ADC_FLAG (SET or RESET). */ FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG) @@ -1117,13 +1113,13 @@ FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG) * @brief Clears the ADCx's pending flags. * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param ADC_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg ADC_FLAG_AWD: Analog watchdog flag - * @arg ADC_FLAG_EOC: End of conversion flag - * @arg ADC_FLAG_ADRDY: ADC Ready flag - * @arg ADC_FLAG_EOSMP: End of sampling flag - * @arg ADC_FLAG_EOSEQ: End of Sequence flag - * @arg ADC_FLAG_OVR: Overrun flag + * This parameter can be any combination of the following values: + * @arg ADC_FLAG_AWD: Analog watchdog flag + * @arg ADC_FLAG_EOC: End of conversion flag + * @arg ADC_FLAG_ADRDY: ADC Ready flag + * @arg ADC_FLAG_EOSMP: End of sampling flag + * @arg ADC_FLAG_EOSEQ: End of Sequence flag + * @arg ADC_FLAG_OVR: Overrun flag * @retval None */ void ADC_ClearFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG) @@ -1140,13 +1136,13 @@ void ADC_ClearFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG) * @brief Checks whether the specified ADC interrupt has occurred or not. * @param ADCx: where x can be 1 to select the ADC1 peripheral * @param ADC_IT: specifies the ADC interrupt source to check. - * This parameter can be one of the following values: - * @arg ADC_IT_ADRDY: ADC ready interrupt - * @arg ADC_IT_EOSMP: End of sampling interrupt - * @arg ADC_IT_EOC: End of conversion interrupt - * @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt - * @arg ADC_IT_OVR: overrun interrupt - * @arg ADC_IT_AWD: Analog watchdog interrupt + * This parameter can be one of the following values: + * @arg ADC_IT_ADRDY: ADC ready interrupt + * @arg ADC_IT_EOSMP: End of sampling interrupt + * @arg ADC_IT_EOC: End of conversion interrupt + * @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt + * @arg ADC_IT_OVR: overrun interrupt + * @arg ADC_IT_AWD: Analog watchdog interrupt * @retval The new state of ADC_IT (SET or RESET). */ ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint32_t ADC_IT) @@ -1180,13 +1176,13 @@ ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint32_t ADC_IT) * @brief Clears the ADCx's interrupt pending bits. * @param ADCx: where x can be 1 to select the ADC1 peripheral. * @param ADC_IT: specifies the ADC interrupt pending bit to clear. - * This parameter can be one of the following values: - * @arg ADC_IT_ADRDY: ADC ready interrupt - * @arg ADC_IT_EOSMP: End of sampling interrupt - * @arg ADC_IT_EOC: End of conversion interrupt - * @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt - * @arg ADC_IT_OVR: overrun interrupt - * @arg ADC_IT_AWD: Analog watchdog interrupt + * This parameter can be one of the following values: + * @arg ADC_IT_ADRDY: ADC ready interrupt + * @arg ADC_IT_EOSMP: End of sampling interrupt + * @arg ADC_IT_EOC: End of conversion interrupt + * @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt + * @arg ADC_IT_OVR: overrun interrupt + * @arg ADC_IT_AWD: Analog watchdog interrupt * @retval None */ void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint32_t ADC_IT) diff --git a/lib/src/peripherals/stm32f0xx_cec.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_cec.c old mode 100755 new mode 100644 similarity index 80% rename from lib/src/peripherals/stm32f0xx_cec.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_cec.c index 0c5c838..35e0fe2 --- a/lib/src/peripherals/stm32f0xx_cec.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_cec.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_cec.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the Consumer Electronics Control (CEC) peripheral: * + Initialization and Configuration @@ -204,7 +204,7 @@ void CEC_StructInit(CEC_InitTypeDef* CEC_InitStruct) /** * @brief Enables or disables the CEC peripheral. * @param NewState: new state of the CEC peripheral. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void CEC_Cmd(FunctionalState NewState) @@ -226,7 +226,7 @@ void CEC_Cmd(FunctionalState NewState) /** * @brief Enables or disables the CEC Listen Mode. * @param NewState: new state of the Listen Mode. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void CEC_ListenModeCmd(FunctionalState NewState) @@ -325,7 +325,7 @@ void CEC_StartOfMessage(void) /** * @brief Transmits message with an EOM bit. - * @param None. + * @param None * @retval None */ void CEC_EndOfMessage(void) @@ -410,22 +410,22 @@ void CEC_EndOfMessage(void) /** * @brief Enables or disables the selected CEC interrupts. * @param CEC_IT: specifies the CEC interrupt source to be enabled. - * This parameter can be any combination of the following values: - * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error - * @arg CEC_IT_TXERR: Tx Error. - * @arg CEC_IT_TXUDR: Tx-Buffer Underrun. - * @arg CEC_IT_TXEND: End of Transmission (successful transmission of the last byte). - * @arg CEC_IT_TXBR: Tx-Byte Request. - * @arg CEC_IT_ARBLST: Arbitration Lost - * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge - * @arg CEC_IT_LBPE: Rx Long period Error - * @arg CEC_IT_SBPE: Rx Short period Error - * @arg CEC_IT_BRE: Rx Bit Rising Error - * @arg CEC_IT_RXOVR: Rx Overrun. - * @arg CEC_IT_RXEND: End Of Reception - * @arg CEC_IT_RXBR: Rx-Byte Received + * This parameter can be any combination of the following values: + * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error + * @arg CEC_IT_TXERR: Tx Error. + * @arg CEC_IT_TXUDR: Tx-Buffer Underrun. + * @arg CEC_IT_TXEND: End of Transmission (successful transmission of the last byte). + * @arg CEC_IT_TXBR: Tx-Byte Request. + * @arg CEC_IT_ARBLST: Arbitration Lost + * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge + * @arg CEC_IT_LBPE: Rx Long period Error + * @arg CEC_IT_SBPE: Rx Short period Error + * @arg CEC_IT_BRE: Rx Bit Rising Error + * @arg CEC_IT_RXOVR: Rx Overrun. + * @arg CEC_IT_RXEND: End Of Reception + * @arg CEC_IT_RXBR: Rx-Byte Received * @param NewState: new state of the selected CEC interrupts. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void CEC_ITConfig(uint16_t CEC_IT, FunctionalState NewState) @@ -450,19 +450,19 @@ void CEC_ITConfig(uint16_t CEC_IT, FunctionalState NewState) * @brief Gets the CEC flag status. * @param CEC_FLAG: specifies the CEC flag to check. * This parameter can be one of the following values: - * @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error - * @arg CEC_FLAG_TXERR: Tx Error. - * @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun. - * @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte). - * @arg CEC_FLAG_TXBR: Tx-Byte Request. - * @arg CEC_FLAG_ARBLST: Arbitration Lost - * @arg CEC_FLAG_RXACKE: Rx-Missing Acknowledge - * @arg CEC_FLAG_LBPE: Rx Long period Error - * @arg CEC_FLAG_SBPE: Rx Short period Error - * @arg CEC_FLAG_BRE: Rx Bit Rissing Error - * @arg CEC_FLAG_RXOVR: Rx Overrun. - * @arg CEC_FLAG_RXEND: End Of Reception. - * @arg CEC_FLAG_RXBR: Rx-Byte Received. + * @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error + * @arg CEC_FLAG_TXERR: Tx Error. + * @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun. + * @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte). + * @arg CEC_FLAG_TXBR: Tx-Byte Request. + * @arg CEC_FLAG_ARBLST: Arbitration Lost + * @arg CEC_FLAG_RXACKE: Rx-Missing Acknowledge + * @arg CEC_FLAG_LBPE: Rx Long period Error + * @arg CEC_FLAG_SBPE: Rx Short period Error + * @arg CEC_FLAG_BRE: Rx Bit Rissing Error + * @arg CEC_FLAG_RXOVR: Rx Overrun. + * @arg CEC_FLAG_RXEND: End Of Reception. + * @arg CEC_FLAG_RXBR: Rx-Byte Received. * @retval The new state of CEC_FLAG (SET or RESET) */ FlagStatus CEC_GetFlagStatus(uint16_t CEC_FLAG) @@ -490,20 +490,20 @@ FlagStatus CEC_GetFlagStatus(uint16_t CEC_FLAG) /** * @brief Clears the CEC's pending flags. * @param CEC_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error - * @arg CEC_FLAG_TXERR: Tx Error - * @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun - * @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte). - * @arg CEC_FLAG_TXBR: Tx-Byte Request - * @arg CEC_FLAG_ARBLST: Arbitration Lost - * @arg CEC_FLAG_RXACKE: Rx Missing Acknowledge - * @arg CEC_FLAG_LBPE: Rx Long period Error - * @arg CEC_FLAG_SBPE: Rx Short period Error - * @arg CEC_FLAG_BRE: Rx Bit Rising Error - * @arg CEC_FLAG_RXOVR: Rx Overrun - * @arg CEC_FLAG_RXEND: End Of Reception - * @arg CEC_FLAG_RXBR: Rx-Byte Received + * This parameter can be any combination of the following values: + * @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error + * @arg CEC_FLAG_TXERR: Tx Error + * @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun + * @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte). + * @arg CEC_FLAG_TXBR: Tx-Byte Request + * @arg CEC_FLAG_ARBLST: Arbitration Lost + * @arg CEC_FLAG_RXACKE: Rx Missing Acknowledge + * @arg CEC_FLAG_LBPE: Rx Long period Error + * @arg CEC_FLAG_SBPE: Rx Short period Error + * @arg CEC_FLAG_BRE: Rx Bit Rising Error + * @arg CEC_FLAG_RXOVR: Rx Overrun + * @arg CEC_FLAG_RXEND: End Of Reception + * @arg CEC_FLAG_RXBR: Rx-Byte Received * @retval None */ void CEC_ClearFlag(uint32_t CEC_FLAG) @@ -517,20 +517,20 @@ void CEC_ClearFlag(uint32_t CEC_FLAG) /** * @brief Checks whether the specified CEC interrupt has occurred or not. * @param CEC_IT: specifies the CEC interrupt source to check. - * This parameter can be one of the following values: - * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error - * @arg CEC_IT_TXERR: Tx Error. - * @arg CEC_IT_TXUDR: Tx-Buffer Underrun. - * @arg CEC_IT_TXEND: End of transmission (successful transmission of the last byte). - * @arg CEC_IT_TXBR: Tx-Byte Request. - * @arg CEC_IT_ARBLST: Arbitration Lost. - * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge. - * @arg CEC_IT_LBPE: Rx Long period Error. - * @arg CEC_IT_SBPE: Rx Short period Error. - * @arg CEC_IT_BRE: Rx Bit Rising Error. - * @arg CEC_IT_RXOVR: Rx Overrun. - * @arg CEC_IT_RXEND: End Of Reception. - * @arg CEC_IT_RXBR: Rx-Byte Received + * This parameter can be one of the following values: + * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error + * @arg CEC_IT_TXERR: Tx Error. + * @arg CEC_IT_TXUDR: Tx-Buffer Underrun. + * @arg CEC_IT_TXEND: End of transmission (successful transmission of the last byte). + * @arg CEC_IT_TXBR: Tx-Byte Request. + * @arg CEC_IT_ARBLST: Arbitration Lost. + * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge. + * @arg CEC_IT_LBPE: Rx Long period Error. + * @arg CEC_IT_SBPE: Rx Short period Error. + * @arg CEC_IT_BRE: Rx Bit Rising Error. + * @arg CEC_IT_RXOVR: Rx Overrun. + * @arg CEC_IT_RXEND: End Of Reception. + * @arg CEC_IT_RXBR: Rx-Byte Received * @retval The new state of CEC_IT (SET or RESET). */ ITStatus CEC_GetITStatus(uint16_t CEC_IT) @@ -563,20 +563,20 @@ ITStatus CEC_GetITStatus(uint16_t CEC_IT) /** * @brief Clears the CEC's interrupt pending bits. * @param CEC_IT: specifies the CEC interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error - * @arg CEC_IT_TXERR: Tx Error - * @arg CEC_IT_TXUDR: Tx-Buffer Underrun - * @arg CEC_IT_TXEND: End of Transmission - * @arg CEC_IT_TXBR: Tx-Byte Request - * @arg CEC_IT_ARBLST: Arbitration Lost - * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge - * @arg CEC_IT_LBPE: Rx Long period Error - * @arg CEC_IT_SBPE: Rx Short period Error - * @arg CEC_IT_BRE: Rx Bit Rising Error - * @arg CEC_IT_RXOVR: Rx Overrun - * @arg CEC_IT_RXEND: End Of Reception - * @arg CEC_IT_RXBR: Rx-Byte Received + * This parameter can be any combination of the following values: + * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error + * @arg CEC_IT_TXERR: Tx Error + * @arg CEC_IT_TXUDR: Tx-Buffer Underrun + * @arg CEC_IT_TXEND: End of Transmission + * @arg CEC_IT_TXBR: Tx-Byte Request + * @arg CEC_IT_ARBLST: Arbitration Lost + * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge + * @arg CEC_IT_LBPE: Rx Long period Error + * @arg CEC_IT_SBPE: Rx Short period Error + * @arg CEC_IT_BRE: Rx Bit Rising Error + * @arg CEC_IT_RXOVR: Rx Overrun + * @arg CEC_IT_RXEND: End Of Reception + * @arg CEC_IT_RXBR: Rx-Byte Received * @retval None */ void CEC_ClearITPendingBit(uint16_t CEC_IT) diff --git a/lib/src/peripherals/stm32f0xx_comp.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_comp.c old mode 100755 new mode 100644 similarity index 87% rename from lib/src/peripherals/stm32f0xx_comp.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_comp.c index e832693..fc7c785 --- a/lib/src/peripherals/stm32f0xx_comp.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_comp.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_comp.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the comparators (COMP1 and COMP2) peripheral: * + Comparators configuration @@ -152,12 +152,11 @@ void COMP_DeInit(void) * @note By default, PA1 is selected as COMP1 non inverting input. * To use PA4 as COMP1 non inverting input call COMP_SwitchCmd() after COMP_Init() * @param COMP_Selection: the selected comparator. - * This parameter can be one of the following values: - * @arg COMP_Selection_COMP1: COMP1 selected - * @arg COMP_Selection_COMP2: COMP2 selected + * This parameter can be one of the following values: + * @arg COMP_Selection_COMP1: COMP1 selected + * @arg COMP_Selection_COMP2: COMP2 selected * @param COMP_InitStruct: pointer to an COMP_InitTypeDef structure that contains * the configuration information for the specified COMP peripheral. - * * @retval None */ void COMP_Init(uint32_t COMP_Selection, COMP_InitTypeDef* COMP_InitStruct) @@ -212,16 +211,15 @@ void COMP_StructInit(COMP_InitTypeDef* COMP_InitStruct) * @note If the selected comparator is locked, enable/disable can't be performed. * To unlock the configuration, perform a system reset. * @param COMP_Selection: the selected comparator. - * This parameter can be one of the following values: - * @arg COMP_Selection_COMP1: COMP1 selected - * @arg COMP_Selection_COMP2: COMP2 selected + * This parameter can be one of the following values: + * @arg COMP_Selection_COMP1: COMP1 selected + * @arg COMP_Selection_COMP2: COMP2 selected * @param NewState: new state of the COMP peripheral. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @note When enabled, the comparator compares the non inverting input with - * the inverting input and the comparison result is available - * on comparator output. + * the inverting input and the comparison result is available on comparator output. * @note When disabled, the comparator doesn't perform comparison and the - * output level is low. + * output level is low. * @retval None */ void COMP_Cmd(uint32_t COMP_Selection, FunctionalState NewState) @@ -247,7 +245,7 @@ void COMP_Cmd(uint32_t COMP_Selection, FunctionalState NewState) * @note This switch is solely intended to redirect signals onto high * impedance input, such as COMP1 non-inverting input (highly resistive switch) * @param NewState: New state of the analog switch. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @note When enabled, the SW1 is closed; PA1 is connected to PA4 * @note When disabled, the SW1 switch is open; PA1 is disconnected from PA4 * @retval None @@ -272,20 +270,20 @@ void COMP_SwitchCmd(FunctionalState NewState) /** * @brief Return the output level (high or low) of the selected comparator. * @note The output level depends on the selected polarity. - * If the polarity is not inverted: - * @note -Comparator output is low when the non-inverting input is at a lower + * @note If the polarity is not inverted: + * - Comparator output is low when the non-inverting input is at a lower * voltage than the inverting input - * @note -Comparator output is high when the non-inverting input is at a higher + * - Comparator output is high when the non-inverting input is at a higher * voltage than the inverting input * @note If the polarity is inverted: - * @note -Comparator output is high when the non-inverting input is at a lower + * - Comparator output is high when the non-inverting input is at a lower * voltage than the inverting input - * @note -Comparator output is low when the non-inverting input is at a higher + * - Comparator output is low when the non-inverting input is at a higher * voltage than the inverting input * @param COMP_Selection: the selected comparator. - * This parameter can be one of the following values: - * @arg COMP_Selection_COMP1: COMP1 selected - * @arg COMP_Selection_COMP2: COMP2 selected + * This parameter can be one of the following values: + * @arg COMP_Selection_COMP1: COMP1 selected + * @arg COMP_Selection_COMP2: COMP2 selected * @retval Returns the selected comparator output level: low or high. * */ @@ -328,10 +326,10 @@ uint32_t COMP_GetOutputLevel(uint32_t COMP_Selection) /** * @brief Enables or disables the window mode. - * In window mode, COMP1 and COMP2 non inverting inputs are connected + * @note In window mode, COMP1 and COMP2 non inverting inputs are connected * together and only COMP1 non inverting input (PA1) can be used. - * param NewState: new state of the window mode. - * This parameter can be : + * @param NewState: new state of the window mode. + * This parameter can be : * @arg ENABLE: COMP1 and COMP2 non inverting inputs are connected together. * @arg DISABLE: OMP1 and COMP2 non inverting inputs are disconnected. * @retval None @@ -376,9 +374,9 @@ void COMP_WindowCmd(FunctionalState NewState) * @note Locking the configuration means that all control bits are read-only. * To unlock the comparator configuration, perform a system reset. * @param COMP_Selection: selects the comparator to be locked - * This parameter can be a value of the following values: - * @arg COMP_Selection_COMP1: COMP1 configuration is locked. - * @arg COMP_Selection_COMP2: COMP2 configuration is locked. + * This parameter can be a value of the following values: + * @arg COMP_Selection_COMP1: COMP1 configuration is locked. + * @arg COMP_Selection_COMP2: COMP2 configuration is locked. * @retval None */ void COMP_LockConfig(uint32_t COMP_Selection) diff --git a/lib/src/peripherals/stm32f0xx_crc.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_crc.c old mode 100755 new mode 100644 similarity index 91% rename from lib/src/peripherals/stm32f0xx_crc.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_crc.c index 880021f..231c50d --- a/lib/src/peripherals/stm32f0xx_crc.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_crc.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_crc.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of CRC computation unit peripheral: * + Configuration of the CRC computation unit @@ -117,11 +117,11 @@ void CRC_ResetDR(void) /** * @brief Selects the reverse operation to be performed on input data. * @param CRC_ReverseInputData: Specifies the reverse operation on input data. - * This parameter can be: - * @arg CRC_ReverseInputData_No: No reverse operation is performed - * @arg CRC_ReverseInputData_8bits: reverse operation performed on 8 bits - * @arg CRC_ReverseInputData_16bits: reverse operation performed on 16 bits - * @arg CRC_ReverseInputData_32bits: reverse operation performed on 32 bits + * This parameter can be: + * @arg CRC_ReverseInputData_No: No reverse operation is performed + * @arg CRC_ReverseInputData_8bits: reverse operation performed on 8 bits + * @arg CRC_ReverseInputData_16bits: reverse operation performed on 16 bits + * @arg CRC_ReverseInputData_32bits: reverse operation performed on 32 bits * @retval None */ void CRC_ReverseInputDataSelect(uint32_t CRC_ReverseInputData) @@ -147,7 +147,7 @@ void CRC_ReverseInputDataSelect(uint32_t CRC_ReverseInputData) * @brief Enables or disable the reverse operation on output data. * The reverse operation on output data is performed on 32-bit. * @param NewState: new state of the reverse operation on output data. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void CRC_ReverseOutputDataCmd(FunctionalState NewState) diff --git a/lib/src/peripherals/stm32f0xx_dac.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dac.c old mode 100755 new mode 100644 similarity index 100% rename from lib/src/peripherals/stm32f0xx_dac.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dac.c diff --git a/lib/src/peripherals/stm32f0xx_dbgmcu.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dbgmcu.c old mode 100755 new mode 100644 similarity index 88% rename from lib/src/peripherals/stm32f0xx_dbgmcu.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dbgmcu.c index af4cc89..5aad4b1 --- a/lib/src/peripherals/stm32f0xx_dbgmcu.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dbgmcu.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_dbgmcu.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the Debug MCU (DBGMCU) peripheral: * + Device and Revision ID management @@ -108,11 +108,11 @@ uint32_t DBGMCU_GetDEVID(void) /** * @brief Configures low power mode behavior when the MCU is in Debug mode. * @param DBGMCU_Periph: specifies the low power mode. - * This parameter can be any combination of the following values: + * This parameter can be any combination of the following values: * @arg DBGMCU_STOP: Keep debugger connection during STOP mode * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode * @param NewState: new state of the specified low power mode in Debug mode. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) @@ -135,19 +135,19 @@ void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) /** * @brief Configures APB1 peripheral behavior when the MCU is in Debug mode. * @param DBGMCU_Periph: specifies the APB1 peripheral. - * This parameter can be any combination of the following values: + * This parameter can be any combination of the following values: * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted * @arg DBGMCU_RTC_STOP: RTC Calendar and Wakeup counter stopped - * when Core is halted. + * when Core is halted. * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped - * when Core is halted + * when Core is halted * @param NewState: new state of the specified APB1 peripheral in Debug mode. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState) @@ -169,13 +169,13 @@ void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState) /** * @brief Configures APB2 peripheral behavior when the MCU is in Debug mode. * @param DBGMCU_Periph: specifies the APB2 peripheral. - * This parameter can be any combination of the following values: + * This parameter can be any combination of the following values: * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted * @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted * @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted * @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted * @param NewState: new state of the specified APB2 peripheral in Debug mode. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState) diff --git a/lib/src/peripherals/stm32f0xx_dma.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dma.c old mode 100755 new mode 100644 similarity index 72% rename from lib/src/peripherals/stm32f0xx_dma.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dma.c index 172cda1..ef75e58 --- a/lib/src/peripherals/stm32f0xx_dma.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dma.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_dma.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the Direct Memory Access controller (DMA): * + Initialization and Configuration @@ -420,10 +420,10 @@ uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx) * x can be 1 to 5 for DMA1 to select the DMA Channel. * @param DMA_IT: specifies the DMA interrupts sources to be enabled * or disabled. - * This parameter can be any combination of the following values: - * @arg DMA_IT_TC: Transfer complete interrupt mask - * @arg DMA_IT_HT: Half transfer interrupt mask - * @arg DMA_IT_TE: Transfer error interrupt mask + * This parameter can be any combination of the following values: + * @arg DMA_IT_TC: Transfer complete interrupt mask + * @arg DMA_IT_HT: Half transfer interrupt mask + * @arg DMA_IT_TE: Transfer error interrupt mask * @param NewState: new state of the specified DMA interrupts. * This parameter can be: ENABLE or DISABLE. * @retval None @@ -450,33 +450,32 @@ void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, Functiona /** * @brief Checks whether the specified DMAy Channelx flag is set or not. * @param DMA_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag. - * @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. - * @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. - * @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. - * @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag. - * @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. - * @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. - * @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. - * @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag. - * @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. - * @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. - * @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. - * @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag. - * @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. - * @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. - * @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. - * @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag. - * @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. - * @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. - * @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. + * This parameter can be one of the following values: + * @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag. + * @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. + * @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. + * @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. + * @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag. + * @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. + * @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. + * @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. + * @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag. + * @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. + * @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. + * @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. + * @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag. + * @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. + * @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. + * @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. + * @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag. + * @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. + * @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. + * @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. * - * @note - * The Global flag (DMAy_FLAG_GLx) is set whenever any of the other flags - * relative to the same channel is set (Transfer Complete, Half-transfer - * Complete or Transfer Error flags: DMAy_FLAG_TCx, DMAy_FLAG_HTx or - * DMAy_FLAG_TEx). + * @note The Global flag (DMAy_FLAG_GLx) is set whenever any of the other flags + * relative to the same channel is set (Transfer Complete, Half-transfer + * Complete or Transfer Error flags: DMAy_FLAG_TCx, DMAy_FLAG_HTx or + * DMAy_FLAG_TEx). * * @retval The new state of DMA_FLAG (SET or RESET). */ @@ -506,32 +505,31 @@ FlagStatus DMA_GetFlagStatus(uint32_t DMA_FLAG) /** * @brief Clears the DMAy Channelx's pending flags. * @param DMA_FLAG: specifies the flag to clear. - * This parameter can be any combination (for the same DMA) of the following values: - * @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag. - * @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. - * @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. - * @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. - * @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag. - * @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. - * @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. - * @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. - * @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag. - * @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. - * @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. - * @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. - * @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag. - * @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. - * @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. - * @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. - * @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag. - * @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. - * @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. - * @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. + * This parameter can be any combination (for the same DMA) of the following values: + * @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag. + * @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. + * @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. + * @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. + * @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag. + * @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. + * @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. + * @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. + * @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag. + * @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. + * @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. + * @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. + * @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag. + * @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. + * @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. + * @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. + * @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag. + * @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. + * @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. + * @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. * - * @note - * Clearing the Global flag (DMAy_FLAG_GLx) results in clearing all other flags - * relative to the same channel (Transfer Complete, Half-transfer Complete and - * Transfer Error flags: DMAy_FLAG_TCx, DMAy_FLAG_HTx and DMAy_FLAG_TEx). + * @note Clearing the Global flag (DMAy_FLAG_GLx) results in clearing all other flags + * relative to the same channel (Transfer Complete, Half-transfer Complete and + * Transfer Error flags: DMAy_FLAG_TCx, DMAy_FLAG_HTx and DMAy_FLAG_TEx). * * @retval None */ @@ -547,33 +545,32 @@ void DMA_ClearFlag(uint32_t DMA_FLAG) /** * @brief Checks whether the specified DMAy Channelx interrupt has occurred or not. * @param DMA_IT: specifies the DMA interrupt source to check. - * This parameter can be one of the following values: - * @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt. - * @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt. - * @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt. - * @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt. - * @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt. - * @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt. - * @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt. - * @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt. - * @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt. - * @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt. - * @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt. - * @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt. - * @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt. - * @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt. - * @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt. - * @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt. - * @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt. - * @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt. - * @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt. - * @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt. + * This parameter can be one of the following values: + * @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt. + * @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt. + * @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt. + * @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt. + * @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt. + * @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt. + * @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt. + * @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt. + * @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt. + * @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt. + * @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt. + * @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt. + * @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt. + * @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt. + * @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt. + * @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt. + * @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt. + * @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt. + * @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt. + * @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt. * - * @note - * The Global interrupt (DMAy_FLAG_GLx) is set whenever any of the other - * interrupts relative to the same channel is set (Transfer Complete, - * Half-transfer Complete or Transfer Error interrupts: DMAy_IT_TCx, - * DMAy_IT_HTx or DMAy_IT_TEx). + * @note The Global interrupt (DMAy_FLAG_GLx) is set whenever any of the other + * interrupts relative to the same channel is set (Transfer Complete, + * Half-transfer Complete or Transfer Error interrupts: DMAy_IT_TCx, + * DMAy_IT_HTx or DMAy_IT_TEx). * * @retval The new state of DMA_IT (SET or RESET). */ @@ -602,33 +599,32 @@ ITStatus DMA_GetITStatus(uint32_t DMA_IT) /** * @brief Clears the DMAy Channelx's interrupt pending bits. * @param DMA_IT: specifies the DMA interrupt pending bit to clear. - * This parameter can be any combination (for the same DMA) of the following values: - * @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt. - * @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt. - * @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt. - * @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt. - * @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt. - * @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt. - * @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt. - * @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt. - * @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt. - * @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt. - * @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt. - * @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt. - * @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt. - * @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt. - * @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt. - * @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt. - * @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt. - * @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt. - * @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt. - * @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt. + * This parameter can be any combination (for the same DMA) of the following values: + * @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt. + * @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt. + * @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt. + * @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt. + * @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt. + * @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt. + * @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt. + * @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt. + * @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt. + * @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt. + * @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt. + * @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt. + * @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt. + * @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt. + * @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt. + * @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt. + * @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt. + * @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt. + * @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt. + * @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt. * - * @note - * Clearing the Global interrupt (DMAy_IT_GLx) results in clearing all other - * interrupts relative to the same channel (Transfer Complete, Half-transfer - * Complete and Transfer Error interrupts: DMAy_IT_TCx, DMAy_IT_HTx and - * DMAy_IT_TEx). + * @note Clearing the Global interrupt (DMAy_IT_GLx) results in clearing all other + * interrupts relative to the same channel (Transfer Complete, Half-transfer + * Complete and Transfer Error interrupts: DMAy_IT_TCx, DMAy_IT_HTx and + * DMAy_IT_TEx). * * @retval None */ diff --git a/lib/src/peripherals/stm32f0xx_exti.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_exti.c old mode 100755 new mode 100644 similarity index 89% rename from lib/src/peripherals/stm32f0xx_exti.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_exti.c index 31d462b..6881f4e --- a/lib/src/peripherals/stm32f0xx_exti.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_exti.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_exti.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the EXTI peripheral: * + Initialization and Configuration @@ -117,11 +117,6 @@ void EXTI_DeInit(void) /** * @brief Initializes the EXTI peripheral according to the specified * parameters in the EXTI_InitStruct. - * EXTI_Line specifies the EXTI line (EXTI0....EXTI27). - * EXTI_Mode specifies which EXTI line is used as interrupt or an event. - * EXTI_Trigger selects the trigger. When the trigger occurs, interrupt - * pending bit will be set. - * EXTI_LineCmd controls (Enable/Disable) the EXTI line. * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure that * contains the configuration information for the EXTI peripheral. * @retval None @@ -194,7 +189,7 @@ void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct) * @brief Generates a Software interrupt on selected EXTI line. * @param EXTI_Line: specifies the EXTI line on which the software interrupt * will be generated. - * This parameter can be any combination of EXTI_Linex where x can be (0..19) + * This parameter can be any combination of EXTI_Linex where x can be (0..27). * @retval None */ void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line) @@ -224,8 +219,7 @@ void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line) /** * @brief Checks whether the specified EXTI line flag is set or not. * @param EXTI_Line: specifies the EXTI line flag to check. - * This parameter can be: - * EXTI_Linex: External interrupt line x where x(0..19). + * This parameter can be EXTI_Linex where x can be (0..27). * @retval The new state of EXTI_Line (SET or RESET). */ FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line) @@ -248,7 +242,7 @@ FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line) /** * @brief Clears the EXTI's line pending flags. * @param EXTI_Line: specifies the EXTI lines flags to clear. - * This parameter can be any combination of EXTI_Linex where x can be (0..19) + * This parameter can be any combination of EXTI_Linex where x can be (0..27). * @retval None */ void EXTI_ClearFlag(uint32_t EXTI_Line) @@ -262,8 +256,7 @@ void EXTI_ClearFlag(uint32_t EXTI_Line) /** * @brief Checks whether the specified EXTI line is asserted or not. * @param EXTI_Line: specifies the EXTI line to check. - * This parameter can be: - * EXTI_Linex: External interrupt line x where x(0..19). + * This parameter can be EXTI_Linex where x can be (0..27). * @retval The new state of EXTI_Line (SET or RESET). */ ITStatus EXTI_GetITStatus(uint32_t EXTI_Line) @@ -289,7 +282,7 @@ ITStatus EXTI_GetITStatus(uint32_t EXTI_Line) /** * @brief Clears the EXTI's line pending bits. * @param EXTI_Line: specifies the EXTI lines to clear. - * This parameter can be any combination of EXTI_Linex where x can be (0..19). + * This parameter can be any combination of EXTI_Linex where x can be (0..27). * @retval None */ void EXTI_ClearITPendingBit(uint32_t EXTI_Line) diff --git a/lib/src/peripherals/stm32f0xx_flash.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_flash.c old mode 100755 new mode 100644 similarity index 85% rename from lib/src/peripherals/stm32f0xx_flash.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_flash.c index d6e6b41..20be195 --- a/lib/src/peripherals/stm32f0xx_flash.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_flash.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_flash.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the FLASH peripheral: * - FLASH Interface configuration @@ -127,9 +127,9 @@ /** * @brief Sets the code latency value. * @param FLASH_Latency: specifies the FLASH Latency value. - * This parameter can be one of the following values: - * @arg FLASH_Latency_0: FLASH Zero Latency cycle - * @arg FLASH_Latency_1: FLASH One Latency cycle + * This parameter can be one of the following values: + * @arg FLASH_Latency_0: FLASH Zero Latency cycle + * @arg FLASH_Latency_1: FLASH One Latency cycle * @retval None */ void FLASH_SetLatency(uint32_t FLASH_Latency) @@ -153,7 +153,7 @@ void FLASH_SetLatency(uint32_t FLASH_Latency) /** * @brief Enables or disables the Prefetch Buffer. * @param NewState: new state of the FLASH prefetch buffer. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void FLASH_PrefetchBufferCmd(FunctionalState NewState) @@ -252,10 +252,9 @@ void FLASH_Lock(void) /** * @brief Erases a specified page in program memory. - * @note To correctly run this function, the FLASH_Unlock() function - * must be called before. - * Call the FLASH_Lock() to disable the flash memory access - * (recommended to protect the FLASH memory against possible unwanted operation) + * @note To correctly run this function, the FLASH_Unlock() function must be called before. + * @note Call the FLASH_Lock() to disable the flash memory access (recommended + * to protect the FLASH memory against possible unwanted operation) * @param Page_Address: The page address in program memory to be erased. * @note A Page is erased in the Program memory only if the address to load * is the start address of a page (multiple of 1024 bytes). @@ -292,10 +291,9 @@ FLASH_Status FLASH_ErasePage(uint32_t Page_Address) /** * @brief Erases all FLASH pages. - * @note To correctly run this function, the FLASH_Unlock() function - * must be called before. - * Call the FLASH_Lock() to disable the flash memory access - * (recommended to protect the FLASH memory against possible unwanted operation) + * @note To correctly run this function, the FLASH_Unlock() function must be called before. + * @note Call the FLASH_Lock() to disable the flash memory access (recommended + * to protect the FLASH memory against possible unwanted operation) * @param None * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. @@ -326,10 +324,9 @@ FLASH_Status FLASH_EraseAllPages(void) /** * @brief Programs a word at a specified address. - * @note To correctly run this function, the FLASH_Unlock() function - * must be called before. - * Call the FLASH_Lock() to disable the flash memory access - * (recommended to protect the FLASH memory against possible unwanted operation) + * @note To correctly run this function, the FLASH_Unlock() function must be called before. + * @note Call the FLASH_Lock() to disable the flash memory access (recommended + * to protect the FLASH memory against possible unwanted operation) * @param Address: specifies the address to be programmed. * @param Data: specifies the data to be programmed. * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, @@ -384,10 +381,9 @@ FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data) /** * @brief Programs a half word at a specified address. - * @note To correctly run this function, the FLASH_Unlock() function - * must be called before. - * Call the FLASH_Lock() to disable the flash memory access - * (recommended to protect the FLASH memory against possible unwanted operation) + * @note To correctly run this function, the FLASH_Unlock() function must be called before. + * @note Call the FLASH_Lock() to disable the flash memory access (recommended + * to protect the FLASH memory against possible unwanted operation) * @param Address: specifies the address to be programmed. * @param Data: specifies the data to be programmed. * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, @@ -444,7 +440,7 @@ FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) (+) FLASH_Status FLASH_OB_BOOTConfig(uint8_t OB_BOOT1); (+) FLASH_Status FLASH_OB_VDDAConfig(uint8_t OB_VDDA_ANALOG); (+) FLASH_Status FLASH_OB_WriteUser(uint8_t OB_USER); - (+) FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data); + (+) FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data); (+) uint8_t FLASH_OB_GetUser(void); (+) uint32_t FLASH_OB_GetWRP(void); (+) FlagStatus FLASH_OB_GetRDP(void); @@ -465,8 +461,8 @@ FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) => to enable or disable the VDDA Analog Monitoring (++) You can write all User Options bytes at once using a single function by calling FLASH_Status FLASH_OB_WriteUser(uint8_t OB_USER) - (++) FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data) to program the - two half word in the option bytes + (++) FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data) to program the + two half word in the option bytes (#) Once all needed option bytes to be programmed are correctly written, call the FLASH_OB_Launch(void) function to launch the Option Bytes programming process. @@ -517,10 +513,9 @@ void FLASH_OB_Launch(void) /** * @brief Erases the FLASH option bytes. - * @note To correctly run this function, the FLASH_OB_Unlock() function - * must be called before. - * Call the FLASH_OB_Lock() to disable the flash control register access and the option bytes - * (recommended to protect the FLASH memory against possible unwanted operation) + * @note To correctly run this function, the FLASH_OB_Unlock() function must be called before. + * @note Call the FLASH_OB_Lock() to disable the flash control register access and the option + * bytes (recommended to protect the FLASH memory against possible unwanted operation) * @note This functions erases all option bytes except the Read protection (RDP). * @param None * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, @@ -585,12 +580,11 @@ FLASH_Status FLASH_OB_Erase(void) /** * @brief Write protects the desired pages - * @note To correctly run this function, the FLASH_OB_Unlock() function - * must be called before. - * Call the FLASH_OB_Lock() to disable the flash control register access and the option bytes - * (recommended to protect the FLASH memory against possible unwanted operation) + * @note To correctly run this function, the FLASH_OB_Unlock() function must be called before. + * @note Call the FLASH_OB_Lock() to disable the flash control register access and the option + * bytes (recommended to protect the FLASH memory against possible unwanted operation) * @param OB_WRP: specifies the address of the pages to be write protected. - * This parameter can be: + * This parameter can be: * @arg OB_WRP_Pages0to3..OB_WRP_Pages60to63 * @arg OB_WRP_AllPages * @retval FLASH Status: The returned value can be: @@ -643,15 +637,15 @@ FLASH_Status FLASH_OB_EnableWRP(uint32_t OB_WRP) /** * @brief Enables or disables the read out protection. - * @note To correctly run this function, the FLASH_OB_Unlock() function - * must be called before. - * Call the FLASH_OB_Lock() to disable the flash control register access and the option bytes - * (recommended to protect the FLASH memory against possible unwanted operation) + * @note To correctly run this function, the FLASH_OB_Unlock() function must be called before. + * @note Call the FLASH_OB_Lock() to disable the flash control register access and the option + * bytes (recommended to protect the FLASH memory against possible unwanted operation) * @param FLASH_ReadProtection_Level: specifies the read protection level. - * This parameter can be: - * @arg OB_RDP_Level_0: No protection - * @arg OB_RDP_Level_1: Read protection of the memory - * @arg OB_RDP_Level_2: Chip protection + * This parameter can be: + * @arg OB_RDP_Level_0: No protection + * @arg OB_RDP_Level_1: Read protection of the memory + * @arg OB_RDP_Level_2: Chip protection + * @note When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0 * @retval FLASH Status: The returned value can be: * FLASH_ERROR_PROGRAM, FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. */ @@ -705,20 +699,19 @@ FLASH_Status FLASH_OB_RDPConfig(uint8_t OB_RDP) /** * @brief Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. - * @note To correctly run this function, the FLASH_OB_Unlock() function - * must be called before. - * Call the FLASH_OB_Lock() to disable the flash control register access and the option bytes - * (recommended to protect the FLASH memory against possible unwanted operation) + * @note To correctly run this function, the FLASH_OB_Unlock() function must be called before. + * @note Call the FLASH_OB_Lock() to disable the flash control register access and the option + * bytes (recommended to protect the FLASH memory against possible unwanted operation) * @param OB_IWDG: Selects the WDG mode - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg OB_IWDG_SW: Software WDG selected * @arg OB_IWDG_HW: Hardware WDG selected * @param OB_STOP: Reset event when entering STOP mode. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg OB_STOP_NoRST: No reset generated when entering in STOP * @arg OB_STOP_RST: Reset generated when entering in STOP * @param OB_STDBY: Reset event when entering Standby mode. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg OB_STDBY_NoRST: No reset generated when entering in STANDBY * @arg OB_STDBY_RST: Reset generated when entering in STANDBY * @retval FLASH Status: The returned value can be: @@ -757,11 +750,11 @@ FLASH_Status FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_ST } /** - * @brief Sets or resets the BOOT1. - * @param OB_BOOT1: Set or Reset the BOOT1. - * This parameter can be one of the following values: - * @arg OB_BOOT1_RESET: BOOT1 Reset - * @arg OB_BOOT1_SET: BOOT1 Set + * @brief Sets or resets the BOOT1 option bit. + * @param OB_BOOT1: Set or Reset the BOOT1 option bit. + * This parameter can be one of the following values: + * @arg OB_BOOT1_RESET: BOOT1 option bit reset + * @arg OB_BOOT1_SET: BOOT1 option bit set * @retval None */ FLASH_Status FLASH_OB_BOOTConfig(uint8_t OB_BOOT1) @@ -797,7 +790,7 @@ FLASH_Status FLASH_OB_BOOTConfig(uint8_t OB_BOOT1) /** * @brief Sets or resets the analogue monitoring on VDDA Power source. * @param OB_VDDA_ANALOG: Selects the analog monitoring on VDDA Power source. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg OB_VDDA_ANALOG_ON: Analog monitoring on VDDA Power source ON * @arg OB_VDDA_ANALOG_OFF: Analog monitoring on VDDA Power source OFF * @retval None @@ -835,7 +828,7 @@ FLASH_Status FLASH_OB_VDDAConfig(uint8_t OB_VDDA_ANALOG) /** * @brief Sets or resets the SRAM parity. * @param OB_SRAM_Parity: Set or Reset the SRAM parity enable bit. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg OB_SRAM_PARITY_SET: Set SRAM parity. * @arg OB_SRAM_PARITY_RESET: Reset SRAM parity. * @retval None @@ -873,12 +866,11 @@ FLASH_Status FLASH_OB_SRAMParityConfig(uint8_t OB_SRAM_Parity) /** * @brief Programs the FLASH User Option Byte: IWDG_SW, RST_STOP, RST_STDBY, * BOOT1 and VDDA ANALOG monitoring. - * @note To correctly run this function, the FLASH_OB_Unlock() function - * must be called before. - * Call the FLASH_OB_Lock() to disable the flash control register access and the option bytes - * (recommended to protect the FLASH memory against possible unwanted operation) + * @note To correctly run this function, the FLASH_OB_Unlock() function must be called before. + * @note Call the FLASH_OB_Lock() to disable the flash control register access and the option + * bytes (recommended to protect the FLASH memory against possible unwanted operation) * @param OB_USER: Selects all user option bytes - * This parameter is a combination of the following values: + * This parameter is a combination of the following values: * @arg OB_IWDG_SW / OB_IWDG_HW: Software / Hardware WDG selected * @arg OB_STOP_NoRST / OB_STOP_RST: No reset / Reset generated when entering in STOP * @arg OB_STDBY_NoRST / OB_STDBY_RST: No reset / Reset generated when entering in STANDBY @@ -918,12 +910,11 @@ FLASH_Status FLASH_OB_WriteUser(uint8_t OB_USER) /** * @brief Programs a half word at a specified Option Byte Data address. - * @note To correctly run this function, the FLASH_OB_Unlock() function - * must be called before. - * Call the FLASH_OB_Lock() to disable the flash control register access and the option bytes - * (recommended to protect the FLASH memory against possible unwanted operation) + * @note To correctly run this function, the FLASH_OB_Unlock() function must be called before. + * @note Call the FLASH_OB_Lock() to disable the flash control register access and the option + * bytes (recommended to protect the FLASH memory against possible unwanted operation) * @param Address: specifies the address to be programmed. - * This parameter can be 0x1FFFF804 or 0x1FFFF806. + * This parameter can be 0x1FFFF804 or 0x1FFFF806. * @param Data: specifies the data to be programmed. * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. @@ -1016,7 +1007,7 @@ FlagStatus FLASH_OB_GetRDP(void) * @brief Enables or disables the specified FLASH interrupts. * @param FLASH_IT: specifies the FLASH interrupt sources to be enabled or * disabled. - * This parameter can be any combination of the following values: + * This parameter can be any combination of the following values: * @arg FLASH_IT_EOP: FLASH end of programming Interrupt * @arg FLASH_IT_ERR: FLASH Error Interrupt * @retval None @@ -1042,7 +1033,7 @@ void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState) /** * @brief Checks whether the specified FLASH flag is set or not. * @param FLASH_FLAG: specifies the FLASH flag to check. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg FLASH_FLAG_BSY: FLASH write/erase operations in progress flag * @arg FLASH_FLAG_PGERR: FLASH Programming error flag flag * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag @@ -1071,7 +1062,7 @@ FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG) /** * @brief Clears the FLASH's pending flags. * @param FLASH_FLAG: specifies the FLASH flags to clear. - * This parameter can be any combination of the following values: + * This parameter can be any combination of the following values: * @arg FLASH_FLAG_PGERR: FLASH Programming error flag flag * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag * @arg FLASH_FLAG_EOP: FLASH End of Programming flag diff --git a/lib/src/peripherals/stm32f0xx_gpio.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_gpio.c old mode 100755 new mode 100644 similarity index 88% rename from lib/src/peripherals/stm32f0xx_gpio.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_gpio.c index d0ec065..44f833d --- a/lib/src/peripherals/stm32f0xx_gpio.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_gpio.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_gpio.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the GPIO peripheral: * + Initialization and Configuration functions @@ -155,8 +155,8 @@ void GPIO_DeInit(GPIO_TypeDef* GPIOx) * @param GPIOx: where x can be (A, B, C, D or F) to select the GPIO peripheral. * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. - * @note The configured pins can be: GPIO_Pin_0 -> GPIO_Pin_15 for GPIOA, GPIOB and GPIOC, - * GPIO_Pin_0 -> GPIO_Pin_2 for GPIOD, GPIO_Pin_0 -> GPIO_Pin_3 for GPIOF. + * @note The configured pins can be: GPIO_Pin_0 to GPIO_Pin_15 for GPIOA, GPIOB and GPIOC, + * GPIO_Pin_0 to GPIO_Pin_2 for GPIOD, GPIO_Pin_0 to GPIO_Pin_3 for GPIOF. * @retval None */ void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct) @@ -226,13 +226,13 @@ void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct) /** * @brief Locks GPIO Pins configuration registers. - * The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, + * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. * @note The configuration of the locked GPIO pins can no longer be modified - * until the next reset. + * until the next device reset. * @param GPIOx: where x can be (A or B) to select the GPIO peripheral. * @param GPIO_Pin: specifies the port bit to be written. - * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). + * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). * @retval None */ void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) @@ -391,9 +391,9 @@ void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) * @param GPIOx: where x can be (A, B, C, D or F) to select the GPIO peripheral. * @param GPIO_Pin: specifies the port bit to be written. * @param BitVal: specifies the value to be written to the selected bit. - * This parameter can be one of the BitAction enumeration values: - * @arg Bit_RESET: to clear the port pin - * @arg Bit_SET: to set the port pin + * This parameter can be one of the BitAction enumeration values: + * @arg Bit_RESET: to clear the port pin + * @arg Bit_SET: to set the port pin * @note The GPIO_Pin parameter can be GPIO_Pin_x where x can be: (0..15) for GPIOA, * GPIOB or GPIOC,(0..2) for GPIOD and(0..3) for GPIOF. * @retval None @@ -418,8 +418,7 @@ void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal) /** * @brief Writes data to the specified GPIO data port. * @param GPIOx: where x can be (A, B, C, D or F) to select the GPIO peripheral. - * @param PortVal: specifies the value to be written to the port output data - * register. + * @param PortVal: specifies the value to be written to the port output data register. * @retval None */ void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal) @@ -450,25 +449,25 @@ void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal) * @brief Writes data to the specified GPIO data port. * @param GPIOx: where x can be (A or B) to select the GPIO peripheral. * @param GPIO_PinSource: specifies the pin for the Alternate function. - * This parameter can be GPIO_PinSourcex where x can be (0..15). + * This parameter can be GPIO_PinSourcex where x can be (0..15). * @param GPIO_AF: selects the pin to used as Alternate function. - * This parameter can be one of the following value: - * @arg GPIO_AF_0:WKUP, EVENTOUT, TIM15, SPI1, TIM17,MCO, SWDAT, SWCLK, TIM14, - * BOOT,USART1, CEC, IR_OUT, SPI2 - * @arg GPIO_AF_1:USART2, CEC, Tim3, USART1, USART2,EVENTOUT, I2C1, I2C2, TIM15 - * @arg GPIO_AF_2:TIM2, TIM1, EVENTOUT, TIM16, TIM17. - * @arg GPIO_AF_3:TS, I2C1, TIM15, EVENTOUT - * @arg GPIO_AF_4:TIM14. - * @arg GPIO_AF_5:TIM16, TIM17. - * @arg GPIO_AF_6:EVENTOUT. - * @arg GPIO_AF_7:COMP1 OUT, COMP2 OUT - * @note The pin should already been configured in Alternate Function mode(AF) - * using GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF - * @note Refer to the Alternate function mapping table in the device datasheet - * for the detailed mapping of the system and peripherals'alternate - * function I/O pins. - * @retval None - */ + * This parameter can be one of the following value: + * @arg GPIO_AF_0: WKUP, EVENTOUT, TIM15, SPI1, TIM17,MCO, SWDAT, SWCLK, TIM14, + * BOOT,USART1, CEC, IR_OUT, SPI2 + * @arg GPIO_AF_1: USART2, CEC, Tim3, USART1, USART2,EVENTOUT, I2C1, I2C2, TIM15 + * @arg GPIO_AF_2: TIM2, TIM1, EVENTOUT, TIM16, TIM17 + * @arg GPIO_AF_3: TS, I2C1, TIM15, EVENTOUT + * @arg GPIO_AF_4: TIM14 + * @arg GPIO_AF_5: TIM16, TIM17 + * @arg GPIO_AF_6: EVENTOUT + * @arg GPIO_AF_7: COMP1 OUT, COMP2 OUT + * @note The pin should already been configured in Alternate Function mode(AF) + * using GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF + * @note Refer to the Alternate function mapping table in the device datasheet + * for the detailed mapping of the system and peripherals'alternate + * function I/O pins. + * @retval None + */ void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF) { uint32_t temp = 0x00; diff --git a/lib/src/peripherals/stm32f0xx_i2c.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_i2c.c old mode 100755 new mode 100644 similarity index 83% rename from lib/src/peripherals/stm32f0xx_i2c.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_i2c.c index a5f9a58..1bbe81d --- a/lib/src/peripherals/stm32f0xx_i2c.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_i2c.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_i2c.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the Inter-Integrated circuit (I2C): * + Initialization and Configuration @@ -94,6 +94,8 @@ #define CR1_CLEAR_MASK ((uint32_t)0x00CFE0FF) /*CR1)); + } + /* If TC interrupt */ + else if((I2C_IT & TC_IT_MASK) != 0) + { + enablestatus = (uint32_t)((I2C_CR1_TCIE) & (I2Cx->CR1)); + } + else + { + enablestatus = (uint32_t)((I2C_IT) & (I2Cx->CR1)); + } /* Get the ISR register value */ tmpreg = I2Cx->ISR; - + /* Get flag status */ tmpreg &= I2C_IT; - - if(tmpreg != 0) + + /* Check the status of the specified I2C flag */ + if((tmpreg != RESET) && enablestatus) { /* I2C_IT is set */ bitstatus = SET; @@ -1517,23 +1537,25 @@ ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT) /* I2C_IT is reset */ bitstatus = RESET; } + + /* Return the I2C_IT status */ return bitstatus; -} +} /** * @brief Clears the I2Cx's interrupt pending bits. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. * @param I2C_IT: specifies the interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg I2C_IT_ADDR: Address matched (slave mode) - * @arg I2C_IT_NACKF: NACK received flag - * @arg I2C_IT_STOPF: STOP detection flag - * @arg I2C_IT_BERR: Bus error - * @arg I2C_IT_ARLO: Arbitration lost - * @arg I2C_IT_OVR: Overrun/Underrun - * @arg I2C_IT_PECERR: PEC error in reception - * @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag - * @arg I2C_IT_ALERT: SMBus Alert + * This parameter can be any combination of the following values: + * @arg I2C_IT_ADDR: Address matched (slave mode) + * @arg I2C_IT_NACKF: NACK received flag + * @arg I2C_IT_STOPF: STOP detection flag + * @arg I2C_IT_BERR: Bus error + * @arg I2C_IT_ARLO: Arbitration lost + * @arg I2C_IT_OVR: Overrun/Underrun + * @arg I2C_IT_PECERR: PEC error in reception + * @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag + * @arg I2C_IT_ALERT: SMBus Alert * @retval The new state of I2C_IT (SET or RESET). */ void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT) diff --git a/lib/src/peripherals/stm32f0xx_iwdg.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_iwdg.c old mode 100755 new mode 100644 similarity index 86% rename from lib/src/peripherals/stm32f0xx_iwdg.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_iwdg.c index c3ee896..4b0fb8d --- a/lib/src/peripherals/stm32f0xx_iwdg.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_iwdg.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_iwdg.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the Independent watchdog (IWDG) peripheral: * + Prescaler and Counter configuration @@ -137,9 +137,9 @@ /** * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers. * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers. - * This parameter can be one of the following values: - * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers - * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers + * This parameter can be one of the following values: + * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers + * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers * @retval None */ void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess) @@ -152,14 +152,14 @@ void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess) /** * @brief Sets IWDG Prescaler value. * @param IWDG_Prescaler: specifies the IWDG Prescaler value. - * This parameter can be one of the following values: - * @arg IWDG_Prescaler_4: IWDG prescaler set to 4 - * @arg IWDG_Prescaler_8: IWDG prescaler set to 8 - * @arg IWDG_Prescaler_16: IWDG prescaler set to 16 - * @arg IWDG_Prescaler_32: IWDG prescaler set to 32 - * @arg IWDG_Prescaler_64: IWDG prescaler set to 64 - * @arg IWDG_Prescaler_128: IWDG prescaler set to 128 - * @arg IWDG_Prescaler_256: IWDG prescaler set to 256 + * This parameter can be one of the following values: + * @arg IWDG_Prescaler_4: IWDG prescaler set to 4 + * @arg IWDG_Prescaler_8: IWDG prescaler set to 8 + * @arg IWDG_Prescaler_16: IWDG prescaler set to 16 + * @arg IWDG_Prescaler_32: IWDG prescaler set to 32 + * @arg IWDG_Prescaler_64: IWDG prescaler set to 64 + * @arg IWDG_Prescaler_128: IWDG prescaler set to 128 + * @arg IWDG_Prescaler_256: IWDG prescaler set to 256 * @retval None */ void IWDG_SetPrescaler(uint8_t IWDG_Prescaler) @@ -172,7 +172,7 @@ void IWDG_SetPrescaler(uint8_t IWDG_Prescaler) /** * @brief Sets IWDG Reload value. * @param Reload: specifies the IWDG Reload value. - * This parameter must be a number between 0 and 0x0FFF. + * This parameter must be a number between 0 and 0x0FFF. * @retval None */ void IWDG_SetReload(uint16_t Reload) @@ -224,8 +224,8 @@ void IWDG_SetWindowValue(uint16_t WindowValue) /** * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled). - * @param None. - * @retval None. + * @param None + * @retval None */ void IWDG_Enable(void) { @@ -251,10 +251,10 @@ void IWDG_Enable(void) /** * @brief Checks whether the specified IWDG flag is set or not. * @param IWDG_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg IWDG_FLAG_PVU: Prescaler Value Update on going - * @arg IWDG_FLAG_RVU: Reload Value Update on going - * @arg IWDG_FLAG_WVU: Counter Window Value Update on going + * This parameter can be one of the following values: + * @arg IWDG_FLAG_PVU: Prescaler Value Update on going + * @arg IWDG_FLAG_RVU: Reload Value Update on going + * @arg IWDG_FLAG_WVU: Counter Window Value Update on going * @retval The new state of IWDG_FLAG (SET or RESET). */ FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG) diff --git a/lib/src/peripherals/stm32f0xx_misc.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_misc.c old mode 100755 new mode 100644 similarity index 87% rename from lib/src/peripherals/stm32f0xx_misc.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_misc.c index 1694eb7..a3de6af --- a/lib/src/peripherals/stm32f0xx_misc.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_misc.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_misc.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides all the miscellaneous firmware functions (add-on * to CMSIS functions). ****************************************************************************** @@ -106,12 +106,12 @@ void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct) /** * @brief Selects the condition for the system to enter low power mode. * @param LowPowerMode: Specifies the new mode for the system to enter low power mode. - * This parameter can be one of the following values: - * @arg NVIC_LP_SEVONPEND: Low Power SEV on Pend. - * @arg NVIC_LP_SLEEPDEEP: Low Power DEEPSLEEP request. - * @arg NVIC_LP_SLEEPONEXIT: Low Power Sleep on Exit. + * This parameter can be one of the following values: + * @arg NVIC_LP_SEVONPEND: Low Power SEV on Pend. + * @arg NVIC_LP_SLEEPDEEP: Low Power DEEPSLEEP request. + * @arg NVIC_LP_SLEEPONEXIT: Low Power Sleep on Exit. * @param NewState: new state of LP condition. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState) @@ -134,9 +134,9 @@ void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState) /** * @brief Configures the SysTick clock source. * @param SysTick_CLKSource: specifies the SysTick clock source. - * This parameter can be one of the following values: - * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source. - * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source. + * This parameter can be one of the following values: + * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source. + * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source. * @retval None */ void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource) diff --git a/lib/src/peripherals/stm32f0xx_pwr.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_pwr.c old mode 100755 new mode 100644 similarity index 89% rename from lib/src/peripherals/stm32f0xx_pwr.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_pwr.c index 2bcecb3..af17e06 --- a/lib/src/peripherals/stm32f0xx_pwr.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_pwr.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_pwr.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the Power Controller (PWR) peripheral: * + Backup Domain Access @@ -95,7 +95,7 @@ void PWR_DeInit(void) * @note If the HSE divided by 32 is used as the RTC clock, the * Backup Domain Access should be kept enabled. * @param NewState: new state of the access to the Backup domain registers. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void PWR_BackupAccessCmd(FunctionalState NewState) @@ -141,15 +141,18 @@ void PWR_BackupAccessCmd(FunctionalState NewState) /** * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). * @param PWR_PVDLevel: specifies the PVD detection level - * This parameter can be one of the following values: - * @arg PWR_PVDLevel_0: PVD detection level set to 1.9V - * @arg PWR_PVDLevel_1: PVD detection level set to 2.1V - * @arg PWR_PVDLevel_2: PVD detection level set to 2.3V - * @arg PWR_PVDLevel_3: PVD detection level set to 2.5V - * @arg PWR_PVDLevel_4: PVD detection level set to 2.7V - * @arg PWR_PVDLevel_5: PVD detection level set to 2.9V - * @arg PWR_PVDLevel_6: PVD detection level set to 3.1V - * @arg PWR_PVDLevel_7: PVD detection level set to 3.3V + * This parameter can be one of the following values: + * @arg PWR_PVDLevel_0 + * @arg PWR_PVDLevel_1 + * @arg PWR_PVDLevel_2 + * @arg PWR_PVDLevel_3 + * @arg PWR_PVDLevel_4 + * @arg PWR_PVDLevel_5 + * @arg PWR_PVDLevel_6 + * @arg PWR_PVDLevel_7 + * @note Refer to the electrical characteristics of your device datasheet for + * more details about the voltage threshold corresponding to each + * detection level. * @retval None */ void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel) @@ -174,7 +177,7 @@ void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel) /** * @brief Enables or disables the Power Voltage Detector(PVD). * @param NewState: new state of the PVD. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void PWR_PVDCmd(FunctionalState NewState) @@ -217,9 +220,9 @@ void PWR_PVDCmd(FunctionalState NewState) /** * @brief Enables or disables the WakeUp Pin functionality. * @param PWR_WakeUpPin: specifies the WakeUpPin. - * This parameter can be: PWR_WakeUpPin_1 or PWR_WakeUpPin_2. + * This parameter can be: PWR_WakeUpPin_1 or PWR_WakeUpPin_2. * @param NewState: new state of the WakeUp Pin functionality. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState) @@ -350,7 +353,7 @@ void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState) * @brief Enters Sleep mode. * @note In Sleep mode, all I/O pins keep the same state as in Run mode. * @param PWR_SLEEPEntry: specifies if SLEEP mode in entered with WFI or WFE instruction. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg PWR_SLEEPEntry_WFI: enter SLEEP mode with WFI instruction * @arg PWR_SLEEPEntry_WFE: enter SLEEP mode with WFE instruction * @retval None @@ -386,11 +389,11 @@ void PWR_EnterSleepMode(uint8_t PWR_SLEEPEntry) * By keeping the internal regulator ON during Stop mode, the consumption * is higher although the startup time is reduced. * @param PWR_Regulator: specifies the regulator state in STOP mode. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg PWR_Regulator_ON: STOP mode with regulator ON * @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode * @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction * @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction * @retval None @@ -435,10 +438,10 @@ void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry) /** * @brief Enters STANDBY mode. * @note In Standby mode, all I/O pins are high impedance except for: - * Reset pad (still available) - * RTC_AF1 pin (PC13) if configured for Wakeup pin 2 (WKUP2), tamper, - * time-stamp, RTC Alarm out, or RTC clock calibration out. - * WKUP pin 1 (PA0) if enabled. + * - Reset pad (still available) + * - RTC_AF1 pin (PC13) if configured for Wakeup pin 2 (WKUP2), tamper, + * time-stamp, RTC Alarm out, or RTC clock calibration out. + * - WKUP pin 1 (PA0) if enabled. * @param None * @retval None */ @@ -476,7 +479,7 @@ void PWR_EnterSTANDBYMode(void) /** * @brief Checks whether the specified PWR flag is set or not. * @param PWR_FLAG: specifies the flag to check. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup * event was received from the WKUP pin or from the RTC alarm * (Alarm A or Alarm B), RTC Tamper event or RTC TimeStamp event. @@ -510,7 +513,7 @@ FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG) /** * @brief Clears the PWR's pending flags. * @param PWR_FLAG: specifies the flag to clear. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg PWR_FLAG_WU: Wake Up flag * @arg PWR_FLAG_SB: StandBy flag * @retval None diff --git a/lib/src/peripherals/stm32f0xx_rcc.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_rcc.c old mode 100755 new mode 100644 similarity index 73% rename from lib/src/peripherals/stm32f0xx_rcc.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_rcc.c index 58f1a3b..ba6604d --- a/lib/src/peripherals/stm32f0xx_rcc.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_rcc.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_rcc.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the Reset and clock control (RCC) peripheral: * + Internal/external clocks, PLL, CSS and MCO configuration @@ -176,21 +176,21 @@ void RCC_DeInit(void) /** * @brief Configures the External High Speed oscillator (HSE). * @note After enabling the HSE (RCC_HSE_ON or RCC_HSE_Bypass), the application - * software should wait on HSERDY flag to be set indicating that HSE clock - * is stable and can be used to clock the PLL and/or system clock. - * @note HSE state can not be changed if it is used directly or through the - * PLL as system clock. In this case, you have to select another source - * of the system clock then change the HSE state (ex. disable it). - * @note The HSE is stopped by hardware when entering STOP and STANDBY modes. + * software should wait on HSERDY flag to be set indicating that HSE clock + * is stable and can be used to clock the PLL and/or system clock. + * @note HSE state can not be changed if it is used directly or through the + * PLL as system clock. In this case, you have to select another source + * of the system clock then change the HSE state (ex. disable it). + * @note The HSE is stopped by hardware when entering STOP and STANDBY modes. * @note This function resets the CSSON bit, so if the Clock security system(CSS) * was previously enabled you have to enable it again after calling this * function. - * @param RCC_HSE: specifies the new state of the HSE. - * This parameter can be one of the following values: - * @arg RCC_HSE_OFF: turn OFF the HSE oscillator, HSERDY flag goes low after - * 6 HSE oscillator clock cycles. - * @arg RCC_HSE_ON: turn ON the HSE oscillator - * @arg RCC_HSE_Bypass: HSE oscillator bypassed with external clock + * @param RCC_HSE: specifies the new state of the HSE. + * This parameter can be one of the following values: + * @arg RCC_HSE_OFF: turn OFF the HSE oscillator, HSERDY flag goes low after + * 6 HSE oscillator clock cycles. + * @arg RCC_HSE_ON: turn ON the HSE oscillator + * @arg RCC_HSE_Bypass: HSE oscillator bypassed with external clock * @retval None */ void RCC_HSEConfig(uint8_t RCC_HSE) @@ -213,7 +213,7 @@ void RCC_HSEConfig(uint8_t RCC_HSE) * and this flag is not set. The timeout value is defined by the constant * HSE_STARTUP_TIMEOUT in stm32f0xx.h file. You can tailor it depending * on the HSE crystal used in your application. - * - The HSE is stopped by hardware when entering STOP and STANDBY modes. + * @note The HSE is stopped by hardware when entering STOP and STANDBY modes. * @param None * @retval An ErrorStatus enumeration value: * - SUCCESS: HSE oscillator is stable and ready to use @@ -247,10 +247,10 @@ ErrorStatus RCC_WaitForHSEStartUp(void) * @brief Adjusts the Internal High Speed oscillator (HSI) calibration value. * @note The calibration is used to compensate for the variations in voltage * and temperature that influence the frequency of the internal HSI RC. - * Refer to the Application Note AN3300 for more details on how to + * Refer to the Application Note AN4067 for more details on how to * calibrate the HSI. * @param HSICalibrationValue: specifies the HSI calibration trimming value. - * This parameter must be a number between 0 and 0x1F. + * This parameter must be a number between 0 and 0x1F. * @retval None */ void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue) @@ -274,15 +274,15 @@ void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue) /** * @brief Enables or disables the Internal High Speed oscillator (HSI). - * @note After enabling the HSI, the application software should wait on - * HSIRDY flag to be set indicating that HSI clock is stable and can - * be used to clock the PLL and/or system clock. - * @note HSI can not be stopped if it is used directly or through the PLL - * as system clock. In this case, you have to select another source - * of the system clock then stop the HSI. - * @note The HSI is stopped by hardware when entering STOP and STANDBY modes. + * @note After enabling the HSI, the application software should wait on + * HSIRDY flag to be set indicating that HSI clock is stable and can + * be used to clock the PLL and/or system clock. + * @note HSI can not be stopped if it is used directly or through the PLL + * as system clock. In this case, you have to select another source + * of the system clock then stop the HSI. + * @note The HSI is stopped by hardware when entering STOP and STANDBY modes. * @param NewState: new state of the HSI. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @note When the HSI is stopped, HSIRDY flag goes low after 6 HSI oscillator * clock cycles. * @retval None @@ -307,10 +307,10 @@ void RCC_HSICmd(FunctionalState NewState) * calibration value. * @note The calibration is used to compensate for the variations in voltage * and temperature that influence the frequency of the internal HSI RC. - * Refer to the Application Note AN3300 for more details on how to + * Refer to the Application Note AN4067 for more details on how to * calibrate the HSI14. * @param HSI14CalibrationValue: specifies the HSI14 calibration trimming value. - * This parameter must be a number between 0 and 0x1F. + * This parameter must be a number between 0 and 0x1F. * @retval None */ void RCC_AdjustHSI14CalibrationValue(uint8_t HSI14CalibrationValue) @@ -334,12 +334,12 @@ void RCC_AdjustHSI14CalibrationValue(uint8_t HSI14CalibrationValue) /** * @brief Enables or disables the Internal High Speed oscillator for ADC (HSI14). - * @note After enabling the HSI14, the application software should wait on - * HSIRDY flag to be set indicating that HSI clock is stable and can - * be used to clock the ADC. - * @note The HSI14 is stopped by hardware when entering STOP and STANDBY modes. + * @note After enabling the HSI14, the application software should wait on + * HSIRDY flag to be set indicating that HSI clock is stable and can + * be used to clock the ADC. + * @note The HSI14 is stopped by hardware when entering STOP and STANDBY modes. * @param NewState: new state of the HSI14. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @note When the HSI14 is stopped, HSI14RDY flag goes low after 6 HSI14 oscillator * clock cycles. * @retval None @@ -362,7 +362,7 @@ void RCC_HSI14Cmd(FunctionalState NewState) /** * @brief Enables or disables the Internal High Speed oscillator request from ADC. * @param NewState: new state of the HSI14 ADC request. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RCC_HSI14ADCRequestCmd(FunctionalState NewState) @@ -382,19 +382,19 @@ void RCC_HSI14ADCRequestCmd(FunctionalState NewState) /** * @brief Configures the External Low Speed oscillator (LSE). - * @note As the LSE is in the Backup domain and write access is denied to this - * domain after reset, you have to enable write access using - * PWR_BackupAccessCmd(ENABLE) function before to configure the LSE - * (to be done once after reset). - * @note After enabling the LSE (RCC_LSE_ON or RCC_LSE_Bypass), the application - * software should wait on LSERDY flag to be set indicating that LSE clock - * is stable and can be used to clock the RTC. + * @note As the LSE is in the Backup domain and write access is denied to this + * domain after reset, you have to enable write access using + * PWR_BackupAccessCmd(ENABLE) function before to configure the LSE + * (to be done once after reset). + * @note After enabling the LSE (RCC_LSE_ON or RCC_LSE_Bypass), the application + * software should wait on LSERDY flag to be set indicating that LSE clock + * is stable and can be used to clock the RTC. * @param RCC_LSE: specifies the new state of the LSE. - * This parameter can be one of the following values: - * @arg RCC_LSE_OFF: turn OFF the LSE oscillator, LSERDY flag goes low after - * 6 LSE oscillator clock cycles. - * @arg RCC_LSE_ON: turn ON the LSE oscillator - * @arg RCC_LSE_Bypass: LSE oscillator bypassed with external clock + * This parameter can be one of the following values: + * @arg RCC_LSE_OFF: turn OFF the LSE oscillator, LSERDY flag goes low after + * 6 LSE oscillator clock cycles. + * @arg RCC_LSE_ON: turn ON the LSE oscillator + * @arg RCC_LSE_Bypass: LSE oscillator bypassed with external clock * @retval None */ void RCC_LSEConfig(uint32_t RCC_LSE) @@ -416,11 +416,11 @@ void RCC_LSEConfig(uint32_t RCC_LSE) /** * @brief Configures the External Low Speed oscillator (LSE) drive capability. * @param RCC_LSEDrive: specifies the new state of the LSE drive capability. - * This parameter can be one of the following values: - * @arg RCC_LSEDrive_Low: LSE oscillator low drive capability. - * @arg RCC_LSEDrive_MediumLow: LSE oscillator medium low drive capability. - * @arg RCC_LSEDrive_MediumHigh: LSE oscillator medium high drive capability. - * @arg RCC_LSEDrive_High: LSE oscillator high drive capability. + * This parameter can be one of the following values: + * @arg RCC_LSEDrive_Low: LSE oscillator low drive capability. + * @arg RCC_LSEDrive_MediumLow: LSE oscillator medium low drive capability. + * @arg RCC_LSEDrive_MediumHigh: LSE oscillator medium high drive capability. + * @arg RCC_LSEDrive_High: LSE oscillator high drive capability. * @retval None */ void RCC_LSEDriveConfig(uint32_t RCC_LSEDrive) @@ -437,12 +437,12 @@ void RCC_LSEDriveConfig(uint32_t RCC_LSEDrive) /** * @brief Enables or disables the Internal Low Speed oscillator (LSI). - * @note After enabling the LSI, the application software should wait on - * LSIRDY flag to be set indicating that LSI clock is stable and can - * be used to clock the IWDG and/or the RTC. - * @note LSI can not be disabled if the IWDG is running. + * @note After enabling the LSI, the application software should wait on + * LSIRDY flag to be set indicating that LSI clock is stable and can + * be used to clock the IWDG and/or the RTC. + * @note LSI can not be disabled if the IWDG is running. * @param NewState: new state of the LSI. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @note When the LSI is stopped, LSIRDY flag goes low after 6 LSI oscillator * clock cycles. * @retval None @@ -467,14 +467,14 @@ void RCC_LSICmd(FunctionalState NewState) * @note This function must be used only when the PLL is disabled. * * @param RCC_PLLSource: specifies the PLL entry clock source. - * This parameter can be one of the following values: - * @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock selected as PLL clock source - * @arg RCC_PLLSource_PREDIV1: PREDIV1 clock selected as PLL clock entry + * This parameter can be one of the following values: + * @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock selected as PLL clock source + * @arg RCC_PLLSource_PREDIV1: PREDIV1 clock selected as PLL clock entry * @note The minimum input clock frequency for PLL is 2 MHz (when using HSE as * PLL source). * * @param RCC_PLLMul: specifies the PLL multiplication factor, which drive the PLLVCO clock - * This parameter can be RCC_PLLMul_x where x:[2,16] + * This parameter can be RCC_PLLMul_x where x:[2,16] * * @retval None */ @@ -493,13 +493,13 @@ void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul) /** * @brief Enables or disables the PLL. - * @note - After enabling the PLL, the application software should wait on - * PLLRDY flag to be set indicating that PLL clock is stable and can - * be used as system clock source. - * - The PLL can not be disabled if it is used as system clock source - * - The PLL is disabled by hardware when entering STOP and STANDBY modes. + * @note After enabling the PLL, the application software should wait on + * PLLRDY flag to be set indicating that PLL clock is stable and can + * be used as system clock source. + * @note The PLL can not be disabled if it is used as system clock source + * @note The PLL is disabled by hardware when entering STOP and STANDBY modes. * @param NewState: new state of the PLL. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RCC_PLLCmd(FunctionalState NewState) @@ -521,7 +521,7 @@ void RCC_PLLCmd(FunctionalState NewState) * @brief Configures the PREDIV1 division factor. * @note This function must be used only when the PLL is disabled. * @param RCC_PREDIV1_Div: specifies the PREDIV1 clock division factor. - * This parameter can be RCC_PREDIV1_Divx where x:[1,16] + * This parameter can be RCC_PREDIV1_Divx where x:[1,16] * @retval None */ void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Div) @@ -548,7 +548,7 @@ void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Div) * allowing the MCU to perform rescue operations. The CSSI is linked to * the Cortex-M0 NMI (Non-Maskable Interrupt) exception vector. * @param NewState: new state of the Clock Security System. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RCC_ClockSecuritySystemCmd(FunctionalState NewState) @@ -570,15 +570,15 @@ void RCC_ClockSecuritySystemCmd(FunctionalState NewState) * @brief Selects the clock source to output on MCO pin (PA8). * @note PA8 should be configured in alternate function mode. * @param RCC_MCOSource: specifies the clock source to output. - * This parameter can be one of the following values: - * @arg RCC_MCOSource_NoClock: No clock selected. - * @arg RCC_MCOSource_HSI14: HSI14 oscillator clock selected. - * @arg RCC_MCOSource_LSI: LSI oscillator clock selected. - * @arg RCC_MCOSource_LSE: LSE oscillator clock selected. - * @arg RCC_MCOSource_SYSCLK: System clock selected. - * @arg RCC_MCOSource_HSI: HSI oscillator clock selected. - * @arg RCC_MCOSource_HSE: HSE oscillator clock selected. - * @arg RCC_MCOSource_PLLCLK_Div2: PLL clock divided by 2 selected. + * This parameter can be one of the following values: + * @arg RCC_MCOSource_NoClock: No clock selected. + * @arg RCC_MCOSource_HSI14: HSI14 oscillator clock selected. + * @arg RCC_MCOSource_LSI: LSI oscillator clock selected. + * @arg RCC_MCOSource_LSE: LSE oscillator clock selected. + * @arg RCC_MCOSource_SYSCLK: System clock selected. + * @arg RCC_MCOSource_HSI: HSI oscillator clock selected. + * @arg RCC_MCOSource_HSE: HSE oscillator clock selected. + * @arg RCC_MCOSource_PLLCLK_Div2: PLL clock divided by 2 selected. * @retval None */ void RCC_MCOConfig(uint8_t RCC_MCOSource) @@ -669,21 +669,21 @@ void RCC_MCOConfig(uint8_t RCC_MCOSource) /** * @brief Configures the system clock (SYSCLK). - * @note The HSI is used (enabled by hardware) as system clock source after - * startup from Reset, wake-up from STOP and STANDBY mode, or in case - * of failure of the HSE used directly or indirectly as system clock - * (if the Clock Security System CSS is enabled). - * @note A switch from one clock source to another occurs only if the target - * clock source is ready (clock stable after startup delay or PLL locked). - * If a clock source which is not yet ready is selected, the switch will - * occur when the clock source will be ready. - * You can use RCC_GetSYSCLKSource() function to know which clock is - * currently used as system clock source. + * @note The HSI is used (enabled by hardware) as system clock source after + * startup from Reset, wake-up from STOP and STANDBY mode, or in case + * of failure of the HSE used directly or indirectly as system clock + * (if the Clock Security System CSS is enabled). + * @note A switch from one clock source to another occurs only if the target + * clock source is ready (clock stable after startup delay or PLL locked). + * If a clock source which is not yet ready is selected, the switch will + * occur when the clock source will be ready. + * You can use RCC_GetSYSCLKSource() function to know which clock is + * currently used as system clock source. * @param RCC_SYSCLKSource: specifies the clock source used as system clock source - * This parameter can be one of the following values: - * @arg RCC_SYSCLKSource_HSI: HSI selected as system clock source - * @arg RCC_SYSCLKSource_HSE: HSE selected as system clock source - * @arg RCC_SYSCLKSource_PLLCLK: PLL selected as system clock source + * This parameter can be one of the following values: + * @arg RCC_SYSCLKSource_HSI: HSI selected as system clock source + * @arg RCC_SYSCLKSource_HSE: HSE selected as system clock source + * @arg RCC_SYSCLKSource_PLLCLK: PLL selected as system clock source * @retval None */ void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource) @@ -710,9 +710,9 @@ void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource) * @param None * @retval The clock source used as system clock. The returned value can be one * of the following values: - * - 0x00: HSI used as system clock - * - 0x04: HSE used as system clock - * - 0x08: PLL used as system clock + * - 0x00: HSI used as system clock + * - 0x04: HSE used as system clock + * - 0x08: PLL used as system clock */ uint8_t RCC_GetSYSCLKSource(void) { @@ -722,17 +722,17 @@ uint8_t RCC_GetSYSCLKSource(void) /** * @brief Configures the AHB clock (HCLK). * @param RCC_SYSCLK: defines the AHB clock divider. This clock is derived from - * the system clock (SYSCLK). - * This parameter can be one of the following values: - * @arg RCC_SYSCLK_Div1: AHB clock = SYSCLK - * @arg RCC_SYSCLK_Div2: AHB clock = SYSCLK/2 - * @arg RCC_SYSCLK_Div4: AHB clock = SYSCLK/4 - * @arg RCC_SYSCLK_Div8: AHB clock = SYSCLK/8 - * @arg RCC_SYSCLK_Div16: AHB clock = SYSCLK/16 - * @arg RCC_SYSCLK_Div64: AHB clock = SYSCLK/64 - * @arg RCC_SYSCLK_Div128: AHB clock = SYSCLK/128 - * @arg RCC_SYSCLK_Div256: AHB clock = SYSCLK/256 - * @arg RCC_SYSCLK_Div512: AHB clock = SYSCLK/512 + * the system clock (SYSCLK). + * This parameter can be one of the following values: + * @arg RCC_SYSCLK_Div1: AHB clock = SYSCLK + * @arg RCC_SYSCLK_Div2: AHB clock = SYSCLK/2 + * @arg RCC_SYSCLK_Div4: AHB clock = SYSCLK/4 + * @arg RCC_SYSCLK_Div8: AHB clock = SYSCLK/8 + * @arg RCC_SYSCLK_Div16: AHB clock = SYSCLK/16 + * @arg RCC_SYSCLK_Div64: AHB clock = SYSCLK/64 + * @arg RCC_SYSCLK_Div128: AHB clock = SYSCLK/128 + * @arg RCC_SYSCLK_Div256: AHB clock = SYSCLK/256 + * @arg RCC_SYSCLK_Div512: AHB clock = SYSCLK/512 * @retval None */ void RCC_HCLKConfig(uint32_t RCC_SYSCLK) @@ -758,12 +758,12 @@ void RCC_HCLKConfig(uint32_t RCC_SYSCLK) * @brief Configures the APB clock (PCLK). * @param RCC_HCLK: defines the APB clock divider. This clock is derived from * the AHB clock (HCLK). - * This parameter can be one of the following values: - * @arg RCC_HCLK_Div1: APB clock = HCLK - * @arg RCC_HCLK_Div2: APB clock = HCLK/2 - * @arg RCC_HCLK_Div4: APB clock = HCLK/4 - * @arg RCC_HCLK_Div8: APB clock = HCLK/8 - * @arg RCC_HCLK_Div16: APB clock = HCLK/16 + * This parameter can be one of the following values: + * @arg RCC_HCLK_Div1: APB clock = HCLK + * @arg RCC_HCLK_Div2: APB clock = HCLK/2 + * @arg RCC_HCLK_Div4: APB clock = HCLK/4 + * @arg RCC_HCLK_Div8: APB clock = HCLK/8 + * @arg RCC_HCLK_Div16: APB clock = HCLK/16 * @retval None */ void RCC_PCLKConfig(uint32_t RCC_HCLK) @@ -789,7 +789,7 @@ void RCC_PCLKConfig(uint32_t RCC_HCLK) * @brief Configures the ADC clock (ADCCLK). * @param RCC_ADCCLK: defines the ADC clock source. This clock is derived * from the HSI14 or APB clock (PCLK). - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg RCC_ADCCLK_HSI14: ADC clock = HSI14 (14MHz) * @arg RCC_ADCCLK_PCLK_Div2: ADC clock = PCLK/2 * @arg RCC_ADCCLK_PCLK_Div4: ADC clock = PCLK/4 @@ -815,7 +815,7 @@ void RCC_ADCCLKConfig(uint32_t RCC_ADCCLK) * @brief Configures the CEC clock (CECCLK). * @param RCC_CECCLK: defines the CEC clock source. This clock is derived * from the HSI or LSE clock. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg RCC_CECCLK_HSI_Div244: CEC clock = HSI/244 (32768Hz) * @arg RCC_CECCLK_LSE: CEC clock = LSE * @retval None @@ -835,7 +835,7 @@ void RCC_CECCLKConfig(uint32_t RCC_CECCLK) * @brief Configures the I2C1 clock (I2C1CLK). * @param RCC_I2CCLK: defines the I2C1 clock source. This clock is derived * from the HSI or System clock. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg RCC_I2C1CLK_HSI: I2C1 clock = HSI * @arg RCC_I2C1CLK_SYSCLK: I2C1 clock = System Clock * @retval None @@ -855,7 +855,7 @@ void RCC_I2CCLKConfig(uint32_t RCC_I2CCLK) * @brief Configures the USART1 clock (USART1CLK). * @param RCC_USARTCLK: defines the USART1 clock source. This clock is derived * from the HSI or System clock. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg RCC_USART1CLK_PCLK: USART1 clock = APB Clock (PCLK) * @arg RCC_USART1CLK_SYSCLK: USART1 clock = System Clock * @arg RCC_USART1CLK_LSE: USART1 clock = LSE Clock @@ -886,26 +886,26 @@ void RCC_USARTCLKConfig(uint32_t RCC_USARTCLK) * @note If SYSCLK source is PLL, function returns constant HSE_VALUE(**) * or HSI_VALUE(*) multiplied by the PLL factors. * - * (*) HSI_VALUE is a constant defined in stm32f0xx.h file (default value - * 8 MHz) but the real value may vary depending on the variations - * in voltage and temperature, refer to RCC_AdjustHSICalibrationValue(). + * @note (*) HSI_VALUE is a constant defined in stm32f0xx.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature, refer to RCC_AdjustHSICalibrationValue(). * - * (**) HSE_VALUE is a constant defined in stm32f0xx.h file (default value - * 8 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * return wrong result. + * @note (**) HSE_VALUE is a constant defined in stm32f0xx.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * return wrong result. * - * - The result of this function could be not correct when using fractional - * value for HSE crystal. + * @note The result of this function could be not correct when using fractional + * value for HSE crystal. * * @param RCC_Clocks: pointer to a RCC_ClocksTypeDef structure which will hold * the clocks frequencies. * - * @note This function can be used by the user application to compute the - * baudrate for the communication peripherals or configure other parameters. - * @note Each time SYSCLK, HCLK and/or PCLK clock changes, this function - * must be called to update the structure's field. Otherwise, any - * configuration based on this function will be incorrect. + * @note This function can be used by the user application to compute the + * baudrate for the communication peripherals or configure other parameters. + * @note Each time SYSCLK, HCLK and/or PCLK clock changes, this function + * must be called to update the structure's field. Otherwise, any + * configuration based on this function will be incorrect. * * @retval None */ @@ -1027,10 +1027,8 @@ void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks) /* USART1 Clock is HSI Osc. */ RCC_Clocks->USART1CLK_Frequency = HSI_VALUE; } - } - /** * @} */ @@ -1060,26 +1058,26 @@ void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks) /** * @brief Configures the RTC clock (RTCCLK). - * @note As the RTC clock configuration bits are in the Backup domain and write - * access is denied to this domain after reset, you have to enable write - * access using PWR_BackupAccessCmd(ENABLE) function before to configure - * the RTC clock source (to be done once after reset). - * @note Once the RTC clock is configured it can't be changed unless the RTC - * is reset using RCC_BackupResetCmd function, or by a Power On Reset (POR) + * @note As the RTC clock configuration bits are in the Backup domain and write + * access is denied to this domain after reset, you have to enable write + * access using PWR_BackupAccessCmd(ENABLE) function before to configure + * the RTC clock source (to be done once after reset). + * @note Once the RTC clock is configured it can't be changed unless the RTC + * is reset using RCC_BackupResetCmd function, or by a Power On Reset (POR) * * @param RCC_RTCCLKSource: specifies the RTC clock source. - * This parameter can be one of the following values: - * @arg RCC_RTCCLKSource_LSE: LSE selected as RTC clock - * @arg RCC_RTCCLKSource_LSI: LSI selected as RTC clock - * @arg RCC_RTCCLKSource_HSE_Div32: HSE divided by 32 selected as RTC clock + * This parameter can be one of the following values: + * @arg RCC_RTCCLKSource_LSE: LSE selected as RTC clock + * @arg RCC_RTCCLKSource_LSI: LSI selected as RTC clock + * @arg RCC_RTCCLKSource_HSE_Div32: HSE divided by 32 selected as RTC clock * - * @note If the LSE or LSI is used as RTC clock source, the RTC continues to - * work in STOP and STANDBY modes, and can be used as wakeup source. - * However, when the HSE clock is used as RTC clock source, the RTC - * cannot be used in STOP and STANDBY modes. + * @note If the LSE or LSI is used as RTC clock source, the RTC continues to + * work in STOP and STANDBY modes, and can be used as wakeup source. + * However, when the HSE clock is used as RTC clock source, the RTC + * cannot be used in STOP and STANDBY modes. * - * @note The maximum input clock frequency for RTC is 2MHz (when using HSE as - * RTC clock source). + * @note The maximum input clock frequency for RTC is 2MHz (when using HSE as + * RTC clock source). * * @retval None */ @@ -1097,7 +1095,7 @@ void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource) * @note This function must be used only after the RTC clock source was selected * using the RCC_RTCCLKConfig function. * @param NewState: new state of the RTC clock. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RCC_RTCCLKCmd(FunctionalState NewState) @@ -1120,7 +1118,7 @@ void RCC_RTCCLKCmd(FunctionalState NewState) * @note This function resets the RTC peripheral (including the backup registers) * and the RTC clock source selection in RCC_BDCR register. * @param NewState: new state of the Backup domain reset. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RCC_BackupResetCmd(FunctionalState NewState) @@ -1144,19 +1142,19 @@ void RCC_BackupResetCmd(FunctionalState NewState) * is disabled and the application software has to enable this clock before * using it. * @param RCC_AHBPeriph: specifies the AHB peripheral to gates its clock. - * This parameter can be any combination of the following values: - * @arg RCC_AHBPeriph_GPIOA: GPIOA clock - * @arg RCC_AHBPeriph_GPIOB: GPIOB clock - * @arg RCC_AHBPeriph_GPIOC: GPIOC clock - * @arg RCC_AHBPeriph_GPIOD: GPIOD clock - * @arg RCC_AHBPeriph_GPIOF: GPIOF clock - * @arg RCC_AHBPeriph_TS: TS clock - * @arg RCC_AHBPeriph_CRC: CRC clock + * This parameter can be any combination of the following values: + * @arg RCC_AHBPeriph_GPIOA: GPIOA clock + * @arg RCC_AHBPeriph_GPIOB: GPIOB clock + * @arg RCC_AHBPeriph_GPIOC: GPIOC clock + * @arg RCC_AHBPeriph_GPIOD: GPIOD clock + * @arg RCC_AHBPeriph_GPIOF: GPIOF clock + * @arg RCC_AHBPeriph_TS: TS clock + * @arg RCC_AHBPeriph_CRC: CRC clock * @arg RCC_AHBPeriph_FLITF: (has effect only when the Flash memory is in power down mode) - * @arg RCC_AHBPeriph_SRAM: SRAM clock - * @arg RCC_AHBPeriph_DMA1: DMA1 clock + * @arg RCC_AHBPeriph_SRAM: SRAM clock + * @arg RCC_AHBPeriph_DMA1: DMA1 clock * @param NewState: new state of the specified peripheral clock. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState) @@ -1181,18 +1179,18 @@ void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState) * is disabled and the application software has to enable this clock before * using it. * @param RCC_APB2Periph: specifies the APB2 peripheral to gates its clock. - * This parameter can be any combination of the following values: - * @arg RCC_APB2Periph_SYSCFG: SYSCFG clock - * @arg RCC_APB2Periph_ADC1: ADC1 clock - * @arg RCC_APB2Periph_TIM1: TIM1 clock - * @arg RCC_APB2Periph_SPI1: SPI1 clock - * @arg RCC_APB2Periph_USART1: USART1 clock - * @arg RCC_APB2Periph_TIM15: TIM15 clock - * @arg RCC_APB2Periph_TIM16: TIM16 clock - * @arg RCC_APB2Periph_TIM17: TIM17 clock - * @arg RCC_APB2Periph_DBGMCU: DBGMCU clock + * This parameter can be any combination of the following values: + * @arg RCC_APB2Periph_SYSCFG: SYSCFG clock + * @arg RCC_APB2Periph_ADC1: ADC1 clock + * @arg RCC_APB2Periph_TIM1: TIM1 clock + * @arg RCC_APB2Periph_SPI1: SPI1 clock + * @arg RCC_APB2Periph_USART1: USART1 clock + * @arg RCC_APB2Periph_TIM15: TIM15 clock + * @arg RCC_APB2Periph_TIM16: TIM16 clock + * @arg RCC_APB2Periph_TIM17: TIM17 clock + * @arg RCC_APB2Periph_DBGMCU: DBGMCU clock * @param NewState: new state of the specified peripheral clock. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) @@ -1217,21 +1215,21 @@ void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) * is disabled and the application software has to enable this clock before * using it. * @param RCC_APB1Periph: specifies the APB1 peripheral to gates its clock. - * This parameter can be any combination of the following values: - * @arg RCC_APB1Periph_TIM2: TIM2 clock - * @arg RCC_APB1Periph_TIM3: TIM3 clock - * @arg RCC_APB1Periph_TIM6: TIM6 clock - * @arg RCC_APB1Periph_TIM14: TIM14 clock - * @arg RCC_APB1Periph_WWDG: WWDG clock - * @arg RCC_APB1Periph_SPI2: SPI2 clock - * @arg RCC_APB1Periph_USART2: USART2 clock - * @arg RCC_APB1Periph_I2C1: I2C1 clock - * @arg RCC_APB1Periph_I2C2: I2C2 clock - * @arg RCC_APB1Periph_PWR: PWR clock - * @arg RCC_APB1Periph_DAC: DAC clock - * @arg RCC_APB1Periph_CEC: CEC clock + * This parameter can be any combination of the following values: + * @arg RCC_APB1Periph_TIM2: TIM2 clock + * @arg RCC_APB1Periph_TIM3: TIM3 clock + * @arg RCC_APB1Periph_TIM6: TIM6 clock + * @arg RCC_APB1Periph_TIM14: TIM14 clock + * @arg RCC_APB1Periph_WWDG: WWDG clock + * @arg RCC_APB1Periph_SPI2: SPI2 clock + * @arg RCC_APB1Periph_USART2: USART2 clock + * @arg RCC_APB1Periph_I2C1: I2C1 clock + * @arg RCC_APB1Periph_I2C2: I2C2 clock + * @arg RCC_APB1Periph_PWR: PWR clock + * @arg RCC_APB1Periph_DAC: DAC clock + * @arg RCC_APB1Periph_CEC: CEC clock * @param NewState: new state of the specified peripheral clock. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) @@ -1253,15 +1251,15 @@ void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) /** * @brief Forces or releases AHB peripheral reset. * @param RCC_AHBPeriph: specifies the AHB peripheral to reset. - * This parameter can be any combination of the following values: - * @arg RCC_AHBPeriph_GPIOA: GPIOA clock - * @arg RCC_AHBPeriph_GPIOB: GPIOB clock - * @arg RCC_AHBPeriph_GPIOC: GPIOC clock - * @arg RCC_AHBPeriph_GPIOD: GPIOD clock - * @arg RCC_AHBPeriph_GPIOF: GPIOF clock - * @arg RCC_AHBPeriph_TS: TS clock + * This parameter can be any combination of the following values: + * @arg RCC_AHBPeriph_GPIOA: GPIOA clock + * @arg RCC_AHBPeriph_GPIOB: GPIOB clock + * @arg RCC_AHBPeriph_GPIOC: GPIOC clock + * @arg RCC_AHBPeriph_GPIOD: GPIOD clock + * @arg RCC_AHBPeriph_GPIOF: GPIOF clock + * @arg RCC_AHBPeriph_TS: TS clock * @param NewState: new state of the specified peripheral reset. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState) @@ -1283,18 +1281,18 @@ void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState) /** * @brief Forces or releases High Speed APB (APB2) peripheral reset. * @param RCC_APB2Periph: specifies the APB2 peripheral to reset. - * This parameter can be any combination of the following values: - * @arg RCC_APB2Periph_SYSCFG: SYSCFG clock - * @arg RCC_APB2Periph_ADC1: ADC1 clock - * @arg RCC_APB2Periph_TIM1: TIM1 clock - * @arg RCC_APB2Periph_SPI1: SPI1 clock - * @arg RCC_APB2Periph_USART1: USART1 clock - * @arg RCC_APB2Periph_TIM15: TIM15 clock - * @arg RCC_APB2Periph_TIM16: TIM16 clock - * @arg RCC_APB2Periph_TIM17: TIM17 clock - * @arg RCC_APB2Periph_DBGMCU: DBGMCU clock + * This parameter can be any combination of the following values: + * @arg RCC_APB2Periph_SYSCFG: SYSCFG clock + * @arg RCC_APB2Periph_ADC1: ADC1 clock + * @arg RCC_APB2Periph_TIM1: TIM1 clock + * @arg RCC_APB2Periph_SPI1: SPI1 clock + * @arg RCC_APB2Periph_USART1: USART1 clock + * @arg RCC_APB2Periph_TIM15: TIM15 clock + * @arg RCC_APB2Periph_TIM16: TIM16 clock + * @arg RCC_APB2Periph_TIM17: TIM17 clock + * @arg RCC_APB2Periph_DBGMCU: DBGMCU clock * @param NewState: new state of the specified peripheral reset. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) @@ -1316,21 +1314,21 @@ void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) /** * @brief Forces or releases Low Speed APB (APB1) peripheral reset. * @param RCC_APB1Periph: specifies the APB1 peripheral to reset. - * This parameter can be any combination of the following values: - * @arg RCC_APB1Periph_TIM2: TIM2 clock - * @arg RCC_APB1Periph_TIM3: TIM3 clock - * @arg RCC_APB1Periph_TIM6: TIM6 clock - * @arg RCC_APB1Periph_TIM14: TIM14 clock - * @arg RCC_APB1Periph_WWDG: WWDG clock - * @arg RCC_APB1Periph_SPI2: SPI2 clock - * @arg RCC_APB1Periph_USART2: USART2 clock - * @arg RCC_APB1Periph_I2C1: I2C1 clock - * @arg RCC_APB1Periph_I2C2: I2C2 clock - * @arg RCC_APB1Periph_PWR: PWR clock - * @arg RCC_APB1Periph_DAC: DAC clock - * @arg RCC_APB1Periph_CEC: CEC clock + * This parameter can be any combination of the following values: + * @arg RCC_APB1Periph_TIM2: TIM2 clock + * @arg RCC_APB1Periph_TIM3: TIM3 clock + * @arg RCC_APB1Periph_TIM6: TIM6 clock + * @arg RCC_APB1Periph_TIM14: TIM14 clock + * @arg RCC_APB1Periph_WWDG: WWDG clock + * @arg RCC_APB1Periph_SPI2: SPI2 clock + * @arg RCC_APB1Periph_USART2: USART2 clock + * @arg RCC_APB1Periph_I2C1: I2C1 clock + * @arg RCC_APB1Periph_I2C2: I2C2 clock + * @arg RCC_APB1Periph_PWR: PWR clock + * @arg RCC_APB1Periph_DAC: DAC clock + * @arg RCC_APB1Periph_CEC: CEC clock * @param NewState: new state of the specified peripheral clock. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) @@ -1373,7 +1371,7 @@ void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) * the application will be stacked in the NMI ISR unless the CSS interrupt * pending bit is cleared. * @param RCC_IT: specifies the RCC interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: + * This parameter can be any combination of the following values: * @arg RCC_IT_LSIRDY: LSI ready interrupt * @arg RCC_IT_LSERDY: LSE ready interrupt * @arg RCC_IT_HSIRDY: HSI ready interrupt @@ -1381,7 +1379,7 @@ void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) * @arg RCC_IT_PLLRDY: PLL ready interrupt * @arg RCC_IT_HSI14RDY: HSI14 ready interrupt * @param NewState: new state of the specified RCC interrupts. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState) @@ -1405,7 +1403,7 @@ void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState) /** * @brief Checks whether the specified RCC flag is set or not. * @param RCC_FLAG: specifies the flag to check. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg RCC_FLAG_HSIRDY: HSI oscillator clock ready * @arg RCC_FLAG_HSERDY: HSE oscillator clock ready * @arg RCC_FLAG_PLLRDY: PLL clock ready @@ -1483,7 +1481,7 @@ void RCC_ClearFlag(void) /** * @brief Checks whether the specified RCC interrupt has occurred or not. * @param RCC_IT: specifies the RCC interrupt source to check. - * This parameter can be one of the following values: + * This parameter can be one of the following values: * @arg RCC_IT_LSIRDY: LSI ready interrupt * @arg RCC_IT_LSERDY: LSE ready interrupt * @arg RCC_IT_HSIRDY: HSI ready interrupt @@ -1516,7 +1514,7 @@ ITStatus RCC_GetITStatus(uint8_t RCC_IT) /** * @brief Clears the RCC's interrupt pending bits. * @param RCC_IT: specifies the interrupt pending bit to clear. - * This parameter can be any combination of the following values: + * This parameter can be any combination of the following values: * @arg RCC_IT_LSIRDY: LSI ready interrupt * @arg RCC_IT_LSERDY: LSE ready interrupt * @arg RCC_IT_HSIRDY: HSI ready interrupt diff --git a/lib/src/peripherals/stm32f0xx_rtc.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_rtc.c old mode 100755 new mode 100644 similarity index 82% rename from lib/src/peripherals/stm32f0xx_rtc.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_rtc.c index 65f69b5..def8953 --- a/lib/src/peripherals/stm32f0xx_rtc.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_rtc.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_rtc.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the Real-Time Clock (RTC) peripheral: * + Initialization @@ -241,8 +241,8 @@ #define RTC_RSF_MASK ((uint32_t)0xFFFFFF5F) #define RTC_FLAGS_MASK ((uint32_t)(RTC_FLAG_TSOVF | RTC_FLAG_TSF | RTC_FLAG_ALRAF | \ RTC_FLAG_RSF | RTC_FLAG_INITS |RTC_FLAG_INITF | \ - RTC_FLAG_TAMP1F | RTC_FLAG_TAMP2F | RTC_FLAG_TAMP3F | \ - RTC_FLAG_RECALPF | RTC_FLAG_SHPF)) + RTC_FLAG_TAMP1F | RTC_FLAG_TAMP2F | RTC_FLAG_RECALPF | \ + RTC_FLAG_SHPF)) #define INITMODE_TIMEOUT ((uint32_t) 0x00004000) #define SYNCHRO_TIMEOUT ((uint32_t) 0x00008000) @@ -432,7 +432,7 @@ void RTC_StructInit(RTC_InitTypeDef* RTC_InitStruct) * @note Writing a wrong key reactivates the write protection. * @note The protection mechanism is not affected by system reset. * @param NewState: new state of the write protection. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RTC_WriteProtectionCmd(FunctionalState NewState) @@ -575,7 +575,7 @@ ErrorStatus RTC_WaitForSynchro(void) /** * @brief Enables or disables the RTC reference clock detection. * @param NewState: new state of the RTC reference clock. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval An ErrorStatus enumeration value: * - SUCCESS: RTC reference clock detection is enabled * - ERROR: RTC reference clock detection is disabled @@ -673,9 +673,9 @@ void RTC_BypassShadowCmd(FunctionalState NewState) /** * @brief Set the RTC current time. * @param RTC_Format: specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_Format_BIN: Binary data format - * @arg RTC_Format_BCD: BCD data format + * This parameter can be one of the following values: + * @arg RTC_Format_BIN: Binary data format + * @arg RTC_Format_BCD: BCD data format * @param RTC_TimeStruct: pointer to a RTC_TimeTypeDef structure that contains * the time configuration information for the RTC. * @retval An ErrorStatus enumeration value: @@ -798,9 +798,9 @@ void RTC_TimeStructInit(RTC_TimeTypeDef* RTC_TimeStruct) /** * @brief Get the RTC current Time. * @param RTC_Format: specifies the format of the returned parameters. - * This parameter can be one of the following values: - * @arg RTC_Format_BIN: Binary data format - * @arg RTC_Format_BCD: BCD data format + * This parameter can be one of the following values: + * @arg RTC_Format_BIN: Binary data format + * @arg RTC_Format_BCD: BCD data format * @param RTC_TimeStruct: pointer to a RTC_TimeTypeDef structure that will * contain the returned current time configuration. * @retval None @@ -854,9 +854,9 @@ uint32_t RTC_GetSubSecond(void) /** * @brief Set the RTC current date. * @param RTC_Format: specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_Format_BIN: Binary data format - * @arg RTC_Format_BCD: BCD data format + * This parameter can be one of the following values: + * @arg RTC_Format_BIN: Binary data format + * @arg RTC_Format_BCD: BCD data format * @param RTC_DateStruct: pointer to a RTC_DateTypeDef structure that contains * the date configuration information for the RTC. * @retval An ErrorStatus enumeration value: @@ -966,9 +966,9 @@ void RTC_DateStructInit(RTC_DateTypeDef* RTC_DateStruct) /** * @brief Get the RTC current date. * @param RTC_Format: specifies the format of the returned parameters. - * This parameter can be one of the following values: - * @arg RTC_Format_BIN: Binary data format - * @arg RTC_Format_BCD: BCD data format + * This parameter can be one of the following values: + * @arg RTC_Format_BIN: Binary data format + * @arg RTC_Format_BCD: BCD data format * @param RTC_DateStruct: pointer to a RTC_DateTypeDef structure that will * contain the returned current date configuration. * @retval None @@ -1023,12 +1023,12 @@ void RTC_GetDate(uint32_t RTC_Format, RTC_DateTypeDef* RTC_DateStruct) * @note The Alarm register can only be written when the corresponding Alarm * is disabled (Use the RTC_AlarmCmd(DISABLE)). * @param RTC_Format: specifies the format of the returned parameters. - * This parameter can be one of the following values: - * @arg RTC_Format_BIN: Binary data format - * @arg RTC_Format_BCD: BCD data format + * This parameter can be one of the following values: + * @arg RTC_Format_BIN: Binary data format + * @arg RTC_Format_BCD: BCD data format * @param RTC_Alarm: specifies the alarm to be configured. - * This parameter can be one of the following values: - * @arg RTC_Alarm_A: to select Alarm A + * This parameter can be one of the following values: + * @arg RTC_Alarm_A: to select Alarm A * @param RTC_AlarmStruct: pointer to a RTC_AlarmTypeDef structure that * contains the alarm configuration parameters. * @retval None @@ -1156,12 +1156,12 @@ void RTC_AlarmStructInit(RTC_AlarmTypeDef* RTC_AlarmStruct) /** * @brief Get the RTC Alarm value and masks. * @param RTC_Format: specifies the format of the output parameters. - * This parameter can be one of the following values: - * @arg RTC_Format_BIN: Binary data format - * @arg RTC_Format_BCD: BCD data format + * This parameter can be one of the following values: + * @arg RTC_Format_BIN: Binary data format + * @arg RTC_Format_BCD: BCD data format * @param RTC_Alarm: specifies the alarm to be read. - * This parameter can be one of the following values: - * @arg RTC_Alarm_A: to select Alarm A + * This parameter can be one of the following values: + * @arg RTC_Alarm_A: to select Alarm A * @param RTC_AlarmStruct: pointer to a RTC_AlarmTypeDef structure that will * contains the output alarm configuration values. * @retval None @@ -1204,10 +1204,10 @@ void RTC_GetAlarm(uint32_t RTC_Format, uint32_t RTC_Alarm, RTC_AlarmTypeDef* RTC /** * @brief Enables or disables the specified RTC Alarm. * @param RTC_Alarm: specifies the alarm to be configured. - * This parameter can be any combination of the following values: - * @arg RTC_Alarm_A: to select Alarm A + * This parameter can be any combination of the following values: + * @arg RTC_Alarm_A: to select Alarm A * @param NewState: new state of the specified alarm. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval An ErrorStatus enumeration value: * - SUCCESS: RTC Alarm is enabled/disabled * - ERROR: RTC Alarm is not enabled/disabled @@ -1265,44 +1265,43 @@ ErrorStatus RTC_AlarmCmd(uint32_t RTC_Alarm, FunctionalState NewState) * @brief Configure the RTC AlarmA/B Subseconds value and mask. * @note This function is performed only when the Alarm is disabled. * @param RTC_Alarm: specifies the alarm to be configured. - * This parameter can be one of the following values: - * @arg RTC_Alarm_A: to select Alarm A + * This parameter can be one of the following values: + * @arg RTC_Alarm_A: to select Alarm A * @param RTC_AlarmSubSecondValue: specifies the Subseconds value. - * This parameter can be a value from 0 to 0x00007FFF. + * This parameter can be a value from 0 to 0x00007FFF. * @param RTC_AlarmSubSecondMask: specifies the Subseconds Mask. - * This parameter can be any combination of the following values: - * @arg RTC_AlarmSubSecondMask_All: All Alarm SS fields are masked. - * There is no comparison on sub seconds for Alarm. - * @arg RTC_AlarmSubSecondMask_SS14_1: SS[14:1] are don't care in Alarm comparison. - * Only SS[0] is compared - * @arg RTC_AlarmSubSecondMask_SS14_2: SS[14:2] are don't care in Alarm comparison. - * Only SS[1:0] are compared - * @arg RTC_AlarmSubSecondMask_SS14_3: SS[14:3] are don't care in Alarm comparison. - * Only SS[2:0] are compared - * @arg RTC_AlarmSubSecondMask_SS14_4: SS[14:4] are don't care in Alarm comparison. - * Only SS[3:0] are compared - * @arg RTC_AlarmSubSecondMask_SS14_5: SS[14:5] are don't care in Alarm comparison. - * Only SS[4:0] are compared - * @arg RTC_AlarmSubSecondMask_SS14_6: SS[14:6] are don't care in Alarm comparison. - * Only SS[5:0] are compared - * @arg RTC_AlarmSubSecondMask_SS14_7: SS[14:7] are don't care in Alarm comparison. - * Only SS[6:0] are compared - * @arg RTC_AlarmSubSecondMask_SS14_8: SS[14:8] are don't care in Alarm comparison. - * Only SS[7:0] are compared - * @arg RTC_AlarmSubSecondMask_SS14_9: SS[14:9] are don't care in Alarm comparison. - * Only SS[8:0] are compared - * @arg RTC_AlarmSubSecondMask_SS14_10: SS[14:10] are don't care in Alarm comparison. - * Only SS[9:0] are compared - * @arg RTC_AlarmSubSecondMask_SS14_11: SS[14:11] are don't care in Alarm comparison. - * Only SS[10:0] are compared - * @arg RTC_AlarmSubSecondMask_SS14_12: SS[14:12] are don't care in Alarm comparison. - * Only SS[11:0] are compared - * @arg RTC_AlarmSubSecondMask_SS14_13: SS[14:13] are don't care in Alarm comparison. - * Only SS[12:0] are compared - * @arg RTC_AlarmSubSecondMask_SS14: SS[14] is don't care in Alarm comparison. - * Only SS[13:0] are compared - * @arg RTC_AlarmSubSecondMask_None: SS[14:0] are compared and must match - * to activate alarm + * This parameter can be any combination of the following values: + * @arg RTC_AlarmSubSecondMask_All: All Alarm SS fields are masked. + * There is no comparison on sub seconds for Alarm. + * @arg RTC_AlarmSubSecondMask_SS14_1: SS[14:1] are don't care in Alarm comparison. + * Only SS[0] is compared + * @arg RTC_AlarmSubSecondMask_SS14_2: SS[14:2] are don't care in Alarm comparison. + * Only SS[1:0] are compared + * @arg RTC_AlarmSubSecondMask_SS14_3: SS[14:3] are don't care in Alarm comparison. + * Only SS[2:0] are compared + * @arg RTC_AlarmSubSecondMask_SS14_4: SS[14:4] are don't care in Alarm comparison. + * Only SS[3:0] are compared + * @arg RTC_AlarmSubSecondMask_SS14_5: SS[14:5] are don't care in Alarm comparison. + * Only SS[4:0] are compared + * @arg RTC_AlarmSubSecondMask_SS14_6: SS[14:6] are don't care in Alarm comparison. + * Only SS[5:0] are compared + * @arg RTC_AlarmSubSecondMask_SS14_7: SS[14:7] are don't care in Alarm comparison. + * Only SS[6:0] are compared + * @arg RTC_AlarmSubSecondMask_SS14_8: SS[14:8] are don't care in Alarm comparison. + * Only SS[7:0] are compared + * @arg RTC_AlarmSubSecondMask_SS14_9: SS[14:9] are don't care in Alarm comparison. + * Only SS[8:0] are compared + * @arg RTC_AlarmSubSecondMask_SS14_10: SS[14:10] are don't care in Alarm comparison. + * Only SS[9:0] are compared + * @arg RTC_AlarmSubSecondMask_SS14_11: SS[14:11] are don't care in Alarm comparison. + * Only SS[10:0] are compared + * @arg RTC_AlarmSubSecondMask_SS14_12: SS[14:12] are don't care in Alarm comparison. + * Only SS[11:0] are compared + * @arg RTC_AlarmSubSecondMask_SS14_13: SS[14:13] are don't care in Alarm comparison. + * Only SS[12:0] are compared + * @arg RTC_AlarmSubSecondMask_SS14: SS[14] is don't care in Alarm comparison. + * Only SS[13:0] are compared + * @arg RTC_AlarmSubSecondMask_None: SS[14:0] are compared and must match to activate alarm * @retval None */ void RTC_AlarmSubSecondConfig(uint32_t RTC_Alarm, uint32_t RTC_AlarmSubSecondValue, uint8_t RTC_AlarmSubSecondMask) @@ -1332,8 +1331,8 @@ void RTC_AlarmSubSecondConfig(uint32_t RTC_Alarm, uint32_t RTC_AlarmSubSecondVal /** * @brief Gets the RTC Alarm Subseconds value. * @param RTC_Alarm: specifies the alarm to be read. - * This parameter can be one of the following values: - * @arg RTC_Alarm_A: to select Alarm A + * This parameter can be one of the following values: + * @arg RTC_Alarm_A: to select Alarm A * @param None * @retval RTC Alarm Subseconds value. */ @@ -1369,14 +1368,14 @@ uint32_t RTC_GetAlarmSubSecond(uint32_t RTC_Alarm) /** * @brief Adds or substract one hour from the current time. * @param RTC_DayLightSaveOperation: the value of hour adjustment. - * This parameter can be one of the following values: - * @arg RTC_DayLightSaving_SUB1H: Substract one hour (winter time) - * @arg RTC_DayLightSaving_ADD1H: Add one hour (summer time) + * This parameter can be one of the following values: + * @arg RTC_DayLightSaving_SUB1H: Substract one hour (winter time) + * @arg RTC_DayLightSaving_ADD1H: Add one hour (summer time) * @param RTC_StoreOperation: Specifies the value to be written in the BCK bit * in CR register to store the operation. - * This parameter can be one of the following values: - * @arg RTC_StoreOperation_Reset - * @arg RTC_StoreOperation_Set + * This parameter can be one of the following values: + * @arg RTC_StoreOperation_Reset: BCK Bit Reset + * @arg RTC_StoreOperation_Set: BCK Bit Set * @retval None */ void RTC_DayLightSavingConfig(uint32_t RTC_DayLightSaving, uint32_t RTC_StoreOperation) @@ -1431,15 +1430,15 @@ uint32_t RTC_GetStoreOperation(void) /** * @brief Configures the RTC output source (AFO_ALARM). * @param RTC_Output: Specifies which signal will be routed to the RTC output. - * This parameter can be one of the following values: - * @arg RTC_Output_Disable: No output selected - * @arg RTC_Output_AlarmA: signal of AlarmA mapped to output + * This parameter can be one of the following values: + * @arg RTC_Output_Disable: No output selected + * @arg RTC_Output_AlarmA: signal of AlarmA mapped to output * @param RTC_OutputPolarity: Specifies the polarity of the output signal. - * This parameter can be one of the following: - * @arg RTC_OutputPolarity_High: The output pin is high when the - * ALRAF is high (depending on OSEL) - * @arg RTC_OutputPolarity_Low: The output pin is low when the - * ALRAF is high (depending on OSEL) + * This parameter can be one of the following: + * @arg RTC_OutputPolarity_High: The output pin is high when the + * ALRAF is high (depending on OSEL) + * @arg RTC_OutputPolarity_Low: The output pin is low when the + * ALRAF is high (depending on OSEL) * @retval None */ void RTC_OutputConfig(uint32_t RTC_Output, uint32_t RTC_OutputPolarity) @@ -1479,10 +1478,9 @@ void RTC_OutputConfig(uint32_t RTC_Output, uint32_t RTC_OutputPolarity) */ /** - * @brief Enables or disables the RTC clock to be output through the relative - * pin. + * @brief Enables or disables the RTC clock to be output through the relative pin. * @param NewState: new state of the digital calibration Output. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RTC_CalibOutputCmd(FunctionalState NewState) @@ -1511,10 +1509,10 @@ void RTC_CalibOutputCmd(FunctionalState NewState) /** * @brief Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz). - * @param RTC_CalibOutput : Select the Calibration output Selection . - * This parameter can be one of the following values: - * @arg RTC_CalibOutput_512Hz: A signal has a regular waveform at 512Hz. - * @arg RTC_CalibOutput_1Hz: A signal has a regular waveform at 1Hz. + * @param RTC_CalibOutput: Select the Calibration output Selection . + * This parameter can be one of the following values: + * @arg RTC_CalibOutput_512Hz: A signal has a regular waveform at 512Hz. + * @arg RTC_CalibOutput_1Hz: A signal has a regular waveform at 1Hz. * @retval None */ void RTC_CalibOutputConfig(uint32_t RTC_CalibOutput) @@ -1539,16 +1537,16 @@ void RTC_CalibOutputConfig(uint32_t RTC_CalibOutput) /** * @brief Configures the Smooth Calibration Settings. * @param RTC_SmoothCalibPeriod: Select the Smooth Calibration Period. - * This parameter can be can be one of the following values: - * @arg RTC_SmoothCalibPeriod_32sec: The smooth calibration periode is 32s. - * @arg RTC_SmoothCalibPeriod_16sec: The smooth calibration periode is 16s. - * @arg RTC_SmoothCalibPeriod_8sec: The smooth calibartion periode is 8s. + * This parameter can be can be one of the following values: + * @arg RTC_SmoothCalibPeriod_32sec: The smooth calibration periode is 32s. + * @arg RTC_SmoothCalibPeriod_16sec: The smooth calibration periode is 16s. + * @arg RTC_SmoothCalibPeriod_8sec: The smooth calibartion periode is 8s. * @param RTC_SmoothCalibPlusPulses: Select to Set or reset the CALP bit. - * This parameter can be one of the following values: - * @arg RTC_SmoothCalibPlusPulses_Set: Add one RTCCLK puls every 2**11 pulses. - * @arg RTC_SmoothCalibPlusPulses_Reset: No RTCCLK pulses are added. + * This parameter can be one of the following values: + * @arg RTC_SmoothCalibPlusPulses_Set: Add one RTCCLK puls every 2**11 pulses. + * @arg RTC_SmoothCalibPlusPulses_Reset: No RTCCLK pulses are added. * @param RTC_SmouthCalibMinusPulsesValue: Select the value of CALM[8:0] bits. - * This parameter can be one any value from 0 to 0x000001FF. + * This parameter can be one any value from 0 to 0x000001FF. * @retval An ErrorStatus enumeration value: * - SUCCESS: RTC Calib registers are configured * - ERROR: RTC Calib registers are not configured @@ -1620,13 +1618,13 @@ ErrorStatus RTC_SmoothCalibConfig(uint32_t RTC_SmoothCalibPeriod, * specified time stamp pin stimulating edge. * @param RTC_TimeStampEdge: Specifies the pin edge on which the TimeStamp is * activated. - * This parameter can be one of the following: - * @arg RTC_TimeStampEdge_Rising: the Time stamp event occurs on the rising - * edge of the related pin. - * @arg RTC_TimeStampEdge_Falling: the Time stamp event occurs on the - * falling edge of the related pin. + * This parameter can be one of the following: + * @arg RTC_TimeStampEdge_Rising: the Time stamp event occurs on the rising + * edge of the related pin. + * @arg RTC_TimeStampEdge_Falling: the Time stamp event occurs on the + * falling edge of the related pin. * @param NewState: new state of the TimeStamp. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RTC_TimeStampCmd(uint32_t RTC_TimeStampEdge, FunctionalState NewState) @@ -1664,9 +1662,9 @@ void RTC_TimeStampCmd(uint32_t RTC_TimeStampEdge, FunctionalState NewState) /** * @brief Get the RTC TimeStamp value and masks. * @param RTC_Format: specifies the format of the output parameters. - * This parameter can be one of the following values: - * @arg RTC_Format_BIN: Binary data format - * @arg RTC_Format_BCD: BCD data format + * This parameter can be one of the following values: + * @arg RTC_Format_BIN: Binary data format + * @arg RTC_Format_BCD: BCD data format * @param RTC_StampTimeStruct: pointer to a RTC_TimeTypeDef structure that will * contains the TimeStamp time values. * @param RTC_StampDateStruct: pointer to a RTC_DateTypeDef structure that will @@ -1742,17 +1740,16 @@ uint32_t RTC_GetTimeStampSubSecond(void) /** * @brief Configures the select Tamper pin edge. * @param RTC_Tamper: Selected tamper pin. - * This parameter can be any combination of the following values: - * @arg RTC_Tamper_1: Select Tamper 1. - * @arg RTC_Tamper_2: Select Tamper 2. - * @arg RTC_Tamper_3: Select Tamper 3. + * This parameter can be any combination of the following values: + * @arg RTC_Tamper_1: Select Tamper 1. + * @arg RTC_Tamper_2: Select Tamper 2. * @param RTC_TamperTrigger: Specifies the trigger on the tamper pin that * stimulates tamper event. - * This parameter can be one of the following values: - * @arg RTC_TamperTrigger_RisingEdge: Rising Edge of the tamper pin causes tamper event. - * @arg RTC_TamperTrigger_FallingEdge: Falling Edge of the tamper pin causes tamper event. - * @arg RTC_TamperTrigger_LowLevel: Low Level of the tamper pin causes tamper event. - * @arg RTC_TamperTrigger_HighLevel: High Level of the tamper pin causes tamper event. + * This parameter can be one of the following values: + * @arg RTC_TamperTrigger_RisingEdge: Rising Edge of the tamper pin causes tamper event. + * @arg RTC_TamperTrigger_FallingEdge: Falling Edge of the tamper pin causes tamper event. + * @arg RTC_TamperTrigger_LowLevel: Low Level of the tamper pin causes tamper event. + * @arg RTC_TamperTrigger_HighLevel: High Level of the tamper pin causes tamper event. * @retval None */ void RTC_TamperTriggerConfig(uint32_t RTC_Tamper, uint32_t RTC_TamperTrigger) @@ -1776,10 +1773,9 @@ void RTC_TamperTriggerConfig(uint32_t RTC_Tamper, uint32_t RTC_TamperTrigger) /** * @brief Enables or Disables the Tamper detection. * @param RTC_Tamper: Selected tamper pin. - * This parameter can be any combination of the following values: - * @arg RTC_Tamper_1: Select Tamper 1. - * @arg RTC_Tamper_2: Select Tamper 2. - * @arg RTC_Tamper_3: Select Tamper 3. + * This parameter can be any combination of the following values: + * @arg RTC_Tamper_1: Select Tamper 1. + * @arg RTC_Tamper_2: Select Tamper 2. * @param NewState: new state of the tamper pin. * This parameter can be: ENABLE or DISABLE. * @retval None @@ -1805,14 +1801,14 @@ void RTC_TamperCmd(uint32_t RTC_Tamper, FunctionalState NewState) /** * @brief Configures the Tampers Filter. * @param RTC_TamperFilter: Specifies the tampers filter. - * This parameter can be one of the following values: - * @arg RTC_TamperFilter_Disable: Tamper filter is disabled. - * @arg RTC_TamperFilter_2Sample: Tamper is activated after 2 consecutive - * samples at the active level - * @arg RTC_TamperFilter_4Sample: Tamper is activated after 4 consecutive - * samples at the active level - * @arg RTC_TamperFilter_8Sample: Tamper is activated after 8 consecutive - * samples at the active level + * This parameter can be one of the following values: + * @arg RTC_TamperFilter_Disable: Tamper filter is disabled. + * @arg RTC_TamperFilter_2Sample: Tamper is activated after 2 consecutive + * samples at the active level + * @arg RTC_TamperFilter_4Sample: Tamper is activated after 4 consecutive + * samples at the active level + * @arg RTC_TamperFilter_8Sample: Tamper is activated after 8 consecutive + * samples at the active level * @retval None */ void RTC_TamperFilterConfig(uint32_t RTC_TamperFilter) @@ -1830,23 +1826,23 @@ void RTC_TamperFilterConfig(uint32_t RTC_TamperFilter) /** * @brief Configures the Tampers Sampling Frequency. * @param RTC_TamperSamplingFreq: Specifies the tampers Sampling Frequency. - * This parameter can be one of the following values: - * @arg RTC_TamperSamplingFreq_RTCCLK_Div32768: Each of the tamper inputs are sampled - * with a frequency = RTCCLK / 32768 - * @arg RTC_TamperSamplingFreq_RTCCLK_Div16384: Each of the tamper inputs are sampled - * with a frequency = RTCCLK / 16384 - * @arg RTC_TamperSamplingFreq_RTCCLK_Div8192: Each of the tamper inputs are sampled - * with a frequency = RTCCLK / 8192 - * @arg RTC_TamperSamplingFreq_RTCCLK_Div4096: Each of the tamper inputs are sampled - * with a frequency = RTCCLK / 4096 - * @arg RTC_TamperSamplingFreq_RTCCLK_Div2048: Each of the tamper inputs are sampled - * with a frequency = RTCCLK / 2048 - * @arg RTC_TamperSamplingFreq_RTCCLK_Div1024: Each of the tamper inputs are sampled - * with a frequency = RTCCLK / 1024 - * @arg RTC_TamperSamplingFreq_RTCCLK_Div512: Each of the tamper inputs are sampled - * with a frequency = RTCCLK / 512 - * @arg RTC_TamperSamplingFreq_RTCCLK_Div256: Each of the tamper inputs are sampled - * with a frequency = RTCCLK / 256 + * This parameter can be one of the following values: + * @arg RTC_TamperSamplingFreq_RTCCLK_Div32768: Each of the tamper inputs are sampled + * with a frequency = RTCCLK / 32768 + * @arg RTC_TamperSamplingFreq_RTCCLK_Div16384: Each of the tamper inputs are sampled + * with a frequency = RTCCLK / 16384 + * @arg RTC_TamperSamplingFreq_RTCCLK_Div8192: Each of the tamper inputs are sampled + * with a frequency = RTCCLK / 8192 + * @arg RTC_TamperSamplingFreq_RTCCLK_Div4096: Each of the tamper inputs are sampled + * with a frequency = RTCCLK / 4096 + * @arg RTC_TamperSamplingFreq_RTCCLK_Div2048: Each of the tamper inputs are sampled + * with a frequency = RTCCLK / 2048 + * @arg RTC_TamperSamplingFreq_RTCCLK_Div1024: Each of the tamper inputs are sampled + * with a frequency = RTCCLK / 1024 + * @arg RTC_TamperSamplingFreq_RTCCLK_Div512: Each of the tamper inputs are sampled + * with a frequency = RTCCLK / 512 + * @arg RTC_TamperSamplingFreq_RTCCLK_Div256: Each of the tamper inputs are sampled + * with a frequency = RTCCLK / 256 * @retval None */ void RTC_TamperSamplingFreqConfig(uint32_t RTC_TamperSamplingFreq) @@ -1865,11 +1861,11 @@ void RTC_TamperSamplingFreqConfig(uint32_t RTC_TamperSamplingFreq) * @brief Configures the Tampers Pins input Precharge Duration. * @param RTC_TamperPrechargeDuration: Specifies the Tampers Pins input * Precharge Duration. - * This parameter can be one of the following values: - * @arg RTC_TamperPrechargeDuration_1RTCCLK: Tamper pins are pre-charged before sampling during 1 RTCCLK cycle - * @arg RTC_TamperPrechargeDuration_2RTCCLK: Tamper pins are pre-charged before sampling during 2 RTCCLK cycle - * @arg RTC_TamperPrechargeDuration_4RTCCLK: Tamper pins are pre-charged before sampling during 4 RTCCLK cycle - * @arg RTC_TamperPrechargeDuration_8RTCCLK: Tamper pins are pre-charged before sampling during 8 RTCCLK cycle + * This parameter can be one of the following values: + * @arg RTC_TamperPrechargeDuration_1RTCCLK: Tamper pins are pre-charged before sampling during 1 RTCCLK cycle + * @arg RTC_TamperPrechargeDuration_2RTCCLK: Tamper pins are pre-charged before sampling during 2 RTCCLK cycle + * @arg RTC_TamperPrechargeDuration_4RTCCLK: Tamper pins are pre-charged before sampling during 4 RTCCLK cycle + * @arg RTC_TamperPrechargeDuration_8RTCCLK: Tamper pins are pre-charged before sampling during 8 RTCCLK cycle * @retval None */ void RTC_TamperPinsPrechargeDuration(uint32_t RTC_TamperPrechargeDuration) @@ -1912,7 +1908,7 @@ void RTC_TimeStampOnTamperDetectionCmd(FunctionalState NewState) /** * @brief Enables or Disables the Precharge of Tamper pin. * @param NewState: new state of tamper pull up. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RTC_TamperPullUpCmd(FunctionalState NewState) @@ -1951,8 +1947,8 @@ void RTC_TamperPullUpCmd(FunctionalState NewState) /** * @brief Writes a data in a specified RTC Backup data register. * @param RTC_BKP_DR: RTC Backup data Register number. - * This parameter can be: RTC_BKP_DRx where x can be from 0 to 4 to - * specify the register. + * This parameter can be: RTC_BKP_DRx where x can be from 0 to 4 to + * specify the register. * @param Data: Data to be written in the specified RTC Backup data register. * @retval None */ @@ -1973,7 +1969,7 @@ void RTC_WriteBackupRegister(uint32_t RTC_BKP_DR, uint32_t Data) /** * @brief Reads data from the specified RTC Backup data Register. * @param RTC_BKP_DR: RTC Backup data Register number. - * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to + * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to * specify the register. * @retval None */ @@ -2010,10 +2006,10 @@ uint32_t RTC_ReadBackupRegister(uint32_t RTC_BKP_DR) /** * @brief Configures the RTC Output Pin mode. * @param RTC_OutputType: specifies the RTC Output (PC13) pin mode. - * This parameter can be one of the following values: - * @arg RTC_OutputType_OpenDrain: RTC Output (PC13) is configured in + * This parameter can be one of the following values: + * @arg RTC_OutputType_OpenDrain: RTC Output (PC13) is configured in * Open Drain mode. - * @arg RTC_OutputType_PushPull: RTC Output (PC13) is configured in + * @arg RTC_OutputType_PushPull: RTC Output (PC13) is configured in * Push Pull mode. * @retval None */ @@ -2046,9 +2042,9 @@ void RTC_OutputTypeConfig(uint32_t RTC_OutputType) * @brief Configures the Synchronization Shift Control Settings. * @note When REFCKON is set, firmware must not write to Shift control register * @param RTC_ShiftAdd1S: Select to add or not 1 second to the time Calendar. - * This parameter can be one of the following values : - * @arg RTC_ShiftAdd1S_Set: Add one second to the clock calendar. - * @arg RTC_ShiftAdd1S_Reset: No effect. + * This parameter can be one of the following values : + * @arg RTC_ShiftAdd1S_Set: Add one second to the clock calendar. + * @arg RTC_ShiftAdd1S_Reset: No effect. * @param RTC_ShiftSubFS: Select the number of Second Fractions to Substitute. * This parameter can be one any value from 0 to 0x7FFF. * @retval An ErrorStatus enumeration value: @@ -2156,12 +2152,12 @@ ErrorStatus RTC_SynchroShiftConfig(uint32_t RTC_ShiftAdd1S, uint32_t RTC_ShiftSu /** * @brief Enables or disables the specified RTC interrupts. * @param RTC_IT: specifies the RTC interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg RTC_IT_TS: Time Stamp interrupt mask - * @arg RTC_IT_ALRA: Alarm A interrupt mask - * @arg RTC_IT_TAMP: Tamper event interrupt mask + * This parameter can be any combination of the following values: + * @arg RTC_IT_TS: Time Stamp interrupt mask + * @arg RTC_IT_ALRA: Alarm A interrupt mask + * @arg RTC_IT_TAMP: Tamper event interrupt mask * @param NewState: new state of the specified RTC interrupts. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void RTC_ITConfig(uint32_t RTC_IT, FunctionalState NewState) @@ -2195,17 +2191,16 @@ void RTC_ITConfig(uint32_t RTC_IT, FunctionalState NewState) /** * @brief Checks whether the specified RTC flag is set or not. * @param RTC_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg RTC_FLAG_RECALPF: RECALPF event flag - * @arg RTC_FLAG_TAMP3F: Tamper 3 event flag - * @arg RTC_FLAG_TAMP2F: Tamper 2 event flag - * @arg RTC_FLAG_TAMP1F: Tamper 1 event flag - * @arg RTC_FLAG_TSOVF: Time Stamp OverFlow flag - * @arg RTC_FLAG_TSF: Time Stamp event flag - * @arg RTC_FLAG_ALRAF: Alarm A flag - * @arg RTC_FLAG_INITF: Initialization mode flag - * @arg RTC_FLAG_RSF: Registers Synchronized flag - * @arg RTC_FLAG_INITS: Registers Configured flag + * This parameter can be one of the following values: + * @arg RTC_FLAG_RECALPF: RECALPF event flag + * @arg RTC_FLAG_TAMP2F: Tamper 2 event flag + * @arg RTC_FLAG_TAMP1F: Tamper 1 event flag + * @arg RTC_FLAG_TSOVF: Time Stamp OverFlow flag + * @arg RTC_FLAG_TSF: Time Stamp event flag + * @arg RTC_FLAG_ALRAF: Alarm A flag + * @arg RTC_FLAG_INITF: Initialization mode flag + * @arg RTC_FLAG_RSF: Registers Synchronized flag + * @arg RTC_FLAG_INITS: Registers Configured flag * @retval The new state of RTC_FLAG (SET or RESET). */ FlagStatus RTC_GetFlagStatus(uint32_t RTC_FLAG) @@ -2234,14 +2229,13 @@ FlagStatus RTC_GetFlagStatus(uint32_t RTC_FLAG) /** * @brief Clears the RTC's pending flags. * @param RTC_FLAG: specifies the RTC flag to clear. - * This parameter can be any combination of the following values: - * @arg RTC_FLAG_TAMP3F: Tamper 3 event flag - * @arg RTC_FLAG_TAMP2F: Tamper 2 event flag - * @arg RTC_FLAG_TAMP1F: Tamper 1 event flag - * @arg RTC_FLAG_TSOVF: Time Stamp Overflow flag - * @arg RTC_FLAG_TSF: Time Stamp event flag - * @arg RTC_FLAG_ALRAF: Alarm A flag - * @arg RTC_FLAG_RSF: Registers Synchronized flag + * This parameter can be any combination of the following values: + * @arg RTC_FLAG_TAMP2F: Tamper 2 event flag + * @arg RTC_FLAG_TAMP1F: Tamper 1 event flag + * @arg RTC_FLAG_TSOVF: Time Stamp Overflow flag + * @arg RTC_FLAG_TSF: Time Stamp event flag + * @arg RTC_FLAG_ALRAF: Alarm A flag + * @arg RTC_FLAG_RSF: Registers Synchronized flag * @retval None */ void RTC_ClearFlag(uint32_t RTC_FLAG) @@ -2256,12 +2250,11 @@ void RTC_ClearFlag(uint32_t RTC_FLAG) /** * @brief Checks whether the specified RTC interrupt has occurred or not. * @param RTC_IT: specifies the RTC interrupt source to check. - * This parameter can be one of the following values: - * @arg RTC_IT_TS: Time Stamp interrupt - * @arg RTC_IT_ALRA: Alarm A interrupt - * @arg RTC_IT_TAMP1: Tamper1 event interrupt - * @arg RTC_IT_TAMP2: Tamper2 event interrupt - * @arg RTC_IT_TAMP3: Tamper3 event interrupt + * This parameter can be one of the following values: + * @arg RTC_IT_TS: Time Stamp interrupt + * @arg RTC_IT_ALRA: Alarm A interrupt + * @arg RTC_IT_TAMP1: Tamper1 event interrupt + * @arg RTC_IT_TAMP2: Tamper2 event interrupt * @retval The new state of RTC_IT (SET or RESET). */ ITStatus RTC_GetITStatus(uint32_t RTC_IT) @@ -2296,12 +2289,11 @@ ITStatus RTC_GetITStatus(uint32_t RTC_IT) /** * @brief Clears the RTC's interrupt pending bits. * @param RTC_IT: specifies the RTC interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg RTC_IT_TS: Time Stamp interrupt - * @arg RTC_IT_ALRA: Alarm A interrupt - * @arg RTC_IT_TAMP1: Tamper1 event interrupt - * @arg RTC_IT_TAMP2: Tamper2 event interrupt - * @arg RTC_IT_TAMP3: Tamper3 event interrupt + * This parameter can be any combination of the following values: + * @arg RTC_IT_TS: Time Stamp interrupt + * @arg RTC_IT_ALRA: Alarm A interrupt + * @arg RTC_IT_TAMP1: Tamper1 event interrupt + * @arg RTC_IT_TAMP2: Tamper2 event interrupt * @retval None */ void RTC_ClearITPendingBit(uint32_t RTC_IT) diff --git a/lib/src/peripherals/stm32f0xx_spi.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_spi.c old mode 100755 new mode 100644 similarity index 81% rename from lib/src/peripherals/stm32f0xx_spi.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_spi.c index 681be2e..f635af8 --- a/lib/src/peripherals/stm32f0xx_spi.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_spi.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_spi.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the Serial peripheral interface (SPI): * + Initialization and Configuration @@ -288,7 +288,7 @@ void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct) /** * @brief Fills each I2S_InitStruct member with its default value. - * @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure which will be initialized. + * @param I2S_InitStruct: pointer to a I2S_InitTypeDef structure which will be initialized. * @retval None */ void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct) @@ -315,16 +315,15 @@ void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct) /** * @brief Initializes the SPIx peripheral according to the specified - * parameters in the I2S_InitStruct. - * @param SPIx: where x can be 1 to select the SPI peripheral. + * parameters in the I2S_InitStruct. + * @param SPIx: where x can be 1 to select the SPI peripheral (configured in I2S mode). * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that - * contains the configuration information for the specified SPI peripheral - * configured in I2S mode. - * @note - * The function calculates the optimal prescaler needed to obtain the most - * accurate audio frequency (depending on the I2S clock source, the PLL values - * and the product configuration). But in case the prescaler value is greater - * than 511, the default value (0x02) will be configured instead. + * contains the configuration information for the specified SPI peripheral + * configured in I2S mode. + * @note This function calculates the optimal prescaler needed to obtain the most + * accurate audio frequency (depending on the I2S clock source, the PLL values + * and the product configuration). But in case the prescaler value is greater + * than 511, the default value (0x02) will be configured instead. * @retval None */ void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct) @@ -427,7 +426,7 @@ void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct) * @brief Enables or disables the specified SPI peripheral. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral. * @param NewState: new state of the SPIx peripheral. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) @@ -450,14 +449,16 @@ void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) /** * @brief Enables or disables the TI Mode. - * @note This function can be called only after the SPI_Init() function has - * been called. - * @note When TI mode is selected, the control bits SSM, SSI, CPOL and CPHA - * are not taken into consideration and are configured by hardware - * respectively to the TI mode requirements. + * + * @note This function can be called only after the SPI_Init() function has + * been called. + * @note When TI mode is selected, the control bits SSM, SSI, CPOL and CPHA + * are not taken into consideration and are configured by hardware + * respectively to the TI mode requirements. + * * @param SPIx: where x can be 1 to select the SPI peripheral. * @param NewState: new state of the selected SPI TI communication mode. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState) @@ -482,7 +483,7 @@ void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState) * @brief Enables or disables the specified SPI peripheral (in I2S mode). * @param SPIx: where x can be 1 to select the SPI peripheral. * @param NewState: new state of the SPIx peripheral. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) @@ -506,20 +507,20 @@ void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) * @brief Configures the data size for the selected SPI. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral. * @param SPI_DataSize: specifies the SPI data size. - * For the SPIx peripheral this parameter can be one of the following values: - * @arg SPI_DataSize_4b: Set data size to 4 bits - * @arg SPI_DataSize_5b: Set data size to 5 bits - * @arg SPI_DataSize_6b: Set data size to 6 bits - * @arg SPI_DataSize_7b: Set data size to 7 bits - * @arg SPI_DataSize_8b: Set data size to 8 bits - * @arg SPI_DataSize_9b: Set data size to 9 bits - * @arg SPI_DataSize_10b: Set data size to 10 bits - * @arg SPI_DataSize_11b: Set data size to 11 bits - * @arg SPI_DataSize_12b: Set data size to 12 bits - * @arg SPI_DataSize_13b: Set data size to 13 bits - * @arg SPI_DataSize_14b: Set data size to 14 bits - * @arg SPI_DataSize_15b: Set data size to 15 bits - * @arg SPI_DataSize_16b: Set data size to 16 bits + * For the SPIx peripheral this parameter can be one of the following values: + * @arg SPI_DataSize_4b: Set data size to 4 bits + * @arg SPI_DataSize_5b: Set data size to 5 bits + * @arg SPI_DataSize_6b: Set data size to 6 bits + * @arg SPI_DataSize_7b: Set data size to 7 bits + * @arg SPI_DataSize_8b: Set data size to 8 bits + * @arg SPI_DataSize_9b: Set data size to 9 bits + * @arg SPI_DataSize_10b: Set data size to 10 bits + * @arg SPI_DataSize_11b: Set data size to 11 bits + * @arg SPI_DataSize_12b: Set data size to 12 bits + * @arg SPI_DataSize_13b: Set data size to 13 bits + * @arg SPI_DataSize_14b: Set data size to 14 bits + * @arg SPI_DataSize_15b: Set data size to 15 bits + * @arg SPI_DataSize_16b: Set data size to 16 bits * @retval None */ void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize) @@ -542,11 +543,11 @@ void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize) * @brief Configures the FIFO reception threshold for the selected SPI. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral. * @param SPI_RxFIFOThreshold: specifies the FIFO reception threshold. - * This parameter can be one of the following values: - * @arg SPI_RxFIFOThreshold_HF: RXNE event is generated if the FIFO - * level is greater or equal to 1/2. - * @arg SPI_RxFIFOThreshold_QF: RXNE event is generated if the FIFO - * level is greater or equal to 1/4. + * This parameter can be one of the following values: + * @arg SPI_RxFIFOThreshold_HF: RXNE event is generated if the FIFO + * level is greater or equal to 1/2. + * @arg SPI_RxFIFOThreshold_QF: RXNE event is generated if the FIFO + * level is greater or equal to 1/4. * @retval None */ void SPI_RxFIFOThresholdConfig(SPI_TypeDef* SPIx, uint16_t SPI_RxFIFOThreshold) @@ -566,9 +567,9 @@ void SPI_RxFIFOThresholdConfig(SPI_TypeDef* SPIx, uint16_t SPI_RxFIFOThreshold) * @brief Selects the data transfer direction in bidirectional mode for the specified SPI. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral. * @param SPI_Direction: specifies the data transfer direction in bidirectional mode. - * This parameter can be one of the following values: - * @arg SPI_Direction_Tx: Selects Tx transmission direction - * @arg SPI_Direction_Rx: Selects Rx receive direction + * This parameter can be one of the following values: + * @arg SPI_Direction_Tx: Selects Tx transmission direction + * @arg SPI_Direction_Rx: Selects Rx receive direction * @retval None */ void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction) @@ -590,13 +591,13 @@ void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction) /** * @brief Configures internally by software the NSS pin for the selected SPI. - * @note - This function can be called only after the SPI_Init() function has - * been called. + * @note This function can be called only after the SPI_Init() function has + * been called. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral. * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state. - * This parameter can be one of the following values: - * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally - * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally + * This parameter can be one of the following values: + * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally + * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally * @retval None */ void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft) @@ -619,11 +620,11 @@ void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSo /** * @brief Enables or disables the SS output for the selected SPI. - * @note - This function can be called only after the SPI_Init() function has - * been called and the NSS hardware management mode is selected. + * @note This function can be called only after the SPI_Init() function has + * been called and the NSS hardware management mode is selected. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral. * @param NewState: new state of the SPIx SS output. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState) @@ -645,14 +646,14 @@ void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState) /** * @brief Enables or disables the NSS pulse management mode. - * @note This function can be called only after the SPI_Init() function has - * been called. - * @note When TI mode is selected, the control bits NSSP is not taken into - * consideration and are configured by hardware respectively to the - * TI mode requirements. + * @note This function can be called only after the SPI_Init() function has + * been called. + * @note When TI mode is selected, the control bits NSSP is not taken into + * consideration and are configured by hardware respectively to the + * TI mode requirements. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral. * @param NewState: new state of the NSS pulse management mode. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void SPI_NSSPulseModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState) @@ -725,7 +726,7 @@ void SPI_SendData8(SPI_TypeDef* SPIx, uint8_t Data) /** * @brief Transmits a Data through the SPIx/I2Sx peripheral. * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select - * the SPI peripheral. + * the SPI peripheral. * @param Data: Data to be transmitted. * @retval None */ @@ -755,7 +756,7 @@ uint8_t SPI_ReceiveData8(SPI_TypeDef* SPIx) /** * @brief Returns the most recent received data by the SPIx peripheral. * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select - * the SPI peripheral. + * the SPI peripheral. * @retval The value of the received data. */ uint16_t SPI_I2S_ReceiveData16(SPI_TypeDef* SPIx) @@ -830,13 +831,13 @@ uint16_t SPI_I2S_ReceiveData16(SPI_TypeDef* SPIx) /** * @brief Configures the CRC calculation length for the selected SPI. - * @note - This function can be called only after the SPI_Init() function has - * been called. + * @note This function can be called only after the SPI_Init() function has + * been called. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral. * @param SPI_CRCLength: specifies the SPI CRC calculation length. - * This parameter can be one of the following values: - * @arg SPI_CRCLength_8b: Set CRC Calculation to 8 bits - * @arg SPI_CRCLength_16b: Set CRC Calculation to 16 bits + * This parameter can be one of the following values: + * @arg SPI_CRCLength_8b: Set CRC Calculation to 8 bits + * @arg SPI_CRCLength_16b: Set CRC Calculation to 16 bits * @retval None */ void SPI_CRCLengthConfig(SPI_TypeDef* SPIx, uint16_t SPI_CRCLength) @@ -854,11 +855,11 @@ void SPI_CRCLengthConfig(SPI_TypeDef* SPIx, uint16_t SPI_CRCLength) /** * @brief Enables or disables the CRC value calculation of the transferred bytes. - * @note - This function can be called only after the SPI_Init() function has - * been called. + * @note This function can be called only after the SPI_Init() function has + * been called. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral. * @param NewState: new state of the SPIx CRC value calculation. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState) @@ -897,9 +898,9 @@ void SPI_TransmitCRC(SPI_TypeDef* SPIx) * @brief Returns the transmit or the receive CRC register value for the specified SPI. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral. * @param SPI_CRC: specifies the CRC register to be read. - * This parameter can be one of the following values: - * @arg SPI_CRC_Tx: Selects Tx CRC register - * @arg SPI_CRC_Rx: Selects Rx CRC register + * This parameter can be one of the following values: + * @arg SPI_CRC_Tx: Selects Tx CRC register + * @arg SPI_CRC_Rx: Selects Rx CRC register * @retval The selected CRC register value.. */ uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC) @@ -957,13 +958,13 @@ uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx) /** * @brief Enables or disables the SPIx/I2Sx DMA interface. * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select - * the SPI peripheral. + * the SPI peripheral. * @param SPI_I2S_DMAReq: specifies the SPI DMA transfer request to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request - * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request + * This parameter can be any combination of the following values: + * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request + * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request * @param NewState: new state of the selected SPI DMA transfer request. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState) @@ -988,19 +989,19 @@ void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState /** * @brief Configures the number of data to transfer type(Even/Odd) for the DMA * last transfers and for the selected SPI. - * @note - This function have a meaning only if DMA mode is selected and if + * @note This function have a meaning only if DMA mode is selected and if * the packing mode is used (data length <= 8 and DMA transfer size halfword) * @param SPIx: where x can be 1 or 2 to select the SPI peripheral. * @param SPI_LastDMATransfer: specifies the SPI last DMA transfers state. - * This parameter can be one of the following values: - * @arg SPI_LastDMATransfer_TxEvenRxEven: Number of data for transmission Even - * and number of data for reception Even. - * @arg SPI_LastDMATransfer_TxOddRxEven: Number of data for transmission Odd - * and number of data for reception Even. - * @arg SPI_LastDMATransfer_TxEvenRxOdd: Number of data for transmission Even - * and number of data for reception Odd. - * @arg SPI_LastDMATransfer_TxOddRxOdd: Number of data for transmission Odd - * and number of data for reception Odd. + * This parameter can be one of the following values: + * @arg SPI_LastDMATransfer_TxEvenRxEven: Number of data for transmission Even + * and number of data for reception Even. + * @arg SPI_LastDMATransfer_TxOddRxEven: Number of data for transmission Odd + * and number of data for reception Even. + * @arg SPI_LastDMATransfer_TxEvenRxOdd: Number of data for transmission Even + * and number of data for reception Odd. + * @arg SPI_LastDMATransfer_TxOddRxOdd: Number of data for transmission Odd + * and number of data for reception Odd. * @retval None */ void SPI_LastDMATransferCmd(SPI_TypeDef* SPIx, uint16_t SPI_LastDMATransfer) @@ -1098,14 +1099,14 @@ void SPI_LastDMATransferCmd(SPI_TypeDef* SPIx, uint16_t SPI_LastDMATransfer) /** * @brief Enables or disables the specified SPI/I2S interrupts. * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select - * the SPI peripheral. + * the SPI peripheral. * @param SPI_I2S_IT: specifies the SPI interrupt source to be enabled or disabled. - * This parameter can be one of the following values: - * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask - * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask - * @arg SPI_I2S_IT_ERR: Error interrupt mask + * This parameter can be one of the following values: + * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask + * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask + * @arg SPI_I2S_IT_ERR: Error interrupt mask * @param NewState: new state of the specified SPI interrupt. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState) @@ -1139,10 +1140,10 @@ void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState New * @brief Returns the current SPIx Transmission FIFO filled level. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral. * @retval The Transmission FIFO filling state. - * - SPI_TransmissionFIFOStatus_Empty: when FIFO is empty - * - SPI_TransmissionFIFOStatus_1QuarterFull: if more than 1 quarter-full. - * - SPI_TransmissionFIFOStatus_HalfFull: if more than 1 half-full. - * - SPI_TransmissionFIFOStatus_Full: when FIFO is full. + * - SPI_TransmissionFIFOStatus_Empty: when FIFO is empty + * - SPI_TransmissionFIFOStatus_1QuarterFull: if more than 1 quarter-full. + * - SPI_TransmissionFIFOStatus_HalfFull: if more than 1 half-full. + * - SPI_TransmissionFIFOStatus_Full: when FIFO is full. */ uint16_t SPI_GetTransmissionFIFOStatus(SPI_TypeDef* SPIx) { @@ -1154,10 +1155,10 @@ uint16_t SPI_GetTransmissionFIFOStatus(SPI_TypeDef* SPIx) * @brief Returns the current SPIx Reception FIFO filled level. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral. * @retval The Reception FIFO filling state. - * - SPI_ReceptionFIFOStatus_Empty: when FIFO is empty - * - SPI_ReceptionFIFOStatus_1QuarterFull: if more than 1 quarter-full. - * - SPI_ReceptionFIFOStatus_HalfFull: if more than 1 half-full. - * - SPI_ReceptionFIFOStatus_Full: when FIFO is full. + * - SPI_ReceptionFIFOStatus_Empty: when FIFO is empty + * - SPI_ReceptionFIFOStatus_1QuarterFull: if more than 1 quarter-full. + * - SPI_ReceptionFIFOStatus_HalfFull: if more than 1 half-full. + * - SPI_ReceptionFIFOStatus_Full: when FIFO is full. */ uint16_t SPI_GetReceptionFIFOStatus(SPI_TypeDef* SPIx) { @@ -1168,18 +1169,18 @@ uint16_t SPI_GetReceptionFIFOStatus(SPI_TypeDef* SPIx) /** * @brief Checks whether the specified SPI flag is set or not. * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select - * the SPI peripheral. + * the SPI peripheral. * @param SPI_I2S_FLAG: specifies the SPI flag to check. - * This parameter can be one of the following values: - * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag. - * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag. - * @arg SPI_I2S_FLAG_BSY: Busy flag. - * @arg SPI_I2S_FLAG_OVR: Overrun flag. - * @arg SPI_I2S_FLAG_MODF: Mode Fault flag. - * @arg SPI_I2S_FLAG_CRCERR: CRC Error flag. - * @arg SPI_I2S_FLAG_FRE: TI frame format error flag. - * @arg I2S_FLAG_UDR: Underrun Error flag. - * @arg I2S_FLAG_CHSIDE: Channel Side flag. + * This parameter can be one of the following values: + * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag. + * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag. + * @arg SPI_I2S_FLAG_BSY: Busy flag. + * @arg SPI_I2S_FLAG_OVR: Overrun flag. + * @arg SPI_FLAG_MODF: Mode Fault flag. + * @arg SPI_FLAG_CRCERR: CRC Error flag. + * @arg SPI_I2S_FLAG_FRE: TI frame format error flag. + * @arg I2S_FLAG_UDR: Underrun Error flag. + * @arg I2S_FLAG_CHSIDE: Channel Side flag. * @retval The new state of SPI_I2S_FLAG (SET or RESET). */ FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) @@ -1208,13 +1209,13 @@ FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) * @brief Clears the SPIx CRC Error (CRCERR) flag. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral. * @param SPI_I2S_FLAG: specifies the SPI flag to clear. - * This function clears only CRCERR flag. - * @note OVR (OverRun error) flag is cleared by software sequence: a read - * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by - * a read operation to SPI_SR register (SPI_I2S_GetFlagStatus()). - * @note MODF (Mode Fault) flag is cleared by software sequence: a read/write - * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by - * a write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI). + * This function clears only CRCERR flag. + * @note OVR (OverRun error) flag is cleared by software sequence: a read + * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by + * a read operation to SPI_SR register (SPI_I2S_GetFlagStatus()). + * @note MODF (Mode Fault) flag is cleared by software sequence: a read/write + * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by + * a write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI). * @retval None */ void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) @@ -1230,15 +1231,15 @@ void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) /** * @brief Checks whether the specified SPI/I2S interrupt has occurred or not. * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select - * the SPI peripheral. + * the SPI peripheral. * @param SPI_I2S_IT: specifies the SPI interrupt source to check. - * This parameter can be one of the following values: - * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt. - * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt. - * @arg SPI_IT_MODF: Mode Fault interrupt. - * @arg SPI_I2S_IT_OVR: Overrun interrupt. - * @arg I2S_IT_UDR: Underrun interrupt. - * @arg SPI_I2S_IT_FRE: Format Error interrupt. + * This parameter can be one of the following values: + * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt. + * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt. + * @arg SPI_IT_MODF: Mode Fault interrupt. + * @arg SPI_I2S_IT_OVR: Overrun interrupt. + * @arg I2S_IT_UDR: Underrun interrupt. + * @arg SPI_I2S_IT_FRE: Format Error interrupt. * @retval The new state of SPI_I2S_IT (SET or RESET). */ ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) diff --git a/lib/src/peripherals/stm32f0xx_syscfg.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_syscfg.c old mode 100755 new mode 100644 similarity index 74% rename from lib/src/peripherals/stm32f0xx_syscfg.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_syscfg.c index 091b22e..e1cfd0b --- a/lib/src/peripherals/stm32f0xx_syscfg.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_syscfg.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_syscfg.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the SYSCFG peripheral: * + Remapping the memory mapped at 0x00000000 @@ -84,10 +84,10 @@ * @param None * @retval None * @note MEM_MODE bits are not affected by APB reset. - * MEM_MODE bits took the value from the user option bytes. + * @note MEM_MODE bits took the value from the user option bytes. * @note CFGR2 register is not affected by APB reset. - * CLABBB configuration bits are locked when set. - * To unlock the configuration, perform a system reset. + * @note CLABBB configuration bits are locked when set. + * @note To unlock the configuration, perform a system reset. */ void SYSCFG_DeInit(void) { @@ -105,10 +105,10 @@ void SYSCFG_DeInit(void) /** * @brief Configures the memory mapping at address 0x00000000. * @param SYSCFG_MemoryRemap: selects the memory remapping. - * This parameter can be one of the following values: - * @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000 - * @arg SYSCFG_MemoryRemap_SystemMemory: System Flash memory mapped at 0x00000000 - * @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM mapped at 0x00000000 + * This parameter can be one of the following values: + * @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000 + * @arg SYSCFG_MemoryRemap_SystemMemory: System Flash memory mapped at 0x00000000 + * @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM mapped at 0x00000000 * @retval None */ void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap) @@ -134,22 +134,21 @@ void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap) /** * @brief Configure the DMA channels remapping. * @param SYSCFG_DMARemap: selects the DMA channels remap. - * This parameter can be one of the following values: - * @arg SYSCFG_DMARemap_TIM17: Remap TIM17 DMA requests from channel1 to channel2 - * @arg SYSCFG_DMARemap_TIM16: Remap TIM16 DMA requests from channel3 to channel4 - * @arg SYSCFG_DMARemap_USART1Rx: Remap USART1 Rx DMA requests from channel3 to channel5 - * @arg SYSCFG_DMARemap_USART1Tx: Remap USART1 Tx DMA requests from channel2 to channel4 - * @arg SYSCFG_DMARemap_ADC1: Remap ADC1 DMA requests from channel1 to channel2 + * This parameter can be one of the following values: + * @arg SYSCFG_DMARemap_TIM17: Remap TIM17 DMA requests from channel1 to channel2 + * @arg SYSCFG_DMARemap_TIM16: Remap TIM16 DMA requests from channel3 to channel4 + * @arg SYSCFG_DMARemap_USART1Rx: Remap USART1 Rx DMA requests from channel3 to channel5 + * @arg SYSCFG_DMARemap_USART1Tx: Remap USART1 Tx DMA requests from channel2 to channel4 + * @arg SYSCFG_DMARemap_ADC1: Remap ADC1 DMA requests from channel1 to channel2 * @param NewState: new state of the DMA channel remapping. * This parameter can be: ENABLE or DISABLE. * @note When enabled, DMA channel of the selected peripheral is remapped * @note When disabled, Default DMA channel is mapped to the selected peripheral - * @note - * By default TIM17 DMA requests is mapped to channel 1 - * use SYSCFG_DMAChannelRemapConfig(SYSCFG_DMARemap_TIM17, Enable) - * to remap TIM17 DMA requests to channel 2 - * use SYSCFG_DMAChannelRemapConfig(SYSCFG_DMARemap_TIM17, Disable) - * to map TIM17 DMA requests to channel 1 (default mapping) + * @note By default TIM17 DMA requests is mapped to channel 1, + * use SYSCFG_DMAChannelRemapConfig(SYSCFG_DMARemap_TIM17, Enable) to remap + * TIM17 DMA requests to channel 2 and use + * SYSCFG_DMAChannelRemapConfig(SYSCFG_DMARemap_TIM17, Disable) to map + * TIM17 DMA requests to channel 1 (default mapping) * @retval None */ void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState) @@ -173,11 +172,11 @@ void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewS /** * @brief Configure the I2C fast mode plus driving capability. * @param SYSCFG_I2CFastModePlus: selects the pin. - * This parameter can be one of the following values: - * @arg SYSCFG_I2CFastModePlus_PB6: Configure fast mode plus driving capability for PB6 - * @arg SYSCFG_I2CFastModePlus_PB7: Configure fast mode plus driving capability for PB7 - * @arg SYSCFG_I2CFastModePlus_PB8: Configure fast mode plus driving capability for PB8 - * @arg SYSCFG_I2CFastModePlus_PB9: Configure fast mode plus driving capability for PB9 + * This parameter can be one of the following values: + * @arg SYSCFG_I2CFastModePlus_PB6: Configure fast mode plus driving capability for PB6 + * @arg SYSCFG_I2CFastModePlus_PB7: Configure fast mode plus driving capability for PB7 + * @arg SYSCFG_I2CFastModePlus_PB8: Configure fast mode plus driving capability for PB8 + * @arg SYSCFG_I2CFastModePlus_PB9: Configure fast mode plus driving capability for PB9 * @param NewState: new state of the DMA channel remapping. * This parameter can be: ENABLE or DISABLE. * @note ENABLE: Enable fast mode plus driving capability for selected pin @@ -204,8 +203,8 @@ void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalSta /** * @brief Selects the GPIO pin used as EXTI Line. - * @param EXTI_PortSourceGPIOx : selects the GPIO port to be used as source - * for EXTI lines where x can be (A, B, C, D or F). + * @param EXTI_PortSourceGPIOx: selects the GPIO port to be used as source + * for EXTI lines where x can be (A, B, C, D or F). * @param EXTI_PinSourcex: specifies the EXTI line to be configured. * This parameter can be EXTI_PinSourcex where x can be (0..15) * @retval None @@ -228,10 +227,10 @@ void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex * @note The selected configuration is locked and can be unlocked by system reset * @param SYSCFG_Break: selects the configuration to be connected to break * input of TIM1 - * This parameter can be any combination of the following values: - * @arg SYSCFG_Break_PVD: Connects the PVD event to the Break Input of TIM1. - * @arg SYSCFG_Break_SRAMParity: Connects the SRAM_PARITY error signal to the Break Input of TIM1 . - * @arg SYSCFG_Break_Lockup: Connects Lockup output of CortexM0 to the break input of TIM1. + * This parameter can be any combination of the following values: + * @arg SYSCFG_Break_PVD: Connects the PVD event to the Break Input of TIM1. + * @arg SYSCFG_Break_SRAMParity: Connects the SRAM_PARITY error signal to the Break Input of TIM1 . + * @arg SYSCFG_Break_Lockup: Connects Lockup output of CortexM0 to the break input of TIM1. * @retval None */ void SYSCFG_BreakConfig(uint32_t SYSCFG_Break) @@ -245,8 +244,8 @@ void SYSCFG_BreakConfig(uint32_t SYSCFG_Break) /** * @brief Checks whether the specified SYSCFG flag is set or not. * @param SYSCFG_Flag: specifies the SYSCFG flag to check. - * This parameter can be one of the following values: - * @arg SYSCFG_FLAG_PE: SRAM parity error flag. + * This parameter can be one of the following values: + * @arg SYSCFG_FLAG_PE: SRAM parity error flag. * @retval The new state of SYSCFG_Flag (SET or RESET). */ FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag) @@ -274,8 +273,8 @@ FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag) /** * @brief Clear the selected SYSCFG flag. * @param SYSCFG_Flag: selects the flag to be cleared. - * This parameter can be any combination of the following values: - * @arg SYSCFG_FLAG_PE: SRAM parity error flag. + * This parameter can be any combination of the following values: + * @arg SYSCFG_FLAG_PE: SRAM parity error flag. * @retval None */ void SYSCFG_ClearFlag(uint32_t SYSCFG_Flag) diff --git a/lib/src/peripherals/stm32f0xx_tim.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_tim.c old mode 100755 new mode 100644 similarity index 76% rename from lib/src/peripherals/stm32f0xx_tim.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_tim.c index 6d13167..54a9b1f --- a/lib/src/peripherals/stm32f0xx_tim.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_tim.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_tim.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the TIM peripheral: * + TimeBase management @@ -295,8 +295,8 @@ void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseIn /** * @brief Fills each TIM_TimeBaseInitStruct member with its default value. - * @param TIM_TimeBaseInitStruct : pointer to a TIM_TimeBaseInitTypeDef - * structure which will be initialized. + * @param TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef structure + * which will be initialized. * @retval None */ void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct) @@ -314,9 +314,9 @@ void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct) * @param TIMx: where x can be 1, 2, 3, 6, 14, 15, 16 and 17 to select the TIM peripheral. * @param Prescaler: specifies the Prescaler Register value * @param TIM_PSCReloadMode: specifies the TIM Prescaler Reload mode - * This parameter can be one of the following values: - * @arg TIM_PSCReloadMode_Update: The Prescaler is loaded at the update event. - * @arg TIM_PSCReloadMode_Immediate: The Prescaler is loaded immediatly. + * This parameter can be one of the following values: + * @arg TIM_PSCReloadMode_Update: The Prescaler is loaded at the update event. + * @arg TIM_PSCReloadMode_Immediate: The Prescaler is loaded immediatly. * @retval None */ void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode) @@ -335,12 +335,12 @@ void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSC * @brief Specifies the TIMx Counter Mode to be used. * @param TIMx: where x can be 1, 2, or 3 to select the TIM peripheral. * @param TIM_CounterMode: specifies the Counter Mode to be used - * This parameter can be one of the following values: - * @arg TIM_CounterMode_Up: TIM Up Counting Mode - * @arg TIM_CounterMode_Down: TIM Down Counting Mode - * @arg TIM_CounterMode_CenterAligned1: TIM Center Aligned Mode1 - * @arg TIM_CounterMode_CenterAligned2: TIM Center Aligned Mode2 - * @arg TIM_CounterMode_CenterAligned3: TIM Center Aligned Mode3 + * This parameter can be one of the following values: + * @arg TIM_CounterMode_Up: TIM Up Counting Mode + * @arg TIM_CounterMode_Down: TIM Down Counting Mode + * @arg TIM_CounterMode_CenterAligned1: TIM Center Aligned Mode1 + * @arg TIM_CounterMode_CenterAligned2: TIM Center Aligned Mode2 + * @arg TIM_CounterMode_CenterAligned3: TIM Center Aligned Mode3 * @retval None */ void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode) @@ -426,7 +426,7 @@ uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx) * @param TIMx: where x can be 1, 2, 3, 6, 14, 15, 16 and 17 to select the TIM * peripheral. * @param NewState: new state of the TIMx UDIS bit - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState) @@ -452,11 +452,11 @@ void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState) * @param TIMx: where x can be 1, 2, 3, 6, 14, 15, 16 and 17 to select the TIM * peripheral. * @param TIM_UpdateSource: specifies the Update source. - * This parameter can be one of the following values: - * @arg TIM_UpdateSource_Regular: Source of update is the counter overflow/underflow - or the setting of UG bit, or an update generation - through the slave mode controller. - * @arg TIM_UpdateSource_Global: Source of update is counter overflow/underflow. + * This parameter can be one of the following values: + * @arg TIM_UpdateSource_Regular: Source of update is the counter + * overflow/underflow or the setting of UG bit, or an update + * generation through the slave mode controller. + * @arg TIM_UpdateSource_Global: Source of update is counter overflow/underflow. * @retval None */ void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource) @@ -482,7 +482,7 @@ void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource) * @param TIMx: where x can be 1, 2, 3, 6, 14, 15, 16 and 17 to select the TIM * peripheral. * @param NewState: new state of the TIMx peripheral Preload register - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState) @@ -508,9 +508,9 @@ void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState) * @param TIMx: where x can be 1, 2, 3, 6, 14, 15, 16 and 17 to select the TIM * peripheral. * @param TIM_OPMode: specifies the OPM Mode to be used. - * This parameter can be one of the following values: - * @arg TIM_OPMode_Single - * @arg TIM_OPMode_Repetitive + * This parameter can be one of the following values: + * @arg TIM_OPMode_Single + * @arg TIM_OPMode_Repetitive * @retval None */ void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode) @@ -529,10 +529,10 @@ void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode) * @brief Sets the TIMx Clock Division value. * @param TIMx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TIM peripheral. * @param TIM_CKD: specifies the clock division value. - * This parameter can be one of the following value: - * @arg TIM_CKD_DIV1: TDTS = Tck_tim - * @arg TIM_CKD_DIV2: TDTS = 2*Tck_tim - * @arg TIM_CKD_DIV4: TDTS = 4*Tck_tim + * This parameter can be one of the following value: + * @arg TIM_CKD_DIV1: TDTS = Tck_tim + * @arg TIM_CKD_DIV2: TDTS = 2*Tck_tim + * @arg TIM_CKD_DIV4: TDTS = 4*Tck_tim * @retval None */ void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD) @@ -552,7 +552,7 @@ void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD) * @param TIMx: where x can be 1, 2, 3, 6, 14, 15, 16 and 17to select the TIMx * peripheral. * @param NewState: new state of the TIMx peripheral. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState) @@ -606,11 +606,11 @@ void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState) * @{ */ /** - * @brief Configures the: Break feature, dead time, Lock level, the OSSI, - * the OSSR State and the AOE(automatic output enable). + * @brief Configures the: Break feature, dead time, Lock level, OSSI/OSSR State + * and the AOE(automatic output enable). * @param TIMx: where x can be 1, 15, 16 or 17 to select the TIM * @param TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure that - * contains the BDTR Register configuration information for the TIM peripheral. + * contains the BDTR Register configuration information for the TIM peripheral. * @retval None */ void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct) @@ -634,7 +634,7 @@ void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct) /** * @brief Fills each TIM_BDTRInitStruct member with its default value. * @param TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure which - * will be initialized. + * will be initialized. * @retval None */ void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct) @@ -653,7 +653,7 @@ void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct) * @brief Enables or disables the TIM peripheral Main Outputs. * @param TIMx: where x can be 1, 15, 16 or 17 to select the TIMx peripheral. * @param NewState: new state of the TIM peripheral Main Outputs. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState) @@ -1031,7 +1031,7 @@ void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) /** * @brief Fills each TIM_OCInitStruct member with its default value. - * @param TIM_OCInitStruct : pointer to a TIM_OCInitTypeDef structure which will + * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure which will * be initialized. * @retval None */ @@ -1055,20 +1055,20 @@ void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct) * User has to enable this channel using TIM_CCxCmd and TIM_CCxNCmd functions. * @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral. * @param TIM_Channel: specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 - * @arg TIM_Channel_4: TIM Channel 4 + * This parameter can be one of the following values: + * @arg TIM_Channel_1: TIM Channel 1 + * @arg TIM_Channel_2: TIM Channel 2 + * @arg TIM_Channel_3: TIM Channel 3 + * @arg TIM_Channel_4: TIM Channel 4 * @param TIM_OCMode: specifies the TIM Output Compare Mode. - * This parameter can be one of the following values: - * @arg TIM_OCMode_Timing - * @arg TIM_OCMode_Active - * @arg TIM_OCMode_Toggle - * @arg TIM_OCMode_PWM1 - * @arg TIM_OCMode_PWM2 - * @arg TIM_ForcedAction_Active - * @arg TIM_ForcedAction_InActive + * This parameter can be one of the following values: + * @arg TIM_OCMode_Timing + * @arg TIM_OCMode_Active + * @arg TIM_OCMode_Toggle + * @arg TIM_OCMode_PWM1 + * @arg TIM_OCMode_PWM2 + * @arg TIM_ForcedAction_Active + * @arg TIM_ForcedAction_InActive * @retval None */ void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode) @@ -1174,9 +1174,9 @@ void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4) * @brief Forces the TIMx output 1 waveform to active or inactive level. * @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral. * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * @arg TIM_ForcedAction_Active: Force active level on OC1REF - * @arg TIM_ForcedAction_InActive: Force inactive level on OC1REF. + * This parameter can be one of the following values: + * @arg TIM_ForcedAction_Active: Force active level on OC1REF + * @arg TIM_ForcedAction_InActive: Force inactive level on OC1REF. * @retval None */ void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) @@ -1196,12 +1196,11 @@ void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) /** * @brief Forces the TIMx output 2 waveform to active or inactive level. - * @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM - * peripheral. + * @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral. * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * @arg TIM_ForcedAction_Active: Force active level on OC2REF - * @arg TIM_ForcedAction_InActive: Force inactive level on OC2REF. + * This parameter can be one of the following values: + * @arg TIM_ForcedAction_Active: Force active level on OC2REF + * @arg TIM_ForcedAction_InActive: Force inactive level on OC2REF. * @retval None */ void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) @@ -1225,9 +1224,9 @@ void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) * @brief Forces the TIMx output 3 waveform to active or inactive level. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * @arg TIM_ForcedAction_Active: Force active level on OC3REF - * @arg TIM_ForcedAction_InActive: Force inactive level on OC3REF. + * This parameter can be one of the following values: + * @arg TIM_ForcedAction_Active: Force active level on OC3REF + * @arg TIM_ForcedAction_InActive: Force inactive level on OC3REF. * @retval None */ void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) @@ -1251,9 +1250,9 @@ void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) * @brief Forces the TIMx output 4 waveform to active or inactive level. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * @arg TIM_ForcedAction_Active: Force active level on OC4REF - * @arg TIM_ForcedAction_InActive: Force inactive level on OC4REF. + * This parameter can be one of the following values: + * @arg TIM_ForcedAction_Active: Force active level on OC4REF + * @arg TIM_ForcedAction_InActive: Force inactive level on OC4REF. * @retval None */ void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) @@ -1274,10 +1273,9 @@ void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) /** * @brief Sets or Resets the TIM peripheral Capture Compare Preload Control bit. - * @param TIMx: where x can be 1, 2, 3 or 15 - * to select the TIMx peripheral + * @param TIMx: where x can be 1, 2, 3 or 15 to select the TIMx peripheral * @param NewState: new state of the Capture Compare Preload Control bit - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState) @@ -1302,9 +1300,9 @@ void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState) * @brief Enables or disables the TIMx peripheral Preload register on CCR1. * @param TIMx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TIM peripheral. * @param TIM_OCPreload: new state of the TIMx peripheral Preload register - * This parameter can be one of the following values: - * @arg TIM_OCPreload_Enable - * @arg TIM_OCPreload_Disable + * This parameter can be one of the following values: + * @arg TIM_OCPreload_Enable + * @arg TIM_OCPreload_Disable * @retval None */ void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) @@ -1327,9 +1325,9 @@ void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) * @brief Enables or disables the TIMx peripheral Preload register on CCR2. * @param TIMx: where x can be 1, 2, 3 and 15 to select the TIM peripheral. * @param TIM_OCPreload: new state of the TIMx peripheral Preload register - * This parameter can be one of the following values: - * @arg TIM_OCPreload_Enable - * @arg TIM_OCPreload_Disable + * This parameter can be one of the following values: + * @arg TIM_OCPreload_Enable + * @arg TIM_OCPreload_Disable * @retval None */ void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) @@ -1352,9 +1350,9 @@ void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) * @brief Enables or disables the TIMx peripheral Preload register on CCR3. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_OCPreload: new state of the TIMx peripheral Preload register - * This parameter can be one of the following values: - * @arg TIM_OCPreload_Enable - * @arg TIM_OCPreload_Disable + * This parameter can be one of the following values: + * @arg TIM_OCPreload_Enable + * @arg TIM_OCPreload_Disable * @retval None */ void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) @@ -1378,9 +1376,9 @@ void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) * @brief Enables or disables the TIMx peripheral Preload register on CCR4. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_OCPreload: new state of the TIMx peripheral Preload register - * This parameter can be one of the following values: - * @arg TIM_OCPreload_Enable - * @arg TIM_OCPreload_Disable + * This parameter can be one of the following values: + * @arg TIM_OCPreload_Enable + * @arg TIM_OCPreload_Disable * @retval None */ void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) @@ -1404,9 +1402,9 @@ void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) * @brief Configures the TIMx Output Compare 1 Fast feature. * @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral. * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCFast_Enable: TIM output compare fast enable - * @arg TIM_OCFast_Disable: TIM output compare fast disable + * This parameter can be one of the following values: + * @arg TIM_OCFast_Enable: TIM output compare fast enable + * @arg TIM_OCFast_Disable: TIM output compare fast disable * @retval None */ void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) @@ -1431,9 +1429,9 @@ void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) * @brief Configures the TIMx Output Compare 2 Fast feature. * @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral. * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCFast_Enable: TIM output compare fast enable - * @arg TIM_OCFast_Disable: TIM output compare fast disable + * This parameter can be one of the following values: + * @arg TIM_OCFast_Enable: TIM output compare fast enable + * @arg TIM_OCFast_Disable: TIM output compare fast disable * @retval None */ void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) @@ -1458,9 +1456,9 @@ void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) * @brief Configures the TIMx Output Compare 3 Fast feature. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCFast_Enable: TIM output compare fast enable - * @arg TIM_OCFast_Disable: TIM output compare fast disable + * This parameter can be one of the following values: + * @arg TIM_OCFast_Enable: TIM output compare fast enable + * @arg TIM_OCFast_Disable: TIM output compare fast disable * @retval None */ void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) @@ -1485,9 +1483,9 @@ void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) * @brief Configures the TIMx Output Compare 4 Fast feature. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCFast_Enable: TIM output compare fast enable - * @arg TIM_OCFast_Disable: TIM output compare fast disable + * This parameter can be one of the following values: + * @arg TIM_OCFast_Enable: TIM output compare fast enable + * @arg TIM_OCFast_Disable: TIM output compare fast disable * @retval None */ void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) @@ -1512,9 +1510,9 @@ void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) * @brief Clears or safeguards the OCREF1 signal on an external event * @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral. * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCClear_Enable: TIM Output clear enable - * @arg TIM_OCClear_Disable: TIM Output clear disable + * This parameter can be one of the following values: + * @arg TIM_OCClear_Enable: TIM Output clear enable + * @arg TIM_OCClear_Disable: TIM Output clear disable * @retval None */ void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) @@ -1538,10 +1536,9 @@ void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) * @brief Clears or safeguards the OCREF2 signal on an external event * @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral. * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. - - * This parameter can be one of the following values: - * @arg TIM_OCClear_Enable: TIM Output clear enable - * @arg TIM_OCClear_Disable: TIM Output clear disable + * This parameter can be one of the following values: + * @arg TIM_OCClear_Enable: TIM Output clear enable + * @arg TIM_OCClear_Disable: TIM Output clear disable * @retval None */ void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) @@ -1565,9 +1562,9 @@ void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) * @brief Clears or safeguards the OCREF3 signal on an external event * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCClear_Enable: TIM Output clear enable - * @arg TIM_OCClear_Disable: TIM Output clear disable + * This parameter can be one of the following values: + * @arg TIM_OCClear_Enable: TIM Output clear enable + * @arg TIM_OCClear_Disable: TIM Output clear disable * @retval None */ void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) @@ -1591,9 +1588,9 @@ void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) * @brief Clears or safeguards the OCREF4 signal on an external event * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCClear_Enable: TIM Output clear enable - * @arg TIM_OCClear_Disable: TIM Output clear disable + * This parameter can be one of the following values: + * @arg TIM_OCClear_Enable: TIM Output clear enable + * @arg TIM_OCClear_Disable: TIM Output clear disable * @retval None */ void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) @@ -1617,9 +1614,9 @@ void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) * @brief Configures the TIMx channel 1 polarity. * @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral. * @param TIM_OCPolarity: specifies the OC1 Polarity - * This parmeter can be one of the following values: - * @arg TIM_OCPolarity_High: Output Compare active high - * @arg TIM_OCPolarity_Low: Output Compare active low + * This parmeter can be one of the following values: + * @arg TIM_OCPolarity_High: Output Compare active high + * @arg TIM_OCPolarity_Low: Output Compare active low * @retval None */ void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) @@ -1642,9 +1639,9 @@ void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) * @brief Configures the TIMx Channel 1N polarity. * @param TIMx: where x can be 1, 15, 16 or 17 to select the TIM peripheral. * @param TIM_OCNPolarity: specifies the OC1N Polarity - * This parmeter can be one of the following values: - * @arg TIM_OCNPolarity_High: Output Compare active high - * @arg TIM_OCNPolarity_Low: Output Compare active low + * This parmeter can be one of the following values: + * @arg TIM_OCNPolarity_High: Output Compare active high + * @arg TIM_OCNPolarity_Low: Output Compare active low * @retval None */ void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) @@ -1666,9 +1663,9 @@ void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) * @brief Configures the TIMx channel 2 polarity. * @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral. * @param TIM_OCPolarity: specifies the OC2 Polarity - * This parmeter can be one of the following values: - * @arg TIM_OCPolarity_High: Output Compare active high - * @arg TIM_OCPolarity_Low: Output Compare active low + * This parmeter can be one of the following values: + * @arg TIM_OCPolarity_High: Output Compare active high + * @arg TIM_OCPolarity_Low: Output Compare active low * @retval None */ void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) @@ -1691,9 +1688,9 @@ void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) * @brief Configures the TIMx Channel 2N polarity. * @param TIMx: where x can be 1 to select the TIM peripheral. * @param TIM_OCNPolarity: specifies the OC2N Polarity - * This parmeter can be one of the following values: - * @arg TIM_OCNPolarity_High: Output Compare active high - * @arg TIM_OCNPolarity_Low: Output Compare active low + * This parmeter can be one of the following values: + * @arg TIM_OCNPolarity_High: Output Compare active high + * @arg TIM_OCNPolarity_Low: Output Compare active low * @retval None */ void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) @@ -1715,9 +1712,9 @@ void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) * @brief Configures the TIMx channel 3 polarity. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_OCPolarity: specifies the OC3 Polarity - * This parmeter can be one of the following values: - * @arg TIM_OCPolarity_High: Output Compare active high - * @arg TIM_OCPolarity_Low: Output Compare active low + * This parmeter can be one of the following values: + * @arg TIM_OCPolarity_High: Output Compare active high + * @arg TIM_OCPolarity_Low: Output Compare active low * @retval None */ void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) @@ -1740,9 +1737,9 @@ void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) * @brief Configures the TIMx Channel 3N polarity. * @param TIMx: where x can be 1 to select the TIM peripheral. * @param TIM_OCNPolarity: specifies the OC3N Polarity - * This parmeter can be one of the following values: - * @arg TIM_OCNPolarity_High: Output Compare active high - * @arg TIM_OCNPolarity_Low: Output Compare active low + * This parmeter can be one of the following values: + * @arg TIM_OCNPolarity_High: Output Compare active high + * @arg TIM_OCNPolarity_Low: Output Compare active low * @retval None */ void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) @@ -1761,14 +1758,13 @@ void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) TIMx->CCER = tmpccer; } - /** * @brief Configures the TIMx channel 4 polarity. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_OCPolarity: specifies the OC4 Polarity - * This parmeter can be one of the following values: - * @arg TIM_OCPolarity_High: Output Compare active high - * @arg TIM_OCPolarity_Low: Output Compare active low + * This parmeter can be one of the following values: + * @arg TIM_OCPolarity_High: Output Compare active high + * @arg TIM_OCPolarity_Low: Output Compare active low * @retval None */ void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) @@ -1791,9 +1787,9 @@ void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) * @brief Selects the OCReference Clear source. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_OCReferenceClear: specifies the OCReference Clear source. - * This parameter can be one of the following values: - * @arg TIM_OCReferenceClear_ETRF: The internal OCreference clear input is connected to ETRF. - * @arg TIM_OCReferenceClear_OCREFCLR: The internal OCreference clear input is connected to OCREF_CLR input. + * This parameter can be one of the following values: + * @arg TIM_OCReferenceClear_ETRF: The internal OCreference clear input is connected to ETRF. + * @arg TIM_OCReferenceClear_OCREFCLR: The internal OCreference clear input is connected to OCREF_CLR input. * @retval None */ void TIM_SelectOCREFClear(TIM_TypeDef* TIMx, uint16_t TIM_OCReferenceClear) @@ -1811,13 +1807,13 @@ void TIM_SelectOCREFClear(TIM_TypeDef* TIMx, uint16_t TIM_OCReferenceClear) * @brief Enables or disables the TIM Capture Compare Channel x. * @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral. * @param TIM_Channel: specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 - * @arg TIM_Channel_4: TIM Channel 4 + * This parameter can be one of the following values: + * @arg TIM_Channel_1: TIM Channel 1 + * @arg TIM_Channel_2: TIM Channel 2 + * @arg TIM_Channel_3: TIM Channel 3 + * @arg TIM_Channel_4: TIM Channel 4 * @param TIM_CCx: specifies the TIM Channel CCxE bit new state. - * This parameter can be: TIM_CCx_Enable or TIM_CCx_Disable. + * This parameter can be: TIM_CCx_Enable or TIM_CCx_Disable. * @retval None */ void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx) @@ -1841,12 +1837,12 @@ void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx) * @brief Enables or disables the TIM Capture Compare Channel xN. * @param TIMx: where x can be 1, 15, 16 or 17 to select the TIM peripheral. * @param TIM_Channel: specifies the TIM Channel - * This parmeter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 + * This parmeter can be one of the following values: + * @arg TIM_Channel_1: TIM Channel 1 + * @arg TIM_Channel_2: TIM Channel 2 + * @arg TIM_Channel_3: TIM Channel 3 * @param TIM_CCxN: specifies the TIM Channel CCxNE bit new state. - * This parameter can be: TIM_CCxN_Enable or TIM_CCxN_Disable. + * This parameter can be: TIM_CCxN_Enable or TIM_CCxN_Disable. * @retval None */ void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN) @@ -1871,7 +1867,7 @@ void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN) * @brief Selects the TIM peripheral Commutation event. * @param TIMx: where x can be 1, 15, 16 or 17 to select the TIMx peripheral * @param NewState: new state of the Commutation event. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState) @@ -2004,7 +2000,7 @@ void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct) /** * @brief Fills each TIM_ICInitStruct member with its default value. - * @param TIM_ICInitStruct : pointer to a TIM_ICInitTypeDef structure which will + * @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure which will * be initialized. * @retval None */ @@ -2137,11 +2133,11 @@ uint32_t TIM_GetCapture4(TIM_TypeDef* TIMx) * @brief Sets the TIMx Input Capture 1 prescaler. * @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral. * @param TIM_ICPSC: specifies the Input Capture1 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events + * This parameter can be one of the following values: + * @arg TIM_ICPSC_DIV1: no prescaler + * @arg TIM_ICPSC_DIV2: capture is done once every 2 events + * @arg TIM_ICPSC_DIV4: capture is done once every 4 events + * @arg TIM_ICPSC_DIV8: capture is done once every 8 events * @retval None */ void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) @@ -2160,11 +2156,11 @@ void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) * @brief Sets the TIMx Input Capture 2 prescaler. * @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral. * @param TIM_ICPSC: specifies the Input Capture2 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events + * This parameter can be one of the following values: + * @arg TIM_ICPSC_DIV1: no prescaler + * @arg TIM_ICPSC_DIV2: capture is done once every 2 events + * @arg TIM_ICPSC_DIV4: capture is done once every 4 events + * @arg TIM_ICPSC_DIV8: capture is done once every 8 events * @retval None */ void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) @@ -2183,11 +2179,11 @@ void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) * @brief Sets the TIMx Input Capture 3 prescaler. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_ICPSC: specifies the Input Capture3 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events + * This parameter can be one of the following values: + * @arg TIM_ICPSC_DIV1: no prescaler + * @arg TIM_ICPSC_DIV2: capture is done once every 2 events + * @arg TIM_ICPSC_DIV4: capture is done once every 4 events + * @arg TIM_ICPSC_DIV8: capture is done once every 8 events * @retval None */ void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) @@ -2206,11 +2202,11 @@ void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) * @brief Sets the TIMx Input Capture 4 prescaler. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_ICPSC: specifies the Input Capture4 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events + * This parameter can be one of the following values: + * @arg TIM_ICPSC_DIV1: no prescaler + * @arg TIM_ICPSC_DIV2: capture is done once every 2 events + * @arg TIM_ICPSC_DIV4: capture is done once every 4 events + * @arg TIM_ICPSC_DIV8: capture is done once every 8 events * @retval None */ void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) @@ -2245,24 +2241,24 @@ void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) * @brief Enables or disables the specified TIM interrupts. * @param TIMx: where x can be 1, 2, 3, 6, 14, 15, 16 or 17 to select the TIMx peripheral. * @param TIM_IT: specifies the TIM interrupts sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg TIM_IT_Update: TIM update Interrupt source - * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source - * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source - * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source - * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source - * @arg TIM_IT_COM: TIM Commutation Interrupt source - * @arg TIM_IT_Trigger: TIM Trigger Interrupt source - * @arg TIM_IT_Break: TIM Break Interrupt source - * @note - * - TIM6 can only generate an update interrupt. - * - TIM15 can have only TIM_IT_Update, TIM_IT_CC1, - * TIM_IT_CC2 or TIM_IT_Trigger. - * - TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. - * - TIM_IT_Break is used only with TIM1 and TIM15. - * - TIM_IT_COM is used only with TIM1, TIM15, TIM16 and TIM17. + * This parameter can be any combination of the following values: + * @arg TIM_IT_Update: TIM update Interrupt source + * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source + * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source + * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source + * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source + * @arg TIM_IT_COM: TIM Commutation Interrupt source + * @arg TIM_IT_Trigger: TIM Trigger Interrupt source + * @arg TIM_IT_Break: TIM Break Interrupt source + * + * @note TIM6 can only generate an update interrupt. + * @note TIM15 can have only TIM_IT_Update, TIM_IT_CC1,TIM_IT_CC2 or TIM_IT_Trigger. + * @note TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. + * @note TIM_IT_Break is used only with TIM1 and TIM15. + * @note TIM_IT_COM is used only with TIM1, TIM15, TIM16 and TIM17. + * * @param NewState: new state of the TIM interrupts. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState) @@ -2289,20 +2285,21 @@ void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState) * @param TIMx: where x can be 1, 2, 3, 6, 14, 15, 16 or 17 to select the * TIM peripheral. * @param TIM_EventSource: specifies the event source. - * This parameter can be one or more of the following values: - * @arg TIM_EventSource_Update: Timer update Event source - * @arg TIM_EventSource_CC1: Timer Capture Compare 1 Event source - * @arg TIM_EventSource_CC2: Timer Capture Compare 2 Event source - * @arg TIM_EventSource_CC3: Timer Capture Compare 3 Event source - * @arg TIM_EventSource_CC4: Timer Capture Compare 4 Event source - * @arg TIM_EventSource_COM: Timer COM event source - * @arg TIM_EventSource_Trigger: Timer Trigger Event source - * @arg TIM_EventSource_Break: Timer Break event source - * @note - * - TIM6 can only generate an update event. - * - TIM9 can only generate an update event, Capture Compare 1 event, - * Capture Compare 2 event and TIM_EventSource_Trigger. - * - TIM_EventSource_COM and TIM_EventSource_Break are used only with TIM1. + * This parameter can be one or more of the following values: + * @arg TIM_EventSource_Update: Timer update Event source + * @arg TIM_EventSource_CC1: Timer Capture Compare 1 Event source + * @arg TIM_EventSource_CC2: Timer Capture Compare 2 Event source + * @arg TIM_EventSource_CC3: Timer Capture Compare 3 Event source + * @arg TIM_EventSource_CC4: Timer Capture Compare 4 Event source + * @arg TIM_EventSource_COM: Timer COM event source + * @arg TIM_EventSource_Trigger: Timer Trigger Event source + * @arg TIM_EventSource_Break: Timer Break event source + * + * @note TIM6 can only generate an update event. + * @note TIM9 can only generate an update event, Capture Compare 1 event, + * Capture Compare 2 event and TIM_EventSource_Trigger. + * @note TIM_EventSource_COM and TIM_EventSource_Break are used only with TIM1. + * * @retval None */ void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource) @@ -2318,26 +2315,26 @@ void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource) * @brief Checks whether the specified TIM flag is set or not. * @param TIMx: where x can be 1, 2, 3, 6, 14, 15, 16 or 17 to select the TIM peripheral. * @param TIM_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg TIM_FLAG_Update: TIM update Flag - * @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag - * @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag - * @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag - * @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag - * @arg TIM_FLAG_COM: TIM Commutation Flag - * @arg TIM_FLAG_Trigger: TIM Trigger Flag - * @arg TIM_FLAG_Break: TIM Break Flag - * @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag - * @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag - * @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag - * @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag - * @note - * - TIM6 can have only one update flag. - * - TIM15 can have only TIM_FLAG_Update, TIM_FLAG_CC1, TIM_FLAG_CC2 or - * TIM_FLAG_Trigger. - * - TIM14, TIM16 and TIM17 can have TIM_FLAG_Update or TIM_FLAG_CC1. - * - TIM_FLAG_Break is used only with TIM1 and TIM15. - * - TIM_FLAG_COM is used only with TIM1 TIM15, TIM16 and TIM17. + * This parameter can be one of the following values: + * @arg TIM_FLAG_Update: TIM update Flag + * @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag + * @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag + * @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag + * @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag + * @arg TIM_FLAG_COM: TIM Commutation Flag + * @arg TIM_FLAG_Trigger: TIM Trigger Flag + * @arg TIM_FLAG_Break: TIM Break Flag + * @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag + * @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag + * @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag + * @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag + * + * @note TIM6 can have only one update flag. + * @note TIM15 can have only TIM_FLAG_Update, TIM_FLAG_CC1, TIM_FLAG_CC2 or TIM_FLAG_Trigger. + * @note TIM14, TIM16 and TIM17 can have TIM_FLAG_Update or TIM_FLAG_CC1. + * @note TIM_FLAG_Break is used only with TIM1 and TIM15. + * @note TIM_FLAG_COM is used only with TIM1 TIM15, TIM16 and TIM17. + * * @retval The new state of TIM_FLAG (SET or RESET). */ FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG) @@ -2363,26 +2360,27 @@ FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG) * @brief Clears the TIMx's pending flags. * @param TIMx: where x can be 1, 2, 3, 6, 14, 15, 16 or 17 to select the TIM peripheral. * @param TIM_FLAG: specifies the flag bit to clear. - * This parameter can be any combination of the following values: - * @arg TIM_FLAG_Update: TIM update Flag - * @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag - * @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag - * @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag - * @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag - * @arg TIM_FLAG_COM: TIM Commutation Flag - * @arg TIM_FLAG_Trigger: TIM Trigger Flag - * @arg TIM_FLAG_Break: TIM Break Flag - * @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag - * @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag - * @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag - * @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag - * @note - * - TIM6 can have only one update flag. - * - TIM15 can have only TIM_FLAG_Update, TIM_FLAG_CC1,TIM_FLAG_CC2 or - * TIM_FLAG_Trigger. - * - TIM14, TIM16 and TIM17 can have TIM_FLAG_Update or TIM_FLAG_CC1. - * - TIM_FLAG_Break is used only with TIM1 and TIM15. - * - TIM_FLAG_COM is used only with TIM1, TIM15, TIM16 and TIM17. + * This parameter can be any combination of the following values: + * @arg TIM_FLAG_Update: TIM update Flag + * @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag + * @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag + * @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag + * @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag + * @arg TIM_FLAG_COM: TIM Commutation Flag + * @arg TIM_FLAG_Trigger: TIM Trigger Flag + * @arg TIM_FLAG_Break: TIM Break Flag + * @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag + * @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag + * @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag + * @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag + * + * @note TIM6 can have only one update flag. + * @note TIM15 can have only TIM_FLAG_Update, TIM_FLAG_CC1,TIM_FLAG_CC2 or + * TIM_FLAG_Trigger. + * @note TIM14, TIM16 and TIM17 can have TIM_FLAG_Update or TIM_FLAG_CC1. + * @note TIM_FLAG_Break is used only with TIM1 and TIM15. + * @note TIM_FLAG_COM is used only with TIM1, TIM15, TIM16 and TIM17. + * * @retval None */ void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG) @@ -2399,21 +2397,22 @@ void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG) * @brief Checks whether the TIM interrupt has occurred or not. * @param TIMx: where x can be 1, 2, 3, 6, 14, 15, 16 or 17 to select the TIM peripheral. * @param TIM_IT: specifies the TIM interrupt source to check. - * This parameter can be one of the following values: - * @arg TIM_IT_Update: TIM update Interrupt source - * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source - * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source - * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source - * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source - * @arg TIM_IT_COM: TIM Commutation Interrupt source - * @arg TIM_IT_Trigger: TIM Trigger Interrupt source - * @arg TIM_IT_Break: TIM Break Interrupt source - * @note - * - TIM6 can generate only an update interrupt. - * - TIM15 can have only TIM_IT_Update, TIM_IT_CC1, TIM_IT_CC2 or TIM_IT_Trigger. - * - TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. - * - TIM_IT_Break is used only with TIM1 and TIM15. - * - TIM_IT_COM is used only with TIM1, TIM15, TIM16 and TIM17. + * This parameter can be one of the following values: + * @arg TIM_IT_Update: TIM update Interrupt source + * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source + * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source + * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source + * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source + * @arg TIM_IT_COM: TIM Commutation Interrupt source + * @arg TIM_IT_Trigger: TIM Trigger Interrupt source + * @arg TIM_IT_Break: TIM Break Interrupt source + * + * @note TIM6 can generate only an update interrupt. + * @note TIM15 can have only TIM_IT_Update, TIM_IT_CC1, TIM_IT_CC2 or TIM_IT_Trigger. + * @note TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. + * @note TIM_IT_Break is used only with TIM1 and TIM15. + * @note TIM_IT_COM is used only with TIM1, TIM15, TIM16 and TIM17. + * * @retval The new state of the TIM_IT(SET or RESET). */ ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT) @@ -2443,21 +2442,22 @@ ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT) * @brief Clears the TIMx's interrupt pending bits. * @param TIMx: where x can be 1, 2, 3, 6, 14, 15, 16 or 17 to select the TIM peripheral. * @param TIM_IT: specifies the pending bit to clear. - * This parameter can be any combination of the following values: - * @arg TIM_IT_Update: TIM1 update Interrupt source - * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source - * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source - * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source - * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source - * @arg TIM_IT_COM: TIM Commutation Interrupt source - * @arg TIM_IT_Trigger: TIM Trigger Interrupt source - * @arg TIM_IT_Break: TIM Break Interrupt source - * @note - * - TIM6 can generate only an update interrupt. - * - TIM15 can have only TIM_IT_Update, TIM_IT_CC1, TIM_IT_CC2 or TIM_IT_Trigger. - * - TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. - * - TIM_IT_Break is used only with TIM1 and TIM15. - * - TIM_IT_COM is used only with TIM1, TIM15, TIM16 and TIM17. + * This parameter can be any combination of the following values: + * @arg TIM_IT_Update: TIM1 update Interrupt source + * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source + * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source + * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source + * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source + * @arg TIM_IT_COM: TIM Commutation Interrupt source + * @arg TIM_IT_Trigger: TIM Trigger Interrupt source + * @arg TIM_IT_Break: TIM Break Interrupt source + * + * @note TIM6 can generate only an update interrupt. + * @note TIM15 can have only TIM_IT_Update, TIM_IT_CC1, TIM_IT_CC2 or TIM_IT_Trigger. + * @note TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. + * @note TIM_IT_Break is used only with TIM1 and TIM15. + * @note TIM_IT_COM is used only with TIM1, TIM15, TIM16 and TIM17. + * * @retval None */ void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT) @@ -2474,16 +2474,27 @@ void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT) * @brief Configures the TIMx's DMA interface. * @param TIMx: where x can be 1, 2, 3, 15, 16 or 17 to select the TIM peripheral. * @param TIM_DMABase: DMA Base address. - * This parameter can be one of the following values: - * @arg TIM_DMABase_CR1, TIM_DMABase_CR2, TIM_DMABase_SMCR, - * TIM_DMABase_DIER, TIM_DMABase_SR, TIM_DMABase_EGR, - * TIM_DMABase_CCMR1, TIM_DMABase_CCMR2, TIM_DMABase_CCER, - * TIM_DMABase_CNT, TIM_DMABase_PSC, TIM_DMABase_ARR, - * TIM_DMABase_CCR1, TIM_DMABase_CCR2, TIM_DMABase_CCR3, - * TIM_DMABase_CCR4, TIM_DMABase_DCR, TIM_DMABase_OR. - * @param TIM_DMABurstLength: DMA Burst length. - * This parameter can be one value between: - * TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers. + * This parameter can be one of the following values: + * @arg TIM_DMABase_CR1 + * @arg TIM_DMABase_CR2 + * @arg TIM_DMABase_SMCR + * @arg TIM_DMABase_DIER + * @arg TIM_DMABase_SR + * @arg TIM_DMABase_EGR + * @arg TIM_DMABase_CCMR1 + * @arg TIM_DMABase_CCMR2 + * @arg TIM_DMABase_CCER + * @arg TIM_DMABase_CNT + * @arg TIM_DMABase_PSC + * @arg TIM_DMABase_ARR + * @arg TIM_DMABase_CCR1 + * @arg TIM_DMABase_CCR2 + * @arg TIM_DMABase_CCR3 + * @arg TIM_DMABase_CCR4 + * @arg TIM_DMABase_DCR + * @arg TIM_DMABase_OR + * @param TIM_DMABurstLength: DMA Burst length. This parameter can be one value + * between: TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers. * @retval None */ void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength) @@ -2500,16 +2511,16 @@ void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurs * @brief Enables or disables the TIMx's DMA Requests. * @param TIMx: where x can be 1, 2, 3, 6, 15, 16 or 17 to select the TIM peripheral. * @param TIM_DMASource: specifies the DMA Request sources. - * This parameter can be any combination of the following values: - * @arg TIM_DMA_Update: TIM update Interrupt source - * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source - * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source - * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source - * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source - * @arg TIM_DMA_COM: TIM Commutation DMA source - * @arg TIM_DMA_Trigger: TIM Trigger DMA source + * This parameter can be any combination of the following values: + * @arg TIM_DMA_Update: TIM update Interrupt source + * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source + * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source + * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source + * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source + * @arg TIM_DMA_COM: TIM Commutation DMA source + * @arg TIM_DMA_Trigger: TIM Trigger DMA source * @param NewState: new state of the DMA Request sources. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState) @@ -2535,7 +2546,7 @@ void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewSt * @brief Selects the TIMx peripheral Capture Compare DMA source. * @param TIMx: where x can be 1, 2, 3, 15, 16 or 17 to select the TIM peripheral. * @param NewState: new state of the Capture Compare DMA source - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState) @@ -2589,11 +2600,11 @@ void TIM_InternalClockConfig(TIM_TypeDef* TIMx) * @brief Configures the TIMx Internal Trigger as External Clock * @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral. * @param TIM_ITRSource: Trigger source. - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal Trigger 0 - * @arg TIM_TS_ITR1: Internal Trigger 1 - * @arg TIM_TS_ITR2: Internal Trigger 2 - * @arg TIM_TS_ITR3: Internal Trigger 3 + * This parameter can be one of the following values: + * @arg TIM_TS_ITR0: Internal Trigger 0 + * @arg TIM_TS_ITR1: Internal Trigger 1 + * @arg TIM_TS_ITR2: Internal Trigger 2 + * @arg TIM_TS_ITR3: Internal Trigger 3 * @retval None */ void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource) @@ -2611,16 +2622,16 @@ void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSou * @brief Configures the TIMx Trigger as External Clock * @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral. * @param TIM_TIxExternalCLKSource: Trigger source. - * This parameter can be one of the following values: - * @arg TIM_TIxExternalCLK1Source_TI1ED: TI1 Edge Detector - * @arg TIM_TIxExternalCLK1Source_TI1: Filtered Timer Input 1 - * @arg TIM_TIxExternalCLK1Source_TI2: Filtered Timer Input 2 + * This parameter can be one of the following values: + * @arg TIM_TIxExternalCLK1Source_TI1ED: TI1 Edge Detector + * @arg TIM_TIxExternalCLK1Source_TI1: Filtered Timer Input 1 + * @arg TIM_TIxExternalCLK1Source_TI2: Filtered Timer Input 2 * @param TIM_ICPolarity: specifies the TIx Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @param ICFilter : specifies the filter value. - * This parameter must be a value between 0x0 and 0xF. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling + * @param ICFilter: specifies the filter value. + * This parameter must be a value between 0x0 and 0xF. * @retval None */ void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, @@ -2650,17 +2661,17 @@ void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSo * @brief Configures the External clock Mode1 * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. - * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. - * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. - * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. + * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. + * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. + * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. * @param TIM_ExtTRGPolarity: The external Trigger Polarity. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. - * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. + * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. * @param ExtTRGFilter: External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F + * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, @@ -2694,17 +2705,17 @@ void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, ui * @brief Configures the External clock Mode2 * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. - * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. - * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. - * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. + * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. + * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. + * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. * @param TIM_ExtTRGPolarity: The external Trigger Polarity. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. - * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. + * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. * @param ExtTRGFilter: External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F + * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, @@ -2761,15 +2772,15 @@ void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, * @brief Selects the Input Trigger source * @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral. * @param TIM_InputTriggerSource: The Input Trigger source. - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal Trigger 0 - * @arg TIM_TS_ITR1: Internal Trigger 1 - * @arg TIM_TS_ITR2: Internal Trigger 2 - * @arg TIM_TS_ITR3: Internal Trigger 3 - * @arg TIM_TS_TI1F_ED: TI1 Edge Detector - * @arg TIM_TS_TI1FP1: Filtered Timer Input 1 - * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 - * @arg TIM_TS_ETRF: External Trigger input + * This parameter can be one of the following values: + * @arg TIM_TS_ITR0: Internal Trigger 0 + * @arg TIM_TS_ITR1: Internal Trigger 1 + * @arg TIM_TS_ITR2: Internal Trigger 2 + * @arg TIM_TS_ITR3: Internal Trigger 3 + * @arg TIM_TS_TI1F_ED: TI1 Edge Detector + * @arg TIM_TS_TI1FP1: Filtered Timer Input 1 + * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 + * @arg TIM_TS_ETRF: External Trigger input * @retval None */ void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource) @@ -2794,20 +2805,20 @@ void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource) * @brief Selects the TIMx Trigger Output Mode. * @param TIMx: where x can be 1, 2, 3, 6, or 15 to select the TIM peripheral. * @param TIM_TRGOSource: specifies the Trigger Output source. - * This paramter can be one of the following values: + * This parameter can be one of the following values: * - * For all TIMx - * @arg TIM_TRGOSource_Reset: The UG bit in the TIM_EGR register is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_Enable: The Counter Enable CEN is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_Update: The update event is selected as the trigger output (TRGO). + * - For all TIMx + * @arg TIM_TRGOSource_Reset: The UG bit in the TIM_EGR register is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_Enable: The Counter Enable CEN is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_Update: The update event is selected as the trigger output (TRGO). * - * For all TIMx except TIM6 - * @arg TIM_TRGOSource_OC1: The trigger output sends a positive pulse when the CC1IF flag - * is to be set, as soon as a capture or compare match occurs (TRGO). - * @arg TIM_TRGOSource_OC1Ref: OC1REF signal is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_OC2Ref: OC2REF signal is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_OC3Ref: OC3REF signal is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_OC4Ref: OC4REF signal is used as the trigger output (TRGO). + * - For all TIMx except TIM6 + * @arg TIM_TRGOSource_OC1: The trigger output sends a positive pulse when the CC1IF flag + * is to be set, as soon as a capture or compare match occurs (TRGO). + * @arg TIM_TRGOSource_OC1Ref: OC1REF signal is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_OC2Ref: OC2REF signal is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_OC3Ref: OC3REF signal is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_OC4Ref: OC4REF signal is used as the trigger output (TRGO). * * @retval None */ @@ -2827,12 +2838,12 @@ void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource) * @brief Selects the TIMx Slave Mode. * @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral. * @param TIM_SlaveMode: specifies the Timer Slave Mode. - * This paramter can be one of the following values: - * @arg TIM_SlaveMode_Reset: Rising edge of the selected trigger signal (TRGI) re-initializes - * the counter and triggers an update of the registers. - * @arg TIM_SlaveMode_Gated: The counter clock is enabled when the trigger signal (TRGI) is high. - * @arg TIM_SlaveMode_Trigger: The counter starts at a rising edge of the trigger TRGI. - * @arg TIM_SlaveMode_External1: Rising edges of the selected trigger (TRGI) clock the counter. + * This parameter can be one of the following values: + * @arg TIM_SlaveMode_Reset: Rising edge of the selected trigger signal (TRGI) re-initializes + * the counter and triggers an update of the registers. + * @arg TIM_SlaveMode_Gated: The counter clock is enabled when the trigger signal (TRGI) is high. + * @arg TIM_SlaveMode_Trigger: The counter starts at a rising edge of the trigger TRGI. + * @arg TIM_SlaveMode_External1: Rising edges of the selected trigger (TRGI) clock the counter. * @retval None */ void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode) @@ -2851,10 +2862,10 @@ void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode) * @brief Sets or Resets the TIMx Master/Slave Mode. * @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral. * @param TIM_MasterSlaveMode: specifies the Timer Master Slave Mode. - * This paramter can be one of the following values: - * @arg TIM_MasterSlaveMode_Enable: synchronization between the current timer - * and its slaves (through TRGO). - * @arg TIM_MasterSlaveMode_Disable: No action + * This parameter can be one of the following values: + * @arg TIM_MasterSlaveMode_Enable: synchronization between the current timer + * and its slaves (through TRGO). + * @arg TIM_MasterSlaveMode_Disable: No action * @retval None */ void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode) @@ -2874,17 +2885,17 @@ void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode) * @brief Configures the TIMx External Trigger (ETR). * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. - * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. - * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. - * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. + * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. + * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. + * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. * @param TIM_ExtTRGPolarity: The external Trigger Polarity. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. - * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. + * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. * @param ExtTRGFilter: External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F + * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, @@ -2927,19 +2938,19 @@ void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM * @brief Configures the TIMx Encoder Interface. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param TIM_EncoderMode: specifies the TIMx Encoder Mode. - * This parameter can be one of the following values: - * @arg TIM_EncoderMode_TI1: Counter counts on TI1FP1 edge depending on TI2FP2 level. - * @arg TIM_EncoderMode_TI2: Counter counts on TI2FP2 edge depending on TI1FP1 level. - * @arg TIM_EncoderMode_TI12: Counter counts on both TI1FP1 and TI2FP2 edges depending - * on the level of the other input. + * This parameter can be one of the following values: + * @arg TIM_EncoderMode_TI1: Counter counts on TI1FP1 edge depending on TI2FP2 level. + * @arg TIM_EncoderMode_TI2: Counter counts on TI2FP2 edge depending on TI1FP1 level. + * @arg TIM_EncoderMode_TI12: Counter counts on both TI1FP1 and TI2FP2 edges depending + * on the level of the other input. * @param TIM_IC1Polarity: specifies the IC1 Polarity - * This parmeter can be one of the following values: - * @arg TIM_ICPolarity_Falling: IC Falling edge. - * @arg TIM_ICPolarity_Rising: IC Rising edge. + * This parmeter can be one of the following values: + * @arg TIM_ICPolarity_Falling: IC Falling edge. + * @arg TIM_ICPolarity_Rising: IC Rising edge. * @param TIM_IC2Polarity: specifies the IC2 Polarity - * This parmeter can be one of the following values: - * @arg TIM_ICPolarity_Falling: IC Falling edge. - * @arg TIM_ICPolarity_Rising: IC Rising edge. + * This parmeter can be one of the following values: + * @arg TIM_ICPolarity_Falling: IC Falling edge. + * @arg TIM_ICPolarity_Rising: IC Rising edge. * @retval None */ void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, @@ -2968,7 +2979,6 @@ void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & (uint16_t)(~((uint16_t)TIM_CCMR1_CC2S))); tmpccmr1 |= TIM_CCMR1_CC1S_0 | TIM_CCMR1_CC2S_0; /* Set the TI1 and the TI2 Polarities */ - //tmpccer &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCER_CC1P)) & ((uint16_t)~((uint16_t)TIM_CCER_CC2P))); tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P | TIM_CCER_CC1NP)) & (uint16_t)~((uint16_t)(TIM_CCER_CC2P | TIM_CCER_CC2NP)); tmpccer |= (uint16_t)(TIM_IC1Polarity | (uint16_t)(TIM_IC2Polarity << (uint16_t)4)); /* Write to TIMx SMCR */ @@ -2983,7 +2993,7 @@ void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, * @brief Enables or disables the TIMx's Hall sensor interface. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. * @param NewState: new state of the TIMx Hall sensor interface. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState) @@ -3021,16 +3031,16 @@ void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState) */ /** * @brief Configures the TIM14 Remapping input Capabilities. - * @param TIMx: where x can be 14 to select the TIM peripheral. - * @param TIM_Remap: specifies the TIM input reampping source. - * This parameter can be one of the following values: - * @arg TIM14_GPIO : TIM14 Channel 1 is connected to GPIO. - * @arg TIM14_RTC_CLK : TIM14 Channel 1 is connected to RTC input clock. - * RTC input clock can be LSE, LSI or HSE/div128. - * @arg TIM14_HSE_DIV32 : TIM14 Channel 1 is connected to HSE/32 clock. - * @arg TIM14_MCO : TIM14 Channel 1 is connected to MCO clock. - * MCO clock can be HSI14, SYSCLK, HSI, HSE or PLL/2. - * @retval : None + * @param TIMx: where x can be 14 to select the TIM peripheral. + * @param TIM_Remap: specifies the TIM input reampping source. + * This parameter can be one of the following values: + * @arg TIM14_GPIO: TIM14 Channel 1 is connected to GPIO. + * @arg TIM14_RTC_CLK: TIM14 Channel 1 is connected to RTC input clock. + * RTC input clock can be LSE, LSI or HSE/div128. + * @arg TIM14_HSE_DIV32: TIM14 Channel 1 is connected to HSE/32 clock. + * @arg TIM14_MCO: TIM14 Channel 1 is connected to MCO clock. + * MCO clock can be HSI14, SYSCLK, HSI, HSE or PLL/2. + * @retval None */ void TIM_RemapConfig(TIM_TypeDef* TIMx, uint16_t TIM_Remap) { @@ -3049,17 +3059,17 @@ void TIM_RemapConfig(TIM_TypeDef* TIMx, uint16_t TIM_Remap) /** * @brief Configure the TI1 as Input. * @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling + * @param TIM_ICPolarity: The Input Polarity. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1. - * @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2. - * @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC. + * This parameter can be one of the following values: + * @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1. + * @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2. + * @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC. * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. + * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, @@ -3085,17 +3095,17 @@ static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ /** * @brief Configure the TI2 as Input. * @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling + * @param TIM_ICPolarity: The Input Polarity. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2. - * @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1. - * @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC. + * This parameter can be one of the following values: + * @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2. + * @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1. + * @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC. * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. + * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, @@ -3122,17 +3132,17 @@ static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ /** * @brief Configure the TI3 as Input. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling + * @param TIM_ICPolarity: The Input Polarity. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3. - * @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4. - * @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC. + * This parameter can be one of the following values: + * @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3. + * @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4. + * @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC. * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. + * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, @@ -3158,17 +3168,17 @@ static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ /** * @brief Configure the TI4 as Input. * @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling + * @param TIM_ICPolarity: The Input Polarity. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4. - * @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3. - * @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC. + * This parameter can be one of the following values: + * @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4. + * @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3. + * @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC. * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. + * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, diff --git a/lib/src/peripherals/stm32f0xx_usart.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_usart.c old mode 100755 new mode 100644 similarity index 81% rename from lib/src/peripherals/stm32f0xx_usart.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_usart.c index 10e0c15..eb39984 --- a/lib/src/peripherals/stm32f0xx_usart.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_usart.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_usart.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the Universal synchronous asynchronous receiver * transmitter (USART): @@ -191,19 +191,17 @@ void USART_DeInit(USART_TypeDef* USARTx) /** * @brief Initializes the USARTx peripheral according to the specified - * parameters in the USART_InitStruct . + * parameters in the USART_InitStruct . * @param USARTx: where x can be 1 or 2 to select the USART peripheral. - * @param USART_InitStruct: pointer to a USART_InitTypeDef structure - * that contains the configuration information for the specified USART peripheral. + * @param USART_InitStruct: pointer to a USART_InitTypeDef structure that contains + * the configuration information for the specified USART peripheral. * @retval None */ void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct) { - uint32_t tmpreg = 0, apbclock = 0; - uint32_t integerdivider = 0; - uint32_t fractionaldivider = 0; + uint32_t divider = 0, apbclock = 0, tmpreg = 0; RCC_ClocksTypeDef RCC_ClocksStatus; - + /* Check the parameters */ assert_param(IS_USART_ALL_PERIPH(USARTx)); assert_param(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate)); @@ -216,46 +214,46 @@ void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct) /* Disable USART */ USARTx->CR1 &= (uint32_t)~((uint32_t)USART_CR1_UE); -/*---------------------------- USART CR2 Configuration -----------------------*/ + /*---------------------------- USART CR2 Configuration -----------------------*/ tmpreg = USARTx->CR2; /* Clear STOP[13:12] bits */ tmpreg &= (uint32_t)~((uint32_t)USART_CR2_STOP); - + /* Configure the USART Stop Bits, Clock, CPOL, CPHA and LastBit ------------*/ /* Set STOP[13:12] bits according to USART_StopBits value */ tmpreg |= (uint32_t)USART_InitStruct->USART_StopBits; /* Write to USART CR2 */ USARTx->CR2 = tmpreg; - -/*---------------------------- USART CR1 Configuration -----------------------*/ + + /*---------------------------- USART CR1 Configuration -----------------------*/ tmpreg = USARTx->CR1; /* Clear M, PCE, PS, TE and RE bits */ tmpreg &= (uint32_t)~((uint32_t)CR1_CLEAR_MASK); - + /* Configure the USART Word Length, Parity and mode ----------------------- */ /* Set the M bits according to USART_WordLength value */ /* Set PCE and PS bits according to USART_Parity value */ /* Set TE and RE bits according to USART_Mode value */ tmpreg |= (uint32_t)USART_InitStruct->USART_WordLength | USART_InitStruct->USART_Parity | - USART_InitStruct->USART_Mode; - + USART_InitStruct->USART_Mode; + /* Write to USART CR1 */ USARTx->CR1 = tmpreg; - -/*---------------------------- USART CR3 Configuration -----------------------*/ + + /*---------------------------- USART CR3 Configuration -----------------------*/ tmpreg = USARTx->CR3; /* Clear CTSE and RTSE bits */ tmpreg &= (uint32_t)~((uint32_t)CR3_CLEAR_MASK); - + /* Configure the USART HFC -------------------------------------------------*/ /* Set CTSE and RTSE bits according to USART_HardwareFlowControl value */ tmpreg |= USART_InitStruct->USART_HardwareFlowControl; - + /* Write to USART CR3 */ USARTx->CR3 = tmpreg; - -/*---------------------------- USART BRR Configuration -----------------------*/ + + /*---------------------------- USART BRR Configuration -----------------------*/ /* Configure the USART Baud Rate -------------------------------------------*/ RCC_GetClocksFreq(&RCC_ClocksStatus); @@ -267,40 +265,45 @@ void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct) { apbclock = RCC_ClocksStatus.PCLK_Frequency; } + /* Determine the integer part */ if ((USARTx->CR1 & USART_CR1_OVER8) != 0) { - /* Integer part computing in case Oversampling mode is 8 Samples */ - integerdivider = ((25 * apbclock) / (2 * (USART_InitStruct->USART_BaudRate))); + /* (divider * 10) computing in case Oversampling mode is 8 Samples */ + divider = (uint32_t)((2 * apbclock) / (USART_InitStruct->USART_BaudRate)); + tmpreg = (uint32_t)((2 * apbclock) % (USART_InitStruct->USART_BaudRate)); } else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */ { - /* Integer part computing in case Oversampling mode is 16 Samples */ - integerdivider = ((25 * apbclock) / (4 * (USART_InitStruct->USART_BaudRate))); + /* (divider * 10) computing in case Oversampling mode is 16 Samples */ + divider = (uint32_t)((apbclock) / (USART_InitStruct->USART_BaudRate)); + tmpreg = (uint32_t)((apbclock) % (USART_InitStruct->USART_BaudRate)); } - tmpreg = (integerdivider / 100) << 4; - - /* Determine the fractional part */ - fractionaldivider = integerdivider - (100 * (tmpreg >> 4)); - - /* Implement the fractional part in the register */ + + /* round the divider : if fractional part i greater than 0.5 increment divider */ + if (tmpreg >= (USART_InitStruct->USART_BaudRate) / 2) + { + divider++; + } + + /* Implement the divider in case Oversampling mode is 8 Samples */ if ((USARTx->CR1 & USART_CR1_OVER8) != 0) { - tmpreg |= ((((fractionaldivider * 8) + 50) / 100)) & ((uint8_t)0x07); + /* get the LSB of divider and shift it to the right by 1 bit */ + tmpreg = (divider & (uint16_t)0x000F) >> 1; + + /* update the divider value */ + divider = (divider & (uint16_t)0xFFF0) | tmpreg; } - else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */ - { - tmpreg |= ((((fractionaldivider * 16) + 50) / 100)) & ((uint8_t)0x0F); - } - + /* Write to USART BRR */ - USARTx->BRR = (uint16_t)tmpreg; + USARTx->BRR = (uint16_t)divider; } /** * @brief Fills each USART_InitStruct member with its default value. * @param USART_InitStruct: pointer to a USART_InitTypeDef structure - * which will be initialized. + * which will be initialized. * @retval None */ void USART_StructInit(USART_InitTypeDef* USART_InitStruct) @@ -316,11 +319,11 @@ void USART_StructInit(USART_InitTypeDef* USART_InitStruct) /** * @brief Initializes the USARTx peripheral Clock according to the - * specified parameters in the USART_ClockInitStruct. + * specified parameters in the USART_ClockInitStruct. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef - * structure that contains the configuration information for the specified - * USART peripheral. + * structure that contains the configuration information for the specified + * USART peripheral. * @retval None */ void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct) @@ -350,7 +353,7 @@ void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockI /** * @brief Fills each USART_ClockInitStruct member with its default value. * @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef - * structure which will be initialized. + * structure which will be initialized. * @retval None */ void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct) @@ -366,7 +369,7 @@ void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct) * @brief Enables or disables the specified USART peripheral. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param NewState: new state of the USARTx peripheral. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -391,11 +394,11 @@ void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState) * @brief Enables or disables the USART's transmitter or receiver. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_Direction: specifies the USART direction. - * This parameter can be any combination of the following values: - * @arg USART_Mode_Tx: USART Transmitter - * @arg USART_Mode_Rx: USART Receiver + * This parameter can be any combination of the following values: + * @arg USART_Mode_Tx: USART Transmitter + * @arg USART_Mode_Rx: USART Receiver * @param NewState: new state of the USART transfer direction. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void USART_DirectionModeCmd(USART_TypeDef* USARTx, uint32_t USART_DirectionMode, FunctionalState NewState) @@ -422,11 +425,10 @@ void USART_DirectionModeCmd(USART_TypeDef* USARTx, uint32_t USART_DirectionMode, /** * @brief Enables or disables the USART's 8x oversampling mode. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. - * @param NewState: new state of the USART 8x oversampling mode. - * This parameter can be: ENABLE or DISABLE. - * @note - * This function has to be called before calling USART_Init() - * function in order to have correct baudrate Divider value. + * @param NewState: new state of the USART 8x oversampling mode. + * This parameter can be: ENABLE or DISABLE. + * @note This function has to be called before calling USART_Init() function + * in order to have correct baudrate Divider value. * @retval None */ void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -451,9 +453,8 @@ void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState) * @brief Enables or disables the USART's one bit sampling method. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param NewState: new state of the USART one bit sampling method. - * This parameter can be: ENABLE or DISABLE. - * @note - * This function has to be called before calling USART_Cmd() function. + * This parameter can be: ENABLE or DISABLE. + * @note This function has to be called before calling USART_Cmd() function. * @retval None */ void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -480,9 +481,8 @@ void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState) * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param NewState: new state of the USART most significant bit first * transmitted/received following the start bit. - * This parameter can be: ENABLE or DISABLE. - * @note - * This function has to be called before calling USART_Cmd() function. + * This parameter can be: ENABLE or DISABLE. + * @note This function has to be called before calling USART_Cmd() function. * @retval None */ void USART_MSBFirstCmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -508,14 +508,13 @@ void USART_MSBFirstCmd(USART_TypeDef* USARTx, FunctionalState NewState) /** * @brief Enables or disables the binary data inversion. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. - * @param NewState: new defined levels for the USART data. - * This parameter can be: ENABLE or DISABLE. - * - ENABLE: Logical data from the data register are send/received in negative - * logic. (1=L, 0=H). The parity bit is also inverted. - * - DISABLE: Logical data from the data register are send/received in positive - * logic. (1=H, 0=L) - * @note - * This function has to be called before calling USART_Cmd() function. + * @param NewState: new defined levels for the USART data. + * This parameter can be: + * @arg ENABLE: Logical data from the data register are send/received in negative + * logic (1=L, 0=H). The parity bit is also inverted. + * @arg DISABLE: Logical data from the data register are send/received in positive + * logic (1=H, 0=L) + * @note This function has to be called before calling USART_Cmd() function. * @retval None */ void USART_DataInvCmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -542,15 +541,14 @@ void USART_DataInvCmd(USART_TypeDef* USARTx, FunctionalState NewState) * @brief Enables or disables the Pin(s) active level inversion. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_InvPin: specifies the USART pin(s) to invert. - * This parameter can be any combination of the following values: - * @arg USART_InvPin_Tx: USART Tx pin active level inversion. - * @arg USART_InvPin_Rx: USART Rx pin active level inversion. - * @param NewState: new active level status for the USART pin(s). - * This parameter can be: ENABLE or DISABLE. - * - ENABLE: pin(s) signal values are inverted (Vdd =0, Gnd =1). - * - DISABLE: pin(s) signal works using the standard logic levels (Vdd =1, Gnd =0). - * @note - * This function has to be called before calling USART_Cmd() function. + * This parameter can be any combination of the following values: + * @arg USART_InvPin_Tx: USART Tx pin active level inversion. + * @arg USART_InvPin_Rx: USART Rx pin active level inversion. + * @param NewState: new active level status for the USART pin(s). + * This parameter can be: + * @arg ENABLE: pin(s) signal values are inverted (Vdd =0, Gnd =1). + * @arg DISABLE: pin(s) signal works using the standard logic levels (Vdd =1, Gnd =0). + * @note This function has to be called before calling USART_Cmd() function. * @retval None */ void USART_InvPinCmd(USART_TypeDef* USARTx, uint32_t USART_InvPin, FunctionalState NewState) @@ -577,12 +575,11 @@ void USART_InvPinCmd(USART_TypeDef* USARTx, uint32_t USART_InvPin, FunctionalSta /** * @brief Enables or disables the swap Tx/Rx pins. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. - * @param NewState: new state of the USARTx TX/RX pins pinout. - * This parameter can be: ENABLE or DISABLE. - * - ENABLE: The TX and RX pins functions are swapped. - * - DISABLE: TX/RX pins are used as defined in standard pinout - * @note - * This function has to be called before calling USART_Cmd() function. + * @param NewState: new state of the USARTx TX/RX pins pinout. + * This parameter can be: + * @arg ENABLE: The TX and RX pins functions are swapped. + * @arg DISABLE: TX/RX pins are used as defined in standard pinout + * @note This function has to be called before calling USART_Cmd() function. * @retval None */ void USART_SWAPPinCmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -606,8 +603,8 @@ void USART_SWAPPinCmd(USART_TypeDef* USARTx, FunctionalState NewState) /** * @brief Enables or disables the receiver Time Out feature. * @param USARTx: where x can be 1 to select the USART peripheral. - * @param NewState: new state of the USARTx receiver Time Out. - * This parameter can be: ENABLE or DISABLE. + * @param NewState: new state of the USARTx receiver Time Out. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void USART_ReceiverTimeOutCmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -654,8 +651,7 @@ void USART_SetReceiverTimeOut(USART_TypeDef* USARTx, uint32_t USART_ReceiverTime * @brief Sets the system clock prescaler. * @param USARTx: where x can be 1 to select the USART peripheral. * @param USART_Prescaler: specifies the prescaler clock. - * @note - * This function has to be called before calling USART_Cmd() function. + * @note This function has to be called before calling USART_Cmd() function. * @retval None */ void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler) @@ -701,9 +697,8 @@ void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler) * @brief Enables or disables the specified USART peripheral in STOP Mode. * @param USARTx: where x can be 1 to select the USART peripheral. * @param NewState: new state of the USARTx peripheral state in stop mode. - * This parameter can be: ENABLE or DISABLE. - * @note - * This function has to be called when USART clock is set to HSI or LSE. + * This parameter can be: ENABLE or DISABLE. + * @note This function has to be called when USART clock is set to HSI or LSE. * @retval None */ void USART_STOPModeCmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -730,12 +725,11 @@ void USART_STOPModeCmd(USART_TypeDef* USARTx, FunctionalState NewState) * @brief Selects the USART WakeUp method form stop mode. * @param USARTx: where x can be 1 to select the USART peripheral. * @param USART_WakeUp: specifies the selected USART wakeup method. - * This parameter can be one of the following values: - * @arg USART_WakeUpSource_AddressMatch: WUF active on address match. - * @arg USART_WakeUpSource_StartBit: WUF active on Start bit detection. - * @arg USART_WakeUpSource_RXNE: WUF active on RXNE. - * @note - * This function has to be called before calling USART_Cmd() function. + * This parameter can be one of the following values: + * @arg USART_WakeUpSource_AddressMatch: WUF active on address match. + * @arg USART_WakeUpSource_StartBit: WUF active on Start bit detection. + * @arg USART_WakeUpSource_RXNE: WUF active on RXNE. + * @note This function has to be called before calling USART_Cmd() function. * @retval None */ void USART_StopModeWakeUpSourceConfig(USART_TypeDef* USARTx, uint32_t USART_WakeUpSource) @@ -770,7 +764,7 @@ void USART_StopModeWakeUpSourceConfig(USART_TypeDef* USARTx, uint32_t USART_Wake (#)USART_AutoBaudRate_FallingEdge : any character starting with a 10xx bit pattern. [..] At any later time, another request for AutoBaudRate detection can be performed - using USART_AutoBaudRateNewRequest() function. + using USART_RequestCmd() function. [..] The AutoBaudRate detection is monitored by the status of ABRF flag which indicate that the AutoBaudRate detection is completed. In addition to ABRF flag, the ABRE flag @@ -784,8 +778,8 @@ void USART_StopModeWakeUpSourceConfig(USART_TypeDef* USARTx, uint32_t USART_Wake /** * @brief Enables or disables the Auto Baud Rate. * @param USARTx: where x can be 1 to select the USART peripheral. - * @param NewState: new state of the USARTx auto baud rate. - * This parameter can be: ENABLE or DISABLE. + * @param NewState: new state of the USARTx auto baud rate. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void USART_AutoBaudRateCmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -812,11 +806,10 @@ void USART_AutoBaudRateCmd(USART_TypeDef* USARTx, FunctionalState NewState) * @brief Selects the USART auto baud rate method. * @param USARTx: where x can be 1 to select the USART peripheral. * @param USART_AutoBaudRate: specifies the selected USART auto baud rate method. - * This parameter can be one of the following values: - * @arg USART_AutoBaudRate_StartBit: Start Bit duration measurement. - * @arg USART_AutoBaudRate_FallingEdge: Falling edge to falling edge measurement. - * @note - * This function has to be called before calling USART_Cmd() function. + * This parameter can be one of the following values: + * @arg USART_AutoBaudRate_StartBit: Start Bit duration measurement. + * @arg USART_AutoBaudRate_FallingEdge: Falling edge to falling edge measurement. + * @note This function has to be called before calling USART_Cmd() function. * @retval None */ void USART_AutoBaudRateConfig(USART_TypeDef* USARTx, uint32_t USART_AutoBaudRate) @@ -829,19 +822,6 @@ void USART_AutoBaudRateConfig(USART_TypeDef* USARTx, uint32_t USART_AutoBaudRate USARTx->CR2 |= USART_AutoBaudRate; } -/** - * @brief Requests a new AutoBaudRate detection. - * @param USARTx: where x can be 1 to select the USART peripheral. - * @retval None - */ -void USART_AutoBaudRateNewRequest(USART_TypeDef* USARTx) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - - USARTx->ISR &= (uint32_t)~((uint32_t)USART_FLAG_ABRF); -} - /** * @} */ @@ -953,7 +933,7 @@ void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address) * @brief Enables or disables the USART's mute mode. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param NewState: new state of the USART mute mode. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void USART_MuteModeCmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -978,9 +958,9 @@ void USART_MuteModeCmd(USART_TypeDef* USARTx, FunctionalState NewState) * @brief Selects the USART WakeUp method from mute mode. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_WakeUp: specifies the USART wakeup method. - * This parameter can be one of the following values: - * @arg USART_WakeUp_IdleLine: WakeUp by an idle line detection - * @arg USART_WakeUp_AddressMark: WakeUp by an address mark + * This parameter can be one of the following values: + * @arg USART_WakeUp_IdleLine: WakeUp by an idle line detection + * @arg USART_WakeUp_AddressMark: WakeUp by an address mark * @retval None */ void USART_MuteModeWakeUpConfig(USART_TypeDef* USARTx, uint32_t USART_WakeUp) @@ -997,9 +977,9 @@ void USART_MuteModeWakeUpConfig(USART_TypeDef* USARTx, uint32_t USART_WakeUp) * @brief Configure the the USART Address detection length. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_AddressLength: specifies the USART address length detection. - * This parameter can be one of the following values: - * @arg USART_AddressLength_4b: 4-bit address length detection - * @arg USART_AddressLength_7b: 7-bit address length detection + * This parameter can be one of the following values: + * @arg USART_AddressLength_4b: 4-bit address length detection + * @arg USART_AddressLength_7b: 7-bit address length detection * @retval None */ void USART_AddressDetectionConfig(USART_TypeDef* USARTx, uint32_t USART_AddressLength) @@ -1060,9 +1040,9 @@ void USART_AddressDetectionConfig(USART_TypeDef* USARTx, uint32_t USART_AddressL * @brief Sets the USART LIN Break detection length. * @param USARTx: where x can be 1 to select the USART peripheral. * @param USART_LINBreakDetectLength: specifies the LIN break detection length. - * This parameter can be one of the following values: - * @arg USART_LINBreakDetectLength_10b: 10-bit break detection - * @arg USART_LINBreakDetectLength_11b: 11-bit break detection + * This parameter can be one of the following values: + * @arg USART_LINBreakDetectLength_10b: 10-bit break detection + * @arg USART_LINBreakDetectLength_11b: 11-bit break detection * @retval None */ void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint32_t USART_LINBreakDetectLength) @@ -1079,7 +1059,7 @@ void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint32_t USART_LINB * @brief Enables or disables the USART's LIN mode. * @param USARTx: where x can be 1 to select the USART peripheral. * @param NewState: new state of the USART LIN mode. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -1135,7 +1115,7 @@ void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState) * @brief Enables or disables the USART's Half Duplex communication. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param NewState: new state of the USART Communication. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -1233,7 +1213,7 @@ void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime) * @brief Enables or disables the USART's Smart Card mode. * @param USARTx: where x can be 1 to select the USART peripheral. * @param NewState: new state of the Smart Card mode. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -1257,7 +1237,7 @@ void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState) * @brief Enables or disables NACK transmission. * @param USARTx: where x can be 1 to select the USART peripheral. * @param NewState: new state of the NACK transmission. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -1357,9 +1337,9 @@ void USART_SetBlockLength(USART_TypeDef* USARTx, uint8_t USART_BlockLength) * @brief Configures the USART's IrDA interface. * @param USARTx: where x can be 1 to select the USART peripheral. * @param USART_IrDAMode: specifies the IrDA mode. - * This parameter can be one of the following values: - * @arg USART_IrDAMode_LowPower - * @arg USART_IrDAMode_Normal + * This parameter can be one of the following values: + * @arg USART_IrDAMode_LowPower + * @arg USART_IrDAMode_Normal * @retval None */ void USART_IrDAConfig(USART_TypeDef* USARTx, uint32_t USART_IrDAMode) @@ -1376,7 +1356,7 @@ void USART_IrDAConfig(USART_TypeDef* USARTx, uint32_t USART_IrDAMode) * @brief Enables or disables the USART's IrDA interface. * @param USARTx: where x can be 1 to select the USART peripheral. * @param NewState: new state of the IrDA mode. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -1433,7 +1413,7 @@ void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState) * @brief Enables or disables the USART's DE functionality. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param NewState: new state of the driver enable mode. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void USART_DECmd(USART_TypeDef* USARTx, FunctionalState NewState) @@ -1457,9 +1437,9 @@ void USART_DECmd(USART_TypeDef* USARTx, FunctionalState NewState) * @brief Configures the USART's DE polarity * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_DEPolarity: specifies the DE polarity. - * This parameter can be one of the following values: - * @arg USART_DEPolarity_Low - * @arg USART_DEPolarity_High + * This parameter can be one of the following values: + * @arg USART_DEPolarity_Low + * @arg USART_DEPolarity_High * @retval None */ void USART_DEPolarityConfig(USART_TypeDef* USARTx, uint32_t USART_DEPolarity) @@ -1475,8 +1455,8 @@ void USART_DEPolarityConfig(USART_TypeDef* USARTx, uint32_t USART_DEPolarity) /** * @brief Sets the specified RS485 DE assertion time * @param USARTx: where x can be 1 or 2 to select the USART peripheral. - * @param USART_AssertionTime: specifies the time between the activation of the DE - * signal and the beginning of the start bit + * @param USART_DEAssertionTime: specifies the time between the activation of + * the DE signal and the beginning of the start bit * @retval None */ void USART_SetDEAssertionTime(USART_TypeDef* USARTx, uint32_t USART_DEAssertionTime) @@ -1494,8 +1474,8 @@ void USART_SetDEAssertionTime(USART_TypeDef* USARTx, uint32_t USART_DEAssertionT /** * @brief Sets the specified RS485 DE deassertion time * @param USARTx: where x can be 1 or 2 to select the USART peripheral. - * @param USART_DeassertionTime: specifies the time between the middle of the last - * stop bit in a transmitted message and the de-activation of the DE signal + * @param USART_DeassertionTime: specifies the time between the middle of the last + * stop bit in a transmitted message and the de-activation of the DE signal * @retval None */ void USART_SetDEDeassertionTime(USART_TypeDef* USARTx, uint32_t USART_DEDeassertionTime) @@ -1537,11 +1517,11 @@ void USART_SetDEDeassertionTime(USART_TypeDef* USARTx, uint32_t USART_DEDeassert * @brief Enables or disables the USART's DMA interface. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_DMAReq: specifies the DMA request. - * This parameter can be any combination of the following values: - * @arg USART_DMAReq_Tx: USART DMA transmit request - * @arg USART_DMAReq_Rx: USART DMA receive request + * This parameter can be any combination of the following values: + * @arg USART_DMAReq_Tx: USART DMA transmit request + * @arg USART_DMAReq_Rx: USART DMA receive request * @param NewState: new state of the DMA Request sources. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void USART_DMACmd(USART_TypeDef* USARTx, uint32_t USART_DMAReq, FunctionalState NewState) @@ -1569,11 +1549,11 @@ void USART_DMACmd(USART_TypeDef* USARTx, uint32_t USART_DMAReq, FunctionalState * @brief Enables or disables the USART's DMA interface when reception error occurs. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_DMAOnError: specifies the DMA status in case of reception error. - * This parameter can be any combination of the following values: - * @arg USART_DMAOnError_Enable: DMA receive request enabled when the USART DMA - * reception error is asserted. - * @arg USART_DMAOnError_Disable: DMA receive request disabled when the USART DMA - * reception error is asserted. + * This parameter can be any combination of the following values: + * @arg USART_DMAOnError_Enable: DMA receive request enabled when the USART DMA + * reception error is asserted. + * @arg USART_DMAOnError_Disable: DMA receive request disabled when the USART DMA + * reception error is asserted. * @retval None */ void USART_DMAReceptionErrorConfig(USART_TypeDef* USARTx, uint32_t USART_DMAOnError) @@ -1611,15 +1591,15 @@ void USART_DMAReceptionErrorConfig(USART_TypeDef* USARTx, uint32_t USART_DMAOnEr acknowledge flag (#) USART_FLAG_TEACK: to indicate the status of the Transmit Enable acknowledge flag. - (#) USART_FLAG_WUF: to indicate the status of the Wake up flag. + (#) USART_FLAG_WU: to indicate the status of the Wake up flag. (#) USART_FLAG_RWU: to indicate the status of the Receive Wake up flag. (#) USART_FLAG_SBK: to indicate the status of the Send Break flag. - (#) USART_FLAG_CMF: to indicate the status of the Character match flag. + (#) USART_FLAG_CM: to indicate the status of the Character match flag. (#) USART_FLAG_BUSY: to indicate the status of the Busy flag. (#) USART_FLAG_ABRF: to indicate the status of the Auto baud rate flag. (#) USART_FLAG_ABRE: to indicate the status of the Auto baud rate error flag. - (#) USART_FLAG_EOBF: to indicate the status of the End of block flag. - (#) USART_FLAG_RTOF: to indicate the status of the Receive time out flag. + (#) USART_FLAG_EOB: to indicate the status of the End of block flag. + (#) USART_FLAG_RTO: to indicate the status of the Receive time out flag. (#) USART_FLAG_nCTSS: to indicate the status of the Inverted nCTS input bit status. (#) USART_FLAG_TXE: to indicate the status of the transmit buffer register. @@ -1691,21 +1671,21 @@ void USART_DMAReceptionErrorConfig(USART_TypeDef* USARTx, uint32_t USART_DMAOnEr * @brief Enables or disables the specified USART interrupts. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_IT: specifies the USART interrupt sources to be enabled or disabled. - * This parameter can be one of the following values: - * @arg USART_IT_WU: Wake up interrupt. - * @arg USART_IT_CM: Character match interrupt. - * @arg USART_IT_EOB: End of block interrupt. - * @arg USART_IT_RTO: Receive time out interrupt. - * @arg USART_IT_CTS: CTS change interrupt. - * @arg USART_IT_LBD: LIN Break detection interrupt. - * @arg USART_IT_TXE: Tansmit Data Register empty interrupt. - * @arg USART_IT_TC: Transmission complete interrupt. - * @arg USART_IT_RXNE: Receive Data register not empty interrupt. - * @arg USART_IT_IDLE: Idle line detection interrupt. - * @arg USART_IT_PE: Parity Error interrupt. - * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) + * This parameter can be one of the following values: + * @arg USART_IT_WU: Wake up interrupt. + * @arg USART_IT_CM: Character match interrupt. + * @arg USART_IT_EOB: End of block interrupt. + * @arg USART_IT_RTO: Receive time out interrupt. + * @arg USART_IT_CTS: CTS change interrupt. + * @arg USART_IT_LBD: LIN Break detection interrupt. + * @arg USART_IT_TXE: Tansmit Data Register empty interrupt. + * @arg USART_IT_TC: Transmission complete interrupt. + * @arg USART_IT_RXNE: Receive Data register not empty interrupt. + * @arg USART_IT_IDLE: Idle line detection interrupt. + * @arg USART_IT_PE: Parity Error interrupt. + * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) * @param NewState: new state of the specified USARTx interrupts. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void USART_ITConfig(USART_TypeDef* USARTx, uint32_t USART_IT, FunctionalState NewState) @@ -1751,14 +1731,14 @@ void USART_ITConfig(USART_TypeDef* USARTx, uint32_t USART_IT, FunctionalState Ne * @brief Enables the specified USART's Request. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_Request: specifies the USART request. - * This parameter can be any combination of the following values: - * @arg USART_Request_TXFRQ: Transmit data flush ReQuest - * @arg USART_Request_RXFRQ: Receive data flush ReQuest - * @arg USART_Request_MMRQ: Mute Mode ReQuest - * @arg USART_Request_SBKRQ: Send Break ReQuest - * @arg USART_Request_ABRRQ: Auto Baud Rate ReQuest + * This parameter can be any combination of the following values: + * @arg USART_Request_TXFRQ: Transmit data flush ReQuest + * @arg USART_Request_RXFRQ: Receive data flush ReQuest + * @arg USART_Request_MMRQ: Mute Mode ReQuest + * @arg USART_Request_SBKRQ: Send Break ReQuest + * @arg USART_Request_ABRRQ: Auto Baud Rate ReQuest * @param NewState: new state of the DMA interface when reception error occurs. - * This parameter can be: ENABLE or DISABLE. + * This parameter can be: ENABLE or DISABLE. * @retval None */ void USART_RequestCmd(USART_TypeDef* USARTx, uint32_t USART_Request, FunctionalState NewState) @@ -1786,11 +1766,11 @@ void USART_RequestCmd(USART_TypeDef* USARTx, uint32_t USART_Request, FunctionalS * @brief Enables or disables the USART's Overrun detection. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_OVRDetection: specifies the OVR detection status in case of OVR error. - * This parameter can be any combination of the following values: - * @arg USART_OVRDetection_Enable: OVR error detection enabled when the USART OVR error - * is asserted. - * @arg USART_OVRDetection_Disable: OVR error detection disabled when the USART OVR error - * is asserted. + * This parameter can be any combination of the following values: + * @arg USART_OVRDetection_Enable: OVR error detection enabled when + * the USART OVR error is asserted. + * @arg USART_OVRDetection_Disable: OVR error detection disabled when + * the USART OVR error is asserted. * @retval None */ void USART_OverrunDetectionConfig(USART_TypeDef* USARTx, uint32_t USART_OVRDetection) @@ -1809,29 +1789,29 @@ void USART_OverrunDetectionConfig(USART_TypeDef* USARTx, uint32_t USART_OVRDetec * @brief Checks whether the specified USART flag is set or not. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg USART_FLAG_REACK: Receive Enable acknowledge flag. - * @arg USART_FLAG_TEACK: Transmit Enable acknowledge flag. - * @arg USART_FLAG_WUF: Wake up flag. - * @arg USART_FLAG_RWU: Receive Wake up flag. - * @arg USART_FLAG_SBK: Send Break flag. - * @arg USART_FLAG_CMF: Character match flag. - * @arg USART_FLAG_BUSY: Busy flag. - * @arg USART_FLAG_ABRF: Auto baud rate flag. - * @arg USART_FLAG_ABRE: Auto baud rate error flag. - * @arg USART_FLAG_EOBF: End of block flag. - * @arg USART_FLAG_RTOF: Receive time out flag. - * @arg USART_FLAG_nCTSS: Inverted nCTS input bit status. - * @arg USART_FLAG_CTS: CTS Change flag. - * @arg USART_FLAG_LBD: LIN Break detection flag. - * @arg USART_FLAG_TXE: Transmit data register empty flag. - * @arg USART_FLAG_TC: Transmission Complete flag. - * @arg USART_FLAG_RXNE: Receive data register not empty flag. - * @arg USART_FLAG_IDLE: Idle Line detection flag. - * @arg USART_FLAG_ORE: OverRun Error flag. - * @arg USART_FLAG_NE: Noise Error flag. - * @arg USART_FLAG_FE: Framing Error flag. - * @arg USART_FLAG_PE: Parity Error flag. + * This parameter can be one of the following values: + * @arg USART_FLAG_REACK: Receive Enable acknowledge flag. + * @arg USART_FLAG_TEACK: Transmit Enable acknowledge flag. + * @arg USART_FLAG_WU: Wake up flag. + * @arg USART_FLAG_RWU: Receive Wake up flag. + * @arg USART_FLAG_SBK: Send Break flag. + * @arg USART_FLAG_CM: Character match flag. + * @arg USART_FLAG_BUSY: Busy flag. + * @arg USART_FLAG_ABRF: Auto baud rate flag. + * @arg USART_FLAG_ABRE: Auto baud rate error flag. + * @arg USART_FLAG_EOB: End of block flag. + * @arg USART_FLAG_RTO: Receive time out flag. + * @arg USART_FLAG_nCTSS: Inverted nCTS input bit status. + * @arg USART_FLAG_CTS: CTS Change flag. + * @arg USART_FLAG_LBD: LIN Break detection flag. + * @arg USART_FLAG_TXE: Transmit data register empty flag. + * @arg USART_FLAG_TC: Transmission Complete flag. + * @arg USART_FLAG_RXNE: Receive data register not empty flag. + * @arg USART_FLAG_IDLE: Idle Line detection flag. + * @arg USART_FLAG_ORE: OverRun Error flag. + * @arg USART_FLAG_NE: Noise Error flag. + * @arg USART_FLAG_FE: Framing Error flag. + * @arg USART_FLAG_PE: Parity Error flag. * @retval The new state of USART_FLAG (SET or RESET). */ FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint32_t USART_FLAG) @@ -1856,19 +1836,19 @@ FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint32_t USART_FLAG) * @brief Clears the USARTx's pending flags. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg USART_FLAG_WUF: Wake up flag. - * @arg USART_FLAG_CMF: Character match flag. - * @arg USART_FLAG_EOBF: End of block flag. - * @arg USART_FLAG_RTOF: Receive time out flag. - * @arg USART_FLAG_CTS: CTS Change flag. - * @arg USART_FLAG_LBD: LIN Break detection flag. - * @arg USART_FLAG_TC: Transmission Complete flag. - * @arg USART_FLAG_IDLE: IDLE line detected flag. - * @arg USART_FLAG_ORE: OverRun Error flag. - * @arg USART_FLAG_NE: Noise Error flag. - * @arg USART_FLAG_FE: Framing Error flag. - * @arg USART_FLAG_PE: Parity Errorflag. + * This parameter can be any combination of the following values: + * @arg USART_FLAG_WU: Wake up flag. + * @arg USART_FLAG_CM: Character match flag. + * @arg USART_FLAG_EOB: End of block flag. + * @arg USART_FLAG_RTO: Receive time out flag. + * @arg USART_FLAG_CTS: CTS Change flag. + * @arg USART_FLAG_LBD: LIN Break detection flag. + * @arg USART_FLAG_TC: Transmission Complete flag. + * @arg USART_FLAG_IDLE: IDLE line detected flag. + * @arg USART_FLAG_ORE: OverRun Error flag. + * @arg USART_FLAG_NE: Noise Error flag. + * @arg USART_FLAG_FE: Framing Error flag. + * @arg USART_FLAG_PE: Parity Errorflag. * * @note RXNE pending bit is cleared by a read to the USART_RDR register * (USART_ReceiveData()) or by writing 1 to the RXFRQ in the register @@ -1895,21 +1875,21 @@ void USART_ClearFlag(USART_TypeDef* USARTx, uint32_t USART_FLAG) * @brief Checks whether the specified USART interrupt has occurred or not. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_IT: specifies the USART interrupt source to check. - * This parameter can be one of the following values: - * @arg USART_IT_WU: Wake up interrupt. - * @arg USART_IT_CM: Character match interrupt. - * @arg USART_IT_EOB: End of block interrupt. - * @arg USART_IT_RTO: Receive time out interrupt. - * @arg USART_IT_CTS: CTS change interrupt. - * @arg USART_IT_LBD: LIN Break detection interrupt. - * @arg USART_IT_TXE: Tansmit Data Register empty interrupt. - * @arg USART_IT_TC: Transmission complete interrupt. - * @arg USART_IT_RXNE: Receive Data register not empty interrupt. - * @arg USART_IT_IDLE: Idle line detection interrupt. - * @arg USART_IT_ORE: OverRun Error interrupt. - * @arg USART_IT_NE: Noise Error interrupt. - * @arg USART_IT_FE: Framing Error interrupt. - * @arg USART_IT_PE: Parity Error interrupt. + * This parameter can be one of the following values: + * @arg USART_IT_WU: Wake up interrupt. + * @arg USART_IT_CM: Character match interrupt. + * @arg USART_IT_EOB: End of block interrupt. + * @arg USART_IT_RTO: Receive time out interrupt. + * @arg USART_IT_CTS: CTS change interrupt. + * @arg USART_IT_LBD: LIN Break detection interrupt. + * @arg USART_IT_TXE: Tansmit Data Register empty interrupt. + * @arg USART_IT_TC: Transmission complete interrupt. + * @arg USART_IT_RXNE: Receive Data register not empty interrupt. + * @arg USART_IT_IDLE: Idle line detection interrupt. + * @arg USART_IT_ORE: OverRun Error interrupt. + * @arg USART_IT_NE: Noise Error interrupt. + * @arg USART_IT_FE: Framing Error interrupt. + * @arg USART_IT_PE: Parity Error interrupt. * @retval The new state of USART_IT (SET or RESET). */ ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint32_t USART_IT) @@ -1958,19 +1938,19 @@ ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint32_t USART_IT) * @brief Clears the USARTx's interrupt pending bits. * @param USARTx: where x can be 1 or 2 to select the USART peripheral. * @param USART_IT: specifies the interrupt pending bit to clear. - * This parameter can be one of the following values: - * @arg USART_IT_WU: Wake up interrupt. - * @arg USART_IT_CM: Character match interrupt. - * @arg USART_IT_EOB: End of block interrupt. - * @arg USART_IT_RTO: Receive time out interrupt. - * @arg USART_IT_CTS: CTS change interrupt. - * @arg USART_IT_LBD: LIN Break detection interrupt. - * @arg USART_IT_TC: Transmission complete interrupt. - * @arg USART_IT_IDLE: IDLE line detected interrupt. - * @arg USART_IT_ORE: OverRun Error interrupt. - * @arg USART_IT_NE: Noise Error interrupt. - * @arg USART_IT_FE: Framing Error interrupt. - * @arg USART_IT_PE: Parity Error interrupt. + * This parameter can be one of the following values: + * @arg USART_IT_WU: Wake up interrupt. + * @arg USART_IT_CM: Character match interrupt. + * @arg USART_IT_EOB: End of block interrupt. + * @arg USART_IT_RTO: Receive time out interrupt. + * @arg USART_IT_CTS: CTS change interrupt. + * @arg USART_IT_LBD: LIN Break detection interrupt. + * @arg USART_IT_TC: Transmission complete interrupt. + * @arg USART_IT_IDLE: IDLE line detected interrupt. + * @arg USART_IT_ORE: OverRun Error interrupt. + * @arg USART_IT_NE: Noise Error interrupt. + * @arg USART_IT_FE: Framing Error interrupt. + * @arg USART_IT_PE: Parity Error interrupt. * * @note RXNE pending bit is cleared by a read to the USART_RDR register * (USART_ReceiveData()) or by writing 1 to the RXFRQ in the register diff --git a/lib/src/peripherals/stm32f0xx_wwdg.c b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_wwdg.c old mode 100755 new mode 100644 similarity index 89% rename from lib/src/peripherals/stm32f0xx_wwdg.c rename to Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_wwdg.c index 24c2247..8f2f5de --- a/lib/src/peripherals/stm32f0xx_wwdg.c +++ b/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_wwdg.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f0xx_wwdg.c * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 + * @version V1.0.1 + * @date 20-April-2012 * @brief This file provides firmware functions to manage the following * functionalities of the Window watchdog (WWDG) peripheral: * + Prescaler, Refresh window and Counter configuration @@ -138,11 +138,11 @@ void WWDG_DeInit(void) /** * @brief Sets the WWDG Prescaler. * @param WWDG_Prescaler: specifies the WWDG Prescaler. - * This parameter can be one of the following values: - * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1 - * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2 - * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4 - * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8 + * This parameter can be one of the following values: + * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1 + * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2 + * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4 + * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8 * @retval None */ void WWDG_SetPrescaler(uint32_t WWDG_Prescaler) @@ -161,7 +161,7 @@ void WWDG_SetPrescaler(uint32_t WWDG_Prescaler) /** * @brief Sets the WWDG window value. * @param WindowValue: specifies the window value to be compared to the downcounter. - * This parameter value must be lower than 0x80. + * This parameter value must be lower than 0x80. * @retval None */ void WWDG_SetWindowValue(uint8_t WindowValue) @@ -195,8 +195,8 @@ void WWDG_EnableIT(void) /** * @brief Sets the WWDG counter value. * @param Counter: specifies the watchdog counter value. - * This parameter must be a number between 0x40 and 0x7F (to prevent generating - * an immediate reset). + * This parameter must be a number between 0x40 and 0x7F (to prevent + * generating an immediate reset). * @retval None */ void WWDG_SetCounter(uint8_t Counter) @@ -227,8 +227,8 @@ void WWDG_SetCounter(uint8_t Counter) /** * @brief Enables WWDG and load the counter value. * @param Counter: specifies the watchdog counter value. - * This parameter must be a number between 0x40 and 0x7F (to prevent generating - * an immediate reset). + * This parameter must be a number between 0x40 and 0x7F (to prevent + * generating an immediate reset). * @retval None */ void WWDG_Enable(uint8_t Counter) diff --git a/Makefile b/Makefile index df02247..02b9cfe 100755 --- a/Makefile +++ b/Makefile @@ -6,6 +6,9 @@ SRCS = main.c system_stm32f0xx.c PROJ_NAME=main +# location of OpenOCD Board .cfg files (only used with 'make program') +OPENOCD_BOARD_DIR=/usr/share/openocd/scripts/board + # that's it, no need to change anything below this line! ################################################### @@ -13,20 +16,20 @@ PROJ_NAME=main CC=arm-none-eabi-gcc OBJCOPY=arm-none-eabi-objcopy -CFLAGS = -g -O2 -Wall -Tstm32_flash.ld +CFLAGS = -g -O2 -Wall -TDevice/stm32_flash.ld CFLAGS += -mlittle-endian -mthumb -mcpu=cortex-m0 -march=armv6s-m ################################################### vpath %.c src -vpath %.a lib +vpath %.a Libraries ROOT=$(shell pwd) -CFLAGS += -Iinc -Ilib -Ilib/inc -CFLAGS += -Ilib/inc/core -Ilib/inc/peripherals +CFLAGS += -Iinc -IDevice -ILibraries/CMSIS/Device/ST/STM32F0xx/Include +CFLAGS += -ILibraries/CMSIS/Include -ILibraries/STM32F0xx_StdPeriph_Driver/inc -SRCS += lib/startup_stm32f0xx.s # add startup file to build +SRCS += Device/startup_stm32f0xx.s # add startup file to build OBJS = $(SRCS:.c=.o) @@ -37,14 +40,17 @@ OBJS = $(SRCS:.c=.o) all: lib proj lib: - $(MAKE) -C lib + $(MAKE) -C Libraries proj: $(PROJ_NAME).elf $(PROJ_NAME).elf: $(SRCS) - $(CC) $(CFLAGS) $^ -o $@ -Llib -lstm32f0 + $(CC) $(CFLAGS) $^ -o $@ -LLibraries -lstm32f0 $(OBJCOPY) -O ihex $(PROJ_NAME).elf $(PROJ_NAME).hex $(OBJCOPY) -O binary $(PROJ_NAME).elf $(PROJ_NAME).bin + +program: $(PROJ_NAME).bin + openocd -f $(OPENOCD_BOARD_DIR)/stm32f0discovery.cfg -f extra/stm32f0-openocd.cfg -c "stm_flash `pwd`/$(PROJ_NAME).bin" -c shutdown clean: rm -f *.o diff --git a/README.md b/README.md index 1b34a22..50611e5 100644 --- a/README.md +++ b/README.md @@ -1,5 +1,53 @@ -This program illuminates the blue LED on an STM32F0-Discovery board. -(it's actually blinking really really fast) +#STM32F0-Discovery Application Template +This package is for use when compiling programs for STM32F05xx ARM microcontrollers using arm-none-eabi-gcc (I'm using the [Code Sourcery G++:Lite Edition](http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/editions/lite-edition/) toolchain). The Makefile in the main directory will call the Make file in the Libraries directory, thereby automatically building the STM peripheral library. However, running 'make clean' will not affect the peripherals library (the same command can be run from the Libraries directory to do this). + +This template will serve as a quick-start for those who do not wish to use an IDE, but rather develop in a text editor of choice and build from the command line. It is based on [an example template for the F4 Discovery board](http://jeremyherbert.net/get/stm32f4_getting_started) put together by Jeremy Herbert. + +##Possible bug in the STM32F0xx peripheral library?? + >It should be noted that I currently cannot compile the stock STM32F0xx peripheral library files (v1.0.0) without getting the following error: + >>STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dac.c:151:26: error: 'RCC_APB1Periph_DAC' undeclared (first use in this function) + + >The workaround is to include stm32f0xx_rcc.h in the stm32f0xx_dac.c file. That is because the constant the compiler is complaining about is defined in that header file. + + >**Compiler warning about assert_param():** When compiling the standard peripherals a warning is thrown about implicit declaration of assert_param(). This is due to the order in which files are being included. The function prototype is found in the stm32f0xx_conf.h file which for some reason is included after the peripherals are compiled. I don't know how to give it priority so it is included at right away. Please open an issue (or submit a pull request) if you know the compiler directives necessary to fix these warnings. + +##Subfolders: + +1. Library/ + * This is the Library/ folder from the STM32F0xx_StdPeriph_Lib_V1.0.0 standard peripheral driver library produced by STM. This preserves the original structure which should make it easy to roll in library upgrades as they are published + * **Makefile** is not part of the STM release, and must be copied over if the library is upgraded. + * **IMPORTANT:** Please read the section about regarding a possible bug in one of the peripheral library files. + +* Device/ + * Folder contains device specific files: + * **stm32_flash.ld** is the linker script taken from the STM32F0-Discovery firmware package. It is found in the following directory: + >Project/Demonstration/TrueSTUDIO/STM32F0-Discovery_Demo/ + + * **startup_stm32f0xx.s** is the startup file taken from the STM32F0-Discovery firmware package. It is found in the following directory: + >Libraries/CMSIS/ST/STM32F0xx/Source/Templates/TrueSTUDIO/ + + * **stm32f0xx_conf.h** is used to configure the peripheral library. The file was file taken from the STM32F0-Discovery firmware package. It is found in the following directory: + >Project/Demonstration/ + +* inc/ + * All include files for this particular project. + +* src/ + * All source files for this particular project (including main.c). + * **system_stm32f0xx.c** can be generated using an XLS file developed by STM. This sets up the system clock values for the project. The file included in this repository is taken from the STM32F0-Discovery firmware package. It is found in the following directory: + >Libraries/CMSIS/ST/STM32F0xx/Source/Templates/ + +* extra/ + * This contains a procedure file used to write the image to the board via OpenOCD + +##Loading the image on the board + +If you have OpenOCD installed 'make program' can be used to flash the .bin file to the board. OpenOCD must be installed with stlink enabled. Clone the github repository and use these commands to compile/install it: + + >./bootstrap + >./configure --prefix=/usr --enable-maintainer-mode --enable-stlink + >make + >sudo make install + +If there is an error finding the .cfg file, please double-check the OPENOCD_BOARD_DIR constant at the top of the Makefile (in this template directory, not in OpenOCD). -This is modelled afer the STM32F4 example found here: -http://jeremyherbert.net/get/stm32f4_getting_started diff --git a/extra/stm32f0-openocd.cfg b/extra/stm32f0-openocd.cfg new file mode 100644 index 0000000..7d6d72f --- /dev/null +++ b/extra/stm32f0-openocd.cfg @@ -0,0 +1,22 @@ +#This file can be used to automatically program the STM32F0-Discovery board's Flash memory from the command line +#After programming, the board must be power-cycled (briefly remove the power) for the program to start running +#This can be done by unpluggin the USB cable, or removing JP2 + +init + +proc stm_flash {IMGFILE} { + reset halt + sleep 100 + wait_halt 2 + flash write_image erase $IMGFILE 0x08000000 + sleep 100 + verify_image $IMGFILE 0x08000000 + sleep 100 +} + +proc stm_erase {} { + reset halt + sleep 100 + stm32f1x mass_erase 0 + sleep 100 +} diff --git a/lib/inc/stm32f0_discovery.h b/lib/inc/stm32f0_discovery.h deleted file mode 100755 index 09c03ce..0000000 --- a/lib/inc/stm32f0_discovery.h +++ /dev/null @@ -1,156 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f0_discovery.h - * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 - * @brief This file contains definitions for STM32F0-Discovery's Leds, push- - * buttons hardware resources. - ****************************************************************************** - * @attention - * - *

      © COPYRIGHT 2012 STMicroelectronics

      - * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F0_DISCOVERY_H -#define __STM32F0_DISCOVERY_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f0xx.h" - -/** @addtogroup Utilities - * @{ - */ - -/** @addtogroup STM32F0_DISCOVERY - * @{ - */ - -/** @addtogroup STM32F0_DISCOVERY_LOW_LEVEL - * @{ - */ - -/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Exported_Types - * @{ - */ -typedef enum -{ - LED3 = 0, - LED4 = 1 -} Led_TypeDef; - -typedef enum -{ - BUTTON_USER = 0, -} Button_TypeDef; - -typedef enum -{ - BUTTON_MODE_GPIO = 0, - BUTTON_MODE_EXTI = 1 -} ButtonMode_TypeDef; - -/** - * @} - */ - -/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Exported_Constants - * @{ - */ - -/** @addtogroup STM32F0_DISCOVERY_LOW_LEVEL_LED - * @{ - */ -#define LEDn 2 - -#define LED3_PIN GPIO_Pin_9 -#define LED3_GPIO_PORT GPIOC -#define LED3_GPIO_CLK RCC_AHBPeriph_GPIOC - -#define LED4_PIN GPIO_Pin_8 -#define LED4_GPIO_PORT GPIOC -#define LED4_GPIO_CLK RCC_AHBPeriph_GPIOC - -/** - * @} - */ - -/** @addtogroup SSTM32F0_DISCOVERY_LOW_LEVEL_BUTTON - * @{ - */ -#define BUTTONn 1 - -/** - * @brief USER push-button - */ -#define USER_BUTTON_PIN GPIO_Pin_0 -#define USER_BUTTON_GPIO_PORT GPIOA -#define USER_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOA -#define USER_BUTTON_EXTI_LINE EXTI_Line0 -#define USER_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOA -#define USER_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource0 -#define USER_BUTTON_EXTI_IRQn EXTI0_1_IRQn - -/** - * @} - */ - - -/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Exported_Functions - * @{ - */ -void STM_EVAL_LEDInit(Led_TypeDef Led); -void STM_EVAL_LEDOn(Led_TypeDef Led); -void STM_EVAL_LEDOff(Led_TypeDef Led); -void STM_EVAL_LEDToggle(Led_TypeDef Led); -void STM_EVAL_PBInit(Button_TypeDef Button, ButtonMode_TypeDef Button_Mode); -uint32_t STM_EVAL_PBGetState(Button_TypeDef Button); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F0_DISCOVERY_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/lib/src/stm32f0_discovery.c b/lib/src/stm32f0_discovery.c deleted file mode 100755 index 416baa4..0000000 --- a/lib/src/stm32f0_discovery.c +++ /dev/null @@ -1,256 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f0_discovery.c - * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 - * @brief This file provides set of firmware functions to manage Leds and - * push-button available on STM32F0-DISCOVERY Kit from STMicroelectronics. - ****************************************************************************** - * @attention - * - *

      © COPYRIGHT 2012 STMicroelectronics

      - * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f0_discovery.h" - -/** @addtogroup Utilities - * @{ - */ - -/** @addtogroup STM32F0_DISCOVERY - * @{ - */ - -/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL - * @brief This file provides firmware functions to manage Leds and push-buttons, - * available on STM32F0_DISCOVERY evaluation board from STMicroelectronics. - * @{ - */ - -/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Private_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Private_Variables - * @{ - */ -GPIO_TypeDef* GPIO_PORT[LEDn] = {LED3_GPIO_PORT, LED4_GPIO_PORT}; -const uint16_t GPIO_PIN[LEDn] = {LED3_PIN, LED4_PIN}; -const uint32_t GPIO_CLK[LEDn] = {LED3_GPIO_CLK, LED4_GPIO_CLK}; - -GPIO_TypeDef* BUTTON_PORT[BUTTONn] = {USER_BUTTON_GPIO_PORT}; - -const uint16_t BUTTON_PIN[BUTTONn] = {USER_BUTTON_PIN}; - -const uint32_t BUTTON_CLK[BUTTONn] = {USER_BUTTON_GPIO_CLK}; - -const uint16_t BUTTON_EXTI_LINE[BUTTONn] = {USER_BUTTON_EXTI_LINE}; - -const uint16_t BUTTON_PORT_SOURCE[BUTTONn] = {USER_BUTTON_EXTI_PORT_SOURCE}; - -const uint16_t BUTTON_PIN_SOURCE[BUTTONn] = {USER_BUTTON_EXTI_PIN_SOURCE}; - -const uint16_t BUTTON_IRQn[BUTTONn] = {USER_BUTTON_EXTI_IRQn}; - -/** - * @} - */ - - -/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Private_Functions - * @{ - */ - -/** - * @brief Configures LED GPIO. - * @param Led: Specifies the Led to be configured. - * This parameter can be one of following parameters: - * @arg LED3 - * @arg LED4 - * @retval None - */ -void STM_EVAL_LEDInit(Led_TypeDef Led) -{ - GPIO_InitTypeDef GPIO_InitStructure; - - /* Enable the GPIO_LED Clock */ - RCC_AHBPeriphClockCmd(GPIO_CLK[Led], ENABLE); - - /* Configure the GPIO_LED pin */ - GPIO_InitStructure.GPIO_Pin = GPIO_PIN[Led]; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; - GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; - GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIO_PORT[Led], &GPIO_InitStructure); -} - -/** - * @brief Turns selected LED On. - * @param Led: Specifies the Led to be set on. - * This parameter can be one of following parameters: - * @arg LED3 - * @arg LED4 - * @retval None - */ -void STM_EVAL_LEDOn(Led_TypeDef Led) -{ - GPIO_PORT[Led]->BSRR = GPIO_PIN[Led]; -} - -/** - * @brief Turns selected LED Off. - * @param Led: Specifies the Led to be set off. - * This parameter can be one of following parameters: - * @arg LED3 - * @arg LED4 - * @retval None - */ -void STM_EVAL_LEDOff(Led_TypeDef Led) -{ - GPIO_PORT[Led]->BRR = GPIO_PIN[Led]; -} - -/** - * @brief Toggles the selected LED. - * @param Led: Specifies the Led to be toggled. - * This parameter can be one of following parameters: - * @arg LED3 - * @arg LED4 - * @retval None - */ -void STM_EVAL_LEDToggle(Led_TypeDef Led) -{ - GPIO_PORT[Led]->ODR ^= GPIO_PIN[Led]; -} - -/** - * @brief Configures Button GPIO and EXTI Line. - * @param Button: Specifies the Button to be configured. - * This parameter can be: - * @arg BUTTON_USER: User Push Button - * @param Button_Mode: Specifies Button mode. - * This parameter can be one of following parameters: - * @arg BUTTON_MODE_GPIO: Button will be used as simple IO - * @arg BUTTON_MODE_EXTI: Button will be connected to EXTI line with interrupt - * generation capability - * @retval None - */ -void STM_EVAL_PBInit(Button_TypeDef Button, ButtonMode_TypeDef Button_Mode) -{ - GPIO_InitTypeDef GPIO_InitStructure; - EXTI_InitTypeDef EXTI_InitStructure; - NVIC_InitTypeDef NVIC_InitStructure; - - /* Enable the BUTTON Clock */ - RCC_AHBPeriphClockCmd(BUTTON_CLK[Button], ENABLE); - RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); - - /* Configure Button pin as input */ - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; - GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; - GPIO_InitStructure.GPIO_Pin = BUTTON_PIN[Button]; - GPIO_Init(BUTTON_PORT[Button], &GPIO_InitStructure); - - if (Button_Mode == BUTTON_MODE_EXTI) - { - /* Connect Button EXTI Line to Button GPIO Pin */ - SYSCFG_EXTILineConfig(BUTTON_PORT_SOURCE[Button], BUTTON_PIN_SOURCE[Button]); - - /* Configure Button EXTI line */ - EXTI_InitStructure.EXTI_Line = BUTTON_EXTI_LINE[Button]; - EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; - if (Button != BUTTON_USER) - { - EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; - } - else - { - EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling; - } - EXTI_InitStructure.EXTI_LineCmd = ENABLE; - EXTI_Init(&EXTI_InitStructure); - - /* Enable and set Button EXTI Interrupt to the lowest priority */ - NVIC_InitStructure.NVIC_IRQChannel = BUTTON_IRQn[Button]; - NVIC_InitStructure.NVIC_IRQChannelPriority = 0x03; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - - NVIC_Init(&NVIC_InitStructure); - } -} - -/** - * @brief Returns the selected Button state. - * @param Button: Specifies the Button to be checked. - * This parameter can be one of following parameters: - * @arg BUTTON_USER: User Push Button - * @retval The Button GPIO pin value. - */ -uint32_t STM_EVAL_PBGetState(Button_TypeDef Button) -{ - /* There is no Wakeup button on STM32f0-Discovery Kit */ - return GPIO_ReadInputDataBit(BUTTON_PORT[Button], BUTTON_PIN[Button]); -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/main.c b/src/main.c index 9f198ce..ede5792 100755 --- a/src/main.c +++ b/src/main.c @@ -1,17 +1,8 @@ #include "stm32f0xx_conf.h" -/* -void TIM2_IRQHandler(void) { - // flash on update event - if (TIM2->SR & TIM_SR_UIF) GPIOC->ODR ^= (1 << 8); - - TIM2->SR = 0x0; // reset the status register -} -*/ - void SysTick_Handler(void) { static uint16_t tick = 0; - + switch (tick++) { case 100: tick = 0; @@ -23,32 +14,20 @@ void SysTick_Handler(void) { int main(void) { -//#elif CONFIG_STM32F0_DISCOVERY -// -//#define GPIOC 0x48000800 /* port C */ -//#define GPIOC_MODER (GPIOC + 0x00) /* port mode register */ -//#define LED_PORT_ODR (GPIOC + 0x14) /* port output data register */ -// -//#define LED_BLUE (1 << 8) /* port C, pin 8 */ -//#define LED_GREEN (1 << 9) /* port C, pin 9 */ -//#define LED_ORANGE 0 -//#define LED_RED 0 - - RCC->AHBENR |= RCC_AHBENR_GPIOCEN; // enable the clock to GPIOC + RCC->AHBENR |= RCC_AHBENR_GPIOCEN; // enable the clock to GPIOC //(RM0091 lists this as IOPCEN, not GPIOCEN) RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // enable TIM2 clock GPIOC->MODER = (1 << 16); - - //NVIC->ISER[0] |= 1<< (TIM2_IRQn); // enable the TIM2 IRQ + SysTick_Config(SystemCoreClock/100); - + TIM2->PSC = 0x0; // no prescaler, timer counts up in sync with the peripheral clock TIM2->DIER |= TIM_DIER_UIE; // enable update interrupt TIM2->ARR = 0x01; // count to 1 (autoreload value 1) TIM2->CR1 |= TIM_CR1_ARPE | TIM_CR1_CEN; // autoreload on, counter enabled TIM2->EGR = 1; // trigger update event to reload timer registers - + while(1); - + } diff --git a/src/system_stm32f0xx.c b/src/system_stm32f0xx.c old mode 100755 new mode 100644
        +
      1. About
        2. +
      2. Motivation
        3. +
      3. Requirements
        4. +
      4. Format
        5. +
      5. Example
        6. +
      6. Questions & Answers
        7. +