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stm32f0-discovery
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Major restructuring to match STM peripherals library; added auto flash programming via OpenOCD

This commit is contained in:
Mike Szczys 2012-06-16 13:47:01 -05:00
parent 6c17053b93
commit 61b6afcbcc
79 changed files with 11860 additions and 2654 deletions
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0
lib/startup_stm32f0xx.s → Device/startup_stm32f0xx.s
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31
lib/inc/stm32f0xx_conf.h → Device/stm32f0xx_conf.h Executable file → Normal file
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@ -1,6 +1,6 @@
/**
******************************************************************************
* @file IO_Toggle/stm32f0xx_conf.h
* @file stm32F0xx_conf.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
@ -23,7 +23,7 @@
* limitations under the License.
*
******************************************************************************
*/
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F0XX_CONF_H
@ -31,26 +31,26 @@
/* Includes ------------------------------------------------------------------*/
/* Comment the line below to disable peripheral header file inclusion */
#include "stm32f0xx_adc.h"
#include "stm32f0xx_cec.h"
/* #include "stm32f0xx_adc.h" */
#include "stm32f0xx_cec.h"
#include "stm32f0xx_crc.h"
#include "stm32f0xx_comp.h"
#include "stm32f0xx_dac.h"
#include "stm32f0xx_comp.h"
#include "stm32f0xx_dac.h"
#include "stm32f0xx_dbgmcu.h"
#include "stm32f0xx_dma.h"
#include "stm32f0xx_exti.h"
#include "stm32f0xx_dma.h"
#include "stm32f0xx_exti.h"
#include "stm32f0xx_flash.h"
#include "stm32f0xx_gpio.h"
#include "stm32f0xx_syscfg.h"
#include "stm32f0xx_gpio.h"
#include "stm32f0xx_syscfg.h"
#include "stm32f0xx_i2c.h"
#include "stm32f0xx_iwdg.h"
#include "stm32f0xx_pwr.h"
#include "stm32f0xx_rcc.h"
#include "stm32f0xx_rtc.h"
#include "stm32f0xx_pwr.h"
#include "stm32f0xx_rcc.h"
#include "stm32f0xx_rtc.h"
#include "stm32f0xx_spi.h"
#include "stm32f0xx_tim.h"
#include "stm32f0xx_usart.h"
#include "stm32f0xx_wwdg.h"
#include "stm32f0xx_usart.h"
#include "stm32f0xx_wwdg.h"
#include "stm32f0xx_misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
/* Exported types ------------------------------------------------------------*/
@ -58,7 +58,6 @@
/* Uncomment the line below to expanse the "assert_param" macro in the
Standard Peripheral Library drivers code */
/* #define USE_FULL_ASSERT 1 */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT

BIN
Libraries/CMSIS/CMSIS END USER LICENCE AGREEMENT.pdf Normal file
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454
lib/inc/stm32f0xx.h → Libraries/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File.
* This file contains all the peripheral register's definitions, bits
* definitions and memory mapping for STM32F0xx devices.
@ -61,7 +61,7 @@
* @{
*/
/* Uncomment the line below according to the target STM32F-0 device used in your
/* Uncomment the line below according to the target STM32F0 device used in your
application
*/
@ -71,8 +71,9 @@
/* Tip: To avoid modifying this file each time you need to switch between these
devices, you can define the device in your toolchain compiler preprocessor.
- STM32F0xx devices are STM32F050xx microcontrollers where the Flash memory
density ranges between 32 and 64 Kbytes.
STM32F0xx devices are:
- STM32F050xx microcontrollers where the Flash memory density can go up to 32 Kbytes.
- STM32F051xx microcontrollers where the Flash memory density can go up to 64 Kbytes.
*/
#if !defined (STM32F0XX)
@ -138,11 +139,11 @@
#endif /* LSE_VALUE */
/**
* @brief STM32F0xx Standard Peripheral Library version number V1.0.0
* @brief STM32F0xx Standard Peripheral Library version number V1.0.1
*/
#define __STM32F0XX_STDPERIPH_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32F0XX_STDPERIPH_VERSION_SUB1 (0x00) /*!< [23:16] sub1 version */
#define __STM32F0XX_STDPERIPH_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F0XX_STDPERIPH_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
#define __STM32F0XX_STDPERIPH_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F0XX_STDPERIPH_VERSION ((__STM32F0XX_STDPERIPH_VERSION_MAIN << 24)\
|(__STM32F0XX_STDPERIPH_VERSION_SUB1 << 16)\
@ -2176,266 +2177,263 @@ typedef struct
/* */
/******************************************************************************/
/******************** Bits definition for RTC_TR register *******************/
#define RTC_TR_PM ((uint32_t)0x00400000) /*!< */
#define RTC_TR_HT ((uint32_t)0x00300000) /*!< */
#define RTC_TR_HT_0 ((uint32_t)0x00100000) /*!< */
#define RTC_TR_HT_1 ((uint32_t)0x00200000) /*!< */
#define RTC_TR_HU ((uint32_t)0x000F0000) /*!< */
#define RTC_TR_HU_0 ((uint32_t)0x00010000) /*!< */
#define RTC_TR_HU_1 ((uint32_t)0x00020000) /*!< */
#define RTC_TR_HU_2 ((uint32_t)0x00040000) /*!< */
#define RTC_TR_HU_3 ((uint32_t)0x00080000) /*!< */
#define RTC_TR_MNT ((uint32_t)0x00007000) /*!< */
#define RTC_TR_MNT_0 ((uint32_t)0x00001000) /*!< */
#define RTC_TR_MNT_1 ((uint32_t)0x00002000) /*!< */
#define RTC_TR_MNT_2 ((uint32_t)0x00004000) /*!< */
#define RTC_TR_MNU ((uint32_t)0x00000F00) /*!< */
#define RTC_TR_MNU_0 ((uint32_t)0x00000100) /*!< */
#define RTC_TR_MNU_1 ((uint32_t)0x00000200) /*!< */
#define RTC_TR_MNU_2 ((uint32_t)0x00000400) /*!< */
#define RTC_TR_MNU_3 ((uint32_t)0x00000800) /*!< */
#define RTC_TR_ST ((uint32_t)0x00000070) /*!< */
#define RTC_TR_ST_0 ((uint32_t)0x00000010) /*!< */
#define RTC_TR_ST_1 ((uint32_t)0x00000020) /*!< */
#define RTC_TR_ST_2 ((uint32_t)0x00000040) /*!< */
#define RTC_TR_SU ((uint32_t)0x0000000F) /*!< */
#define RTC_TR_SU_0 ((uint32_t)0x00000001) /*!< */
#define RTC_TR_SU_1 ((uint32_t)0x00000002) /*!< */
#define RTC_TR_SU_2 ((uint32_t)0x00000004) /*!< */
#define RTC_TR_SU_3 ((uint32_t)0x00000008) /*!< */
#define RTC_TR_PM ((uint32_t)0x00400000)
#define RTC_TR_HT ((uint32_t)0x00300000)
#define RTC_TR_HT_0 ((uint32_t)0x00100000)
#define RTC_TR_HT_1 ((uint32_t)0x00200000)
#define RTC_TR_HU ((uint32_t)0x000F0000)
#define RTC_TR_HU_0 ((uint32_t)0x00010000)
#define RTC_TR_HU_1 ((uint32_t)0x00020000)
#define RTC_TR_HU_2 ((uint32_t)0x00040000)
#define RTC_TR_HU_3 ((uint32_t)0x00080000)
#define RTC_TR_MNT ((uint32_t)0x00007000)
#define RTC_TR_MNT_0 ((uint32_t)0x00001000)
#define RTC_TR_MNT_1 ((uint32_t)0x00002000)
#define RTC_TR_MNT_2 ((uint32_t)0x00004000)
#define RTC_TR_MNU ((uint32_t)0x00000F00)
#define RTC_TR_MNU_0 ((uint32_t)0x00000100)
#define RTC_TR_MNU_1 ((uint32_t)0x00000200)
#define RTC_TR_MNU_2 ((uint32_t)0x00000400)
#define RTC_TR_MNU_3 ((uint32_t)0x00000800)
#define RTC_TR_ST ((uint32_t)0x00000070)
#define RTC_TR_ST_0 ((uint32_t)0x00000010)
#define RTC_TR_ST_1 ((uint32_t)0x00000020)
#define RTC_TR_ST_2 ((uint32_t)0x00000040)
#define RTC_TR_SU ((uint32_t)0x0000000F)
#define RTC_TR_SU_0 ((uint32_t)0x00000001)
#define RTC_TR_SU_1 ((uint32_t)0x00000002)
#define RTC_TR_SU_2 ((uint32_t)0x00000004)
#define RTC_TR_SU_3 ((uint32_t)0x00000008)
/******************** Bits definition for RTC_DR register *******************/
#define RTC_DR_YT ((uint32_t)0x00F00000) /*!< */
#define RTC_DR_YT_0 ((uint32_t)0x00100000) /*!< */
#define RTC_DR_YT_1 ((uint32_t)0x00200000) /*!< */
#define RTC_DR_YT_2 ((uint32_t)0x00400000) /*!< */
#define RTC_DR_YT_3 ((uint32_t)0x00800000) /*!< */
#define RTC_DR_YU ((uint32_t)0x000F0000) /*!< */
#define RTC_DR_YU_0 ((uint32_t)0x00010000) /*!< */
#define RTC_DR_YU_1 ((uint32_t)0x00020000) /*!< */
#define RTC_DR_YU_2 ((uint32_t)0x00040000) /*!< */
#define RTC_DR_YU_3 ((uint32_t)0x00080000) /*!< */
#define RTC_DR_WDU ((uint32_t)0x0000E000) /*!< */
#define RTC_DR_WDU_0 ((uint32_t)0x00002000) /*!< */
#define RTC_DR_WDU_1 ((uint32_t)0x00004000) /*!< */
#define RTC_DR_WDU_2 ((uint32_t)0x00008000) /*!< */
#define RTC_DR_MT ((uint32_t)0x00001000) /*!< */
#define RTC_DR_MU ((uint32_t)0x00000F00) /*!< */
#define RTC_DR_MU_0 ((uint32_t)0x00000100) /*!< */
#define RTC_DR_MU_1 ((uint32_t)0x00000200) /*!< */
#define RTC_DR_MU_2 ((uint32_t)0x00000400) /*!< */
#define RTC_DR_MU_3 ((uint32_t)0x00000800) /*!< */
#define RTC_DR_DT ((uint32_t)0x00000030) /*!< */
#define RTC_DR_DT_0 ((uint32_t)0x00000010) /*!< */
#define RTC_DR_DT_1 ((uint32_t)0x00000020) /*!< */
#define RTC_DR_DU ((uint32_t)0x0000000F) /*!< */
#define RTC_DR_DU_0 ((uint32_t)0x00000001) /*!< */
#define RTC_DR_DU_1 ((uint32_t)0x00000002) /*!< */
#define RTC_DR_DU_2 ((uint32_t)0x00000004) /*!< */
#define RTC_DR_DU_3 ((uint32_t)0x00000008) /*!< */
#define RTC_DR_YT ((uint32_t)0x00F00000)
#define RTC_DR_YT_0 ((uint32_t)0x00100000)
#define RTC_DR_YT_1 ((uint32_t)0x00200000)
#define RTC_DR_YT_2 ((uint32_t)0x00400000)
#define RTC_DR_YT_3 ((uint32_t)0x00800000)
#define RTC_DR_YU ((uint32_t)0x000F0000)
#define RTC_DR_YU_0 ((uint32_t)0x00010000)
#define RTC_DR_YU_1 ((uint32_t)0x00020000)
#define RTC_DR_YU_2 ((uint32_t)0x00040000)
#define RTC_DR_YU_3 ((uint32_t)0x00080000)
#define RTC_DR_WDU ((uint32_t)0x0000E000)
#define RTC_DR_WDU_0 ((uint32_t)0x00002000)
#define RTC_DR_WDU_1 ((uint32_t)0x00004000)
#define RTC_DR_WDU_2 ((uint32_t)0x00008000)
#define RTC_DR_MT ((uint32_t)0x00001000)
#define RTC_DR_MU ((uint32_t)0x00000F00)
#define RTC_DR_MU_0 ((uint32_t)0x00000100)
#define RTC_DR_MU_1 ((uint32_t)0x00000200)
#define RTC_DR_MU_2 ((uint32_t)0x00000400)
#define RTC_DR_MU_3 ((uint32_t)0x00000800)
#define RTC_DR_DT ((uint32_t)0x00000030)
#define RTC_DR_DT_0 ((uint32_t)0x00000010)
#define RTC_DR_DT_1 ((uint32_t)0x00000020)
#define RTC_DR_DU ((uint32_t)0x0000000F)
#define RTC_DR_DU_0 ((uint32_t)0x00000001)
#define RTC_DR_DU_1 ((uint32_t)0x00000002)
#define RTC_DR_DU_2 ((uint32_t)0x00000004)
#define RTC_DR_DU_3 ((uint32_t)0x00000008)
/******************** Bits definition for RTC_CR register *******************/
#define RTC_CR_COE ((uint32_t)0x00800000) /*!< */
#define RTC_CR_OSEL ((uint32_t)0x00600000) /*!< */
#define RTC_CR_OSEL_0 ((uint32_t)0x00200000) /*!< */
#define RTC_CR_OSEL_1 ((uint32_t)0x00400000) /*!< */
#define RTC_CR_POL ((uint32_t)0x00100000) /*!< */
#define RTC_CR_CALSEL ((uint32_t)0x00080000) /*!< */
#define RTC_CR_BCK ((uint32_t)0x00040000) /*!< */
#define RTC_CR_SUB1H ((uint32_t)0x00020000) /*!< */
#define RTC_CR_ADD1H ((uint32_t)0x00010000) /*!< */
#define RTC_CR_TSIE ((uint32_t)0x00008000) /*!< */
#define RTC_CR_ALRAIE ((uint32_t)0x00001000) /*!< */
#define RTC_CR_TSE ((uint32_t)0x00000800) /*!< */
#define RTC_CR_ALRAE ((uint32_t)0x00000100) /*!< */
#define RTC_CR_DCE ((uint32_t)0x00000080) /*!< */
#define RTC_CR_FMT ((uint32_t)0x00000040) /*!< */
#define RTC_CR_BYPSHAD ((uint32_t)0x00000020) /*!< */
#define RTC_CR_REFCKON ((uint32_t)0x00000010) /*!< */
#define RTC_CR_TSEDGE ((uint32_t)0x00000008) /*!< */
#define RTC_CR_COE ((uint32_t)0x00800000)
#define RTC_CR_OSEL ((uint32_t)0x00600000)
#define RTC_CR_OSEL_0 ((uint32_t)0x00200000)
#define RTC_CR_OSEL_1 ((uint32_t)0x00400000)
#define RTC_CR_POL ((uint32_t)0x00100000)
#define RTC_CR_CALSEL ((uint32_t)0x00080000)
#define RTC_CR_BCK ((uint32_t)0x00040000)
#define RTC_CR_SUB1H ((uint32_t)0x00020000)
#define RTC_CR_ADD1H ((uint32_t)0x00010000)
#define RTC_CR_TSIE ((uint32_t)0x00008000)
#define RTC_CR_ALRAIE ((uint32_t)0x00001000)
#define RTC_CR_TSE ((uint32_t)0x00000800)
#define RTC_CR_ALRAE ((uint32_t)0x00000100)
#define RTC_CR_DCE ((uint32_t)0x00000080)
#define RTC_CR_FMT ((uint32_t)0x00000040)
#define RTC_CR_BYPSHAD ((uint32_t)0x00000020)
#define RTC_CR_REFCKON ((uint32_t)0x00000010)
#define RTC_CR_TSEDGE ((uint32_t)0x00000008)
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF ((uint32_t)0x00010000) /*!< */
#define RTC_ISR_TAMP3F ((uint32_t)0x00008000) /*!< */
#define RTC_ISR_TAMP2F ((uint32_t)0x00004000) /*!< */
#define RTC_ISR_TAMP1F ((uint32_t)0x00002000) /*!< */
#define RTC_ISR_TSOVF ((uint32_t)0x00001000) /*!< */
#define RTC_ISR_TSF ((uint32_t)0x00000800) /*!< */
#define RTC_ISR_ALRAF ((uint32_t)0x00000100) /*!< */
#define RTC_ISR_INIT ((uint32_t)0x00000080) /*!< */
#define RTC_ISR_INITF ((uint32_t)0x00000040) /*!< */
#define RTC_ISR_RSF ((uint32_t)0x00000020) /*!< */
#define RTC_ISR_INITS ((uint32_t)0x00000010) /*!< */
#define RTC_ISR_SHPF ((uint32_t)0x00000008) /*!< */
#define RTC_ISR_ALRAWF ((uint32_t)0x00000001) /*!< */
#define RTC_ISR_RECALPF ((uint32_t)0x00010000)
#define RTC_ISR_TAMP2F ((uint32_t)0x00004000)
#define RTC_ISR_TAMP1F ((uint32_t)0x00002000)
#define RTC_ISR_TSOVF ((uint32_t)0x00001000)
#define RTC_ISR_TSF ((uint32_t)0x00000800)
#define RTC_ISR_ALRAF ((uint32_t)0x00000100)
#define RTC_ISR_INIT ((uint32_t)0x00000080)
#define RTC_ISR_INITF ((uint32_t)0x00000040)
#define RTC_ISR_RSF ((uint32_t)0x00000020)
#define RTC_ISR_INITS ((uint32_t)0x00000010)
#define RTC_ISR_SHPF ((uint32_t)0x00000008)
#define RTC_ISR_ALRAWF ((uint32_t)0x00000001)
/******************** Bits definition for RTC_PRER register *****************/
#define RTC_PRER_PREDIV_A ((uint32_t)0x007F0000) /*!< */
#define RTC_PRER_PREDIV_S ((uint32_t)0x00007FFF) /*!< */
#define RTC_PRER_PREDIV_A ((uint32_t)0x007F0000)
#define RTC_PRER_PREDIV_S ((uint32_t)0x00007FFF)
/******************** Bits definition for RTC_ALRMAR register ***************/
#define RTC_ALRMAR_MSK4 ((uint32_t)0x80000000) /*!< */
#define RTC_ALRMAR_WDSEL ((uint32_t)0x40000000) /*!< */
#define RTC_ALRMAR_DT ((uint32_t)0x30000000) /*!< */
#define RTC_ALRMAR_DT_0 ((uint32_t)0x10000000) /*!< */
#define RTC_ALRMAR_DT_1 ((uint32_t)0x20000000) /*!< */
#define RTC_ALRMAR_DU ((uint32_t)0x0F000000) /*!< */
#define RTC_ALRMAR_DU_0 ((uint32_t)0x01000000) /*!< */
#define RTC_ALRMAR_DU_1 ((uint32_t)0x02000000) /*!< */
#define RTC_ALRMAR_DU_2 ((uint32_t)0x04000000) /*!< */
#define RTC_ALRMAR_DU_3 ((uint32_t)0x08000000) /*!< */
#define RTC_ALRMAR_MSK3 ((uint32_t)0x00800000) /*!< */
#define RTC_ALRMAR_PM ((uint32_t)0x00400000) /*!< */
#define RTC_ALRMAR_HT ((uint32_t)0x00300000) /*!< */
#define RTC_ALRMAR_HT_0 ((uint32_t)0x00100000) /*!< */
#define RTC_ALRMAR_HT_1 ((uint32_t)0x00200000) /*!< */
#define RTC_ALRMAR_HU ((uint32_t)0x000F0000) /*!< */
#define RTC_ALRMAR_HU_0 ((uint32_t)0x00010000) /*!< */
#define RTC_ALRMAR_HU_1 ((uint32_t)0x00020000) /*!< */
#define RTC_ALRMAR_HU_2 ((uint32_t)0x00040000) /*!< */
#define RTC_ALRMAR_HU_3 ((uint32_t)0x00080000) /*!< */
#define RTC_ALRMAR_MSK2 ((uint32_t)0x00008000) /*!< */
#define RTC_ALRMAR_MNT ((uint32_t)0x00007000) /*!< */
#define RTC_ALRMAR_MNT_0 ((uint32_t)0x00001000) /*!< */
#define RTC_ALRMAR_MNT_1 ((uint32_t)0x00002000) /*!< */
#define RTC_ALRMAR_MNT_2 ((uint32_t)0x00004000) /*!< */
#define RTC_ALRMAR_MNU ((uint32_t)0x00000F00) /*!< */
#define RTC_ALRMAR_MNU_0 ((uint32_t)0x00000100) /*!< */
#define RTC_ALRMAR_MNU_1 ((uint32_t)0x00000200) /*!< */
#define RTC_ALRMAR_MNU_2 ((uint32_t)0x00000400) /*!< */
#define RTC_ALRMAR_MNU_3 ((uint32_t)0x00000800) /*!< */
#define RTC_ALRMAR_MSK1 ((uint32_t)0x00000080) /*!< */
#define RTC_ALRMAR_ST ((uint32_t)0x00000070) /*!< */
#define RTC_ALRMAR_ST_0 ((uint32_t)0x00000010) /*!< */
#define RTC_ALRMAR_ST_1 ((uint32_t)0x00000020) /*!< */
#define RTC_ALRMAR_ST_2 ((uint32_t)0x00000040) /*!< */
#define RTC_ALRMAR_SU ((uint32_t)0x0000000F) /*!< */
#define RTC_ALRMAR_SU_0 ((uint32_t)0x00000001) /*!< */
#define RTC_ALRMAR_SU_1 ((uint32_t)0x00000002) /*!< */
#define RTC_ALRMAR_SU_2 ((uint32_t)0x00000004) /*!< */
#define RTC_ALRMAR_SU_3 ((uint32_t)0x00000008) /*!< */
#define RTC_ALRMAR_MSK4 ((uint32_t)0x80000000)
#define RTC_ALRMAR_WDSEL ((uint32_t)0x40000000)
#define RTC_ALRMAR_DT ((uint32_t)0x30000000)
#define RTC_ALRMAR_DT_0 ((uint32_t)0x10000000)
#define RTC_ALRMAR_DT_1 ((uint32_t)0x20000000)
#define RTC_ALRMAR_DU ((uint32_t)0x0F000000)
#define RTC_ALRMAR_DU_0 ((uint32_t)0x01000000)
#define RTC_ALRMAR_DU_1 ((uint32_t)0x02000000)
#define RTC_ALRMAR_DU_2 ((uint32_t)0x04000000)
#define RTC_ALRMAR_DU_3 ((uint32_t)0x08000000)
#define RTC_ALRMAR_MSK3 ((uint32_t)0x00800000)
#define RTC_ALRMAR_PM ((uint32_t)0x00400000)
#define RTC_ALRMAR_HT ((uint32_t)0x00300000)
#define RTC_ALRMAR_HT_0 ((uint32_t)0x00100000)
#define RTC_ALRMAR_HT_1 ((uint32_t)0x00200000)
#define RTC_ALRMAR_HU ((uint32_t)0x000F0000)
#define RTC_ALRMAR_HU_0 ((uint32_t)0x00010000)
#define RTC_ALRMAR_HU_1 ((uint32_t)0x00020000)
#define RTC_ALRMAR_HU_2 ((uint32_t)0x00040000)
#define RTC_ALRMAR_HU_3 ((uint32_t)0x00080000)
#define RTC_ALRMAR_MSK2 ((uint32_t)0x00008000)
#define RTC_ALRMAR_MNT ((uint32_t)0x00007000)
#define RTC_ALRMAR_MNT_0 ((uint32_t)0x00001000)
#define RTC_ALRMAR_MNT_1 ((uint32_t)0x00002000)
#define RTC_ALRMAR_MNT_2 ((uint32_t)0x00004000)
#define RTC_ALRMAR_MNU ((uint32_t)0x00000F00)
#define RTC_ALRMAR_MNU_0 ((uint32_t)0x00000100)
#define RTC_ALRMAR_MNU_1 ((uint32_t)0x00000200)
#define RTC_ALRMAR_MNU_2 ((uint32_t)0x00000400)
#define RTC_ALRMAR_MNU_3 ((uint32_t)0x00000800)
#define RTC_ALRMAR_MSK1 ((uint32_t)0x00000080)
#define RTC_ALRMAR_ST ((uint32_t)0x00000070)
#define RTC_ALRMAR_ST_0 ((uint32_t)0x00000010)
#define RTC_ALRMAR_ST_1 ((uint32_t)0x00000020)
#define RTC_ALRMAR_ST_2 ((uint32_t)0x00000040)
#define RTC_ALRMAR_SU ((uint32_t)0x0000000F)
#define RTC_ALRMAR_SU_0 ((uint32_t)0x00000001)
#define RTC_ALRMAR_SU_1 ((uint32_t)0x00000002)
#define RTC_ALRMAR_SU_2 ((uint32_t)0x00000004)
#define RTC_ALRMAR_SU_3 ((uint32_t)0x00000008)
/******************** Bits definition for RTC_WPR register ******************/
#define RTC_WPR_KEY ((uint32_t)0x000000FF) /*!< */
#define RTC_WPR_KEY ((uint32_t)0x000000FF)
/******************** Bits definition for RTC_SSR register ******************/
#define RTC_SSR_SS ((uint32_t)0x0003FFFF) /*!< */
#define RTC_SSR_SS ((uint32_t)0x0003FFFF)
/******************** Bits definition for RTC_SHIFTR register ***************/
#define RTC_SHIFTR_SUBFS ((uint32_t)0x00007FFF) /*!< */
#define RTC_SHIFTR_ADD1S ((uint32_t)0x80000000) /*!< */
#define RTC_SHIFTR_SUBFS ((uint32_t)0x00007FFF)
#define RTC_SHIFTR_ADD1S ((uint32_t)0x80000000)
/******************** Bits definition for RTC_TSTR register *****************/
#define RTC_TSTR_PM ((uint32_t)0x00400000) /*!< */
#define RTC_TSTR_HT ((uint32_t)0x00300000) /*!< */
#define RTC_TSTR_HT_0 ((uint32_t)0x00100000) /*!< */
#define RTC_TSTR_HT_1 ((uint32_t)0x00200000) /*!< */
#define RTC_TSTR_HU ((uint32_t)0x000F0000) /*!< */
#define RTC_TSTR_HU_0 ((uint32_t)0x00010000) /*!< */
#define RTC_TSTR_HU_1 ((uint32_t)0x00020000) /*!< */
#define RTC_TSTR_HU_2 ((uint32_t)0x00040000) /*!< */
#define RTC_TSTR_HU_3 ((uint32_t)0x00080000) /*!< */
#define RTC_TSTR_MNT ((uint32_t)0x00007000) /*!< */
#define RTC_TSTR_MNT_0 ((uint32_t)0x00001000) /*!< */
#define RTC_TSTR_MNT_1 ((uint32_t)0x00002000) /*!< */
#define RTC_TSTR_MNT_2 ((uint32_t)0x00004000) /*!< */
#define RTC_TSTR_MNU ((uint32_t)0x00000F00) /*!< */
#define RTC_TSTR_MNU_0 ((uint32_t)0x00000100) /*!< */
#define RTC_TSTR_MNU_1 ((uint32_t)0x00000200) /*!< */
#define RTC_TSTR_MNU_2 ((uint32_t)0x00000400) /*!< */
#define RTC_TSTR_MNU_3 ((uint32_t)0x00000800) /*!< */
#define RTC_TSTR_ST ((uint32_t)0x00000070) /*!< */
#define RTC_TSTR_ST_0 ((uint32_t)0x00000010) /*!< */
#define RTC_TSTR_ST_1 ((uint32_t)0x00000020) /*!< */
#define RTC_TSTR_ST_2 ((uint32_t)0x00000040) /*!< */
#define RTC_TSTR_SU ((uint32_t)0x0000000F) /*!< */
#define RTC_TSTR_SU_0 ((uint32_t)0x00000001) /*!< */
#define RTC_TSTR_SU_1 ((uint32_t)0x00000002) /*!< */
#define RTC_TSTR_SU_2 ((uint32_t)0x00000004) /*!< */
#define RTC_TSTR_SU_3 ((uint32_t)0x00000008) /*!< */
#define RTC_TSTR_PM ((uint32_t)0x00400000)
#define RTC_TSTR_HT ((uint32_t)0x00300000)
#define RTC_TSTR_HT_0 ((uint32_t)0x00100000)
#define RTC_TSTR_HT_1 ((uint32_t)0x00200000)
#define RTC_TSTR_HU ((uint32_t)0x000F0000)
#define RTC_TSTR_HU_0 ((uint32_t)0x00010000)
#define RTC_TSTR_HU_1 ((uint32_t)0x00020000)
#define RTC_TSTR_HU_2 ((uint32_t)0x00040000)
#define RTC_TSTR_HU_3 ((uint32_t)0x00080000)
#define RTC_TSTR_MNT ((uint32_t)0x00007000)
#define RTC_TSTR_MNT_0 ((uint32_t)0x00001000)
#define RTC_TSTR_MNT_1 ((uint32_t)0x00002000)
#define RTC_TSTR_MNT_2 ((uint32_t)0x00004000)
#define RTC_TSTR_MNU ((uint32_t)0x00000F00)
#define RTC_TSTR_MNU_0 ((uint32_t)0x00000100)
#define RTC_TSTR_MNU_1 ((uint32_t)0x00000200)
#define RTC_TSTR_MNU_2 ((uint32_t)0x00000400)
#define RTC_TSTR_MNU_3 ((uint32_t)0x00000800)
#define RTC_TSTR_ST ((uint32_t)0x00000070)
#define RTC_TSTR_ST_0 ((uint32_t)0x00000010)
#define RTC_TSTR_ST_1 ((uint32_t)0x00000020)
#define RTC_TSTR_ST_2 ((uint32_t)0x00000040)
#define RTC_TSTR_SU ((uint32_t)0x0000000F)
#define RTC_TSTR_SU_0 ((uint32_t)0x00000001)
#define RTC_TSTR_SU_1 ((uint32_t)0x00000002)
#define RTC_TSTR_SU_2 ((uint32_t)0x00000004)
#define RTC_TSTR_SU_3 ((uint32_t)0x00000008)
/******************** Bits definition for RTC_TSDR register *****************/
#define RTC_TSDR_WDU ((uint32_t)0x0000E000) /*!< */
#define RTC_TSDR_WDU_0 ((uint32_t)0x00002000) /*!< */
#define RTC_TSDR_WDU_1 ((uint32_t)0x00004000) /*!< */
#define RTC_TSDR_WDU_2 ((uint32_t)0x00008000) /*!< */
#define RTC_TSDR_MT ((uint32_t)0x00001000) /*!< */
#define RTC_TSDR_MU ((uint32_t)0x00000F00) /*!< */
#define RTC_TSDR_MU_0 ((uint32_t)0x00000100) /*!< */
#define RTC_TSDR_MU_1 ((uint32_t)0x00000200) /*!< */
#define RTC_TSDR_MU_2 ((uint32_t)0x00000400) /*!< */
#define RTC_TSDR_MU_3 ((uint32_t)0x00000800) /*!< */
#define RTC_TSDR_DT ((uint32_t)0x00000030) /*!< */
#define RTC_TSDR_DT_0 ((uint32_t)0x00000010) /*!< */
#define RTC_TSDR_DT_1 ((uint32_t)0x00000020) /*!< */
#define RTC_TSDR_DU ((uint32_t)0x0000000F) /*!< */
#define RTC_TSDR_DU_0 ((uint32_t)0x00000001) /*!< */
#define RTC_TSDR_DU_1 ((uint32_t)0x00000002) /*!< */
#define RTC_TSDR_DU_2 ((uint32_t)0x00000004) /*!< */
#define RTC_TSDR_DU_3 ((uint32_t)0x00000008) /*!< */
#define RTC_TSDR_WDU ((uint32_t)0x0000E000)
#define RTC_TSDR_WDU_0 ((uint32_t)0x00002000)
#define RTC_TSDR_WDU_1 ((uint32_t)0x00004000)
#define RTC_TSDR_WDU_2 ((uint32_t)0x00008000)
#define RTC_TSDR_MT ((uint32_t)0x00001000)
#define RTC_TSDR_MU ((uint32_t)0x00000F00)
#define RTC_TSDR_MU_0 ((uint32_t)0x00000100)
#define RTC_TSDR_MU_1 ((uint32_t)0x00000200)
#define RTC_TSDR_MU_2 ((uint32_t)0x00000400)
#define RTC_TSDR_MU_3 ((uint32_t)0x00000800)
#define RTC_TSDR_DT ((uint32_t)0x00000030)
#define RTC_TSDR_DT_0 ((uint32_t)0x00000010)
#define RTC_TSDR_DT_1 ((uint32_t)0x00000020)
#define RTC_TSDR_DU ((uint32_t)0x0000000F)
#define RTC_TSDR_DU_0 ((uint32_t)0x00000001)
#define RTC_TSDR_DU_1 ((uint32_t)0x00000002)
#define RTC_TSDR_DU_2 ((uint32_t)0x00000004)
#define RTC_TSDR_DU_3 ((uint32_t)0x00000008)
/******************** Bits definition for RTC_TSSSR register ****************/
#define RTC_TSSSR_SS ((uint32_t)0x0003FFFF)
/******************** Bits definition for RTC_CAL register *****************/
#define RTC_CAL_CALP ((uint32_t)0x00008000) /*!< */
#define RTC_CAL_CALW8 ((uint32_t)0x00004000) /*!< */
#define RTC_CAL_CALW16 ((uint32_t)0x00002000) /*!< */
#define RTC_CAL_CALM ((uint32_t)0x000001FF) /*!< */
#define RTC_CAL_CALM_0 ((uint32_t)0x00000001) /*!< */
#define RTC_CAL_CALM_1 ((uint32_t)0x00000002) /*!< */
#define RTC_CAL_CALM_2 ((uint32_t)0x00000004) /*!< */
#define RTC_CAL_CALM_3 ((uint32_t)0x00000008) /*!< */
#define RTC_CAL_CALM_4 ((uint32_t)0x00000010) /*!< */
#define RTC_CAL_CALM_5 ((uint32_t)0x00000020) /*!< */
#define RTC_CAL_CALM_6 ((uint32_t)0x00000040) /*!< */
#define RTC_CAL_CALM_7 ((uint32_t)0x00000080) /*!< */
#define RTC_CAL_CALM_8 ((uint32_t)0x00000100) /*!< */
#define RTC_CAL_CALP ((uint32_t)0x00008000)
#define RTC_CAL_CALW8 ((uint32_t)0x00004000)
#define RTC_CAL_CALW16 ((uint32_t)0x00002000)
#define RTC_CAL_CALM ((uint32_t)0x000001FF)
#define RTC_CAL_CALM_0 ((uint32_t)0x00000001)
#define RTC_CAL_CALM_1 ((uint32_t)0x00000002)
#define RTC_CAL_CALM_2 ((uint32_t)0x00000004)
#define RTC_CAL_CALM_3 ((uint32_t)0x00000008)
#define RTC_CAL_CALM_4 ((uint32_t)0x00000010)
#define RTC_CAL_CALM_5 ((uint32_t)0x00000020)
#define RTC_CAL_CALM_6 ((uint32_t)0x00000040)
#define RTC_CAL_CALM_7 ((uint32_t)0x00000080)
#define RTC_CAL_CALM_8 ((uint32_t)0x00000100)
/******************** Bits definition for RTC_TAFCR register ****************/
#define RTC_TAFCR_ALARMOUTTYPE ((uint32_t)0x00040000) /*!< */
#define RTC_TAFCR_TAMPPUDIS ((uint32_t)0x00008000) /*!< */
#define RTC_TAFCR_TAMPPRCH ((uint32_t)0x00006000) /*!< */
#define RTC_TAFCR_TAMPPRCH_0 ((uint32_t)0x00002000) /*!< */
#define RTC_TAFCR_TAMPPRCH_1 ((uint32_t)0x00004000) /*!< */
#define RTC_TAFCR_TAMPFLT ((uint32_t)0x00001800) /*!< */
#define RTC_TAFCR_TAMPFLT_0 ((uint32_t)0x00000800) /*!< */
#define RTC_TAFCR_TAMPFLT_1 ((uint32_t)0x00001000) /*!< */
#define RTC_TAFCR_TAMPFREQ ((uint32_t)0x00000700) /*!< */
#define RTC_TAFCR_TAMPFREQ_0 ((uint32_t)0x00000100) /*!< */
#define RTC_TAFCR_TAMPFREQ_1 ((uint32_t)0x00000200) /*!< */
#define RTC_TAFCR_TAMPFREQ_2 ((uint32_t)0x00000400) /*!< */
#define RTC_TAFCR_TAMPTS ((uint32_t)0x00000080) /*!< */
#define RTC_TAFCR_TAMP3EDGE ((uint32_t)0x00000040) /*!< */
#define RTC_TAFCR_TAMP3E ((uint32_t)0x00000020) /*!< */
#define RTC_TAFCR_TAMP2EDGE ((uint32_t)0x00000010) /*!< */
#define RTC_TAFCR_TAMP2E ((uint32_t)0x00000008) /*!< */
#define RTC_TAFCR_TAMPIE ((uint32_t)0x00000004) /*!< */
#define RTC_TAFCR_TAMP1TRG ((uint32_t)0x00000002) /*!< */
#define RTC_TAFCR_TAMP1E ((uint32_t)0x00000001) /*!< */
#define RTC_TAFCR_ALARMOUTTYPE ((uint32_t)0x00040000)
#define RTC_TAFCR_TAMPPUDIS ((uint32_t)0x00008000)
#define RTC_TAFCR_TAMPPRCH ((uint32_t)0x00006000)
#define RTC_TAFCR_TAMPPRCH_0 ((uint32_t)0x00002000)
#define RTC_TAFCR_TAMPPRCH_1 ((uint32_t)0x00004000)
#define RTC_TAFCR_TAMPFLT ((uint32_t)0x00001800)
#define RTC_TAFCR_TAMPFLT_0 ((uint32_t)0x00000800)
#define RTC_TAFCR_TAMPFLT_1 ((uint32_t)0x00001000)
#define RTC_TAFCR_TAMPFREQ ((uint32_t)0x00000700)
#define RTC_TAFCR_TAMPFREQ_0 ((uint32_t)0x00000100)
#define RTC_TAFCR_TAMPFREQ_1 ((uint32_t)0x00000200)
#define RTC_TAFCR_TAMPFREQ_2 ((uint32_t)0x00000400)
#define RTC_TAFCR_TAMPTS ((uint32_t)0x00000080)
#define RTC_TAFCR_TAMP2EDGE ((uint32_t)0x00000010)
#define RTC_TAFCR_TAMP2E ((uint32_t)0x00000008)
#define RTC_TAFCR_TAMPIE ((uint32_t)0x00000004)
#define RTC_TAFCR_TAMP1TRG ((uint32_t)0x00000002)
#define RTC_TAFCR_TAMP1E ((uint32_t)0x00000001)
/******************** Bits definition for RTC_ALRMASSR register *************/
#define RTC_ALRMASSR_MASKSS ((uint32_t)0x0F000000) /*!< */
#define RTC_ALRMASSR_MASKSS_0 ((uint32_t)0x01000000) /*!< */
#define RTC_ALRMASSR_MASKSS_1 ((uint32_t)0x02000000) /*!< */
#define RTC_ALRMASSR_MASKSS_2 ((uint32_t)0x04000000) /*!< */
#define RTC_ALRMASSR_MASKSS_3 ((uint32_t)0x08000000) /*!< */
#define RTC_ALRMASSR_SS ((uint32_t)0x00007FFF) /*!< */
#define RTC_ALRMASSR_MASKSS ((uint32_t)0x0F000000)
#define RTC_ALRMASSR_MASKSS_0 ((uint32_t)0x01000000)
#define RTC_ALRMASSR_MASKSS_1 ((uint32_t)0x02000000)
#define RTC_ALRMASSR_MASKSS_2 ((uint32_t)0x04000000)
#define RTC_ALRMASSR_MASKSS_3 ((uint32_t)0x08000000)
#define RTC_ALRMASSR_SS ((uint32_t)0x00007FFF)
/******************** Bits definition for RTC_BKP0R register ****************/
#define RTC_BKP0R ((uint32_t)0xFFFFFFFF) /*!< */
#define RTC_BKP0R ((uint32_t)0xFFFFFFFF)
/******************** Bits definition for RTC_BKP1R register ****************/
#define RTC_BKP1R ((uint32_t)0xFFFFFFFF) /*!< */
#define RTC_BKP1R ((uint32_t)0xFFFFFFFF)
/******************** Bits definition for RTC_BKP2R register ****************/
#define RTC_BKP2R ((uint32_t)0xFFFFFFFF) /*!< */
#define RTC_BKP2R ((uint32_t)0xFFFFFFFF)
/******************** Bits definition for RTC_BKP3R register ****************/
#define RTC_BKP3R ((uint32_t)0xFFFFFFFF) /*!< */
#define RTC_BKP3R ((uint32_t)0xFFFFFFFF)
/******************** Bits definition for RTC_BKP4R register ****************/
#define RTC_BKP4R ((uint32_t)0xFFFFFFFF) /*!< */
#define RTC_BKP4R ((uint32_t)0xFFFFFFFF)
/******************************************************************************/
/* */

4
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******************************************************************************
* @file system_stm32f0xx.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Header File.
******************************************************************************
* @attention

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<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
Notes for STM32F0xx CMSIS</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright 2012 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
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<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
<ol style="margin-top: 0cm;" start="1" type="1">
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32F0xx&nbsp;CMSIS
update History</a><o:p></o:p></span></li>
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
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<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32F0xx CMSIS
update History</span></h2><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.1 / 20-April-2012</span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add reference to STM32F050xx (Flash memory up to 32 Kbytes) and STM32F051xx (</span><span style="font-size: 10pt; font-family: Verdana;">Flash memory up to 64 Kbytes</span><span style="font-size: 10pt; font-family: Verdana;">) devices</span></li></ul><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">RTC register bits definition: remove reference to Tamper3</span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.0 / 23-March-2012</span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">First official release&nbsp;for <span style="font-weight: bold; font-style: italic;">STM32F0xx devices</span></span><span style="font-size: 10pt; font-family: Verdana;"></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">All source files: license disclaimer text update and add link to the License file on ST Internet</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">change MCO bits value:</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">change <span style="font-style: italic;">RCC_CFGR_MCO_HSI14</span> value from 0x03000000 to 0x01000000</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add <span style="font-style: italic;">RCC_CFGR_MCO_LSI</span> having value 0x02000000</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add <span style="font-style: italic;">RCC_CFGR_MCO_LSE</span> having value 0x03000000</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add new bit <span style="font-style: italic;">RCC_CSR_V18PWRRSTF</span> having value 0x00800000</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">TIM_OR</span> bits definition values corrected</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Rename <span style="font-style: italic;">ADC_ISR_EOS</span> to <span style="font-style: italic;">ADC_ISR_EOSEQ</span></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Rename <span style="font-style: italic;">ADC_IER_EOSIE</span> to <span style="font-style: italic;">ADC_IER_EOSEQIE</span></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Rename <span style="font-style: italic;">ADC_CFGR1_AUTDLY</span> to <span style="font-style: italic;">ADC_CFGR1_WAIT</span></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Rename option bit <span style="font-style: italic;">FLASH_OBR_BOOT1</span> to <span style="font-style: italic;">FLASH_OBR_nBOOT1</span></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Rename <span style="font-style: italic;">FLASH_OBR_VDDA_ANALOG</span> to <span style="font-style: italic;">FLASH_OBR_VDDA_MONITOR</span></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add Flash and OB keys (removed from Flash driver)</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">system_stm32f0xx.c</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SetSysClock()</span> function: code optimized&nbsp;</span></li></ul><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Miscellaneous&nbsp;formatting<br></span></li></ul></ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.0RC1 / 27-January-2012<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square">
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Official version (V1.0.0) Release Candidate 1</span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: Verdana; font-size: 10pt;">All source
files: update disclaimer to add reference to the&nbsp;new license agreement</span></li>
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update all peripherals bits definitions<br>
</span></li>
</ul><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;"></span><span style="font-weight: bold; font-style: italic;"></span></span>
<ul style="margin-top: 0in;" type="disc">
</ul>
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2><p class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this&nbsp;</span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">package</span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"> except in compliance with the License. You may obtain a copy of the License at:<br><br></span></p><div style="text-align: center;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <a target="_blank" href="http://www.st.com/software_license_agreement_liberty_v2">http://www.st.com/software_license_agreement_liberty_v2</a></span><br><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"></span></div><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"><br>Unless
required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS, <br>WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See
the License for the specific language governing permissions and
limitations under the License.</span>
<div class="MsoNormal" style="text-align: center;" align="center"><span style="color: black;">
<hr align="center" size="2" width="100%"></span></div>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt; text-align: center;" align="center"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">For
complete documentation on </span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;;">STM32<span style="color: black;">
Microcontrollers visit </span><u><span style="color: blue;"><a href="http://www.st.com/internet/mcu/family/141.jsp" target="_blank">www.st.com/STM32</a></span></u></span><span style="font-size: 10pt; font-family: Verdana;"><u><span style="color: blue;"><a href="http://www.st.com/internet/mcu/family/141.jsp" target="_blank"></a></span></u></span><span style="color: black;"><o:p></o:p></span></p>
</td>
</tr>
</tbody>
</table>
<p class="MsoNormal"><span style="font-size: 10pt;"><o:p></o:p></span></p>
</td>
</tr>
</tbody>
</table>
</div>
<p class="MsoNormal"><o:p>&nbsp;</o:p></p>
</div>
</body></html>

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/**
******************************************************************************
* @file startup_stm32f0xx.s
* @author MCD Application Team
* @version V1.0.1
* @date 20-April-2012
* @brief STM32F0xx Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Configure the clock system
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M0 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m0
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.equ BootRAM, 0xF108F85F
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr r0, =_estack
mov sp, r0 /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2]
adds r2, r2, #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M0. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word 0
.word 0
.word PendSV_Handler
.word SysTick_Handler
.word WWDG_IRQHandler
.word PVD_IRQHandler
.word RTC_IRQHandler
.word FLASH_IRQHandler
.word RCC_IRQHandler
.word EXTI0_1_IRQHandler
.word EXTI2_3_IRQHandler
.word EXTI4_15_IRQHandler
.word TS_IRQHandler
.word DMA1_Channel1_IRQHandler
.word DMA1_Channel2_3_IRQHandler
.word DMA1_Channel4_5_IRQHandler
.word ADC1_COMP_IRQHandler
.word TIM1_BRK_UP_TRG_COM_IRQHandler
.word TIM1_CC_IRQHandler
.word TIM2_IRQHandler
.word TIM3_IRQHandler
.word TIM6_DAC_IRQHandler
.word 0
.word TIM14_IRQHandler
.word TIM15_IRQHandler
.word TIM16_IRQHandler
.word TIM17_IRQHandler
.word I2C1_IRQHandler
.word I2C2_IRQHandler
.word SPI1_IRQHandler
.word SPI2_IRQHandler
.word USART1_IRQHandler
.word USART2_IRQHandler
.word 0
.word CEC_IRQHandler
.word 0
.word BootRAM /* @0x108. This is for boot in RAM mode for
STM32F0xx devices. */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak RTC_IRQHandler
.thumb_set RTC_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_1_IRQHandler
.thumb_set EXTI0_1_IRQHandler,Default_Handler
.weak EXTI2_3_IRQHandler
.thumb_set EXTI2_3_IRQHandler,Default_Handler
.weak EXTI4_15_IRQHandler
.thumb_set EXTI4_15_IRQHandler,Default_Handler
.weak TS_IRQHandler
.thumb_set TS_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel2_3_IRQHandler
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
.weak DMA1_Channel4_5_IRQHandler
.thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
.weak ADC1_COMP_IRQHandler
.thumb_set ADC1_COMP_IRQHandler,Default_Handler
.weak TIM1_BRK_UP_TRG_COM_IRQHandler
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
.weak TIM1_CC_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM6_DAC_IRQHandler
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
.weak TIM14_IRQHandler
.thumb_set TIM14_IRQHandler,Default_Handler
.weak TIM15_IRQHandler
.thumb_set TIM15_IRQHandler,Default_Handler
.weak TIM16_IRQHandler
.thumb_set TIM16_IRQHandler,Default_Handler
.weak TIM17_IRQHandler
.thumb_set TIM17_IRQHandler,Default_Handler
.weak I2C1_IRQHandler
.thumb_set I2C1_IRQHandler,Default_Handler
.weak I2C2_IRQHandler
.thumb_set I2C2_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak CEC_IRQHandler
.thumb_set CEC_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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;******************** (C) COPYRIGHT 2012 STMicroelectronics ********************
;* File Name : startup_stm32f0xx.s
;* Author : MCD Application Team
;* Version : V1.0.1
;* Date : 20-April-2012
;* Description : STM32F0xx Devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM0 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; @attention
;
; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
; You may not use this file except in compliance with the License.
; You may obtain a copy of the License at:
;
; http://www.st.com/software_license_agreement_liberty_v2
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
;*******************************************************************************
;
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD RTC_IRQHandler ; RTC through EXTI Line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
DCD TS_IRQHandler ; TS
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
DCD 0 ; Reserved
DCD TIM14_IRQHandler ; TIM14
DCD TIM15_IRQHandler ; TIM15
DCD TIM16_IRQHandler ; TIM16
DCD TIM17_IRQHandler ; TIM17
DCD I2C1_IRQHandler ; I2C1
DCD I2C2_IRQHandler ; I2C2
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD 0 ; Reserved
DCD CEC_IRQHandler ; CEC
DCD 0 ; Reserved
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler routine
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_1_IRQHandler [WEAK]
EXPORT EXTI2_3_IRQHandler [WEAK]
EXPORT EXTI4_15_IRQHandler [WEAK]
EXPORT TS_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_5_IRQHandler [WEAK]
EXPORT ADC1_COMP_IRQHandler [WEAK]
EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM6_DAC_IRQHandler [WEAK]
EXPORT TIM14_IRQHandler [WEAK]
EXPORT TIM15_IRQHandler [WEAK]
EXPORT TIM16_IRQHandler [WEAK]
EXPORT TIM17_IRQHandler [WEAK]
EXPORT I2C1_IRQHandler [WEAK]
EXPORT I2C2_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT CEC_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_1_IRQHandler
EXTI2_3_IRQHandler
EXTI4_15_IRQHandler
TS_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_3_IRQHandler
DMA1_Channel4_5_IRQHandler
ADC1_COMP_IRQHandler
TIM1_BRK_UP_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM6_DAC_IRQHandler
TIM14_IRQHandler
TIM15_IRQHandler
TIM16_IRQHandler
TIM17_IRQHandler
I2C1_IRQHandler
I2C2_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
CEC_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

292
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/**
******************************************************************************
* @file startup_stm32f0xx.s
* @author MCD Application Team
* @version V1.0.1
* @date 20-April-2012
* @brief STM32F0xx Devices vector table for RIDE7 toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M0 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m0
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.equ BootRAM, 0xF108F85F
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call the application's entry point.*/
bl main
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/*******************************************************************************
*
* The minimal vector table for a Cortex M0. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word 0
.word 0
.word PendSV_Handler
.word SysTick_Handler
.word WWDG_IRQHandler
.word PVD_IRQHandler
.word RTC_IRQHandler
.word FLASH_IRQHandler
.word RCC_IRQHandler
.word EXTI0_1_IRQHandler
.word EXTI2_3_IRQHandler
.word EXTI4_15_IRQHandler
.word TS_IRQHandler
.word DMA1_Channel1_IRQHandler
.word DMA1_Channel2_3_IRQHandler
.word DMA1_Channel4_5_IRQHandler
.word ADC1_COMP_IRQHandler
.word TIM1_BRK_UP_TRG_COM_IRQHandler
.word TIM1_CC_IRQHandler
.word TIM2_IRQHandler
.word TIM3_IRQHandler
.word TIM6_DAC_IRQHandler
.word 0
.word TIM14_IRQHandler
.word TIM15_IRQHandler
.word TIM16_IRQHandler
.word TIM17_IRQHandler
.word I2C1_IRQHandler
.word I2C2_IRQHandler
.word SPI1_IRQHandler
.word SPI2_IRQHandler
.word USART1_IRQHandler
.word USART2_IRQHandler
.word 0
.word CEC_IRQHandler
.word 0
.word BootRAM /* @0x108. This is for boot in RAM mode for
STM32F0xx devices. */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak RTC_IRQHandler
.thumb_set RTC_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_1_IRQHandler
.thumb_set EXTI0_1_IRQHandler,Default_Handler
.weak EXTI2_3_IRQHandler
.thumb_set EXTI2_3_IRQHandler,Default_Handler
.weak EXTI4_15_IRQHandler
.thumb_set EXTI4_15_IRQHandler,Default_Handler
.weak TS_IRQHandler
.thumb_set TS_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel2_3_IRQHandler
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
.weak DMA1_Channel4_5_IRQHandler
.thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
.weak ADC1_COMP_IRQHandler
.thumb_set ADC1_COMP_IRQHandler,Default_Handler
.weak TIM1_BRK_UP_TRG_COM_IRQHandler
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
.weak TIM1_CC_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM6_DAC_IRQHandler
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
.weak TIM14_IRQHandler
.thumb_set TIM14_IRQHandler,Default_Handler
.weak TIM15_IRQHandler
.thumb_set TIM15_IRQHandler,Default_Handler
.weak TIM16_IRQHandler
.thumb_set TIM16_IRQHandler,Default_Handler
.weak TIM17_IRQHandler
.thumb_set TIM17_IRQHandler,Default_Handler
.weak I2C1_IRQHandler
.thumb_set I2C1_IRQHandler,Default_Handler
.weak I2C2_IRQHandler
.thumb_set I2C2_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak CEC_IRQHandler
.thumb_set CEC_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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;******************** (C) COPYRIGHT 2012 STMicroelectronics ********************
;* File Name : startup_stm32f0xx.s
;* Author : MCD Application Team
;* Version : V1.0.1
;* Date : 20-April-2012
;* Description : STM32F0xx Devices vector table for EWARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == iar_program_start,
;* - Set the vector table entries with the exceptions ISR
;* address.
;* After Reset the Cortex-M0 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;*******************************************************************************
; @attention
;
; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
; You may not use this file except in compliance with the License.
; You may obtain a copy of the License at:
;
; http://www.st.com/software_license_agreement_liberty_v2
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
;*******************************************************************************
;
;
; The modules in this file are included in the libraries, and may be replaced
; by any user-defined modules that define the PUBLIC symbol _program_start or
; a user defined start symbol.
; To override the cstartup defined in the library, simply add your modified
; version to the workbench project.
;
; The vector table is normally located at address 0.
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
; The name "__vector_table" has special meaning for C-SPY:
; it is where the SP start value is found, and the NVIC vector
; table register (VTOR) is initialized to this address if != 0.
;
; Cortex-M version
;
MODULE ?cstartup
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
EXTERN SystemInit
PUBLIC __vector_table
DATA
__vector_table
DCD sfe(CSTACK)
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD RTC_IRQHandler ; RTC through EXTI Line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
DCD TS_IRQHandler ; TS
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
DCD 0 ; Reserved
DCD TIM14_IRQHandler ; TIM14
DCD TIM15_IRQHandler ; TIM15
DCD TIM16_IRQHandler ; TIM16
DCD TIM17_IRQHandler ; TIM17
DCD I2C1_IRQHandler ; I2C1
DCD I2C2_IRQHandler ; I2C2
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD 0 ; Reserved
DCD CEC_IRQHandler ; CEC
DCD 0 ; Reserved
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Default interrupt handlers.
;;
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:REORDER(2)
Reset_Handler
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start
BX R0
PUBWEAK NMI_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
NMI_Handler
B NMI_Handler
PUBWEAK HardFault_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
HardFault_Handler
B HardFault_Handler
PUBWEAK SVC_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
SVC_Handler
B SVC_Handler
PUBWEAK PendSV_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
PendSV_Handler
B PendSV_Handler
PUBWEAK SysTick_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
SysTick_Handler
B SysTick_Handler
PUBWEAK WWDG_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
WWDG_IRQHandler
B WWDG_IRQHandler
PUBWEAK PVD_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
PVD_IRQHandler
B PVD_IRQHandler
PUBWEAK RTC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
RTC_IRQHandler
B RTC_IRQHandler
PUBWEAK FLASH_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
FLASH_IRQHandler
B FLASH_IRQHandler
PUBWEAK RCC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
RCC_IRQHandler
B RCC_IRQHandler
PUBWEAK EXTI0_1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
EXTI0_1_IRQHandler
B EXTI0_1_IRQHandler
PUBWEAK EXTI2_3_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
EXTI2_3_IRQHandler
B EXTI2_3_IRQHandler
PUBWEAK EXTI4_15_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
EXTI4_15_IRQHandler
B EXTI4_15_IRQHandler
PUBWEAK TS_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TS_IRQHandler
B TS_IRQHandler
PUBWEAK DMA1_Channel1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
DMA1_Channel1_IRQHandler
B DMA1_Channel1_IRQHandler
PUBWEAK DMA1_Channel2_3_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
DMA1_Channel2_3_IRQHandler
B DMA1_Channel2_3_IRQHandler
PUBWEAK DMA1_Channel4_5_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
DMA1_Channel4_5_IRQHandler
B DMA1_Channel4_5_IRQHandler
PUBWEAK ADC1_COMP_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
ADC1_COMP_IRQHandler
B ADC1_COMP_IRQHandler
PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM1_BRK_UP_TRG_COM_IRQHandler
B TIM1_BRK_UP_TRG_COM_IRQHandler
PUBWEAK TIM1_CC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM1_CC_IRQHandler
B TIM1_CC_IRQHandler
PUBWEAK TIM2_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM2_IRQHandler
B TIM2_IRQHandler
PUBWEAK TIM3_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM3_IRQHandler
B TIM3_IRQHandler
PUBWEAK TIM6_DAC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM6_DAC_IRQHandler
B TIM6_DAC_IRQHandler
PUBWEAK TIM14_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM14_IRQHandler
B TIM14_IRQHandler
PUBWEAK TIM15_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM15_IRQHandler
B TIM15_IRQHandler
PUBWEAK TIM16_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM16_IRQHandler
B TIM16_IRQHandler
PUBWEAK TIM17_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM17_IRQHandler
B TIM17_IRQHandler
PUBWEAK I2C1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
I2C1_IRQHandler
B I2C1_IRQHandler
PUBWEAK I2C2_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
I2C2_IRQHandler
B I2C2_IRQHandler
PUBWEAK SPI1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
SPI1_IRQHandler
B SPI1_IRQHandler
PUBWEAK SPI2_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
SPI2_IRQHandler
B SPI2_IRQHandler
PUBWEAK USART1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
USART1_IRQHandler
B USART1_IRQHandler
PUBWEAK USART2_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
USART2_IRQHandler
B USART2_IRQHandler
PUBWEAK CEC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
CEC_IRQHandler
B CEC_IRQHandler
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

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/**
******************************************************************************
* @file system_stm32f0xx.c
* @author MCD Application Team
* @version V1.0.1
* @date 20-April-2012
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
* This file contains the system clock configuration for STM32F0xx devices,
* and is generated by the clock configuration tool
* STM32F0xx_Clock_Configuration_V1.0.0.xls
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* and Divider factors, AHB/APBx prescalers and Flash settings),
* depending on the configuration made in the clock xls tool.
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f0xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz Range) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f0xx.s" file, to
* configure the system clock before to branch to main program.
*
* 3. If the system clock source selected by user fails to startup, the SystemInit()
* function will do nothing and HSI still used as system clock source. User can
* add some code to deal with this issue inside the SetSysClock() function.
*
* 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" define
* in "stm32f0xx.h" file. When HSE is used as system clock source, directly or
* through PLL, and you are using different crystal you have to adapt the HSE
* value to your own configuration.
*
* 5. This file configures the system clock as follows:
*=============================================================================
* System Clock Configuration
*=============================================================================
* System Clock source | PLL(HSE)
*-----------------------------------------------------------------------------
* SYSCLK | 48000000 Hz
*-----------------------------------------------------------------------------
* HCLK | 48000000 Hz
*-----------------------------------------------------------------------------
* AHB Prescaler | 1
*-----------------------------------------------------------------------------
* APB1 Prescaler | 1
*-----------------------------------------------------------------------------
* APB2 Prescaler | 1
*-----------------------------------------------------------------------------
* HSE Frequency | 8000000 Hz
*-----------------------------------------------------------------------------
* PLL MUL | 6
*-----------------------------------------------------------------------------
* VDD | 3.3 V
*-----------------------------------------------------------------------------
* Flash Latency | 1 WS
*-----------------------------------------------------------------------------
*=============================================================================
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f0xx_system
* @{
*/
/** @addtogroup STM32F0xx_System_Private_Includes
* @{
*/
#include "stm32f0xx.h"
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_Defines
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_Variables
* @{
*/
uint32_t SystemCoreClock = 48000000;
__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_FunctionPrototypes
* @{
*/
static void SetSysClock(void);
/**
* @}
*/
/** @addtogroup STM32F0xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system.
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Set HSION bit */
RCC->CR |= (uint32_t)0x00000001;
/* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */
RCC->CFGR &= (uint32_t)0xF8FFB80C;
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= (uint32_t)0xFEF6FFFF;
/* Reset HSEBYP bit */
RCC->CR &= (uint32_t)0xFFFBFFFF;
/* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */
RCC->CFGR &= (uint32_t)0xFFC0FFFF;
/* Reset PREDIV1[3:0] bits */
RCC->CFGR2 &= (uint32_t)0xFFFFFFF0;
/* Reset USARTSW[1:0], I2CSW, CECSW and ADCSW bits */
RCC->CFGR3 &= (uint32_t)0xFFFFFEAC;
/* Reset HSI14 bit */
RCC->CR2 &= (uint32_t)0xFFFFFFFE;
/* Disable all interrupts */
RCC->CIR = 0x00000000;
/* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */
SetSysClock();
}
/**
* @brief Update SystemCoreClock according to Clock Register Values
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f0xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f0xx.h file (default value
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
* frequency of the crystal used. Otherwise, this function may
* have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0, pllmull = 0, pllsource = 0, prediv1factor = 0;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
pllmull = ( pllmull >> 18) + 2;
if (pllsource == 0x00)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
}
else
{
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
break;
default: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
/**
* @brief Configures the System clock frequency, AHB/APBx prescalers and Flash
* settings.
* @note This function should be called only once the RCC clock configuration
* is reset to the default reset state (done in SystemInit() function).
* @param None
* @retval None
*/
static void SetSysClock(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
/* SYSCLK, HCLK, PCLK configuration ----------------------------------------*/
/* Enable HSE */
RCC->CR |= ((uint32_t)RCC_CR_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CR & RCC_CR_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CR & RCC_CR_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* Enable Prefetch Buffer and set Flash Latency */
FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY;
/* HCLK = SYSCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
/* PCLK = HCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1;
/* PLL configuration = HSE * 6 = 48 MHz */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL6);
/* Enable PLL */
RCC->CR |= RCC_CR_PLLON;
/* Wait till PLL is ready */
while((RCC->CR & RCC_CR_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
{
}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock
configuration. User can add here some code to deal with this error */
}
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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<!--
@date: 29.07.2011
@note Copyright (C) 2011 ARM Limited. All rights reserved.
@par
ARM Limited (ARM) is supplying this software for use with Cortex-M
processor based microcontroller, but can be equally used for other
suitable processor architectures. This file can be freely distributed.
Modifications to this file shall be clearly marked.
@par
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-->
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<html>
<head>
<title>CMSIS Debug Support</title>
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<body>
<h1>CMSIS Debug Support</h1>
<p align="center">This file describes the CMSIS Debug support available with CMSIS (starting V1.30).</p>
<p align="center">Version: 1.02 - 25. July 2011</p>
<p class="TinyT">Information in this file, the accompany manuals, and software is<br>
Copyright © ARM Ltd.<br>All rights reserved.
</p>
<hr>
<p><span style="FONT-WEIGHT: bold">Revision History</span></p>
<ul>
<li>Version 1.00: Initial Release. </li>
<li>Version 1.01: Internal Review. </li>
<li>Version 1.02: Removed product specific information. </li>
</ul>
<hr>
<h2>Contents</h2>
<ol>
<li class="LI2"><a href="#About">About</a></li>
<li class="LI2"><a href="#ITM_DbgAcc">Cortex-M3 / Cortex-M4 ITM Debug Access</a></li>
<li class="LI2"><a href="#DbgIn_DbgOut">Debug IN / OUT functions</a></li>
<li class="LI2"><a href="#ITM_DbgSup">ITM Debug Support in Debugger</a></li>
</ol>
<p>&nbsp;</p>
<h2><a name="About"></a>About</h2>
<p>
CMSIS provides for Cortex-M3 / Cortex-M4 processor based microcontrollers debug support via the Instrumented Trace Macrocell (ITM).
This document describes the available CMSIS Debug functions and the used methods.
</p>
<p>&nbsp;</p>
<h2><a name="ITM_DbgAcc"></a>Cortex-M3 / Cortex-M4 ITM Debug Access</h2>
<p>
The Cortex-M3 incorporates the Instrumented Trace Macrocell (ITM) that provides together with
the Serial Viewer Output trace capabilities for the microcontroller system. The ITM has
32 communication channels which are able to transmit 32 / 16 / 8 bit values; two ITM
communication channels are used by CMSIS to output the following information:
</p>
<ul>
<li>ITM Channel 0: used for printf-style output via the debug interface.</li>
<li>ITM Channel 31: is reserved for RTOS kernel awareness debugging.</li>
</ul>
<p>&nbsp;</p>
<h2><a name="DbgIn_DbgOut"></a>Debug IN / OUT functions</h2>
<p>CMSIS provides following debug functions:</p>
<ul>
<li>ITM_SendChar (uses ITM channel 0)</li>
<li>ITM_ReceiveChar (uses global variable)</li>
<li>ITM_CheckChar (uses global variable)</li>
</ul>
<h3>ITM_SendChar</h3>
<p>
<strong>ITM_SendChar</strong> is used to transmit a character over ITM channel 0 from
the microcontroller system to the debug system. <br>
Only a 8 bit value is transmitted.
</p>
<pre>
static __INLINE uint32_t ITM_SendChar (uint32_t ch)
{
/* check if debugger connected and ITM channel enabled for tracing */
if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &amp;&amp;
(ITM-&gt;TCR & ITM_TCR_ITMENA) &amp;&amp;
(ITM-&gt;TER & (1UL &lt;&lt; 0)) )
{
while (ITM-&gt;PORT[0].u32 == 0);
ITM-&gt;PORT[0].u8 = (uint8_t)ch;
}
return (ch);
}</pre>
<h3>ITM_ReceiveChar</h3>
<p>
ITM communication channel is only capable for OUT direction. For IN direction
a global variable is used. A simple mechanism detects if a character is received.
The project to test need to be build with debug information.
</p>
<p>
The global variable <strong>ITM_RxBuffer</strong> is used to transmit a 8 bit value from debug system
to microcontroller system. <strong>ITM_RxBuffer</strong> is 32 bit wide to
ensure a proper handshake.
</p>
<pre>
extern volatile int32_t ITM_RxBuffer; /* variable to receive characters */
</pre>
<p>
A dedicated bit pattern is used to determine if <strong>ITM_RxBuffer</strong> is empty
or contains a valid value.
</p>
<pre>
#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */
</pre>
<p>
<strong>ITM_ReceiveChar</strong> is used to receive a 8 bit value from the debug system. The function is nonblocking.
It returns the received character or '-1' if no character was available.
</p>
<pre>
static __INLINE int32_t ITM_ReceiveChar (void) {
int32_t ch = -1; /* no character available */
if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
ch = ITM_RxBuffer;
ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
}
return (ch);
}
</pre>
<h3>ITM_CheckChar</h3>
<p>
<strong>ITM_CheckChar</strong> is used to check if a character is received.
</p>
<pre>
static __INLINE int32_t ITM_CheckChar (void) {
if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
return (0); /* no character available */
} else {
return (1); /* character available */
}
}</pre>
<p>&nbsp;</p>
<h2><a name="ITM_DbgSup"></a>ITM Debug Support in a Debugger</h2>
<p>
The Debugger shall offer a dedicated console window for printf style debug input and output using the CMSIS defined ITM methods described above.
</p>
<p>Direction: Microcontroller -&gt; Debugger:</p>
<ul>
<li>
at the beginning of a debug session the debugger shall enable ITM trace on channel 0 and continuously snoop for channel 0 data on the ITM trace
stream it receives from the Microcontroller's CoreSight ITM unit
</li>
<li>
data received via the ITM communication channel 0 is interpreted as charater and gets redirected into the dedicated <strong>Console Window</strong>
</li>
</ul>
<p>Direction: Debugger -&gt; Microcontroller:</p>
<ul>
<li>
at the beginning of a debug session the debugger shall seek for the presence of the global variable named <strong>ITM_RxBuffer</strong> in the debug
information of the application being loaded
</li>
<li>
strings entered into the <strong>Console Window</strong> are written by the debugger as a stream of char values via the variable <strong>ITM_RxBuffer</strong>.
</li>
<li>
the debugger writes the next character into the <strong>ITM_RxBuffer</strong> only once the value has been read and the <strong>ITM_RXBUFFER_EMPTY</strong> value being set.
(refer to: ITM_ReceiveChar()).
</ul>
</body>
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<body>
<h1>CMSIS Version History</h1>
<p align="center">This document describes the changes between the different CMSIS versions.</p>
<p align="center">Version: 2.10 - July 2011</p>
<p class="TinyT">Information in this file, the accompany manuals, and software is<br>
Copyright © ARM Ltd.<br>All rights reserved.
</p>
<hr>
<h2>Contents</h2>
<ol>
<li class="LI2"><a href="#Toolchain">Used Toolchains</a></li>
<li class="LI2"><a href="#6">Changes to version V2.00</a></li>
<li class="LI2"><a href="#5">Changes to version V1.30</a></li>
<li class="LI2"><a href="#4">Changes to version V1.20</a></li>
<li class="LI2"><a href="#2">Open Points</a></li>
<li class="LI2"><a href="#1">Limitations</a></li>
</ol>
<h2><a name="Toolchain"></a>Used Toolchains</h2>
<p>
Following toolchains have been used for test / verification:</i>.
</p>
<ul>
<li>ARM: MDK-ARM Version 4.21</li>
<li>GNU: Sourcery G++ Lite Edition for ARM 2010.09-51</li>
<li>IAR: IAR Embedded Workbench Kickstart Edition V6.10</li>
</ul>
<h2><a name="6"></a>Changes to version V2.00</h2>
<h3>Added CMSIS DSP Software Library support for Cortex-M0 based MCUs</h3>
<p>
The <strong>CMSIS DSP Software Library</strong> provides now also libraries and examples for Cortex-M0.
</p>
<p>
For more information refer to <i>CMSIS DSP Library documentation</i>.
</p>
<h3>Added big endian support for DSP library</h3>
<p>
The <strong>CMSIS DSP Software Library</strong> provides now also pre-build libraries
and projects for big endian devices.
</p>
<p>
For more information refer to <i>CMSIS DSP Library documentation</i>.
</p>
<h3>Simplified folder structure for CMSIS include files</h3>
<p>
All CMSIS core include files as well as the DSP-Library header files are located in
a single folder <strong>./CMSIS/Include</strong>.
</p>
<h3>Changed folder structure for Device Support packages</h3>
<p>
Device Support packages are expected to be in folder <strong>./Device</strong> located at the
same level as <strong>./CMSIS</strong>.
</p>
<p>The new Device folder contains the following subfolders:</p>
<ul>
<li><b>Device</b></li>
<ul>
<li>&lt;<b>Vendor</b>&gt;
<ul>
<li>&lt;<b>Device</b>&gt; | &lt;<b>Device Series</b>&gt;
<ul>
<li><b>Include</b><br>
&lt;device&gt;.h<br>
system_&lt;device&gt;.h<br>
</li>
<li><b>Source</b>
<ul>
<li><b>Templates</b><br>
system_&lt;device&gt;.c<br>
<ul>
<li>&lt;<b>Toolchain</b>&gt;<br>
startup_&lt;device&gt;.s<br>
</li>
<li>&lt;<b>Toolchain</b>&gt;</li>
<li>...</li>
</ul>
</li>
</ul>
</li>
</ul>
<li>&lt;<b>Device</b>&gt; | &lt;<b>Device Series</b>&gt;</li>
<li>...</li>
</ul>
</li>
<li>&lt;<b>Vendor</b>&gt;</li>
<li>...</li>
</ul>
</li>
</ul>
<p>Template files are application specific files and are required to be copied to the project prior to use!</p>
<h3>Removed CMSIS core source files</h3>
<p>
The CMSIS core source files <strong>core_cm0.c, core_cm3.c, core_cm4.c</strong>
containing helper functions for older ARM compiler versions got removed.
</p>
<p>
For the <b>ARM Compiler Toolchain </b>version <b>V4.0.677</b> or later is
required!</p>
<h2><a name="5"></a>Changes to version V1.30</h2>
<h3>Added CMSIS DSP Software Library</h3>
<p>
The <strong>CMSIS DSP Software Library</strong> is a suite of common signal processing functions targeted
to Cortex-M processor based microcontrollers. Even though the code has been specifically
optimized towards using the extended DSP instruction set of the Cortex-M4 processor,
the library can be compiled for any Cortex-M processor.
</p>
<p>
For more information see <i>CMSIS DSP Library documentation</i>.
</p>
<h3>Added CMSIS System View Description</h3>
<p>
The <strong>CMSIS System View Description</strong> answers the challenges of accurate, detailed and
timely device aware peripheral debugging support for Cortex Microcontroller based
devices by the software development tools vendor community.
</p>
<p>
Silicon vendors shall create and maintain a formalized description of the debug view
for all the peripherals contained in their Cortex Microcontroller based devices.
Tool vendors use such descriptions to establish device specific debug support in
their debugging tools.
</p>
<p>
A standardized System View Description shall provide a common approach to
capturing peripheral debug related information in a machine readable files.
</p>
<p>
For more information see <i>CMSIS System View Description</i>.
</p>
<h3>Added Cortex-M4 Core Support</h3>
<p>
Additional folder <strong>CM4</strong>, containing the Cortex-M4 core support files, has been added.
</p>
<ul>
<li>CM0</li>
<li>CM3</li>
<li>CM4
<ul>
<li>CoreSupport</li>
<li>DeviceSupport</li>
</ul>
</li>
</ul>
<h3>New naming for Core Support Files</h3>
<p>
The new Core Support Files are:
</p>
<ul>
<li>core_cm#.h (# = 0, 3, 4)</li>
<li>core_cmFunc.h (Cortex-M Core Register access functions)</li>
<li>core_cmInstr.h (Cortex-M Core instructions)</li>
<li>core_cm4_simd.h (Cortex-M4 SIMD instructions)</li>
</ul>
<h2><a name="4"></a>Changes to version V1.20</h2>
<h3>Removed CMSIS Middelware packages</h3>
<p>
CMSIS Middleware is removed and no longer focus of CMSIS.
</p>
<h3>SystemFrequency renamed to SystemCoreClock</h3>
<p>
The variable name <strong>SystemCoreClock</strong> is more precise than <strong>SystemFrequency</strong>
because the variable holds the clock value at which the core is running.
</p>
<h3>Changed startup concept</h3>
<p>
The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit
from main) has the weakness that it does not work for controllers which need a already
configuerd clock system to configure the external memory controller.
</p>
<h5>Changed startup concept</h5>
<ul>
<li>
SystemInit() is called from startup file before <strong>premain</strong>.
</li>
<li>
<strong>SystemInit()</strong> configures the clock system and also configures
an existing external memory controller.
</li>
<li>
<strong>SystemInit()</strong> must not use global variables.
</li>
<li>
<strong>SystemCoreClock</strong> is initialized with a correct predefined value.
</li>
<li>
Additional function <strong>void SystemCoreClockUpdate (void)</strong> is provided.<br>
<strong>SystemCoreClockUpdate()</strong> updates the variable <strong>SystemCoreClock</strong>
and must be called whenever the core clock is changed.<br>
<strong>SystemCoreClockUpdate()</strong> evaluates the clock register settings and calculates
the current core clock.
</li>
</ul>
<h3>Advanced Debug Functions</h3>
<p>
ITM communication channel is only capable for OUT direction. To allow also communication for
IN direction a simple concept is provided.
</p>
<ul>
<li>
Global variable <strong>volatile int ITM_RxBuffer</strong> used for IN data.
</li>
<li>
Function <strong>int ITM_CheckChar (void)</strong> checks if a new character is available.
</li>
<li>
Function <strong>int ITM_ReceiveChar (void)</strong> retrieves the new character.
</li>
</ul>
<p>
For detailed explanation see file <strong>CMSIS debug support.htm</strong>.
</p>
<h3>Core Register Bit Definitions</h3>
<p>
Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the
defines correspond with the Cortex-M Technical Reference Manual.
</p>
<p>
e.g. SysTick structure with bit definitions
</p>
<pre>
/** \brief Structure type to access the System Timer (SysTick).
*/
typedef struct
{
__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
__IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
__IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
__I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
} SysTick_Type;
/* SysTick Control / Status Register Definitions */
#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
/* SysTick Reload Register Definitions */
#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
/* SysTick Current Register Definitions */
#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
/* SysTick Calibration Register Definitions */
#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
/*@} end of group CMSIS_SysTick */</pre>
<h3>DoxyGen Tags</h3>
<p>
DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation
using DoxyGen.
</p>
<h3>Folder Structure</h3>
<p>
The folder structure is changed to differentiate the single support packages.
</p>
<ul>
<li>CM0</li>
<li>CM3
<ul>
<li>CoreSupport</li>
<li>DeviceSupport</li>
<ul>
<li>Vendor
<ul>
<li>Device
<ul>
<li>Startup
<ul>
<li>Toolchain</li>
<li>Toolchain</li>
<li>...</li>
</ul>
</li>
</ul>
</li>
<li>Device</li>
<li>...</li>
</ul>
</li>
<li>Vendor</li>
<li>...</li>
</ul>
</li>
<li>Example <i>(optional)</i>
<ul>
<li>Toolchain
<ul>
<li>Device</li>
<li>Device</li>
<li>...</li>
</ul>
</li>
<li>Toolchain</li>
<li>...</li>
</ul>
</li>
</ul>
</li>
<li>Documentation</li>
</ul>
<h2><a name="2"></a>Open Points</h2>
<p>
Following points need to be clarified and solved:
</p>
<ul>
<li>
<p>
Equivalent C and Assembler startup files.
</p>
<p>
Is there a need for having C startup files although assembler startup files are
very efficient and do not need to be changed?
<p/>
</li>
<li>
<p>
Placing of HEAP in external RAM.
</p>
<p>
It must be possible to place HEAP in external RAM if the device supports an
external memory controller.
</p>
</li>
<li>
<p>
Placing of STACK /HEAP.
</p>
<p>
STACK should always be placed at the end of internal RAM.
</p>
<p>
If HEAP is placed in internal RAM than it should be placed after RW ZI section.
</p>
</li>
</ul>
<h2><a name="1"></a>Limitations</h2>
<p>
The following limitations are not covered with the current CMSIS version:
</p>
<ul>
<li>
No <strong>C startup files</strong> are available.
</li>
</ul>

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* -------------------------------------------------------------------
* Copyright (C) 2011 ARM Limited. All rights reserved.
*
* Date: 25 July 2011
* Revision: V2.10
*
* Project: Cortex Microcontroller Software Interface Standard (CMSIS)
* Title: Release Note for CMSIS
*
* -------------------------------------------------------------------
NOTE - Open the index.html file to access CMSIS documentation
The Cortex Microcontroller Software Interface Standard (CMSIS) provides a single standard across all
Cortex-Mx processor series vendors. It enables code re-use and code sharing across software projects
and reduces time-to-market for new embedded applications.
CMSIS is released under the terms of the end user license agreement ("CMSIS END USER LICENCE AGREEMENT.pdf").
Any user of the software package is bound to the terms and conditions of the end user license agreement.
You will find the following sub-directories:
Documentation - Contains CMSIS documentation.
DSP_Lib - MDK project files, Examples and source files etc.. to build the
CMSIS DSP Software Library for Cortex-M0, Cortex-M3, Cortex-M4 processors.
Include - CMSIS Core Support and CMSIS DSP Include Files.
Lib - CMSIS DSP Binaries
---

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<h1>CMSIS Release Notes</h1>
<p align="center">Release Notes for CMSIS V2.00</p>
<p align="center">November 2010</p>
<p class="TinyT">Information in this file, the accompany manuals, and software is<br>
Copyright © ARM Ltd.<br>All rights reserved.
<p align="center"><img src="Documentation/CMSIS_Logo_Final.jpg" height="78" width="197">
</p>
<hr>
<h2>Contents</h2>
<ul>
<li class="LI2"><a href="Documentation/CMSIS_History.htm">CMSIS Version History</a>
lists the changes between the different CMSIS versions.
</li>
<li class="LI2"><a href="Documentation/CMSIS_Core.htm">CMSIS Core Support</a>
contains a general description for CMSIS.
</li>
<li class="LI2"><a href="Documentation/DSP_Lib/html/index.html">CMSIS DSP Software Library</a>
describes the CMSIS DSP software library.
</li>
<li class="LI2"><a href="Documentation/CMSIS_System_View_Description.htm">CMSIS System View Description</a>
describes the CMSIS System View Description.
</li>
<li class="LI2"><a href="Documentation/CMSIS_CM4_SIMD.htm">CMSIS Support for Cortex-M4 SIMD Instructions</a>
lists the Cortex-M4 instructions supported by CMSIS.
</li>
<li class="LI2"><a href="Documentation/CMSIS_DebugSupport.htm">CMSIS Debug Support</a>
describes the available CMSIS Debug functions and the used methods.
</li>
<li class="LI2"><a href="CMSIS END USER LICENCE AGREEMENT.pdf">License</a></li>
</ul>
</body>
</html>

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###########################################
vpath %.c src src/peripherals
vpath %.c STM32F0xx_StdPeriph_Driver/src
CFLAGS = -g -O2 -Wall
CFLAGS += -mlittle-endian -mthumb -mcpu=cortex-m0 -march=armv6s-m
CFLAGS += -ffreestanding -nostdlib
CFLAGS += -Iinc -Iinc/core -Iinc/peripherals
CFLAGS += -I../Device -ICMSIS/Include -ICMSIS/Device/ST/STM32F0xx/Include -ISTM32F0xx_StdPeriph_Driver/inc
SRCS = stm32f0xx_adc.c stm32f0xx_cec.c stm32f0xx_comp.c stm32f0xx_crc.c \
stm32f0xx_dac.c stm32f0xx_dbgmcu.c stm32f0xx_dma.c stm32f0xx_exti.c \

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<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
Notes for<o:p></o:p> </span><span style="font-size: 20pt; color: rgb(51, 102, 255); font-family: Verdana;">STM32F0xx Standard Peripherals Library Drivers</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span><br>
<span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright
© 2012 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
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<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
<ol style="margin-top: 0cm;" start="1" type="1">
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32F0xx Standard Peripherals Library Drivers update history</a><o:p></o:p></span></li>
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
</ol>
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32F0xx Standard Peripherals Library Drivers update history</span></h2><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.1 / 20-April-2012</span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">All drivers, function's header: update </span><span style="font-size: 10pt; font-family: Verdana;">comments&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">and Doxygen&nbsp;tags&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">formatting</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_pwr.c</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">PWR_PVDLevelConfig()</span>
function: remove value of the voltage threshold corresponding to each
PVD detection level, user should refer to the electrical
characteristics of the STM32F0xx device&nbsp;datasheet to have the correct
value</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_usart.c/.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">USART_Init() </span>function: update baudrate computation to be in line with the formula described in the Reference Manual (RM0091)</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">USART_AutoBaudRateNewRequest()</span> function removed<br></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_i2c.c</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">I2C_GetITStatus() </span>function: add test to check if the interrupt source is enabled or not</span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.0 / 23-March-2012</span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">First official release&nbsp;for <span style="font-weight: bold; font-style: italic;">STM32F0xx devices</span></span><span style="font-size: 10pt; font-family: Verdana;"></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">All source files: license disclaimer text update and add link to the License file on ST Internet</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_comp.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">&nbsp;Correct values of <span style="font-style: italic;">COMP_Mode</span> parameter</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_rcc.c/.h</span><span style="font-size: 10pt; font-family: Verdana;"></span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add new reset flag <span style="font-style: italic;">V18PWRRSTF</span> in the RCC CSR&nbsp;register</span></li></ul><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add new <span style="font-style: italic;">MCO clock sources (LSI and LSE)</span> and change value of <span style="font-style: italic;">RCC_MCOSource_HSI14&nbsp;</span></span><span style="font-size: 10pt; font-family: Verdana;"></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_flash.c/.h</span><span style="font-size: 10pt; font-family: Verdana;"></span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add new function <span style="font-style: italic;">FLASH_OB_SRAMParityConfig(</span>) to manage the SRAM parity enable option bit</span></li></ul><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Flash and OB keys&nbsp;moved to <span style="font-style: italic;">stm32f0xx.h</span> file</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_tim.c/.h</span><span style="font-size: 10pt; font-family: Verdana;"></span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add additional input for <span style="font-style: italic;">TIM14 clock&nbsp;</span> (HSE divided by 32 and MCO)&nbsp;</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">Miscellaneous</span><span style="font-size: 10pt; font-family: Verdana;">&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">enhancement</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_adc.c/.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">Miscellaneous</span><span style="font-size: 10pt; font-family: Verdana;">&nbsp;update to be in line with bits naming&nbsp;in the Reference Manual (update done also in&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx.h file)</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_i2c.c/.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">Miscellaneous</span><span style="font-size: 10pt; font-family: Verdana;">&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">enhancement</span><span style="font-size: 10pt; font-family: Verdana;"></span></li></ul></ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.0RC1 / 27-January-2012</span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="list-style-type: square;">
<li><span style="font-size: 10pt; font-family: Verdana;">Official version (V1.0.0) Release Candidate 1</span></li>
</ul>
<span style="font-size: 10pt; font-family: Verdana;"></span><br><span style="font-size: 10pt; font-family: Verdana;"></span><ul style="margin-top: 0cm;" type="square"></ul>
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6
lib/inc/peripherals/stm32f0xx_adc.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_adc.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_adc.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the ADC firmware
* library
******************************************************************************
@ -181,7 +181,7 @@ typedef struct
* @}
*/
/** @defgroup ADC_Scan_Direction
/** @defgroup ADC_DMA_Mode
* @{
*/

4
lib/inc/peripherals/stm32f0xx_cec.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_cec.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_cec.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the CEC firmware
* library.
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_comp.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_comp.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_comp.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the COMP firmware
* library.
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_crc.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_crc.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_crc.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the CRC firmware
* library.
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_dac.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dac.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_dac.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the DAC firmware
* library.
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_dbgmcu.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dbgmcu.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_dbgmcu.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the DBGMCU firmware
* library.
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_dma.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_dma.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_dma.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the DMA firmware
* library.
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_exti.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_exti.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_exti.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the EXTI
* firmware library
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_flash.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_flash.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_flash.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the FLASH
* firmware library.
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_gpio.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_gpio.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_gpio.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the GPIO
* firmware library.
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_i2c.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_i2c.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_i2c.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the I2C firmware
* library
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_iwdg.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_iwdg.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_iwdg.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the IWDG
* firmware library.
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_misc.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_misc.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_misc.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the miscellaneous
* firmware library functions (add-on to CMSIS functions).
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_pwr.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_pwr.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_pwr.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the PWR firmware
* library.
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_rcc.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rcc.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_rcc.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the RCC
* firmware library.
******************************************************************************

21
lib/inc/peripherals/stm32f0xx_rtc.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rtc.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_rtc.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the RTC firmware
* library.
******************************************************************************
@ -555,8 +555,6 @@ typedef struct
input tamper 1 */
#define RTC_Tamper_2 RTC_TAFCR_TAMP2E /*!< Tamper detection enable for
input tamper 2 */
#define RTC_Tamper_3 RTC_TAFCR_TAMP3E /*!< Tamper detection enable for
input tamper 3 */
#define IS_RTC_TAMPER(TAMPER) ((((TAMPER) & (uint32_t)0xFFFFFFD6) == 0x00) && ((TAMPER) != (uint32_t)RESET))
@ -629,7 +627,6 @@ typedef struct
* @{
*/
#define RTC_FLAG_RECALPF ((uint32_t)0x00010000)
#define RTC_FLAG_TAMP3F ((uint32_t)0x00008000)
#define RTC_FLAG_TAMP2F ((uint32_t)0x00004000)
#define RTC_FLAG_TAMP1F ((uint32_t)0x00002000)
#define RTC_FLAG_TSOVF ((uint32_t)0x00001000)
@ -640,13 +637,12 @@ typedef struct
#define RTC_FLAG_INITS ((uint32_t)0x00000010)
#define RTC_FLAG_SHPF ((uint32_t)0x00000008)
#define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RECALPF) || ((FLAG) == RTC_FLAG_TAMP3F) || \
#define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RECALPF) || ((FLAG) == RTC_FLAG_SHPF) || \
((FLAG) == RTC_FLAG_TAMP2F) || ((FLAG) == RTC_FLAG_TAMP1F) || \
((FLAG) == RTC_FLAG_TSOVF) || ((FLAG) == RTC_FLAG_TSF) || \
((FLAG) == RTC_FLAG_ALRAF) || ((FLAG) == RTC_FLAG_INITF) || \
((FLAG) == RTC_FLAG_RSF) || ((FLAG) == RTC_FLAG_INITS) || \
((FLAG) == RTC_FLAG_SHPF))
#define IS_RTC_CLEAR_FLAG(FLAG) (((FLAG) != (uint32_t)RESET) && (((FLAG) & 0xFFFF06DF) == (uint32_t)RESET))
((FLAG) == RTC_FLAG_RSF) || ((FLAG) == RTC_FLAG_INITS))
#define IS_RTC_CLEAR_FLAG(FLAG) (((FLAG) != (uint32_t)RESET) && (((FLAG) & 0xFFFF86DF) == (uint32_t)RESET))
/**
* @}
@ -660,13 +656,12 @@ typedef struct
#define RTC_IT_TAMP ((uint32_t)0x00000004) /* Used only to Enable the Tamper Interrupt */
#define RTC_IT_TAMP1 ((uint32_t)0x00020000)
#define RTC_IT_TAMP2 ((uint32_t)0x00040000)
#define RTC_IT_TAMP3 ((uint32_t)0x00080000)
#define IS_RTC_CONFIG_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFF6FFB) == (uint32_t)RESET))
#define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_TS) || ((IT) == RTC_IT_ALRA) || \
((IT) == RTC_IT_TAMP1) || ((IT) == RTC_IT_TAMP2) || \
((IT) == RTC_IT_TAMP3))
#define IS_RTC_CLEAR_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFF16FFF) == (uint32_t)RESET))
((IT) == RTC_IT_TAMP1) || ((IT) == RTC_IT_TAMP2))
#define IS_RTC_CLEAR_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFF96FFF) == (uint32_t)RESET))
/**
* @}

4
lib/inc/peripherals/stm32f0xx_spi.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_spi.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_spi.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the SPI
* firmware library.
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_syscfg.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_syscfg.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_syscfg.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the SYSCFG firmware
* library.
******************************************************************************

4
lib/inc/peripherals/stm32f0xx_tim.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_tim.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_tim.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the TIM
* firmware library.
******************************************************************************

23
lib/inc/peripherals/stm32f0xx_usart.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_usart.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_usart.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the USART
* firmware library.
******************************************************************************
@ -129,8 +129,8 @@ typedef struct
*/
#define USART_StopBits_1 ((uint32_t)0x00000000)
#define USART_StopBits_2 ((uint32_t)USART_CR2_STOP_1)
#define USART_StopBits_1_5 ((uint32_t)USART_CR2_STOP_0 | USART_CR2_STOP_1)
#define USART_StopBits_2 USART_CR2_STOP_1
#define USART_StopBits_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1)
#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \
((STOPBITS) == USART_StopBits_2) || \
((STOPBITS) == USART_StopBits_1_5))
@ -143,8 +143,8 @@ typedef struct
*/
#define USART_Parity_No ((uint32_t)0x00000000)
#define USART_Parity_Even ((uint32_t)USART_CR1_PCE)
#define USART_Parity_Odd ((uint32_t)USART_CR1_PCE | USART_CR1_PS)
#define USART_Parity_Even USART_CR1_PCE
#define USART_Parity_Odd (USART_CR1_PCE | USART_CR1_PS)
#define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \
((PARITY) == USART_Parity_Even) || \
((PARITY) == USART_Parity_Odd))
@ -169,9 +169,9 @@ typedef struct
*/
#define USART_HardwareFlowControl_None ((uint32_t)0x00000000)
#define USART_HardwareFlowControl_RTS ((uint32_t)USART_CR3_RTSE)
#define USART_HardwareFlowControl_CTS ((uint32_t)USART_CR3_CTSE)
#define USART_HardwareFlowControl_RTS_CTS ((uint32_t)USART_CR3_RTSE | USART_CR3_CTSE)
#define USART_HardwareFlowControl_RTS USART_CR3_RTSE
#define USART_HardwareFlowControl_CTS USART_CR3_CTSE
#define USART_HardwareFlowControl_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE)
#define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\
(((CONTROL) == USART_HardwareFlowControl_None) || \
((CONTROL) == USART_HardwareFlowControl_RTS) || \
@ -283,8 +283,8 @@ typedef struct
*/
#define USART_WakeUpSource_AddressMatch ((uint32_t)0x00000000)
#define USART_WakeUpSource_StartBit ((uint32_t)USART_CR3_WUS_1)
#define USART_WakeUpSource_RXNE ((uint32_t)USART_CR3_WUS_0 | USART_CR3_WUS_1)
#define USART_WakeUpSource_StartBit USART_CR3_WUS_1
#define USART_WakeUpSource_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1)
#define IS_USART_STOPMODE_WAKEUPSOURCE(SOURCE) (((SOURCE) == USART_WakeUpSource_AddressMatch) || \
((SOURCE) == USART_WakeUpSource_StartBit) || \
((SOURCE) == USART_WakeUpSource_RXNE))
@ -528,7 +528,6 @@ void USART_StopModeWakeUpSourceConfig(USART_TypeDef* USARTx, uint32_t USART_Wake
/* AutoBaudRate functions *****************************************************/
void USART_AutoBaudRateCmd(USART_TypeDef* USARTx, FunctionalState NewState);
void USART_AutoBaudRateConfig(USART_TypeDef* USARTx, uint32_t USART_AutoBaudRate);
void USART_AutoBaudRateNewRequest(USART_TypeDef* USARTx);
/* Data transfers functions ***************************************************/
void USART_SendData(USART_TypeDef* USARTx, uint16_t Data);

4
lib/inc/peripherals/stm32f0xx_wwdg.h → Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_wwdg.h Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_wwdg.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file contains all the functions prototypes for the WWDG
* firmware library.
******************************************************************************

242
lib/src/peripherals/stm32f0xx_adc.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_adc.c Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_adc.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the Analog to Digital Convertor (ADC) peripheral:
* + Initialization and Configuration
@ -224,7 +224,7 @@ void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
* @brief Enables or disables the specified ADC peripheral.
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param NewState: new state of the ADCx peripheral.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
@ -250,10 +250,10 @@ void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
* or div4
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param ADC_JitterOff: This parameter can be :
* @arg ADC_JitterOff_PCLKDiv2: Remove jitter when ADC is clocked by PLCK divided by 2
* @arg ADC_JitterOff_PCLKDiv4: Remove jitter when ADC is clocked by PLCK divided by 4
* @arg ADC_JitterOff_PCLKDiv2: Remove jitter when ADC is clocked by PLCK divided by 2
* @arg ADC_JitterOff_PCLKDiv4: Remove jitter when ADC is clocked by PLCK divided by 4
* @param NewState: new state of the ADCx jitter.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void ADC_JitterCmd(ADC_TypeDef* ADCx, uint32_t ADC_JitterOff, FunctionalState NewState)
@ -304,14 +304,12 @@ void ADC_JitterCmd(ADC_TypeDef* ADCx, uint32_t ADC_JitterOff, FunctionalState Ne
* consumption when the ADC is not converting.
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @note The ADC can be powered down:
* - During the Auto delay phase
* => The ADC is powered on again at the end of the delay (until the
* previous data is read from the ADC data register).
* - During the ADC is waiting for a trigger event
* => The ADC is powered up at the next trigger event (when the
* conversion is started).
* - During the Auto delay phase: The ADC is powered on again at the end
* of the delay (until the previous data is read from the ADC data register).
* - During the ADC is waiting for a trigger event: The ADC is powered up
* at the next trigger event (when the conversion is started).
* @param NewState: new state of the ADCx power Off.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void ADC_AutoPowerOffCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
@ -337,16 +335,15 @@ void ADC_AutoPowerOffCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
* @note When the CPU clock is not fast enough to manage the data rate, a
* Hardware delay can be introduced between ADC conversions to reduce
* this data rate.
* @note The Hardware delay is inserted after :
* - after each conversions and until the previous data is read from the
* ADC data register
* @note The Hardware delay is inserted after each conversions and until the
* previous data is read from the ADC data register
* @note This is a way to automatically adapt the speed of the ADC to the speed
* of the system which will read the data.
* @note Any hardware triggers wich occur while a conversion is on going or
* while the automatic Delay is applied are ignored
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param NewState: new state of the ADCx Auto-Delay.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void ADC_WaitModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
@ -398,7 +395,7 @@ void ADC_WaitModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
* @brief Enables or disables the analog watchdog
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param NewState: new state of the ADCx Analog Watchdog.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
@ -423,9 +420,9 @@ void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
* @brief Configures the high and low thresholds of the analog watchdog.
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param HighThreshold: the ADC analog watchdog High threshold value.
* This parameter must be a 12bit value.
* This parameter must be a 12bit value.
* @param LowThreshold: the ADC analog watchdog Low threshold value.
* This parameter must be a 12bit value.
* This parameter must be a 12bit value.
* @retval None
*/
void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,
@ -445,26 +442,26 @@ void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshol
* @brief Configures the analog watchdog guarded single channel
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param ADC_AnalogWatchdog_Channel: the ADC channel to configure for the analog watchdog.
* This parameter can be one of the following values:
* @arg ADC_AnalogWatchdog_Channel_0: ADC Channel0 selected
* @arg ADC_AnalogWatchdog_Channel_1: ADC Channel1 selected
* @arg ADC_AnalogWatchdog_Channel_2: ADC Channel2 selected
* @arg ADC_AnalogWatchdog_Channel_3: ADC Channel3 selected
* @arg ADC_AnalogWatchdog_Channel_4: ADC Channel4 selected
* @arg ADC_AnalogWatchdog_Channel_5: ADC Channel5 selected
* @arg ADC_AnalogWatchdog_Channel_6: ADC Channel6 selected
* @arg ADC_AnalogWatchdog_Channel_7: ADC Channel7 selected
* @arg ADC_AnalogWatchdog_Channel_8: ADC Channel8 selected
* @arg ADC_AnalogWatchdog_Channel_9: ADC Channel9 selected
* @arg ADC_AnalogWatchdog_Channel_10: ADC Channel10 selected
* @arg ADC_AnalogWatchdog_Channel_11: ADC Channel11 selected
* @arg ADC_AnalogWatchdog_Channel_12: ADC Channel12 selected
* @arg ADC_AnalogWatchdog_Channel_13: ADC Channel13 selected
* @arg ADC_AnalogWatchdog_Channel_14: ADC Channel14 selected
* @arg ADC_AnalogWatchdog_Channel_15: ADC Channel15 selected
* @arg ADC_AnalogWatchdog_Channel_16: ADC Channel16 selected
* @arg ADC_AnalogWatchdog_Channel_17: ADC Channel17 selected
* @arg ADC_AnalogWatchdog_Channel_18: ADC Channel18 selected
* This parameter can be one of the following values:
* @arg ADC_AnalogWatchdog_Channel_0: ADC Channel0 selected
* @arg ADC_AnalogWatchdog_Channel_1: ADC Channel1 selected
* @arg ADC_AnalogWatchdog_Channel_2: ADC Channel2 selected
* @arg ADC_AnalogWatchdog_Channel_3: ADC Channel3 selected
* @arg ADC_AnalogWatchdog_Channel_4: ADC Channel4 selected
* @arg ADC_AnalogWatchdog_Channel_5: ADC Channel5 selected
* @arg ADC_AnalogWatchdog_Channel_6: ADC Channel6 selected
* @arg ADC_AnalogWatchdog_Channel_7: ADC Channel7 selected
* @arg ADC_AnalogWatchdog_Channel_8: ADC Channel8 selected
* @arg ADC_AnalogWatchdog_Channel_9: ADC Channel9 selected
* @arg ADC_AnalogWatchdog_Channel_10: ADC Channel10 selected
* @arg ADC_AnalogWatchdog_Channel_11: ADC Channel11 selected
* @arg ADC_AnalogWatchdog_Channel_12: ADC Channel12 selected
* @arg ADC_AnalogWatchdog_Channel_13: ADC Channel13 selected
* @arg ADC_AnalogWatchdog_Channel_14: ADC Channel14 selected
* @arg ADC_AnalogWatchdog_Channel_15: ADC Channel15 selected
* @arg ADC_AnalogWatchdog_Channel_16: ADC Channel16 selected
* @arg ADC_AnalogWatchdog_Channel_17: ADC Channel17 selected
* @arg ADC_AnalogWatchdog_Channel_18: ADC Channel18 selected
* @note The channel selected on the AWDCH must be also set into the CHSELR
* register
* @retval None
@ -494,7 +491,7 @@ void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_Analo
* @brief Enables or disables the ADC Analog Watchdog Single Channel.
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param NewState: new state of the ADCx ADC Analog Watchdog Single Channel.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void ADC_AnalogWatchdogSingleChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
@ -546,7 +543,7 @@ void ADC_AnalogWatchdogSingleChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewSt
/**
* @brief Enables or disables the temperature sensor channel.
* @param NewState: new state of the temperature sensor input channel.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void ADC_TempSensorCmd(FunctionalState NewState)
@ -569,7 +566,7 @@ void ADC_TempSensorCmd(FunctionalState NewState)
/**
* @brief Enables or disables the Vrefint channel.
* @param NewState: new state of the Vref input channel.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void ADC_VrefintCmd(FunctionalState NewState)
@ -592,7 +589,7 @@ void ADC_VrefintCmd(FunctionalState NewState)
/**
* @brief Enables or disables the Vbat channel.
* @param NewState: new state of the Vbat input channel.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void ADC_VbatCmd(FunctionalState NewState)
@ -656,37 +653,36 @@ void ADC_VbatCmd(FunctionalState NewState)
* @brief Configures for the selected ADC and its sampling time.
* @param ADCx: where x can be 1 to select the ADC peripheral.
* @param ADC_Channel: the ADC channel to configure.
* This parameter can be any combination of the following values:
* @arg ADC_Channel_0: ADC Channel0 selected
* @arg ADC_Channel_1: ADC Channel1 selected
* @arg ADC_Channel_2: ADC Channel2 selected
* @arg ADC_Channel_3: ADC Channel3 selected
* @arg ADC_Channel_4: ADC Channel4 selected
* @arg ADC_Channel_5: ADC Channel5 selected
* @arg ADC_Channel_6: ADC Channel6 selected
* @arg ADC_Channel_7: ADC Channel7 selected
* @arg ADC_Channel_8: ADC Channel8 selected
* @arg ADC_Channel_9: ADC Channel9 selected
* @arg ADC_Channel_10: ADC Channel10 selected
* @arg ADC_Channel_11: ADC Channel11 selected
* @arg ADC_Channel_12: ADC Channel12 selected
* @arg ADC_Channel_13: ADC Channel13 selected
* @arg ADC_Channel_14: ADC Channel14 selected
* @arg ADC_Channel_15: ADC Channel15 selected
* @arg ADC_Channel_16: ADC Channel16 selected
* @arg ADC_Channel_17: ADC Channel17 selected
* @arg ADC_Channel_18: ADC Channel18 selected
* @param ADC_SampleTime: The sample time value to be set for the selected
* channel.
* This parameter can be one of the following values:
* @arg ADC_SampleTime_1_5Cycles: Sample time equal to 1.5 cycles
* @arg ADC_SampleTime_7_5Cycles: Sample time equal to 7.5 cycles
* @arg ADC_SampleTime_13_5Cycles: Sample time equal to 13.5 cycles
* @arg ADC_SampleTime_28_5Cycles: Sample time equal to 28.5 cycles
* @arg ADC_SampleTime_41_5Cycles: Sample time equal to 41.5 cycles
* @arg ADC_SampleTime_55_5Cycles: Sample time equal to 55.5 cycles
* @arg ADC_SampleTime_71_5Cycles: Sample time equal to 71.5 cycles
* @arg ADC_SampleTime_239_5Cycles: Sample time equal to 239.5 cycles
* This parameter can be any combination of the following values:
* @arg ADC_Channel_0: ADC Channel0 selected
* @arg ADC_Channel_1: ADC Channel1 selected
* @arg ADC_Channel_2: ADC Channel2 selected
* @arg ADC_Channel_3: ADC Channel3 selected
* @arg ADC_Channel_4: ADC Channel4 selected
* @arg ADC_Channel_5: ADC Channel5 selected
* @arg ADC_Channel_6: ADC Channel6 selected
* @arg ADC_Channel_7: ADC Channel7 selected
* @arg ADC_Channel_8: ADC Channel8 selected
* @arg ADC_Channel_9: ADC Channel9 selected
* @arg ADC_Channel_10: ADC Channel10 selected
* @arg ADC_Channel_11: ADC Channel11 selected
* @arg ADC_Channel_12: ADC Channel12 selected
* @arg ADC_Channel_13: ADC Channel13 selected
* @arg ADC_Channel_14: ADC Channel14 selected
* @arg ADC_Channel_15: ADC Channel15 selected
* @arg ADC_Channel_16: ADC Channel16 selected
* @arg ADC_Channel_17: ADC Channel17 selected
* @arg ADC_Channel_18: ADC Channel18 selected
* @param ADC_SampleTime: The sample time value to be set for the selected channel.
* This parameter can be one of the following values:
* @arg ADC_SampleTime_1_5Cycles: Sample time equal to 1.5 cycles
* @arg ADC_SampleTime_7_5Cycles: Sample time equal to 7.5 cycles
* @arg ADC_SampleTime_13_5Cycles: Sample time equal to 13.5 cycles
* @arg ADC_SampleTime_28_5Cycles: Sample time equal to 28.5 cycles
* @arg ADC_SampleTime_41_5Cycles: Sample time equal to 41.5 cycles
* @arg ADC_SampleTime_55_5Cycles: Sample time equal to 55.5 cycles
* @arg ADC_SampleTime_71_5Cycles: Sample time equal to 71.5 cycles
* @arg ADC_SampleTime_239_5Cycles: Sample time equal to 239.5 cycles
* @retval None
*/
void ADC_ChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_Channel, uint32_t ADC_SampleTime)
@ -715,7 +711,7 @@ void ADC_ChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_Channel, uint32_t ADC_Sam
* @brief Enable the Continuous mode for the selected ADCx channels.
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param NewState: new state of the Continuous mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @note It is not possible to have both discontinuous mode and continuous mode
* enabled. In this case (If DISCEN and CONT are Set), the ADC behaves
* as if continuous mode was disabled
@ -743,7 +739,7 @@ void ADC_ContinuousModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
* @brief Enable the discontinuous mode for the selected ADC channels.
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param NewState: new state of the discontinuous mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @note It is not possible to have both discontinuous mode and continuous mode
* enabled. In this case (If DISCEN and CONT are Set), the ADC behaves
* as if continuous mode was disabled
@ -771,7 +767,7 @@ void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
* @brief Enable the Overrun mode for the selected ADC channels.
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param NewState: new state of the Overrun mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void ADC_OverrunModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
@ -905,7 +901,7 @@ uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx)
* @brief Enables or disables the specified ADC DMA request.
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param NewState: new state of the selected ADC DMA transfer.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
@ -930,9 +926,9 @@ void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
* @brief Enables or disables the ADC DMA request after last transfer (Single-ADC mode)
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param ADC_DMARequestMode: the ADC channel to configure.
* This parameter can be one of the following values:
* @arg ADC_DMAMode_OneShot : DMA One Shot Mode
* @arg ADC_DMAMode_Circular : DMA Circular Mode
* This parameter can be one of the following values:
* @arg ADC_DMAMode_OneShot: DMA One Shot Mode
* @arg ADC_DMAMode_Circular: DMA Circular Mode
* @retval None
*/
void ADC_DMARequestModeConfig(ADC_TypeDef* ADCx, uint32_t ADC_DMARequestMode)
@ -1032,15 +1028,15 @@ void ADC_DMARequestModeConfig(ADC_TypeDef* ADCx, uint32_t ADC_DMARequestMode)
* @brief Enables or disables the specified ADC interrupts.
* @param ADCx: where x can be 1 to select the ADC peripheral.
* @param ADC_IT: specifies the ADC interrupt sources to be enabled or disabled.
* This parameter can be one of the following values:
* @arg ADC_IT_ADRDY: ADC ready interrupt
* @arg ADC_IT_EOSMP: End of sampling interrupt
* @arg ADC_IT_EOC: End of conversion interrupt
* @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt
* @arg ADC_IT_OVR: overrun interrupt
* @arg ADC_IT_AWD: Analog watchdog interrupt
* This parameter can be one of the following values:
* @arg ADC_IT_ADRDY: ADC ready interrupt
* @arg ADC_IT_EOSMP: End of sampling interrupt
* @arg ADC_IT_EOC: End of conversion interrupt
* @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt
* @arg ADC_IT_OVR: overrun interrupt
* @arg ADC_IT_AWD: Analog watchdog interrupt
* @param NewState: new state of the specified ADC interrupts.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState)
@ -1066,18 +1062,18 @@ void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState)
* @brief Checks whether the specified ADC flag is set or not.
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param ADC_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* @arg ADC_FLAG_AWD: Analog watchdog flag
* @arg ADC_FLAG_OVR: Overrun flag
* @arg ADC_FLAG_EOSEQ: End of Sequence flag
* @arg ADC_FLAG_EOC: End of conversion flag
* @arg ADC_FLAG_EOSMP: End of sampling flag
* @arg ADC_FLAG_ADRDY: ADC Ready flag
* @arg ADC_FLAG_ADEN: ADC enable flag
* @arg ADC_FLAG_ADDIS: ADC disable flag
* @arg ADC_FLAG_ADSTART: ADC start flag
* @arg ADC_FLAG_ADSTP: ADC stop flag
* @arg ADC_FLAG_ADCAL: ADC Calibration flag
* This parameter can be one of the following values:
* @arg ADC_FLAG_AWD: Analog watchdog flag
* @arg ADC_FLAG_OVR: Overrun flag
* @arg ADC_FLAG_EOSEQ: End of Sequence flag
* @arg ADC_FLAG_EOC: End of conversion flag
* @arg ADC_FLAG_EOSMP: End of sampling flag
* @arg ADC_FLAG_ADRDY: ADC Ready flag
* @arg ADC_FLAG_ADEN: ADC enable flag
* @arg ADC_FLAG_ADDIS: ADC disable flag
* @arg ADC_FLAG_ADSTART: ADC start flag
* @arg ADC_FLAG_ADSTP: ADC stop flag
* @arg ADC_FLAG_ADCAL: ADC Calibration flag
* @retval The new state of ADC_FLAG (SET or RESET).
*/
FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
@ -1117,13 +1113,13 @@ FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
* @brief Clears the ADCx's pending flags.
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param ADC_FLAG: specifies the flag to clear.
* This parameter can be any combination of the following values:
* @arg ADC_FLAG_AWD: Analog watchdog flag
* @arg ADC_FLAG_EOC: End of conversion flag
* @arg ADC_FLAG_ADRDY: ADC Ready flag
* @arg ADC_FLAG_EOSMP: End of sampling flag
* @arg ADC_FLAG_EOSEQ: End of Sequence flag
* @arg ADC_FLAG_OVR: Overrun flag
* This parameter can be any combination of the following values:
* @arg ADC_FLAG_AWD: Analog watchdog flag
* @arg ADC_FLAG_EOC: End of conversion flag
* @arg ADC_FLAG_ADRDY: ADC Ready flag
* @arg ADC_FLAG_EOSMP: End of sampling flag
* @arg ADC_FLAG_EOSEQ: End of Sequence flag
* @arg ADC_FLAG_OVR: Overrun flag
* @retval None
*/
void ADC_ClearFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
@ -1140,13 +1136,13 @@ void ADC_ClearFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
* @brief Checks whether the specified ADC interrupt has occurred or not.
* @param ADCx: where x can be 1 to select the ADC1 peripheral
* @param ADC_IT: specifies the ADC interrupt source to check.
* This parameter can be one of the following values:
* @arg ADC_IT_ADRDY: ADC ready interrupt
* @arg ADC_IT_EOSMP: End of sampling interrupt
* @arg ADC_IT_EOC: End of conversion interrupt
* @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt
* @arg ADC_IT_OVR: overrun interrupt
* @arg ADC_IT_AWD: Analog watchdog interrupt
* This parameter can be one of the following values:
* @arg ADC_IT_ADRDY: ADC ready interrupt
* @arg ADC_IT_EOSMP: End of sampling interrupt
* @arg ADC_IT_EOC: End of conversion interrupt
* @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt
* @arg ADC_IT_OVR: overrun interrupt
* @arg ADC_IT_AWD: Analog watchdog interrupt
* @retval The new state of ADC_IT (SET or RESET).
*/
ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint32_t ADC_IT)
@ -1180,13 +1176,13 @@ ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint32_t ADC_IT)
* @brief Clears the ADCx's interrupt pending bits.
* @param ADCx: where x can be 1 to select the ADC1 peripheral.
* @param ADC_IT: specifies the ADC interrupt pending bit to clear.
* This parameter can be one of the following values:
* @arg ADC_IT_ADRDY: ADC ready interrupt
* @arg ADC_IT_EOSMP: End of sampling interrupt
* @arg ADC_IT_EOC: End of conversion interrupt
* @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt
* @arg ADC_IT_OVR: overrun interrupt
* @arg ADC_IT_AWD: Analog watchdog interrupt
* This parameter can be one of the following values:
* @arg ADC_IT_ADRDY: ADC ready interrupt
* @arg ADC_IT_EOSMP: End of sampling interrupt
* @arg ADC_IT_EOC: End of conversion interrupt
* @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt
* @arg ADC_IT_OVR: overrun interrupt
* @arg ADC_IT_AWD: Analog watchdog interrupt
* @retval None
*/
void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint32_t ADC_IT)

150
lib/src/peripherals/stm32f0xx_cec.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_cec.c Executable file → Normal file
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_cec.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the Consumer Electronics Control (CEC) peripheral:
* + Initialization and Configuration
@ -204,7 +204,7 @@ void CEC_StructInit(CEC_InitTypeDef* CEC_InitStruct)
/**
* @brief Enables or disables the CEC peripheral.
* @param NewState: new state of the CEC peripheral.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void CEC_Cmd(FunctionalState NewState)
@ -226,7 +226,7 @@ void CEC_Cmd(FunctionalState NewState)
/**
* @brief Enables or disables the CEC Listen Mode.
* @param NewState: new state of the Listen Mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void CEC_ListenModeCmd(FunctionalState NewState)
@ -325,7 +325,7 @@ void CEC_StartOfMessage(void)
/**
* @brief Transmits message with an EOM bit.
* @param None.
* @param None
* @retval None
*/
void CEC_EndOfMessage(void)
@ -410,22 +410,22 @@ void CEC_EndOfMessage(void)
/**
* @brief Enables or disables the selected CEC interrupts.
* @param CEC_IT: specifies the CEC interrupt source to be enabled.
* This parameter can be any combination of the following values:
* @arg CEC_IT_TXACKE: Tx Missing acknowledge Error
* @arg CEC_IT_TXERR: Tx Error.
* @arg CEC_IT_TXUDR: Tx-Buffer Underrun.
* @arg CEC_IT_TXEND: End of Transmission (successful transmission of the last byte).
* @arg CEC_IT_TXBR: Tx-Byte Request.
* @arg CEC_IT_ARBLST: Arbitration Lost
* @arg CEC_IT_RXACKE: Rx-Missing Acknowledge
* @arg CEC_IT_LBPE: Rx Long period Error
* @arg CEC_IT_SBPE: Rx Short period Error
* @arg CEC_IT_BRE: Rx Bit Rising Error
* @arg CEC_IT_RXOVR: Rx Overrun.
* @arg CEC_IT_RXEND: End Of Reception
* @arg CEC_IT_RXBR: Rx-Byte Received
* This parameter can be any combination of the following values:
* @arg CEC_IT_TXACKE: Tx Missing acknowledge Error
* @arg CEC_IT_TXERR: Tx Error.
* @arg CEC_IT_TXUDR: Tx-Buffer Underrun.
* @arg CEC_IT_TXEND: End of Transmission (successful transmission of the last byte).
* @arg CEC_IT_TXBR: Tx-Byte Request.
* @arg CEC_IT_ARBLST: Arbitration Lost
* @arg CEC_IT_RXACKE: Rx-Missing Acknowledge
* @arg CEC_IT_LBPE: Rx Long period Error
* @arg CEC_IT_SBPE: Rx Short period Error
* @arg CEC_IT_BRE: Rx Bit Rising Error
* @arg CEC_IT_RXOVR: Rx Overrun.
* @arg CEC_IT_RXEND: End Of Reception
* @arg CEC_IT_RXBR: Rx-Byte Received
* @param NewState: new state of the selected CEC interrupts.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void CEC_ITConfig(uint16_t CEC_IT, FunctionalState NewState)
@ -450,19 +450,19 @@ void CEC_ITConfig(uint16_t CEC_IT, FunctionalState NewState)
* @brief Gets the CEC flag status.
* @param CEC_FLAG: specifies the CEC flag to check.
* This parameter can be one of the following values:
* @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error
* @arg CEC_FLAG_TXERR: Tx Error.
* @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun.
* @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte).
* @arg CEC_FLAG_TXBR: Tx-Byte Request.
* @arg CEC_FLAG_ARBLST: Arbitration Lost
* @arg CEC_FLAG_RXACKE: Rx-Missing Acknowledge
* @arg CEC_FLAG_LBPE: Rx Long period Error
* @arg CEC_FLAG_SBPE: Rx Short period Error
* @arg CEC_FLAG_BRE: Rx Bit Rissing Error
* @arg CEC_FLAG_RXOVR: Rx Overrun.
* @arg CEC_FLAG_RXEND: End Of Reception.
* @arg CEC_FLAG_RXBR: Rx-Byte Received.
* @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error
* @arg CEC_FLAG_TXERR: Tx Error.
* @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun.
* @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte).
* @arg CEC_FLAG_TXBR: Tx-Byte Request.
* @arg CEC_FLAG_ARBLST: Arbitration Lost
* @arg CEC_FLAG_RXACKE: Rx-Missing Acknowledge
* @arg CEC_FLAG_LBPE: Rx Long period Error
* @arg CEC_FLAG_SBPE: Rx Short period Error
* @arg CEC_FLAG_BRE: Rx Bit Rissing Error
* @arg CEC_FLAG_RXOVR: Rx Overrun.
* @arg CEC_FLAG_RXEND: End Of Reception.
* @arg CEC_FLAG_RXBR: Rx-Byte Received.
* @retval The new state of CEC_FLAG (SET or RESET)
*/
FlagStatus CEC_GetFlagStatus(uint16_t CEC_FLAG)
@ -490,20 +490,20 @@ FlagStatus CEC_GetFlagStatus(uint16_t CEC_FLAG)
/**
* @brief Clears the CEC's pending flags.
* @param CEC_FLAG: specifies the flag to clear.
* This parameter can be any combination of the following values:
* @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error
* @arg CEC_FLAG_TXERR: Tx Error
* @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun
* @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte).
* @arg CEC_FLAG_TXBR: Tx-Byte Request
* @arg CEC_FLAG_ARBLST: Arbitration Lost
* @arg CEC_FLAG_RXACKE: Rx Missing Acknowledge
* @arg CEC_FLAG_LBPE: Rx Long period Error
* @arg CEC_FLAG_SBPE: Rx Short period Error
* @arg CEC_FLAG_BRE: Rx Bit Rising Error
* @arg CEC_FLAG_RXOVR: Rx Overrun
* @arg CEC_FLAG_RXEND: End Of Reception
* @arg CEC_FLAG_RXBR: Rx-Byte Received
* This parameter can be any combination of the following values:
* @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error
* @arg CEC_FLAG_TXERR: Tx Error
* @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun
* @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte).
* @arg CEC_FLAG_TXBR: Tx-Byte Request
* @arg CEC_FLAG_ARBLST: Arbitration Lost
* @arg CEC_FLAG_RXACKE: Rx Missing Acknowledge
* @arg CEC_FLAG_LBPE: Rx Long period Error
* @arg CEC_FLAG_SBPE: Rx Short period Error
* @arg CEC_FLAG_BRE: Rx Bit Rising Error
* @arg CEC_FLAG_RXOVR: Rx Overrun
* @arg CEC_FLAG_RXEND: End Of Reception
* @arg CEC_FLAG_RXBR: Rx-Byte Received
* @retval None
*/
void CEC_ClearFlag(uint32_t CEC_FLAG)
@ -517,20 +517,20 @@ void CEC_ClearFlag(uint32_t CEC_FLAG)
/**
* @brief Checks whether the specified CEC interrupt has occurred or not.
* @param CEC_IT: specifies the CEC interrupt source to check.
* This parameter can be one of the following values:
* @arg CEC_IT_TXACKE: Tx Missing acknowledge Error
* @arg CEC_IT_TXERR: Tx Error.
* @arg CEC_IT_TXUDR: Tx-Buffer Underrun.
* @arg CEC_IT_TXEND: End of transmission (successful transmission of the last byte).
* @arg CEC_IT_TXBR: Tx-Byte Request.
* @arg CEC_IT_ARBLST: Arbitration Lost.
* @arg CEC_IT_RXACKE: Rx-Missing Acknowledge.
* @arg CEC_IT_LBPE: Rx Long period Error.
* @arg CEC_IT_SBPE: Rx Short period Error.
* @arg CEC_IT_BRE: Rx Bit Rising Error.
* @arg CEC_IT_RXOVR: Rx Overrun.
* @arg CEC_IT_RXEND: End Of Reception.
* @arg CEC_IT_RXBR: Rx-Byte Received
* This parameter can be one of the following values:
* @arg CEC_IT_TXACKE: Tx Missing acknowledge Error
* @arg CEC_IT_TXERR: Tx Error.
* @arg CEC_IT_TXUDR: Tx-Buffer Underrun.
* @arg CEC_IT_TXEND: End of transmission (successful transmission of the last byte).
* @arg CEC_IT_TXBR: Tx-Byte Request.
* @arg CEC_IT_ARBLST: Arbitration Lost.
* @arg CEC_IT_RXACKE: Rx-Missing Acknowledge.
* @arg CEC_IT_LBPE: Rx Long period Error.
* @arg CEC_IT_SBPE: Rx Short period Error.
* @arg CEC_IT_BRE: Rx Bit Rising Error.
* @arg CEC_IT_RXOVR: Rx Overrun.
* @arg CEC_IT_RXEND: End Of Reception.
* @arg CEC_IT_RXBR: Rx-Byte Received
* @retval The new state of CEC_IT (SET or RESET).
*/
ITStatus CEC_GetITStatus(uint16_t CEC_IT)
@ -563,20 +563,20 @@ ITStatus CEC_GetITStatus(uint16_t CEC_IT)
/**
* @brief Clears the CEC's interrupt pending bits.
* @param CEC_IT: specifies the CEC interrupt pending bit to clear.
* This parameter can be any combination of the following values:
* @arg CEC_IT_TXACKE: Tx Missing acknowledge Error
* @arg CEC_IT_TXERR: Tx Error
* @arg CEC_IT_TXUDR: Tx-Buffer Underrun
* @arg CEC_IT_TXEND: End of Transmission
* @arg CEC_IT_TXBR: Tx-Byte Request
* @arg CEC_IT_ARBLST: Arbitration Lost
* @arg CEC_IT_RXACKE: Rx-Missing Acknowledge
* @arg CEC_IT_LBPE: Rx Long period Error
* @arg CEC_IT_SBPE: Rx Short period Error
* @arg CEC_IT_BRE: Rx Bit Rising Error
* @arg CEC_IT_RXOVR: Rx Overrun
* @arg CEC_IT_RXEND: End Of Reception
* @arg CEC_IT_RXBR: Rx-Byte Received
* This parameter can be any combination of the following values:
* @arg CEC_IT_TXACKE: Tx Missing acknowledge Error
* @arg CEC_IT_TXERR: Tx Error
* @arg CEC_IT_TXUDR: Tx-Buffer Underrun
* @arg CEC_IT_TXEND: End of Transmission
* @arg CEC_IT_TXBR: Tx-Byte Request
* @arg CEC_IT_ARBLST: Arbitration Lost
* @arg CEC_IT_RXACKE: Rx-Missing Acknowledge
* @arg CEC_IT_LBPE: Rx Long period Error
* @arg CEC_IT_SBPE: Rx Short period Error
* @arg CEC_IT_BRE: Rx Bit Rising Error
* @arg CEC_IT_RXOVR: Rx Overrun
* @arg CEC_IT_RXEND: End Of Reception
* @arg CEC_IT_RXBR: Rx-Byte Received
* @retval None
*/
void CEC_ClearITPendingBit(uint16_t CEC_IT)

54
lib/src/peripherals/stm32f0xx_comp.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_comp.c Executable file → Normal file
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_comp.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the comparators (COMP1 and COMP2) peripheral:
* + Comparators configuration
@ -152,12 +152,11 @@ void COMP_DeInit(void)
* @note By default, PA1 is selected as COMP1 non inverting input.
* To use PA4 as COMP1 non inverting input call COMP_SwitchCmd() after COMP_Init()
* @param COMP_Selection: the selected comparator.
* This parameter can be one of the following values:
* @arg COMP_Selection_COMP1: COMP1 selected
* @arg COMP_Selection_COMP2: COMP2 selected
* This parameter can be one of the following values:
* @arg COMP_Selection_COMP1: COMP1 selected
* @arg COMP_Selection_COMP2: COMP2 selected
* @param COMP_InitStruct: pointer to an COMP_InitTypeDef structure that contains
* the configuration information for the specified COMP peripheral.
*
* @retval None
*/
void COMP_Init(uint32_t COMP_Selection, COMP_InitTypeDef* COMP_InitStruct)
@ -212,16 +211,15 @@ void COMP_StructInit(COMP_InitTypeDef* COMP_InitStruct)
* @note If the selected comparator is locked, enable/disable can't be performed.
* To unlock the configuration, perform a system reset.
* @param COMP_Selection: the selected comparator.
* This parameter can be one of the following values:
* @arg COMP_Selection_COMP1: COMP1 selected
* @arg COMP_Selection_COMP2: COMP2 selected
* This parameter can be one of the following values:
* @arg COMP_Selection_COMP1: COMP1 selected
* @arg COMP_Selection_COMP2: COMP2 selected
* @param NewState: new state of the COMP peripheral.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @note When enabled, the comparator compares the non inverting input with
* the inverting input and the comparison result is available
* on comparator output.
* the inverting input and the comparison result is available on comparator output.
* @note When disabled, the comparator doesn't perform comparison and the
* output level is low.
* output level is low.
* @retval None
*/
void COMP_Cmd(uint32_t COMP_Selection, FunctionalState NewState)
@ -247,7 +245,7 @@ void COMP_Cmd(uint32_t COMP_Selection, FunctionalState NewState)
* @note This switch is solely intended to redirect signals onto high
* impedance input, such as COMP1 non-inverting input (highly resistive switch)
* @param NewState: New state of the analog switch.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @note When enabled, the SW1 is closed; PA1 is connected to PA4
* @note When disabled, the SW1 switch is open; PA1 is disconnected from PA4
* @retval None
@ -272,20 +270,20 @@ void COMP_SwitchCmd(FunctionalState NewState)
/**
* @brief Return the output level (high or low) of the selected comparator.
* @note The output level depends on the selected polarity.
* If the polarity is not inverted:
* @note -Comparator output is low when the non-inverting input is at a lower
* @note If the polarity is not inverted:
* - Comparator output is low when the non-inverting input is at a lower
* voltage than the inverting input
* @note -Comparator output is high when the non-inverting input is at a higher
* - Comparator output is high when the non-inverting input is at a higher
* voltage than the inverting input
* @note If the polarity is inverted:
* @note -Comparator output is high when the non-inverting input is at a lower
* - Comparator output is high when the non-inverting input is at a lower
* voltage than the inverting input
* @note -Comparator output is low when the non-inverting input is at a higher
* - Comparator output is low when the non-inverting input is at a higher
* voltage than the inverting input
* @param COMP_Selection: the selected comparator.
* This parameter can be one of the following values:
* @arg COMP_Selection_COMP1: COMP1 selected
* @arg COMP_Selection_COMP2: COMP2 selected
* This parameter can be one of the following values:
* @arg COMP_Selection_COMP1: COMP1 selected
* @arg COMP_Selection_COMP2: COMP2 selected
* @retval Returns the selected comparator output level: low or high.
*
*/
@ -328,10 +326,10 @@ uint32_t COMP_GetOutputLevel(uint32_t COMP_Selection)
/**
* @brief Enables or disables the window mode.
* In window mode, COMP1 and COMP2 non inverting inputs are connected
* @note In window mode, COMP1 and COMP2 non inverting inputs are connected
* together and only COMP1 non inverting input (PA1) can be used.
* param NewState: new state of the window mode.
* This parameter can be :
* @param NewState: new state of the window mode.
* This parameter can be :
* @arg ENABLE: COMP1 and COMP2 non inverting inputs are connected together.
* @arg DISABLE: OMP1 and COMP2 non inverting inputs are disconnected.
* @retval None
@ -376,9 +374,9 @@ void COMP_WindowCmd(FunctionalState NewState)
* @note Locking the configuration means that all control bits are read-only.
* To unlock the comparator configuration, perform a system reset.
* @param COMP_Selection: selects the comparator to be locked
* This parameter can be a value of the following values:
* @arg COMP_Selection_COMP1: COMP1 configuration is locked.
* @arg COMP_Selection_COMP2: COMP2 configuration is locked.
* This parameter can be a value of the following values:
* @arg COMP_Selection_COMP1: COMP1 configuration is locked.
* @arg COMP_Selection_COMP2: COMP2 configuration is locked.
* @retval None
*/
void COMP_LockConfig(uint32_t COMP_Selection)

16
lib/src/peripherals/stm32f0xx_crc.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_crc.c Executable file → Normal file
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_crc.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of CRC computation unit peripheral:
* + Configuration of the CRC computation unit
@ -117,11 +117,11 @@ void CRC_ResetDR(void)
/**
* @brief Selects the reverse operation to be performed on input data.
* @param CRC_ReverseInputData: Specifies the reverse operation on input data.
* This parameter can be:
* @arg CRC_ReverseInputData_No: No reverse operation is performed
* @arg CRC_ReverseInputData_8bits: reverse operation performed on 8 bits
* @arg CRC_ReverseInputData_16bits: reverse operation performed on 16 bits
* @arg CRC_ReverseInputData_32bits: reverse operation performed on 32 bits
* This parameter can be:
* @arg CRC_ReverseInputData_No: No reverse operation is performed
* @arg CRC_ReverseInputData_8bits: reverse operation performed on 8 bits
* @arg CRC_ReverseInputData_16bits: reverse operation performed on 16 bits
* @arg CRC_ReverseInputData_32bits: reverse operation performed on 32 bits
* @retval None
*/
void CRC_ReverseInputDataSelect(uint32_t CRC_ReverseInputData)
@ -147,7 +147,7 @@ void CRC_ReverseInputDataSelect(uint32_t CRC_ReverseInputData)
* @brief Enables or disable the reverse operation on output data.
* The reverse operation on output data is performed on 32-bit.
* @param NewState: new state of the reverse operation on output data.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void CRC_ReverseOutputDataCmd(FunctionalState NewState)

0
lib/src/peripherals/stm32f0xx_dac.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dac.c Executable file → Normal file
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20
lib/src/peripherals/stm32f0xx_dbgmcu.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dbgmcu.c Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_dbgmcu.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the Debug MCU (DBGMCU) peripheral:
* + Device and Revision ID management
@ -108,11 +108,11 @@ uint32_t DBGMCU_GetDEVID(void)
/**
* @brief Configures low power mode behavior when the MCU is in Debug mode.
* @param DBGMCU_Periph: specifies the low power mode.
* This parameter can be any combination of the following values:
* This parameter can be any combination of the following values:
* @arg DBGMCU_STOP: Keep debugger connection during STOP mode
* @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode
* @param NewState: new state of the specified low power mode in Debug mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
@ -135,19 +135,19 @@ void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
/**
* @brief Configures APB1 peripheral behavior when the MCU is in Debug mode.
* @param DBGMCU_Periph: specifies the APB1 peripheral.
* This parameter can be any combination of the following values:
* This parameter can be any combination of the following values:
* @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted
* @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted
* @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted
* @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted
* @arg DBGMCU_RTC_STOP: RTC Calendar and Wakeup counter stopped
* when Core is halted.
* when Core is halted.
* @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted
* @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted
* @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped
* when Core is halted
* when Core is halted
* @param NewState: new state of the specified APB1 peripheral in Debug mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
@ -169,13 +169,13 @@ void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
/**
* @brief Configures APB2 peripheral behavior when the MCU is in Debug mode.
* @param DBGMCU_Periph: specifies the APB2 peripheral.
* This parameter can be any combination of the following values:
* This parameter can be any combination of the following values:
* @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted
* @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted
* @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted
* @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted
* @param NewState: new state of the specified APB2 peripheral in Debug mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)

214
lib/src/peripherals/stm32f0xx_dma.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dma.c Executable file → Normal file
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_dma.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the Direct Memory Access controller (DMA):
* + Initialization and Configuration
@ -420,10 +420,10 @@ uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx)
* x can be 1 to 5 for DMA1 to select the DMA Channel.
* @param DMA_IT: specifies the DMA interrupts sources to be enabled
* or disabled.
* This parameter can be any combination of the following values:
* @arg DMA_IT_TC: Transfer complete interrupt mask
* @arg DMA_IT_HT: Half transfer interrupt mask
* @arg DMA_IT_TE: Transfer error interrupt mask
* This parameter can be any combination of the following values:
* @arg DMA_IT_TC: Transfer complete interrupt mask
* @arg DMA_IT_HT: Half transfer interrupt mask
* @arg DMA_IT_TE: Transfer error interrupt mask
* @param NewState: new state of the specified DMA interrupts.
* This parameter can be: ENABLE or DISABLE.
* @retval None
@ -450,33 +450,32 @@ void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, Functiona
/**
* @brief Checks whether the specified DMAy Channelx flag is set or not.
* @param DMA_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag.
* @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag.
* @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag.
* @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag.
* @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag.
* @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag.
* @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag.
* @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag.
* @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag.
* @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag.
* @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag.
* @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag.
* @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag.
* @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag.
* @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag.
* @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag.
* @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag.
* @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag.
* @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag.
* @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag.
* This parameter can be one of the following values:
* @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag.
* @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag.
* @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag.
* @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag.
* @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag.
* @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag.
* @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag.
* @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag.
* @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag.
* @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag.
* @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag.
* @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag.
* @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag.
* @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag.
* @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag.
* @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag.
* @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag.
* @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag.
* @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag.
* @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag.
*
* @note
* The Global flag (DMAy_FLAG_GLx) is set whenever any of the other flags
* relative to the same channel is set (Transfer Complete, Half-transfer
* Complete or Transfer Error flags: DMAy_FLAG_TCx, DMAy_FLAG_HTx or
* DMAy_FLAG_TEx).
* @note The Global flag (DMAy_FLAG_GLx) is set whenever any of the other flags
* relative to the same channel is set (Transfer Complete, Half-transfer
* Complete or Transfer Error flags: DMAy_FLAG_TCx, DMAy_FLAG_HTx or
* DMAy_FLAG_TEx).
*
* @retval The new state of DMA_FLAG (SET or RESET).
*/
@ -506,32 +505,31 @@ FlagStatus DMA_GetFlagStatus(uint32_t DMA_FLAG)
/**
* @brief Clears the DMAy Channelx's pending flags.
* @param DMA_FLAG: specifies the flag to clear.
* This parameter can be any combination (for the same DMA) of the following values:
* @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag.
* @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag.
* @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag.
* @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag.
* @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag.
* @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag.
* @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag.
* @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag.
* @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag.
* @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag.
* @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag.
* @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag.
* @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag.
* @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag.
* @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag.
* @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag.
* @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag.
* @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag.
* @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag.
* @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag.
* This parameter can be any combination (for the same DMA) of the following values:
* @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag.
* @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag.
* @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag.
* @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag.
* @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag.
* @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag.
* @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag.
* @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag.
* @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag.
* @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag.
* @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag.
* @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag.
* @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag.
* @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag.
* @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag.
* @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag.
* @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag.
* @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag.
* @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag.
* @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag.
*
* @note
* Clearing the Global flag (DMAy_FLAG_GLx) results in clearing all other flags
* relative to the same channel (Transfer Complete, Half-transfer Complete and
* Transfer Error flags: DMAy_FLAG_TCx, DMAy_FLAG_HTx and DMAy_FLAG_TEx).
* @note Clearing the Global flag (DMAy_FLAG_GLx) results in clearing all other flags
* relative to the same channel (Transfer Complete, Half-transfer Complete and
* Transfer Error flags: DMAy_FLAG_TCx, DMAy_FLAG_HTx and DMAy_FLAG_TEx).
*
* @retval None
*/
@ -547,33 +545,32 @@ void DMA_ClearFlag(uint32_t DMA_FLAG)
/**
* @brief Checks whether the specified DMAy Channelx interrupt has occurred or not.
* @param DMA_IT: specifies the DMA interrupt source to check.
* This parameter can be one of the following values:
* @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt.
* @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt.
* @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt.
* @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt.
* @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt.
* @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt.
* @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt.
* @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt.
* @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt.
* @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt.
* @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt.
* @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt.
* @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt.
* @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt.
* @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt.
* @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt.
* @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt.
* @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt.
* @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt.
* @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt.
* This parameter can be one of the following values:
* @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt.
* @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt.
* @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt.
* @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt.
* @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt.
* @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt.
* @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt.
* @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt.
* @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt.
* @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt.
* @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt.
* @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt.
* @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt.
* @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt.
* @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt.
* @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt.
* @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt.
* @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt.
* @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt.
* @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt.
*
* @note
* The Global interrupt (DMAy_FLAG_GLx) is set whenever any of the other
* interrupts relative to the same channel is set (Transfer Complete,
* Half-transfer Complete or Transfer Error interrupts: DMAy_IT_TCx,
* DMAy_IT_HTx or DMAy_IT_TEx).
* @note The Global interrupt (DMAy_FLAG_GLx) is set whenever any of the other
* interrupts relative to the same channel is set (Transfer Complete,
* Half-transfer Complete or Transfer Error interrupts: DMAy_IT_TCx,
* DMAy_IT_HTx or DMAy_IT_TEx).
*
* @retval The new state of DMA_IT (SET or RESET).
*/
@ -602,33 +599,32 @@ ITStatus DMA_GetITStatus(uint32_t DMA_IT)
/**
* @brief Clears the DMAy Channelx's interrupt pending bits.
* @param DMA_IT: specifies the DMA interrupt pending bit to clear.
* This parameter can be any combination (for the same DMA) of the following values:
* @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt.
* @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt.
* @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt.
* @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt.
* @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt.
* @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt.
* @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt.
* @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt.
* @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt.
* @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt.
* @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt.
* @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt.
* @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt.
* @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt.
* @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt.
* @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt.
* @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt.
* @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt.
* @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt.
* @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt.
* This parameter can be any combination (for the same DMA) of the following values:
* @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt.
* @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt.
* @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt.
* @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt.
* @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt.
* @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt.
* @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt.
* @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt.
* @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt.
* @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt.
* @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt.
* @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt.
* @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt.
* @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt.
* @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt.
* @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt.
* @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt.
* @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt.
* @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt.
* @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt.
*
* @note
* Clearing the Global interrupt (DMAy_IT_GLx) results in clearing all other
* interrupts relative to the same channel (Transfer Complete, Half-transfer
* Complete and Transfer Error interrupts: DMAy_IT_TCx, DMAy_IT_HTx and
* DMAy_IT_TEx).
* @note Clearing the Global interrupt (DMAy_IT_GLx) results in clearing all other
* interrupts relative to the same channel (Transfer Complete, Half-transfer
* Complete and Transfer Error interrupts: DMAy_IT_TCx, DMAy_IT_HTx and
* DMAy_IT_TEx).
*
* @retval None
*/

21
lib/src/peripherals/stm32f0xx_exti.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_exti.c Executable file → Normal file
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_exti.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the EXTI peripheral:
* + Initialization and Configuration
@ -117,11 +117,6 @@ void EXTI_DeInit(void)
/**
* @brief Initializes the EXTI peripheral according to the specified
* parameters in the EXTI_InitStruct.
* EXTI_Line specifies the EXTI line (EXTI0....EXTI27).
* EXTI_Mode specifies which EXTI line is used as interrupt or an event.
* EXTI_Trigger selects the trigger. When the trigger occurs, interrupt
* pending bit will be set.
* EXTI_LineCmd controls (Enable/Disable) the EXTI line.
* @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure that
* contains the configuration information for the EXTI peripheral.
* @retval None
@ -194,7 +189,7 @@ void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct)
* @brief Generates a Software interrupt on selected EXTI line.
* @param EXTI_Line: specifies the EXTI line on which the software interrupt
* will be generated.
* This parameter can be any combination of EXTI_Linex where x can be (0..19)
* This parameter can be any combination of EXTI_Linex where x can be (0..27).
* @retval None
*/
void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
@ -224,8 +219,7 @@ void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
/**
* @brief Checks whether the specified EXTI line flag is set or not.
* @param EXTI_Line: specifies the EXTI line flag to check.
* This parameter can be:
* EXTI_Linex: External interrupt line x where x(0..19).
* This parameter can be EXTI_Linex where x can be (0..27).
* @retval The new state of EXTI_Line (SET or RESET).
*/
FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line)
@ -248,7 +242,7 @@ FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line)
/**
* @brief Clears the EXTI's line pending flags.
* @param EXTI_Line: specifies the EXTI lines flags to clear.
* This parameter can be any combination of EXTI_Linex where x can be (0..19)
* This parameter can be any combination of EXTI_Linex where x can be (0..27).
* @retval None
*/
void EXTI_ClearFlag(uint32_t EXTI_Line)
@ -262,8 +256,7 @@ void EXTI_ClearFlag(uint32_t EXTI_Line)
/**
* @brief Checks whether the specified EXTI line is asserted or not.
* @param EXTI_Line: specifies the EXTI line to check.
* This parameter can be:
* EXTI_Linex: External interrupt line x where x(0..19).
* This parameter can be EXTI_Linex where x can be (0..27).
* @retval The new state of EXTI_Line (SET or RESET).
*/
ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
@ -289,7 +282,7 @@ ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
/**
* @brief Clears the EXTI's line pending bits.
* @param EXTI_Line: specifies the EXTI lines to clear.
* This parameter can be any combination of EXTI_Linex where x can be (0..19).
* This parameter can be any combination of EXTI_Linex where x can be (0..27).
* @retval None
*/
void EXTI_ClearITPendingBit(uint32_t EXTI_Line)

129
lib/src/peripherals/stm32f0xx_flash.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_flash.c Executable file → Normal file
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_flash.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the FLASH peripheral:
* - FLASH Interface configuration
@ -127,9 +127,9 @@
/**
* @brief Sets the code latency value.
* @param FLASH_Latency: specifies the FLASH Latency value.
* This parameter can be one of the following values:
* @arg FLASH_Latency_0: FLASH Zero Latency cycle
* @arg FLASH_Latency_1: FLASH One Latency cycle
* This parameter can be one of the following values:
* @arg FLASH_Latency_0: FLASH Zero Latency cycle
* @arg FLASH_Latency_1: FLASH One Latency cycle
* @retval None
*/
void FLASH_SetLatency(uint32_t FLASH_Latency)
@ -153,7 +153,7 @@ void FLASH_SetLatency(uint32_t FLASH_Latency)
/**
* @brief Enables or disables the Prefetch Buffer.
* @param NewState: new state of the FLASH prefetch buffer.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void FLASH_PrefetchBufferCmd(FunctionalState NewState)
@ -252,10 +252,9 @@ void FLASH_Lock(void)
/**
* @brief Erases a specified page in program memory.
* @note To correctly run this function, the FLASH_Unlock() function
* must be called before.
* Call the FLASH_Lock() to disable the flash memory access
* (recommended to protect the FLASH memory against possible unwanted operation)
* @note To correctly run this function, the FLASH_Unlock() function must be called before.
* @note Call the FLASH_Lock() to disable the flash memory access (recommended
* to protect the FLASH memory against possible unwanted operation)
* @param Page_Address: The page address in program memory to be erased.
* @note A Page is erased in the Program memory only if the address to load
* is the start address of a page (multiple of 1024 bytes).
@ -292,10 +291,9 @@ FLASH_Status FLASH_ErasePage(uint32_t Page_Address)
/**
* @brief Erases all FLASH pages.
* @note To correctly run this function, the FLASH_Unlock() function
* must be called before.
* Call the FLASH_Lock() to disable the flash memory access
* (recommended to protect the FLASH memory against possible unwanted operation)
* @note To correctly run this function, the FLASH_Unlock() function must be called before.
* @note Call the FLASH_Lock() to disable the flash memory access (recommended
* to protect the FLASH memory against possible unwanted operation)
* @param None
* @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
@ -326,10 +324,9 @@ FLASH_Status FLASH_EraseAllPages(void)
/**
* @brief Programs a word at a specified address.
* @note To correctly run this function, the FLASH_Unlock() function
* must be called before.
* Call the FLASH_Lock() to disable the flash memory access
* (recommended to protect the FLASH memory against possible unwanted operation)
* @note To correctly run this function, the FLASH_Unlock() function must be called before.
* @note Call the FLASH_Lock() to disable the flash memory access (recommended
* to protect the FLASH memory against possible unwanted operation)
* @param Address: specifies the address to be programmed.
* @param Data: specifies the data to be programmed.
* @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
@ -384,10 +381,9 @@ FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data)
/**
* @brief Programs a half word at a specified address.
* @note To correctly run this function, the FLASH_Unlock() function
* must be called before.
* Call the FLASH_Lock() to disable the flash memory access
* (recommended to protect the FLASH memory against possible unwanted operation)
* @note To correctly run this function, the FLASH_Unlock() function must be called before.
* @note Call the FLASH_Lock() to disable the flash memory access (recommended
* to protect the FLASH memory against possible unwanted operation)
* @param Address: specifies the address to be programmed.
* @param Data: specifies the data to be programmed.
* @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
@ -444,7 +440,7 @@ FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
(+) FLASH_Status FLASH_OB_BOOTConfig(uint8_t OB_BOOT1);
(+) FLASH_Status FLASH_OB_VDDAConfig(uint8_t OB_VDDA_ANALOG);
(+) FLASH_Status FLASH_OB_WriteUser(uint8_t OB_USER);
(+) FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data);
(+) FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data);
(+) uint8_t FLASH_OB_GetUser(void);
(+) uint32_t FLASH_OB_GetWRP(void);
(+) FlagStatus FLASH_OB_GetRDP(void);
@ -465,8 +461,8 @@ FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
=> to enable or disable the VDDA Analog Monitoring
(++) You can write all User Options bytes at once using a single function
by calling FLASH_Status FLASH_OB_WriteUser(uint8_t OB_USER)
(++) FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data) to program the
two half word in the option bytes
(++) FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data) to program the
two half word in the option bytes
(#) Once all needed option bytes to be programmed are correctly written, call the
FLASH_OB_Launch(void) function to launch the Option Bytes programming process.
@ -517,10 +513,9 @@ void FLASH_OB_Launch(void)
/**
* @brief Erases the FLASH option bytes.
* @note To correctly run this function, the FLASH_OB_Unlock() function
* must be called before.
* Call the FLASH_OB_Lock() to disable the flash control register access and the option bytes
* (recommended to protect the FLASH memory against possible unwanted operation)
* @note To correctly run this function, the FLASH_OB_Unlock() function must be called before.
* @note Call the FLASH_OB_Lock() to disable the flash control register access and the option
* bytes (recommended to protect the FLASH memory against possible unwanted operation)
* @note This functions erases all option bytes except the Read protection (RDP).
* @param None
* @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
@ -585,12 +580,11 @@ FLASH_Status FLASH_OB_Erase(void)
/**
* @brief Write protects the desired pages
* @note To correctly run this function, the FLASH_OB_Unlock() function
* must be called before.
* Call the FLASH_OB_Lock() to disable the flash control register access and the option bytes
* (recommended to protect the FLASH memory against possible unwanted operation)
* @note To correctly run this function, the FLASH_OB_Unlock() function must be called before.
* @note Call the FLASH_OB_Lock() to disable the flash control register access and the option
* bytes (recommended to protect the FLASH memory against possible unwanted operation)
* @param OB_WRP: specifies the address of the pages to be write protected.
* This parameter can be:
* This parameter can be:
* @arg OB_WRP_Pages0to3..OB_WRP_Pages60to63
* @arg OB_WRP_AllPages
* @retval FLASH Status: The returned value can be:
@ -643,15 +637,15 @@ FLASH_Status FLASH_OB_EnableWRP(uint32_t OB_WRP)
/**
* @brief Enables or disables the read out protection.
* @note To correctly run this function, the FLASH_OB_Unlock() function
* must be called before.
* Call the FLASH_OB_Lock() to disable the flash control register access and the option bytes
* (recommended to protect the FLASH memory against possible unwanted operation)
* @note To correctly run this function, the FLASH_OB_Unlock() function must be called before.
* @note Call the FLASH_OB_Lock() to disable the flash control register access and the option
* bytes (recommended to protect the FLASH memory against possible unwanted operation)
* @param FLASH_ReadProtection_Level: specifies the read protection level.
* This parameter can be:
* @arg OB_RDP_Level_0: No protection
* @arg OB_RDP_Level_1: Read protection of the memory
* @arg OB_RDP_Level_2: Chip protection
* This parameter can be:
* @arg OB_RDP_Level_0: No protection
* @arg OB_RDP_Level_1: Read protection of the memory
* @arg OB_RDP_Level_2: Chip protection
* @note When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
* @retval FLASH Status: The returned value can be:
* FLASH_ERROR_PROGRAM, FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
*/
@ -705,20 +699,19 @@ FLASH_Status FLASH_OB_RDPConfig(uint8_t OB_RDP)
/**
* @brief Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
* @note To correctly run this function, the FLASH_OB_Unlock() function
* must be called before.
* Call the FLASH_OB_Lock() to disable the flash control register access and the option bytes
* (recommended to protect the FLASH memory against possible unwanted operation)
* @note To correctly run this function, the FLASH_OB_Unlock() function must be called before.
* @note Call the FLASH_OB_Lock() to disable the flash control register access and the option
* bytes (recommended to protect the FLASH memory against possible unwanted operation)
* @param OB_IWDG: Selects the WDG mode
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg OB_IWDG_SW: Software WDG selected
* @arg OB_IWDG_HW: Hardware WDG selected
* @param OB_STOP: Reset event when entering STOP mode.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg OB_STOP_NoRST: No reset generated when entering in STOP
* @arg OB_STOP_RST: Reset generated when entering in STOP
* @param OB_STDBY: Reset event when entering Standby mode.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg OB_STDBY_NoRST: No reset generated when entering in STANDBY
* @arg OB_STDBY_RST: Reset generated when entering in STANDBY
* @retval FLASH Status: The returned value can be:
@ -757,11 +750,11 @@ FLASH_Status FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_ST
}
/**
* @brief Sets or resets the BOOT1.
* @param OB_BOOT1: Set or Reset the BOOT1.
* This parameter can be one of the following values:
* @arg OB_BOOT1_RESET: BOOT1 Reset
* @arg OB_BOOT1_SET: BOOT1 Set
* @brief Sets or resets the BOOT1 option bit.
* @param OB_BOOT1: Set or Reset the BOOT1 option bit.
* This parameter can be one of the following values:
* @arg OB_BOOT1_RESET: BOOT1 option bit reset
* @arg OB_BOOT1_SET: BOOT1 option bit set
* @retval None
*/
FLASH_Status FLASH_OB_BOOTConfig(uint8_t OB_BOOT1)
@ -797,7 +790,7 @@ FLASH_Status FLASH_OB_BOOTConfig(uint8_t OB_BOOT1)
/**
* @brief Sets or resets the analogue monitoring on VDDA Power source.
* @param OB_VDDA_ANALOG: Selects the analog monitoring on VDDA Power source.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg OB_VDDA_ANALOG_ON: Analog monitoring on VDDA Power source ON
* @arg OB_VDDA_ANALOG_OFF: Analog monitoring on VDDA Power source OFF
* @retval None
@ -835,7 +828,7 @@ FLASH_Status FLASH_OB_VDDAConfig(uint8_t OB_VDDA_ANALOG)
/**
* @brief Sets or resets the SRAM parity.
* @param OB_SRAM_Parity: Set or Reset the SRAM parity enable bit.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg OB_SRAM_PARITY_SET: Set SRAM parity.
* @arg OB_SRAM_PARITY_RESET: Reset SRAM parity.
* @retval None
@ -873,12 +866,11 @@ FLASH_Status FLASH_OB_SRAMParityConfig(uint8_t OB_SRAM_Parity)
/**
* @brief Programs the FLASH User Option Byte: IWDG_SW, RST_STOP, RST_STDBY,
* BOOT1 and VDDA ANALOG monitoring.
* @note To correctly run this function, the FLASH_OB_Unlock() function
* must be called before.
* Call the FLASH_OB_Lock() to disable the flash control register access and the option bytes
* (recommended to protect the FLASH memory against possible unwanted operation)
* @note To correctly run this function, the FLASH_OB_Unlock() function must be called before.
* @note Call the FLASH_OB_Lock() to disable the flash control register access and the option
* bytes (recommended to protect the FLASH memory against possible unwanted operation)
* @param OB_USER: Selects all user option bytes
* This parameter is a combination of the following values:
* This parameter is a combination of the following values:
* @arg OB_IWDG_SW / OB_IWDG_HW: Software / Hardware WDG selected
* @arg OB_STOP_NoRST / OB_STOP_RST: No reset / Reset generated when entering in STOP
* @arg OB_STDBY_NoRST / OB_STDBY_RST: No reset / Reset generated when entering in STANDBY
@ -918,12 +910,11 @@ FLASH_Status FLASH_OB_WriteUser(uint8_t OB_USER)
/**
* @brief Programs a half word at a specified Option Byte Data address.
* @note To correctly run this function, the FLASH_OB_Unlock() function
* must be called before.
* Call the FLASH_OB_Lock() to disable the flash control register access and the option bytes
* (recommended to protect the FLASH memory against possible unwanted operation)
* @note To correctly run this function, the FLASH_OB_Unlock() function must be called before.
* @note Call the FLASH_OB_Lock() to disable the flash control register access and the option
* bytes (recommended to protect the FLASH memory against possible unwanted operation)
* @param Address: specifies the address to be programmed.
* This parameter can be 0x1FFFF804 or 0x1FFFF806.
* This parameter can be 0x1FFFF804 or 0x1FFFF806.
* @param Data: specifies the data to be programmed.
* @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
@ -1016,7 +1007,7 @@ FlagStatus FLASH_OB_GetRDP(void)
* @brief Enables or disables the specified FLASH interrupts.
* @param FLASH_IT: specifies the FLASH interrupt sources to be enabled or
* disabled.
* This parameter can be any combination of the following values:
* This parameter can be any combination of the following values:
* @arg FLASH_IT_EOP: FLASH end of programming Interrupt
* @arg FLASH_IT_ERR: FLASH Error Interrupt
* @retval None
@ -1042,7 +1033,7 @@ void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState)
/**
* @brief Checks whether the specified FLASH flag is set or not.
* @param FLASH_FLAG: specifies the FLASH flag to check.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg FLASH_FLAG_BSY: FLASH write/erase operations in progress flag
* @arg FLASH_FLAG_PGERR: FLASH Programming error flag flag
* @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
@ -1071,7 +1062,7 @@ FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG)
/**
* @brief Clears the FLASH's pending flags.
* @param FLASH_FLAG: specifies the FLASH flags to clear.
* This parameter can be any combination of the following values:
* This parameter can be any combination of the following values:
* @arg FLASH_FLAG_PGERR: FLASH Programming error flag flag
* @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
* @arg FLASH_FLAG_EOP: FLASH End of Programming flag

59
lib/src/peripherals/stm32f0xx_gpio.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_gpio.c Executable file → Normal file
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_gpio.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the GPIO peripheral:
* + Initialization and Configuration functions
@ -155,8 +155,8 @@ void GPIO_DeInit(GPIO_TypeDef* GPIOx)
* @param GPIOx: where x can be (A, B, C, D or F) to select the GPIO peripheral.
* @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @note The configured pins can be: GPIO_Pin_0 -> GPIO_Pin_15 for GPIOA, GPIOB and GPIOC,
* GPIO_Pin_0 -> GPIO_Pin_2 for GPIOD, GPIO_Pin_0 -> GPIO_Pin_3 for GPIOF.
* @note The configured pins can be: GPIO_Pin_0 to GPIO_Pin_15 for GPIOA, GPIOB and GPIOC,
* GPIO_Pin_0 to GPIO_Pin_2 for GPIOD, GPIO_Pin_0 to GPIO_Pin_3 for GPIOF.
* @retval None
*/
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
@ -226,13 +226,13 @@ void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
/**
* @brief Locks GPIO Pins configuration registers.
* The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
* @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
* GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
* @note The configuration of the locked GPIO pins can no longer be modified
* until the next reset.
* until the next device reset.
* @param GPIOx: where x can be (A or B) to select the GPIO peripheral.
* @param GPIO_Pin: specifies the port bit to be written.
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
* @retval None
*/
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
@ -391,9 +391,9 @@ void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
* @param GPIOx: where x can be (A, B, C, D or F) to select the GPIO peripheral.
* @param GPIO_Pin: specifies the port bit to be written.
* @param BitVal: specifies the value to be written to the selected bit.
* This parameter can be one of the BitAction enumeration values:
* @arg Bit_RESET: to clear the port pin
* @arg Bit_SET: to set the port pin
* This parameter can be one of the BitAction enumeration values:
* @arg Bit_RESET: to clear the port pin
* @arg Bit_SET: to set the port pin
* @note The GPIO_Pin parameter can be GPIO_Pin_x where x can be: (0..15) for GPIOA,
* GPIOB or GPIOC,(0..2) for GPIOD and(0..3) for GPIOF.
* @retval None
@ -418,8 +418,7 @@ void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
/**
* @brief Writes data to the specified GPIO data port.
* @param GPIOx: where x can be (A, B, C, D or F) to select the GPIO peripheral.
* @param PortVal: specifies the value to be written to the port output data
* register.
* @param PortVal: specifies the value to be written to the port output data register.
* @retval None
*/
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
@ -450,25 +449,25 @@ void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
* @brief Writes data to the specified GPIO data port.
* @param GPIOx: where x can be (A or B) to select the GPIO peripheral.
* @param GPIO_PinSource: specifies the pin for the Alternate function.
* This parameter can be GPIO_PinSourcex where x can be (0..15).
* This parameter can be GPIO_PinSourcex where x can be (0..15).
* @param GPIO_AF: selects the pin to used as Alternate function.
* This parameter can be one of the following value:
* @arg GPIO_AF_0:WKUP, EVENTOUT, TIM15, SPI1, TIM17,MCO, SWDAT, SWCLK, TIM14,
* BOOT,USART1, CEC, IR_OUT, SPI2
* @arg GPIO_AF_1:USART2, CEC, Tim3, USART1, USART2,EVENTOUT, I2C1, I2C2, TIM15
* @arg GPIO_AF_2:TIM2, TIM1, EVENTOUT, TIM16, TIM17.
* @arg GPIO_AF_3:TS, I2C1, TIM15, EVENTOUT
* @arg GPIO_AF_4:TIM14.
* @arg GPIO_AF_5:TIM16, TIM17.
* @arg GPIO_AF_6:EVENTOUT.
* @arg GPIO_AF_7:COMP1 OUT, COMP2 OUT
* @note The pin should already been configured in Alternate Function mode(AF)
* using GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
* @note Refer to the Alternate function mapping table in the device datasheet
* for the detailed mapping of the system and peripherals'alternate
* function I/O pins.
* @retval None
*/
* This parameter can be one of the following value:
* @arg GPIO_AF_0: WKUP, EVENTOUT, TIM15, SPI1, TIM17,MCO, SWDAT, SWCLK, TIM14,
* BOOT,USART1, CEC, IR_OUT, SPI2
* @arg GPIO_AF_1: USART2, CEC, Tim3, USART1, USART2,EVENTOUT, I2C1, I2C2, TIM15
* @arg GPIO_AF_2: TIM2, TIM1, EVENTOUT, TIM16, TIM17
* @arg GPIO_AF_3: TS, I2C1, TIM15, EVENTOUT
* @arg GPIO_AF_4: TIM14
* @arg GPIO_AF_5: TIM16, TIM17
* @arg GPIO_AF_6: EVENTOUT
* @arg GPIO_AF_7: COMP1 OUT, COMP2 OUT
* @note The pin should already been configured in Alternate Function mode(AF)
* using GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
* @note Refer to the Alternate function mapping table in the device datasheet
* for the detailed mapping of the system and peripherals'alternate
* function I/O pins.
* @retval None
*/
void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF)
{
uint32_t temp = 0x00;

272
lib/src/peripherals/stm32f0xx_i2c.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_i2c.c Executable file → Normal file
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_i2c.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the Inter-Integrated circuit (I2C):
* + Initialization and Configuration
@ -94,6 +94,8 @@
#define CR1_CLEAR_MASK ((uint32_t)0x00CFE0FF) /*<! I2C CR1 clear register Mask */
#define CR2_CLEAR_MASK ((uint32_t)0x07FF7FFF) /*<! I2C CR2 clear register Mask */
#define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! I2C TIMING clear register Mask */
#define ERROR_IT_MASK ((uint32_t)0x00003F00) /*<! I2C Error interrupt register Mask */
#define TC_IT_MASK ((uint32_t)0x000000C0) /*<! I2C TC interrupt register Mask */
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
@ -271,7 +273,7 @@ void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct)
* @brief Enables or disables the specified I2C peripheral.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param NewState: new state of the I2Cx peripheral.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -295,7 +297,7 @@ void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @brief Enables or disables the specified I2C software reset.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param NewState: new state of the I2C software reset.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -319,16 +321,16 @@ void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @brief Enables or disables the specified I2C interrupts.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_IT: specifies the I2C interrupts sources to be enabled or disabled.
* This parameter can be any combination of the following values:
* @arg I2C_IT_ERRI: Error interrupt mask
* @arg I2C_IT_TCI: Transfer Complete interrupt mask
* @arg I2C_IT_STOPI: Stop Detection interrupt mask
* @arg I2C_IT_NACKI: Not Acknowledge received interrupt mask
* @arg I2C_IT_ADDRI: Address Match interrupt mask
* @arg I2C_IT_RXI: RX interrupt mask
* @arg I2C_IT_TXI: TX interrupt mask
* This parameter can be any combination of the following values:
* @arg I2C_IT_ERRI: Error interrupt mask
* @arg I2C_IT_TCI: Transfer Complete interrupt mask
* @arg I2C_IT_STOPI: Stop Detection interrupt mask
* @arg I2C_IT_NACKI: Not Acknowledge received interrupt mask
* @arg I2C_IT_ADDRI: Address Match interrupt mask
* @arg I2C_IT_RXI: RX interrupt mask
* @arg I2C_IT_TXI: TX interrupt mask
* @param NewState: new state of the specified I2C interrupts.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_ITConfig(I2C_TypeDef* I2Cx, uint32_t I2C_IT, FunctionalState NewState)
@ -354,7 +356,7 @@ void I2C_ITConfig(I2C_TypeDef* I2Cx, uint32_t I2C_IT, FunctionalState NewState)
* @brief Enables or disables the I2C Clock stretching.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param NewState: new state of the I2Cx Clock stretching.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -379,7 +381,7 @@ void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @brief Enables or disables I2C wakeup from stop mode.
* @param I2Cx: where x can be 1 to select the I2C peripheral.
* @param NewState: new state of the I2Cx stop mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_StopModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -404,7 +406,7 @@ void I2C_StopModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @brief Enables or disables the I2C own address 2.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param NewState: new state of the I2C own address 2.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -430,15 +432,15 @@ void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param Address: specifies the slave address to be programmed.
* @param Mask: specifies own address 2 mask to be programmed.
* This parameter can be one of the following values:
* @arg I2C_OA2_NoMask: no mask.
* @arg I2C_OA2_Mask01: OA2[1] is masked and don't care.
* @arg I2C_OA2_Mask02: OA2[2:1] are masked and don't care.
* @arg I2C_OA2_Mask03: OA2[3:1] are masked and don't care.
* @arg I2C_OA2_Mask04: OA2[4:1] are masked and don't care.
* @arg I2C_OA2_Mask05: OA2[5:1] are masked and don't care.
* @arg I2C_OA2_Mask06: OA2[6:1] are masked and don't care.
* @arg I2C_OA2_Mask07: OA2[7:1] are masked and don't care.
* This parameter can be one of the following values:
* @arg I2C_OA2_NoMask: no mask.
* @arg I2C_OA2_Mask01: OA2[1] is masked and don't care.
* @arg I2C_OA2_Mask02: OA2[2:1] are masked and don't care.
* @arg I2C_OA2_Mask03: OA2[3:1] are masked and don't care.
* @arg I2C_OA2_Mask04: OA2[4:1] are masked and don't care.
* @arg I2C_OA2_Mask05: OA2[5:1] are masked and don't care.
* @arg I2C_OA2_Mask06: OA2[6:1] are masked and don't care.
* @arg I2C_OA2_Mask07: OA2[7:1] are masked and don't care.
* @retval None
*/
void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Mask)
@ -468,7 +470,7 @@ void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Mask)
* @brief Enables or disables the I2C general call mode.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param NewState: new state of the I2C general call mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -493,7 +495,7 @@ void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @brief Enables or disables the I2C slave byte control.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param NewState: new state of the I2C slave byte control.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_SlaveByteControlCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -546,7 +548,7 @@ void I2C_SlaveAddressConfig(I2C_TypeDef* I2Cx, uint16_t Address)
* @brief Enables or disables the I2C 10-bit addressing mode for the master.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param NewState: new state of the I2C 10-bit addressing mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @note This function should be called before generating start condition.
* @retval None
*/
@ -611,7 +613,7 @@ void I2C_10BitAddressingModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
* automatically sent when nbytes data are transferred).
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param NewState: new state of the I2C automatic end mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @note This function has effect if Reload mode is disabled.
* @retval None
*/
@ -637,7 +639,7 @@ void I2C_AutoEndCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @brief Enables or disables the I2C nbytes reload mode.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param NewState: new state of the nbytes reload mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_ReloadCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -688,9 +690,9 @@ void I2C_NumberOfBytesConfig(I2C_TypeDef* I2Cx, uint8_t Number_Bytes)
* @brief Configures the type of transfer request for the master.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_Direction: specifies the transfer request direction to be programmed.
* This parameter can be one of the following values:
* @arg I2C_Direction_Transmitter: Master request a write transfer
* @arg I2C_Direction_Receiver: Master request a read transfer
* This parameter can be one of the following values:
* @arg I2C_Direction_Transmitter: Master request a write transfer
* @arg I2C_Direction_Receiver: Master request a read transfer
* @retval None
*/
void I2C_MasterRequestConfig(I2C_TypeDef* I2Cx, uint16_t I2C_Direction)
@ -716,7 +718,7 @@ void I2C_MasterRequestConfig(I2C_TypeDef* I2Cx, uint16_t I2C_Direction)
* @brief Generates I2Cx communication START condition.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param NewState: new state of the I2C START condition generation.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -741,7 +743,7 @@ void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @brief Generates I2Cx communication STOP condition.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param NewState: new state of the I2C STOP condition generation.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -766,7 +768,7 @@ void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @brief Enables or disables the I2C 10-bit header only mode with read direction.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param NewState: new state of the I2C 10-bit header only mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @note This mode can be used only when switching from master transmitter mode
* to master receiver mode.
* @retval None
@ -793,7 +795,7 @@ void I2C_10BitAddressHeaderCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @brief Generates I2C communication Acknowledge.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param NewState: new state of the Acknowledge.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -863,18 +865,18 @@ uint16_t I2C_GetTransferDirection(I2C_TypeDef* I2Cx)
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param Address: specifies the slave address to be programmed.
* @param Number_Bytes: specifies the number of bytes to be programmed.
* This parameter must be a value between 0 and 255.
* This parameter must be a value between 0 and 255.
* @param ReloadEndMode: new state of the I2C START condition generation.
* This parameter can be one of the following values:
* @arg I2C_Reload_Mode: Enable Reload mode .
* @arg I2C_AutoEnd_Mode: Enable Automatic end mode.
* @arg I2C_SoftEnd_Mode: Enable Software end mode.
* This parameter can be one of the following values:
* @arg I2C_Reload_Mode: Enable Reload mode .
* @arg I2C_AutoEnd_Mode: Enable Automatic end mode.
* @arg I2C_SoftEnd_Mode: Enable Software end mode.
* @param StartStopMode: new state of the I2C START condition generation.
* This parameter can be one of the following values:
* @arg I2C_No_StartStop: Don't Generate stop and start condition.
* @arg I2C_Generate_Stop: Generate stop condition (Number_Bytes should be set to 0).
* @arg I2C_Generate_Start_Read: Generate Restart for read request.
* @arg I2C_Generate_Start_Write: Generate Restart for write request.
* This parameter can be one of the following values:
* @arg I2C_No_StartStop: Don't Generate stop and start condition.
* @arg I2C_Generate_Stop: Generate stop condition (Number_Bytes should be set to 0).
* @arg I2C_Generate_Start_Read: Generate Restart for read request.
* @arg I2C_Generate_Start_Write: Generate Restart for write request.
* @retval None
*/
void I2C_TransferHandling(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Number_Bytes, uint32_t ReloadEndMode, uint32_t StartStopMode)
@ -945,7 +947,7 @@ void I2C_TransferHandling(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Number_By
* @brief Enables or disables I2C SMBus alert.
* @param I2Cx: where x can be 1 to select the I2C peripheral.
* @param NewState: new state of the I2Cx SMBus alert.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_SMBusAlertCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -970,7 +972,7 @@ void I2C_SMBusAlertCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @brief Enables or disables I2C Clock Timeout (SCL Timeout detection).
* @param I2Cx: where x can be 1 to select the I2C peripheral.
* @param NewState: new state of the I2Cx clock Timeout.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_ClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -995,7 +997,7 @@ void I2C_ClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @brief Enables or disables I2C Extended Clock Timeout (SCL cumulative Timeout detection).
* @param I2Cx: where x can be 1 to select the I2C peripheral.
* @param NewState: new state of the I2Cx Extended clock Timeout.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_ExtendedClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -1021,7 +1023,7 @@ void I2C_ExtendedClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
* high detection).
* @param I2Cx: where x can be 1 to select the I2C peripheral.
* @param NewState: new state of the I2Cx Idle clock Timeout.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_IdleClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -1044,7 +1046,7 @@ void I2C_IdleClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
/**
* @brief Configures the I2C Bus Timeout A (SCL Timeout when TIDLE = 0 or Bus
* idle SCL and SDA high when TIDLE = 1).
* idle SCL and SDA high when TIDLE = 1).
* @param I2Cx: where x can be 1 to select the I2C peripheral.
* @param Timeout: specifies the TimeoutA to be programmed.
* @retval None
@ -1101,7 +1103,7 @@ void I2C_TimeoutBConfig(I2C_TypeDef* I2Cx, uint16_t Timeout)
* @brief Enables or disables I2C PEC calculation.
* @param I2Cx: where x can be 1 to select the I2C peripheral.
* @param NewState: new state of the I2Cx PEC calculation.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -1126,7 +1128,7 @@ void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @brief Enables or disables I2C PEC transmission/reception request.
* @param I2Cx: where x can be 1 to select the I2C peripheral.
* @param NewState: new state of the I2Cx PEC request.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_PECRequestCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
@ -1184,18 +1186,18 @@ uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx)
* @brief Reads the specified I2C register and returns its value.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_Register: specifies the register to read.
* This parameter can be one of the following values:
* @arg I2C_Register_CR1: CR1 register.
* @arg I2C_Register_CR2: CR2 register.
* @arg I2C_Register_OAR1: OAR1 register.
* @arg I2C_Register_OAR2: OAR2 register.
* @arg I2C_Register_TIMINGR: TIMING register.
* @arg I2C_Register_TIMEOUTR: TIMEOUTR register.
* @arg I2C_Register_ISR: ISR register.
* @arg I2C_Register_ICR: ICR register.
* @arg I2C_Register_PECR: PECR register.
* @arg I2C_Register_RXDR: RXDR register.
* @arg I2C_Register_TXDR: TXDR register.
* This parameter can be one of the following values:
* @arg I2C_Register_CR1: CR1 register.
* @arg I2C_Register_CR2: CR2 register.
* @arg I2C_Register_OAR1: OAR1 register.
* @arg I2C_Register_OAR2: OAR2 register.
* @arg I2C_Register_TIMINGR: TIMING register.
* @arg I2C_Register_TIMEOUTR: TIMEOUTR register.
* @arg I2C_Register_ISR: ISR register.
* @arg I2C_Register_ICR: ICR register.
* @arg I2C_Register_PECR: PECR register.
* @arg I2C_Register_RXDR: RXDR register.
* @arg I2C_Register_TXDR: TXDR register.
* @retval The value of the read register.
*/
uint32_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register)
@ -1291,11 +1293,11 @@ uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx)
* @brief Enables or disables the I2C DMA interface.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_DMAReq: specifies the I2C DMA transfer request to be enabled or disabled.
* This parameter can be any combination of the following values:
* @arg I2C_DMAReq_Tx: Tx DMA transfer request
* @arg I2C_DMAReq_Rx: Rx DMA transfer request
* This parameter can be any combination of the following values:
* @arg I2C_DMAReq_Tx: Tx DMA transfer request
* @arg I2C_DMAReq_Rx: Rx DMA transfer request
* @param NewState: new state of the selected I2C DMA transfer request.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState)
@ -1400,22 +1402,22 @@ void I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState
* @brief Checks whether the specified I2C flag is set or not.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* @arg I2C_FLAG_TXE: Transmit data register empty
* @arg I2C_FLAG_TXIS: Transmit interrupt status
* @arg I2C_FLAG_RXNE: Receive data register not empty
* @arg I2C_FLAG_ADDR: Address matched (slave mode)
* @arg I2C_FLAG_NACKF: NACK received flag
* @arg I2C_FLAG_STOPF: STOP detection flag
* @arg I2C_FLAG_TC: Transfer complete (master mode)
* @arg I2C_FLAG_TCR: Transfer complete reload
* @arg I2C_FLAG_BERR: Bus error
* @arg I2C_FLAG_ARLO: Arbitration lost
* @arg I2C_FLAG_OVR: Overrun/Underrun
* @arg I2C_FLAG_PECERR: PEC error in reception
* @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
* @arg I2C_FLAG_ALERT: SMBus Alert
* @arg I2C_FLAG_BUSY: Bus busy
* This parameter can be one of the following values:
* @arg I2C_FLAG_TXE: Transmit data register empty
* @arg I2C_FLAG_TXIS: Transmit interrupt status
* @arg I2C_FLAG_RXNE: Receive data register not empty
* @arg I2C_FLAG_ADDR: Address matched (slave mode)
* @arg I2C_FLAG_NACKF: NACK received flag
* @arg I2C_FLAG_STOPF: STOP detection flag
* @arg I2C_FLAG_TC: Transfer complete (master mode)
* @arg I2C_FLAG_TCR: Transfer complete reload
* @arg I2C_FLAG_BERR: Bus error
* @arg I2C_FLAG_ARLO: Arbitration lost
* @arg I2C_FLAG_OVR: Overrun/Underrun
* @arg I2C_FLAG_PECERR: PEC error in reception
* @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
* @arg I2C_FLAG_ALERT: SMBus Alert
* @arg I2C_FLAG_BUSY: Bus busy
* @retval The new state of I2C_FLAG (SET or RESET).
*/
FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
@ -1450,16 +1452,16 @@ FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
* @brief Clears the I2Cx's pending flags.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_FLAG: specifies the flag to clear.
* This parameter can be any combination of the following values:
* @arg I2C_FLAG_ADDR: Address matched (slave mode)
* @arg I2C_FLAG_NACKF: NACK received flag
* @arg I2C_FLAG_STOPF: STOP detection flag
* @arg I2C_FLAG_BERR: Bus error
* @arg I2C_FLAG_ARLO: Arbitration lost
* @arg I2C_FLAG_OVR: Overrun/Underrun
* @arg I2C_FLAG_PECERR: PEC error in reception
* @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
* @arg I2C_FLAG_ALERT: SMBus Alert
* This parameter can be any combination of the following values:
* @arg I2C_FLAG_ADDR: Address matched (slave mode)
* @arg I2C_FLAG_NACKF: NACK received flag
* @arg I2C_FLAG_STOPF: STOP detection flag
* @arg I2C_FLAG_BERR: Bus error
* @arg I2C_FLAG_ARLO: Arbitration lost
* @arg I2C_FLAG_OVR: Overrun/Underrun
* @arg I2C_FLAG_PECERR: PEC error in reception
* @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
* @arg I2C_FLAG_ALERT: SMBus Alert
* @retval The new state of I2C_FLAG (SET or RESET).
*/
void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
@ -1476,38 +1478,56 @@ void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
* @brief Checks whether the specified I2C interrupt has occurred or not.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_IT: specifies the interrupt source to check.
* This parameter can be one of the following values:
* @arg I2C_IT_TXIS: Transmit interrupt status
* @arg I2C_IT_RXNE: Receive data register not empty
* @arg I2C_IT_ADDR: Address matched (slave mode)
* @arg I2C_IT_NACKF: NACK received flag
* @arg I2C_IT_STOPF: STOP detection flag
* @arg I2C_IT_TC: Transfer complete (master mode)
* @arg I2C_IT_TCR: Transfer complete reload
* @arg I2C_IT_BERR: Bus error
* @arg I2C_IT_ARLO: Arbitration lost
* @arg I2C_IT_OVR: Overrun/Underrun
* @arg I2C_IT_PECERR: PEC error in reception
* @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag
* @arg I2C_IT_ALERT: SMBus Alert
* This parameter can be one of the following values:
* @arg I2C_IT_TXIS: Transmit interrupt status
* @arg I2C_IT_RXNE: Receive data register not empty
* @arg I2C_IT_ADDR: Address matched (slave mode)
* @arg I2C_IT_NACKF: NACK received flag
* @arg I2C_IT_STOPF: STOP detection flag
* @arg I2C_IT_TC: Transfer complete (master mode)
* @arg I2C_IT_TCR: Transfer complete reload
* @arg I2C_IT_BERR: Bus error
* @arg I2C_IT_ARLO: Arbitration lost
* @arg I2C_IT_OVR: Overrun/Underrun
* @arg I2C_IT_PECERR: PEC error in reception
* @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag
* @arg I2C_IT_ALERT: SMBus Alert
* @retval The new state of I2C_IT (SET or RESET).
*/
ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
{
uint32_t tmpreg = 0;
ITStatus bitstatus = RESET;
uint32_t enablestatus = 0;
/* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_GET_IT(I2C_IT));
/* Check if the interrupt source is enabled or not */
/* If Error interrupt */
if((I2C_IT & ERROR_IT_MASK) != 0)
{
enablestatus = (uint32_t)((I2C_CR1_ERRIE) & (I2Cx->CR1));
}
/* If TC interrupt */
else if((I2C_IT & TC_IT_MASK) != 0)
{
enablestatus = (uint32_t)((I2C_CR1_TCIE) & (I2Cx->CR1));
}
else
{
enablestatus = (uint32_t)((I2C_IT) & (I2Cx->CR1));
}
/* Get the ISR register value */
tmpreg = I2Cx->ISR;
/* Get flag status */
tmpreg &= I2C_IT;
if(tmpreg != 0)
/* Check the status of the specified I2C flag */
if((tmpreg != RESET) && enablestatus)
{
/* I2C_IT is set */
bitstatus = SET;
@ -1517,23 +1537,25 @@ ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
/* I2C_IT is reset */
bitstatus = RESET;
}
/* Return the I2C_IT status */
return bitstatus;
}
}
/**
* @brief Clears the I2Cx's interrupt pending bits.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_IT: specifies the interrupt pending bit to clear.
* This parameter can be any combination of the following values:
* @arg I2C_IT_ADDR: Address matched (slave mode)
* @arg I2C_IT_NACKF: NACK received flag
* @arg I2C_IT_STOPF: STOP detection flag
* @arg I2C_IT_BERR: Bus error
* @arg I2C_IT_ARLO: Arbitration lost
* @arg I2C_IT_OVR: Overrun/Underrun
* @arg I2C_IT_PECERR: PEC error in reception
* @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag
* @arg I2C_IT_ALERT: SMBus Alert
* This parameter can be any combination of the following values:
* @arg I2C_IT_ADDR: Address matched (slave mode)
* @arg I2C_IT_NACKF: NACK received flag
* @arg I2C_IT_STOPF: STOP detection flag
* @arg I2C_IT_BERR: Bus error
* @arg I2C_IT_ARLO: Arbitration lost
* @arg I2C_IT_OVR: Overrun/Underrun
* @arg I2C_IT_PECERR: PEC error in reception
* @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag
* @arg I2C_IT_ALERT: SMBus Alert
* @retval The new state of I2C_IT (SET or RESET).
*/
void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT)

40
lib/src/peripherals/stm32f0xx_iwdg.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_iwdg.c Executable file → Normal file
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_iwdg.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the Independent watchdog (IWDG) peripheral:
* + Prescaler and Counter configuration
@ -137,9 +137,9 @@
/**
* @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
* @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
* This parameter can be one of the following values:
* @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
* @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
* This parameter can be one of the following values:
* @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
* @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
* @retval None
*/
void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
@ -152,14 +152,14 @@ void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
/**
* @brief Sets IWDG Prescaler value.
* @param IWDG_Prescaler: specifies the IWDG Prescaler value.
* This parameter can be one of the following values:
* @arg IWDG_Prescaler_4: IWDG prescaler set to 4
* @arg IWDG_Prescaler_8: IWDG prescaler set to 8
* @arg IWDG_Prescaler_16: IWDG prescaler set to 16
* @arg IWDG_Prescaler_32: IWDG prescaler set to 32
* @arg IWDG_Prescaler_64: IWDG prescaler set to 64
* @arg IWDG_Prescaler_128: IWDG prescaler set to 128
* @arg IWDG_Prescaler_256: IWDG prescaler set to 256
* This parameter can be one of the following values:
* @arg IWDG_Prescaler_4: IWDG prescaler set to 4
* @arg IWDG_Prescaler_8: IWDG prescaler set to 8
* @arg IWDG_Prescaler_16: IWDG prescaler set to 16
* @arg IWDG_Prescaler_32: IWDG prescaler set to 32
* @arg IWDG_Prescaler_64: IWDG prescaler set to 64
* @arg IWDG_Prescaler_128: IWDG prescaler set to 128
* @arg IWDG_Prescaler_256: IWDG prescaler set to 256
* @retval None
*/
void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
@ -172,7 +172,7 @@ void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
/**
* @brief Sets IWDG Reload value.
* @param Reload: specifies the IWDG Reload value.
* This parameter must be a number between 0 and 0x0FFF.
* This parameter must be a number between 0 and 0x0FFF.
* @retval None
*/
void IWDG_SetReload(uint16_t Reload)
@ -224,8 +224,8 @@ void IWDG_SetWindowValue(uint16_t WindowValue)
/**
* @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
* @param None.
* @retval None.
* @param None
* @retval None
*/
void IWDG_Enable(void)
{
@ -251,10 +251,10 @@ void IWDG_Enable(void)
/**
* @brief Checks whether the specified IWDG flag is set or not.
* @param IWDG_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* @arg IWDG_FLAG_PVU: Prescaler Value Update on going
* @arg IWDG_FLAG_RVU: Reload Value Update on going
* @arg IWDG_FLAG_WVU: Counter Window Value Update on going
* This parameter can be one of the following values:
* @arg IWDG_FLAG_PVU: Prescaler Value Update on going
* @arg IWDG_FLAG_RVU: Reload Value Update on going
* @arg IWDG_FLAG_WVU: Counter Window Value Update on going
* @retval The new state of IWDG_FLAG (SET or RESET).
*/
FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)

20
lib/src/peripherals/stm32f0xx_misc.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_misc.c Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_misc.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides all the miscellaneous firmware functions (add-on
* to CMSIS functions).
******************************************************************************
@ -106,12 +106,12 @@ void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
/**
* @brief Selects the condition for the system to enter low power mode.
* @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
* This parameter can be one of the following values:
* @arg NVIC_LP_SEVONPEND: Low Power SEV on Pend.
* @arg NVIC_LP_SLEEPDEEP: Low Power DEEPSLEEP request.
* @arg NVIC_LP_SLEEPONEXIT: Low Power Sleep on Exit.
* This parameter can be one of the following values:
* @arg NVIC_LP_SEVONPEND: Low Power SEV on Pend.
* @arg NVIC_LP_SLEEPDEEP: Low Power DEEPSLEEP request.
* @arg NVIC_LP_SLEEPONEXIT: Low Power Sleep on Exit.
* @param NewState: new state of LP condition.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
@ -134,9 +134,9 @@ void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
/**
* @brief Configures the SysTick clock source.
* @param SysTick_CLKSource: specifies the SysTick clock source.
* This parameter can be one of the following values:
* @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
* @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
* This parameter can be one of the following values:
* @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
* @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
* @retval None
*/
void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)

51
lib/src/peripherals/stm32f0xx_pwr.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_pwr.c Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_pwr.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the Power Controller (PWR) peripheral:
* + Backup Domain Access
@ -95,7 +95,7 @@ void PWR_DeInit(void)
* @note If the HSE divided by 32 is used as the RTC clock, the
* Backup Domain Access should be kept enabled.
* @param NewState: new state of the access to the Backup domain registers.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void PWR_BackupAccessCmd(FunctionalState NewState)
@ -141,15 +141,18 @@ void PWR_BackupAccessCmd(FunctionalState NewState)
/**
* @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
* @param PWR_PVDLevel: specifies the PVD detection level
* This parameter can be one of the following values:
* @arg PWR_PVDLevel_0: PVD detection level set to 1.9V
* @arg PWR_PVDLevel_1: PVD detection level set to 2.1V
* @arg PWR_PVDLevel_2: PVD detection level set to 2.3V
* @arg PWR_PVDLevel_3: PVD detection level set to 2.5V
* @arg PWR_PVDLevel_4: PVD detection level set to 2.7V
* @arg PWR_PVDLevel_5: PVD detection level set to 2.9V
* @arg PWR_PVDLevel_6: PVD detection level set to 3.1V
* @arg PWR_PVDLevel_7: PVD detection level set to 3.3V
* This parameter can be one of the following values:
* @arg PWR_PVDLevel_0
* @arg PWR_PVDLevel_1
* @arg PWR_PVDLevel_2
* @arg PWR_PVDLevel_3
* @arg PWR_PVDLevel_4
* @arg PWR_PVDLevel_5
* @arg PWR_PVDLevel_6
* @arg PWR_PVDLevel_7
* @note Refer to the electrical characteristics of your device datasheet for
* more details about the voltage threshold corresponding to each
* detection level.
* @retval None
*/
void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)
@ -174,7 +177,7 @@ void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)
/**
* @brief Enables or disables the Power Voltage Detector(PVD).
* @param NewState: new state of the PVD.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void PWR_PVDCmd(FunctionalState NewState)
@ -217,9 +220,9 @@ void PWR_PVDCmd(FunctionalState NewState)
/**
* @brief Enables or disables the WakeUp Pin functionality.
* @param PWR_WakeUpPin: specifies the WakeUpPin.
* This parameter can be: PWR_WakeUpPin_1 or PWR_WakeUpPin_2.
* This parameter can be: PWR_WakeUpPin_1 or PWR_WakeUpPin_2.
* @param NewState: new state of the WakeUp Pin functionality.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState)
@ -350,7 +353,7 @@ void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState)
* @brief Enters Sleep mode.
* @note In Sleep mode, all I/O pins keep the same state as in Run mode.
* @param PWR_SLEEPEntry: specifies if SLEEP mode in entered with WFI or WFE instruction.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg PWR_SLEEPEntry_WFI: enter SLEEP mode with WFI instruction
* @arg PWR_SLEEPEntry_WFE: enter SLEEP mode with WFE instruction
* @retval None
@ -386,11 +389,11 @@ void PWR_EnterSleepMode(uint8_t PWR_SLEEPEntry)
* By keeping the internal regulator ON during Stop mode, the consumption
* is higher although the startup time is reduced.
* @param PWR_Regulator: specifies the regulator state in STOP mode.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg PWR_Regulator_ON: STOP mode with regulator ON
* @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
* @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
* @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
* @retval None
@ -435,10 +438,10 @@ void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
/**
* @brief Enters STANDBY mode.
* @note In Standby mode, all I/O pins are high impedance except for:
* Reset pad (still available)
* RTC_AF1 pin (PC13) if configured for Wakeup pin 2 (WKUP2), tamper,
* time-stamp, RTC Alarm out, or RTC clock calibration out.
* WKUP pin 1 (PA0) if enabled.
* - Reset pad (still available)
* - RTC_AF1 pin (PC13) if configured for Wakeup pin 2 (WKUP2), tamper,
* time-stamp, RTC Alarm out, or RTC clock calibration out.
* - WKUP pin 1 (PA0) if enabled.
* @param None
* @retval None
*/
@ -476,7 +479,7 @@ void PWR_EnterSTANDBYMode(void)
/**
* @brief Checks whether the specified PWR flag is set or not.
* @param PWR_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup
* event was received from the WKUP pin or from the RTC alarm
* (Alarm A or Alarm B), RTC Tamper event or RTC TimeStamp event.
@ -510,7 +513,7 @@ FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG)
/**
* @brief Clears the PWR's pending flags.
* @param PWR_FLAG: specifies the flag to clear.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg PWR_FLAG_WU: Wake Up flag
* @arg PWR_FLAG_SB: StandBy flag
* @retval None

442
lib/src/peripherals/stm32f0xx_rcc.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_rcc.c Executable file → Normal file
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_rcc.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the Reset and clock control (RCC) peripheral:
* + Internal/external clocks, PLL, CSS and MCO configuration
@ -176,21 +176,21 @@ void RCC_DeInit(void)
/**
* @brief Configures the External High Speed oscillator (HSE).
* @note After enabling the HSE (RCC_HSE_ON or RCC_HSE_Bypass), the application
* software should wait on HSERDY flag to be set indicating that HSE clock
* is stable and can be used to clock the PLL and/or system clock.
* @note HSE state can not be changed if it is used directly or through the
* PLL as system clock. In this case, you have to select another source
* of the system clock then change the HSE state (ex. disable it).
* @note The HSE is stopped by hardware when entering STOP and STANDBY modes.
* software should wait on HSERDY flag to be set indicating that HSE clock
* is stable and can be used to clock the PLL and/or system clock.
* @note HSE state can not be changed if it is used directly or through the
* PLL as system clock. In this case, you have to select another source
* of the system clock then change the HSE state (ex. disable it).
* @note The HSE is stopped by hardware when entering STOP and STANDBY modes.
* @note This function resets the CSSON bit, so if the Clock security system(CSS)
* was previously enabled you have to enable it again after calling this
* function.
* @param RCC_HSE: specifies the new state of the HSE.
* This parameter can be one of the following values:
* @arg RCC_HSE_OFF: turn OFF the HSE oscillator, HSERDY flag goes low after
* 6 HSE oscillator clock cycles.
* @arg RCC_HSE_ON: turn ON the HSE oscillator
* @arg RCC_HSE_Bypass: HSE oscillator bypassed with external clock
* @param RCC_HSE: specifies the new state of the HSE.
* This parameter can be one of the following values:
* @arg RCC_HSE_OFF: turn OFF the HSE oscillator, HSERDY flag goes low after
* 6 HSE oscillator clock cycles.
* @arg RCC_HSE_ON: turn ON the HSE oscillator
* @arg RCC_HSE_Bypass: HSE oscillator bypassed with external clock
* @retval None
*/
void RCC_HSEConfig(uint8_t RCC_HSE)
@ -213,7 +213,7 @@ void RCC_HSEConfig(uint8_t RCC_HSE)
* and this flag is not set. The timeout value is defined by the constant
* HSE_STARTUP_TIMEOUT in stm32f0xx.h file. You can tailor it depending
* on the HSE crystal used in your application.
* - The HSE is stopped by hardware when entering STOP and STANDBY modes.
* @note The HSE is stopped by hardware when entering STOP and STANDBY modes.
* @param None
* @retval An ErrorStatus enumeration value:
* - SUCCESS: HSE oscillator is stable and ready to use
@ -247,10 +247,10 @@ ErrorStatus RCC_WaitForHSEStartUp(void)
* @brief Adjusts the Internal High Speed oscillator (HSI) calibration value.
* @note The calibration is used to compensate for the variations in voltage
* and temperature that influence the frequency of the internal HSI RC.
* Refer to the Application Note AN3300 for more details on how to
* Refer to the Application Note AN4067 for more details on how to
* calibrate the HSI.
* @param HSICalibrationValue: specifies the HSI calibration trimming value.
* This parameter must be a number between 0 and 0x1F.
* This parameter must be a number between 0 and 0x1F.
* @retval None
*/
void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue)
@ -274,15 +274,15 @@ void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue)
/**
* @brief Enables or disables the Internal High Speed oscillator (HSI).
* @note After enabling the HSI, the application software should wait on
* HSIRDY flag to be set indicating that HSI clock is stable and can
* be used to clock the PLL and/or system clock.
* @note HSI can not be stopped if it is used directly or through the PLL
* as system clock. In this case, you have to select another source
* of the system clock then stop the HSI.
* @note The HSI is stopped by hardware when entering STOP and STANDBY modes.
* @note After enabling the HSI, the application software should wait on
* HSIRDY flag to be set indicating that HSI clock is stable and can
* be used to clock the PLL and/or system clock.
* @note HSI can not be stopped if it is used directly or through the PLL
* as system clock. In this case, you have to select another source
* of the system clock then stop the HSI.
* @note The HSI is stopped by hardware when entering STOP and STANDBY modes.
* @param NewState: new state of the HSI.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @note When the HSI is stopped, HSIRDY flag goes low after 6 HSI oscillator
* clock cycles.
* @retval None
@ -307,10 +307,10 @@ void RCC_HSICmd(FunctionalState NewState)
* calibration value.
* @note The calibration is used to compensate for the variations in voltage
* and temperature that influence the frequency of the internal HSI RC.
* Refer to the Application Note AN3300 for more details on how to
* Refer to the Application Note AN4067 for more details on how to
* calibrate the HSI14.
* @param HSI14CalibrationValue: specifies the HSI14 calibration trimming value.
* This parameter must be a number between 0 and 0x1F.
* This parameter must be a number between 0 and 0x1F.
* @retval None
*/
void RCC_AdjustHSI14CalibrationValue(uint8_t HSI14CalibrationValue)
@ -334,12 +334,12 @@ void RCC_AdjustHSI14CalibrationValue(uint8_t HSI14CalibrationValue)
/**
* @brief Enables or disables the Internal High Speed oscillator for ADC (HSI14).
* @note After enabling the HSI14, the application software should wait on
* HSIRDY flag to be set indicating that HSI clock is stable and can
* be used to clock the ADC.
* @note The HSI14 is stopped by hardware when entering STOP and STANDBY modes.
* @note After enabling the HSI14, the application software should wait on
* HSIRDY flag to be set indicating that HSI clock is stable and can
* be used to clock the ADC.
* @note The HSI14 is stopped by hardware when entering STOP and STANDBY modes.
* @param NewState: new state of the HSI14.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @note When the HSI14 is stopped, HSI14RDY flag goes low after 6 HSI14 oscillator
* clock cycles.
* @retval None
@ -362,7 +362,7 @@ void RCC_HSI14Cmd(FunctionalState NewState)
/**
* @brief Enables or disables the Internal High Speed oscillator request from ADC.
* @param NewState: new state of the HSI14 ADC request.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RCC_HSI14ADCRequestCmd(FunctionalState NewState)
@ -382,19 +382,19 @@ void RCC_HSI14ADCRequestCmd(FunctionalState NewState)
/**
* @brief Configures the External Low Speed oscillator (LSE).
* @note As the LSE is in the Backup domain and write access is denied to this
* domain after reset, you have to enable write access using
* PWR_BackupAccessCmd(ENABLE) function before to configure the LSE
* (to be done once after reset).
* @note After enabling the LSE (RCC_LSE_ON or RCC_LSE_Bypass), the application
* software should wait on LSERDY flag to be set indicating that LSE clock
* is stable and can be used to clock the RTC.
* @note As the LSE is in the Backup domain and write access is denied to this
* domain after reset, you have to enable write access using
* PWR_BackupAccessCmd(ENABLE) function before to configure the LSE
* (to be done once after reset).
* @note After enabling the LSE (RCC_LSE_ON or RCC_LSE_Bypass), the application
* software should wait on LSERDY flag to be set indicating that LSE clock
* is stable and can be used to clock the RTC.
* @param RCC_LSE: specifies the new state of the LSE.
* This parameter can be one of the following values:
* @arg RCC_LSE_OFF: turn OFF the LSE oscillator, LSERDY flag goes low after
* 6 LSE oscillator clock cycles.
* @arg RCC_LSE_ON: turn ON the LSE oscillator
* @arg RCC_LSE_Bypass: LSE oscillator bypassed with external clock
* This parameter can be one of the following values:
* @arg RCC_LSE_OFF: turn OFF the LSE oscillator, LSERDY flag goes low after
* 6 LSE oscillator clock cycles.
* @arg RCC_LSE_ON: turn ON the LSE oscillator
* @arg RCC_LSE_Bypass: LSE oscillator bypassed with external clock
* @retval None
*/
void RCC_LSEConfig(uint32_t RCC_LSE)
@ -416,11 +416,11 @@ void RCC_LSEConfig(uint32_t RCC_LSE)
/**
* @brief Configures the External Low Speed oscillator (LSE) drive capability.
* @param RCC_LSEDrive: specifies the new state of the LSE drive capability.
* This parameter can be one of the following values:
* @arg RCC_LSEDrive_Low: LSE oscillator low drive capability.
* @arg RCC_LSEDrive_MediumLow: LSE oscillator medium low drive capability.
* @arg RCC_LSEDrive_MediumHigh: LSE oscillator medium high drive capability.
* @arg RCC_LSEDrive_High: LSE oscillator high drive capability.
* This parameter can be one of the following values:
* @arg RCC_LSEDrive_Low: LSE oscillator low drive capability.
* @arg RCC_LSEDrive_MediumLow: LSE oscillator medium low drive capability.
* @arg RCC_LSEDrive_MediumHigh: LSE oscillator medium high drive capability.
* @arg RCC_LSEDrive_High: LSE oscillator high drive capability.
* @retval None
*/
void RCC_LSEDriveConfig(uint32_t RCC_LSEDrive)
@ -437,12 +437,12 @@ void RCC_LSEDriveConfig(uint32_t RCC_LSEDrive)
/**
* @brief Enables or disables the Internal Low Speed oscillator (LSI).
* @note After enabling the LSI, the application software should wait on
* LSIRDY flag to be set indicating that LSI clock is stable and can
* be used to clock the IWDG and/or the RTC.
* @note LSI can not be disabled if the IWDG is running.
* @note After enabling the LSI, the application software should wait on
* LSIRDY flag to be set indicating that LSI clock is stable and can
* be used to clock the IWDG and/or the RTC.
* @note LSI can not be disabled if the IWDG is running.
* @param NewState: new state of the LSI.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @note When the LSI is stopped, LSIRDY flag goes low after 6 LSI oscillator
* clock cycles.
* @retval None
@ -467,14 +467,14 @@ void RCC_LSICmd(FunctionalState NewState)
* @note This function must be used only when the PLL is disabled.
*
* @param RCC_PLLSource: specifies the PLL entry clock source.
* This parameter can be one of the following values:
* @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock selected as PLL clock source
* @arg RCC_PLLSource_PREDIV1: PREDIV1 clock selected as PLL clock entry
* This parameter can be one of the following values:
* @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock selected as PLL clock source
* @arg RCC_PLLSource_PREDIV1: PREDIV1 clock selected as PLL clock entry
* @note The minimum input clock frequency for PLL is 2 MHz (when using HSE as
* PLL source).
*
* @param RCC_PLLMul: specifies the PLL multiplication factor, which drive the PLLVCO clock
* This parameter can be RCC_PLLMul_x where x:[2,16]
* This parameter can be RCC_PLLMul_x where x:[2,16]
*
* @retval None
*/
@ -493,13 +493,13 @@ void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul)
/**
* @brief Enables or disables the PLL.
* @note - After enabling the PLL, the application software should wait on
* PLLRDY flag to be set indicating that PLL clock is stable and can
* be used as system clock source.
* - The PLL can not be disabled if it is used as system clock source
* - The PLL is disabled by hardware when entering STOP and STANDBY modes.
* @note After enabling the PLL, the application software should wait on
* PLLRDY flag to be set indicating that PLL clock is stable and can
* be used as system clock source.
* @note The PLL can not be disabled if it is used as system clock source
* @note The PLL is disabled by hardware when entering STOP and STANDBY modes.
* @param NewState: new state of the PLL.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RCC_PLLCmd(FunctionalState NewState)
@ -521,7 +521,7 @@ void RCC_PLLCmd(FunctionalState NewState)
* @brief Configures the PREDIV1 division factor.
* @note This function must be used only when the PLL is disabled.
* @param RCC_PREDIV1_Div: specifies the PREDIV1 clock division factor.
* This parameter can be RCC_PREDIV1_Divx where x:[1,16]
* This parameter can be RCC_PREDIV1_Divx where x:[1,16]
* @retval None
*/
void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Div)
@ -548,7 +548,7 @@ void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Div)
* allowing the MCU to perform rescue operations. The CSSI is linked to
* the Cortex-M0 NMI (Non-Maskable Interrupt) exception vector.
* @param NewState: new state of the Clock Security System.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RCC_ClockSecuritySystemCmd(FunctionalState NewState)
@ -570,15 +570,15 @@ void RCC_ClockSecuritySystemCmd(FunctionalState NewState)
* @brief Selects the clock source to output on MCO pin (PA8).
* @note PA8 should be configured in alternate function mode.
* @param RCC_MCOSource: specifies the clock source to output.
* This parameter can be one of the following values:
* @arg RCC_MCOSource_NoClock: No clock selected.
* @arg RCC_MCOSource_HSI14: HSI14 oscillator clock selected.
* @arg RCC_MCOSource_LSI: LSI oscillator clock selected.
* @arg RCC_MCOSource_LSE: LSE oscillator clock selected.
* @arg RCC_MCOSource_SYSCLK: System clock selected.
* @arg RCC_MCOSource_HSI: HSI oscillator clock selected.
* @arg RCC_MCOSource_HSE: HSE oscillator clock selected.
* @arg RCC_MCOSource_PLLCLK_Div2: PLL clock divided by 2 selected.
* This parameter can be one of the following values:
* @arg RCC_MCOSource_NoClock: No clock selected.
* @arg RCC_MCOSource_HSI14: HSI14 oscillator clock selected.
* @arg RCC_MCOSource_LSI: LSI oscillator clock selected.
* @arg RCC_MCOSource_LSE: LSE oscillator clock selected.
* @arg RCC_MCOSource_SYSCLK: System clock selected.
* @arg RCC_MCOSource_HSI: HSI oscillator clock selected.
* @arg RCC_MCOSource_HSE: HSE oscillator clock selected.
* @arg RCC_MCOSource_PLLCLK_Div2: PLL clock divided by 2 selected.
* @retval None
*/
void RCC_MCOConfig(uint8_t RCC_MCOSource)
@ -669,21 +669,21 @@ void RCC_MCOConfig(uint8_t RCC_MCOSource)
/**
* @brief Configures the system clock (SYSCLK).
* @note The HSI is used (enabled by hardware) as system clock source after
* startup from Reset, wake-up from STOP and STANDBY mode, or in case
* of failure of the HSE used directly or indirectly as system clock
* (if the Clock Security System CSS is enabled).
* @note A switch from one clock source to another occurs only if the target
* clock source is ready (clock stable after startup delay or PLL locked).
* If a clock source which is not yet ready is selected, the switch will
* occur when the clock source will be ready.
* You can use RCC_GetSYSCLKSource() function to know which clock is
* currently used as system clock source.
* @note The HSI is used (enabled by hardware) as system clock source after
* startup from Reset, wake-up from STOP and STANDBY mode, or in case
* of failure of the HSE used directly or indirectly as system clock
* (if the Clock Security System CSS is enabled).
* @note A switch from one clock source to another occurs only if the target
* clock source is ready (clock stable after startup delay or PLL locked).
* If a clock source which is not yet ready is selected, the switch will
* occur when the clock source will be ready.
* You can use RCC_GetSYSCLKSource() function to know which clock is
* currently used as system clock source.
* @param RCC_SYSCLKSource: specifies the clock source used as system clock source
* This parameter can be one of the following values:
* @arg RCC_SYSCLKSource_HSI: HSI selected as system clock source
* @arg RCC_SYSCLKSource_HSE: HSE selected as system clock source
* @arg RCC_SYSCLKSource_PLLCLK: PLL selected as system clock source
* This parameter can be one of the following values:
* @arg RCC_SYSCLKSource_HSI: HSI selected as system clock source
* @arg RCC_SYSCLKSource_HSE: HSE selected as system clock source
* @arg RCC_SYSCLKSource_PLLCLK: PLL selected as system clock source
* @retval None
*/
void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource)
@ -710,9 +710,9 @@ void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource)
* @param None
* @retval The clock source used as system clock. The returned value can be one
* of the following values:
* - 0x00: HSI used as system clock
* - 0x04: HSE used as system clock
* - 0x08: PLL used as system clock
* - 0x00: HSI used as system clock
* - 0x04: HSE used as system clock
* - 0x08: PLL used as system clock
*/
uint8_t RCC_GetSYSCLKSource(void)
{
@ -722,17 +722,17 @@ uint8_t RCC_GetSYSCLKSource(void)
/**
* @brief Configures the AHB clock (HCLK).
* @param RCC_SYSCLK: defines the AHB clock divider. This clock is derived from
* the system clock (SYSCLK).
* This parameter can be one of the following values:
* @arg RCC_SYSCLK_Div1: AHB clock = SYSCLK
* @arg RCC_SYSCLK_Div2: AHB clock = SYSCLK/2
* @arg RCC_SYSCLK_Div4: AHB clock = SYSCLK/4
* @arg RCC_SYSCLK_Div8: AHB clock = SYSCLK/8
* @arg RCC_SYSCLK_Div16: AHB clock = SYSCLK/16
* @arg RCC_SYSCLK_Div64: AHB clock = SYSCLK/64
* @arg RCC_SYSCLK_Div128: AHB clock = SYSCLK/128
* @arg RCC_SYSCLK_Div256: AHB clock = SYSCLK/256
* @arg RCC_SYSCLK_Div512: AHB clock = SYSCLK/512
* the system clock (SYSCLK).
* This parameter can be one of the following values:
* @arg RCC_SYSCLK_Div1: AHB clock = SYSCLK
* @arg RCC_SYSCLK_Div2: AHB clock = SYSCLK/2
* @arg RCC_SYSCLK_Div4: AHB clock = SYSCLK/4
* @arg RCC_SYSCLK_Div8: AHB clock = SYSCLK/8
* @arg RCC_SYSCLK_Div16: AHB clock = SYSCLK/16
* @arg RCC_SYSCLK_Div64: AHB clock = SYSCLK/64
* @arg RCC_SYSCLK_Div128: AHB clock = SYSCLK/128
* @arg RCC_SYSCLK_Div256: AHB clock = SYSCLK/256
* @arg RCC_SYSCLK_Div512: AHB clock = SYSCLK/512
* @retval None
*/
void RCC_HCLKConfig(uint32_t RCC_SYSCLK)
@ -758,12 +758,12 @@ void RCC_HCLKConfig(uint32_t RCC_SYSCLK)
* @brief Configures the APB clock (PCLK).
* @param RCC_HCLK: defines the APB clock divider. This clock is derived from
* the AHB clock (HCLK).
* This parameter can be one of the following values:
* @arg RCC_HCLK_Div1: APB clock = HCLK
* @arg RCC_HCLK_Div2: APB clock = HCLK/2
* @arg RCC_HCLK_Div4: APB clock = HCLK/4
* @arg RCC_HCLK_Div8: APB clock = HCLK/8
* @arg RCC_HCLK_Div16: APB clock = HCLK/16
* This parameter can be one of the following values:
* @arg RCC_HCLK_Div1: APB clock = HCLK
* @arg RCC_HCLK_Div2: APB clock = HCLK/2
* @arg RCC_HCLK_Div4: APB clock = HCLK/4
* @arg RCC_HCLK_Div8: APB clock = HCLK/8
* @arg RCC_HCLK_Div16: APB clock = HCLK/16
* @retval None
*/
void RCC_PCLKConfig(uint32_t RCC_HCLK)
@ -789,7 +789,7 @@ void RCC_PCLKConfig(uint32_t RCC_HCLK)
* @brief Configures the ADC clock (ADCCLK).
* @param RCC_ADCCLK: defines the ADC clock source. This clock is derived
* from the HSI14 or APB clock (PCLK).
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg RCC_ADCCLK_HSI14: ADC clock = HSI14 (14MHz)
* @arg RCC_ADCCLK_PCLK_Div2: ADC clock = PCLK/2
* @arg RCC_ADCCLK_PCLK_Div4: ADC clock = PCLK/4
@ -815,7 +815,7 @@ void RCC_ADCCLKConfig(uint32_t RCC_ADCCLK)
* @brief Configures the CEC clock (CECCLK).
* @param RCC_CECCLK: defines the CEC clock source. This clock is derived
* from the HSI or LSE clock.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg RCC_CECCLK_HSI_Div244: CEC clock = HSI/244 (32768Hz)
* @arg RCC_CECCLK_LSE: CEC clock = LSE
* @retval None
@ -835,7 +835,7 @@ void RCC_CECCLKConfig(uint32_t RCC_CECCLK)
* @brief Configures the I2C1 clock (I2C1CLK).
* @param RCC_I2CCLK: defines the I2C1 clock source. This clock is derived
* from the HSI or System clock.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg RCC_I2C1CLK_HSI: I2C1 clock = HSI
* @arg RCC_I2C1CLK_SYSCLK: I2C1 clock = System Clock
* @retval None
@ -855,7 +855,7 @@ void RCC_I2CCLKConfig(uint32_t RCC_I2CCLK)
* @brief Configures the USART1 clock (USART1CLK).
* @param RCC_USARTCLK: defines the USART1 clock source. This clock is derived
* from the HSI or System clock.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg RCC_USART1CLK_PCLK: USART1 clock = APB Clock (PCLK)
* @arg RCC_USART1CLK_SYSCLK: USART1 clock = System Clock
* @arg RCC_USART1CLK_LSE: USART1 clock = LSE Clock
@ -886,26 +886,26 @@ void RCC_USARTCLKConfig(uint32_t RCC_USARTCLK)
* @note If SYSCLK source is PLL, function returns constant HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f0xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature, refer to RCC_AdjustHSICalibrationValue().
* @note (*) HSI_VALUE is a constant defined in stm32f0xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature, refer to RCC_AdjustHSICalibrationValue().
*
* (**) HSE_VALUE is a constant defined in stm32f0xx.h file (default value
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
* frequency of the crystal used. Otherwise, this function may
* return wrong result.
* @note (**) HSE_VALUE is a constant defined in stm32f0xx.h file (default value
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
* frequency of the crystal used. Otherwise, this function may
* return wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @note The result of this function could be not correct when using fractional
* value for HSE crystal.
*
* @param RCC_Clocks: pointer to a RCC_ClocksTypeDef structure which will hold
* the clocks frequencies.
*
* @note This function can be used by the user application to compute the
* baudrate for the communication peripherals or configure other parameters.
* @note Each time SYSCLK, HCLK and/or PCLK clock changes, this function
* must be called to update the structure's field. Otherwise, any
* configuration based on this function will be incorrect.
* @note This function can be used by the user application to compute the
* baudrate for the communication peripherals or configure other parameters.
* @note Each time SYSCLK, HCLK and/or PCLK clock changes, this function
* must be called to update the structure's field. Otherwise, any
* configuration based on this function will be incorrect.
*
* @retval None
*/
@ -1027,10 +1027,8 @@ void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks)
/* USART1 Clock is HSI Osc. */
RCC_Clocks->USART1CLK_Frequency = HSI_VALUE;
}
}
/**
* @}
*/
@ -1060,26 +1058,26 @@ void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks)
/**
* @brief Configures the RTC clock (RTCCLK).
* @note As the RTC clock configuration bits are in the Backup domain and write
* access is denied to this domain after reset, you have to enable write
* access using PWR_BackupAccessCmd(ENABLE) function before to configure
* the RTC clock source (to be done once after reset).
* @note Once the RTC clock is configured it can't be changed unless the RTC
* is reset using RCC_BackupResetCmd function, or by a Power On Reset (POR)
* @note As the RTC clock configuration bits are in the Backup domain and write
* access is denied to this domain after reset, you have to enable write
* access using PWR_BackupAccessCmd(ENABLE) function before to configure
* the RTC clock source (to be done once after reset).
* @note Once the RTC clock is configured it can't be changed unless the RTC
* is reset using RCC_BackupResetCmd function, or by a Power On Reset (POR)
*
* @param RCC_RTCCLKSource: specifies the RTC clock source.
* This parameter can be one of the following values:
* @arg RCC_RTCCLKSource_LSE: LSE selected as RTC clock
* @arg RCC_RTCCLKSource_LSI: LSI selected as RTC clock
* @arg RCC_RTCCLKSource_HSE_Div32: HSE divided by 32 selected as RTC clock
* This parameter can be one of the following values:
* @arg RCC_RTCCLKSource_LSE: LSE selected as RTC clock
* @arg RCC_RTCCLKSource_LSI: LSI selected as RTC clock
* @arg RCC_RTCCLKSource_HSE_Div32: HSE divided by 32 selected as RTC clock
*
* @note If the LSE or LSI is used as RTC clock source, the RTC continues to
* work in STOP and STANDBY modes, and can be used as wakeup source.
* However, when the HSE clock is used as RTC clock source, the RTC
* cannot be used in STOP and STANDBY modes.
* @note If the LSE or LSI is used as RTC clock source, the RTC continues to
* work in STOP and STANDBY modes, and can be used as wakeup source.
* However, when the HSE clock is used as RTC clock source, the RTC
* cannot be used in STOP and STANDBY modes.
*
* @note The maximum input clock frequency for RTC is 2MHz (when using HSE as
* RTC clock source).
* @note The maximum input clock frequency for RTC is 2MHz (when using HSE as
* RTC clock source).
*
* @retval None
*/
@ -1097,7 +1095,7 @@ void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource)
* @note This function must be used only after the RTC clock source was selected
* using the RCC_RTCCLKConfig function.
* @param NewState: new state of the RTC clock.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RCC_RTCCLKCmd(FunctionalState NewState)
@ -1120,7 +1118,7 @@ void RCC_RTCCLKCmd(FunctionalState NewState)
* @note This function resets the RTC peripheral (including the backup registers)
* and the RTC clock source selection in RCC_BDCR register.
* @param NewState: new state of the Backup domain reset.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RCC_BackupResetCmd(FunctionalState NewState)
@ -1144,19 +1142,19 @@ void RCC_BackupResetCmd(FunctionalState NewState)
* is disabled and the application software has to enable this clock before
* using it.
* @param RCC_AHBPeriph: specifies the AHB peripheral to gates its clock.
* This parameter can be any combination of the following values:
* @arg RCC_AHBPeriph_GPIOA: GPIOA clock
* @arg RCC_AHBPeriph_GPIOB: GPIOB clock
* @arg RCC_AHBPeriph_GPIOC: GPIOC clock
* @arg RCC_AHBPeriph_GPIOD: GPIOD clock
* @arg RCC_AHBPeriph_GPIOF: GPIOF clock
* @arg RCC_AHBPeriph_TS: TS clock
* @arg RCC_AHBPeriph_CRC: CRC clock
* This parameter can be any combination of the following values:
* @arg RCC_AHBPeriph_GPIOA: GPIOA clock
* @arg RCC_AHBPeriph_GPIOB: GPIOB clock
* @arg RCC_AHBPeriph_GPIOC: GPIOC clock
* @arg RCC_AHBPeriph_GPIOD: GPIOD clock
* @arg RCC_AHBPeriph_GPIOF: GPIOF clock
* @arg RCC_AHBPeriph_TS: TS clock
* @arg RCC_AHBPeriph_CRC: CRC clock
* @arg RCC_AHBPeriph_FLITF: (has effect only when the Flash memory is in power down mode)
* @arg RCC_AHBPeriph_SRAM: SRAM clock
* @arg RCC_AHBPeriph_DMA1: DMA1 clock
* @arg RCC_AHBPeriph_SRAM: SRAM clock
* @arg RCC_AHBPeriph_DMA1: DMA1 clock
* @param NewState: new state of the specified peripheral clock.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState)
@ -1181,18 +1179,18 @@ void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState)
* is disabled and the application software has to enable this clock before
* using it.
* @param RCC_APB2Periph: specifies the APB2 peripheral to gates its clock.
* This parameter can be any combination of the following values:
* @arg RCC_APB2Periph_SYSCFG: SYSCFG clock
* @arg RCC_APB2Periph_ADC1: ADC1 clock
* @arg RCC_APB2Periph_TIM1: TIM1 clock
* @arg RCC_APB2Periph_SPI1: SPI1 clock
* @arg RCC_APB2Periph_USART1: USART1 clock
* @arg RCC_APB2Periph_TIM15: TIM15 clock
* @arg RCC_APB2Periph_TIM16: TIM16 clock
* @arg RCC_APB2Periph_TIM17: TIM17 clock
* @arg RCC_APB2Periph_DBGMCU: DBGMCU clock
* This parameter can be any combination of the following values:
* @arg RCC_APB2Periph_SYSCFG: SYSCFG clock
* @arg RCC_APB2Periph_ADC1: ADC1 clock
* @arg RCC_APB2Periph_TIM1: TIM1 clock
* @arg RCC_APB2Periph_SPI1: SPI1 clock
* @arg RCC_APB2Periph_USART1: USART1 clock
* @arg RCC_APB2Periph_TIM15: TIM15 clock
* @arg RCC_APB2Periph_TIM16: TIM16 clock
* @arg RCC_APB2Periph_TIM17: TIM17 clock
* @arg RCC_APB2Periph_DBGMCU: DBGMCU clock
* @param NewState: new state of the specified peripheral clock.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
@ -1217,21 +1215,21 @@ void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
* is disabled and the application software has to enable this clock before
* using it.
* @param RCC_APB1Periph: specifies the APB1 peripheral to gates its clock.
* This parameter can be any combination of the following values:
* @arg RCC_APB1Periph_TIM2: TIM2 clock
* @arg RCC_APB1Periph_TIM3: TIM3 clock
* @arg RCC_APB1Periph_TIM6: TIM6 clock
* @arg RCC_APB1Periph_TIM14: TIM14 clock
* @arg RCC_APB1Periph_WWDG: WWDG clock
* @arg RCC_APB1Periph_SPI2: SPI2 clock
* @arg RCC_APB1Periph_USART2: USART2 clock
* @arg RCC_APB1Periph_I2C1: I2C1 clock
* @arg RCC_APB1Periph_I2C2: I2C2 clock
* @arg RCC_APB1Periph_PWR: PWR clock
* @arg RCC_APB1Periph_DAC: DAC clock
* @arg RCC_APB1Periph_CEC: CEC clock
* This parameter can be any combination of the following values:
* @arg RCC_APB1Periph_TIM2: TIM2 clock
* @arg RCC_APB1Periph_TIM3: TIM3 clock
* @arg RCC_APB1Periph_TIM6: TIM6 clock
* @arg RCC_APB1Periph_TIM14: TIM14 clock
* @arg RCC_APB1Periph_WWDG: WWDG clock
* @arg RCC_APB1Periph_SPI2: SPI2 clock
* @arg RCC_APB1Periph_USART2: USART2 clock
* @arg RCC_APB1Periph_I2C1: I2C1 clock
* @arg RCC_APB1Periph_I2C2: I2C2 clock
* @arg RCC_APB1Periph_PWR: PWR clock
* @arg RCC_APB1Periph_DAC: DAC clock
* @arg RCC_APB1Periph_CEC: CEC clock
* @param NewState: new state of the specified peripheral clock.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
@ -1253,15 +1251,15 @@ void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
/**
* @brief Forces or releases AHB peripheral reset.
* @param RCC_AHBPeriph: specifies the AHB peripheral to reset.
* This parameter can be any combination of the following values:
* @arg RCC_AHBPeriph_GPIOA: GPIOA clock
* @arg RCC_AHBPeriph_GPIOB: GPIOB clock
* @arg RCC_AHBPeriph_GPIOC: GPIOC clock
* @arg RCC_AHBPeriph_GPIOD: GPIOD clock
* @arg RCC_AHBPeriph_GPIOF: GPIOF clock
* @arg RCC_AHBPeriph_TS: TS clock
* This parameter can be any combination of the following values:
* @arg RCC_AHBPeriph_GPIOA: GPIOA clock
* @arg RCC_AHBPeriph_GPIOB: GPIOB clock
* @arg RCC_AHBPeriph_GPIOC: GPIOC clock
* @arg RCC_AHBPeriph_GPIOD: GPIOD clock
* @arg RCC_AHBPeriph_GPIOF: GPIOF clock
* @arg RCC_AHBPeriph_TS: TS clock
* @param NewState: new state of the specified peripheral reset.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState)
@ -1283,18 +1281,18 @@ void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState)
/**
* @brief Forces or releases High Speed APB (APB2) peripheral reset.
* @param RCC_APB2Periph: specifies the APB2 peripheral to reset.
* This parameter can be any combination of the following values:
* @arg RCC_APB2Periph_SYSCFG: SYSCFG clock
* @arg RCC_APB2Periph_ADC1: ADC1 clock
* @arg RCC_APB2Periph_TIM1: TIM1 clock
* @arg RCC_APB2Periph_SPI1: SPI1 clock
* @arg RCC_APB2Periph_USART1: USART1 clock
* @arg RCC_APB2Periph_TIM15: TIM15 clock
* @arg RCC_APB2Periph_TIM16: TIM16 clock
* @arg RCC_APB2Periph_TIM17: TIM17 clock
* @arg RCC_APB2Periph_DBGMCU: DBGMCU clock
* This parameter can be any combination of the following values:
* @arg RCC_APB2Periph_SYSCFG: SYSCFG clock
* @arg RCC_APB2Periph_ADC1: ADC1 clock
* @arg RCC_APB2Periph_TIM1: TIM1 clock
* @arg RCC_APB2Periph_SPI1: SPI1 clock
* @arg RCC_APB2Periph_USART1: USART1 clock
* @arg RCC_APB2Periph_TIM15: TIM15 clock
* @arg RCC_APB2Periph_TIM16: TIM16 clock
* @arg RCC_APB2Periph_TIM17: TIM17 clock
* @arg RCC_APB2Periph_DBGMCU: DBGMCU clock
* @param NewState: new state of the specified peripheral reset.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
@ -1316,21 +1314,21 @@ void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
/**
* @brief Forces or releases Low Speed APB (APB1) peripheral reset.
* @param RCC_APB1Periph: specifies the APB1 peripheral to reset.
* This parameter can be any combination of the following values:
* @arg RCC_APB1Periph_TIM2: TIM2 clock
* @arg RCC_APB1Periph_TIM3: TIM3 clock
* @arg RCC_APB1Periph_TIM6: TIM6 clock
* @arg RCC_APB1Periph_TIM14: TIM14 clock
* @arg RCC_APB1Periph_WWDG: WWDG clock
* @arg RCC_APB1Periph_SPI2: SPI2 clock
* @arg RCC_APB1Periph_USART2: USART2 clock
* @arg RCC_APB1Periph_I2C1: I2C1 clock
* @arg RCC_APB1Periph_I2C2: I2C2 clock
* @arg RCC_APB1Periph_PWR: PWR clock
* @arg RCC_APB1Periph_DAC: DAC clock
* @arg RCC_APB1Periph_CEC: CEC clock
* This parameter can be any combination of the following values:
* @arg RCC_APB1Periph_TIM2: TIM2 clock
* @arg RCC_APB1Periph_TIM3: TIM3 clock
* @arg RCC_APB1Periph_TIM6: TIM6 clock
* @arg RCC_APB1Periph_TIM14: TIM14 clock
* @arg RCC_APB1Periph_WWDG: WWDG clock
* @arg RCC_APB1Periph_SPI2: SPI2 clock
* @arg RCC_APB1Periph_USART2: USART2 clock
* @arg RCC_APB1Periph_I2C1: I2C1 clock
* @arg RCC_APB1Periph_I2C2: I2C2 clock
* @arg RCC_APB1Periph_PWR: PWR clock
* @arg RCC_APB1Periph_DAC: DAC clock
* @arg RCC_APB1Periph_CEC: CEC clock
* @param NewState: new state of the specified peripheral clock.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
@ -1373,7 +1371,7 @@ void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
* the application will be stacked in the NMI ISR unless the CSS interrupt
* pending bit is cleared.
* @param RCC_IT: specifies the RCC interrupt sources to be enabled or disabled.
* This parameter can be any combination of the following values:
* This parameter can be any combination of the following values:
* @arg RCC_IT_LSIRDY: LSI ready interrupt
* @arg RCC_IT_LSERDY: LSE ready interrupt
* @arg RCC_IT_HSIRDY: HSI ready interrupt
@ -1381,7 +1379,7 @@ void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
* @arg RCC_IT_PLLRDY: PLL ready interrupt
* @arg RCC_IT_HSI14RDY: HSI14 ready interrupt
* @param NewState: new state of the specified RCC interrupts.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState)
@ -1405,7 +1403,7 @@ void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState)
/**
* @brief Checks whether the specified RCC flag is set or not.
* @param RCC_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg RCC_FLAG_HSIRDY: HSI oscillator clock ready
* @arg RCC_FLAG_HSERDY: HSE oscillator clock ready
* @arg RCC_FLAG_PLLRDY: PLL clock ready
@ -1483,7 +1481,7 @@ void RCC_ClearFlag(void)
/**
* @brief Checks whether the specified RCC interrupt has occurred or not.
* @param RCC_IT: specifies the RCC interrupt source to check.
* This parameter can be one of the following values:
* This parameter can be one of the following values:
* @arg RCC_IT_LSIRDY: LSI ready interrupt
* @arg RCC_IT_LSERDY: LSE ready interrupt
* @arg RCC_IT_HSIRDY: HSI ready interrupt
@ -1516,7 +1514,7 @@ ITStatus RCC_GetITStatus(uint8_t RCC_IT)
/**
* @brief Clears the RCC's interrupt pending bits.
* @param RCC_IT: specifies the interrupt pending bit to clear.
* This parameter can be any combination of the following values:
* This parameter can be any combination of the following values:
* @arg RCC_IT_LSIRDY: LSI ready interrupt
* @arg RCC_IT_LSERDY: LSE ready interrupt
* @arg RCC_IT_HSIRDY: HSI ready interrupt

384
lib/src/peripherals/stm32f0xx_rtc.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_rtc.c Executable file → Normal file
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_rtc.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the Real-Time Clock (RTC) peripheral:
* + Initialization
@ -241,8 +241,8 @@
#define RTC_RSF_MASK ((uint32_t)0xFFFFFF5F)
#define RTC_FLAGS_MASK ((uint32_t)(RTC_FLAG_TSOVF | RTC_FLAG_TSF | RTC_FLAG_ALRAF | \
RTC_FLAG_RSF | RTC_FLAG_INITS |RTC_FLAG_INITF | \
RTC_FLAG_TAMP1F | RTC_FLAG_TAMP2F | RTC_FLAG_TAMP3F | \
RTC_FLAG_RECALPF | RTC_FLAG_SHPF))
RTC_FLAG_TAMP1F | RTC_FLAG_TAMP2F | RTC_FLAG_RECALPF | \
RTC_FLAG_SHPF))
#define INITMODE_TIMEOUT ((uint32_t) 0x00004000)
#define SYNCHRO_TIMEOUT ((uint32_t) 0x00008000)
@ -432,7 +432,7 @@ void RTC_StructInit(RTC_InitTypeDef* RTC_InitStruct)
* @note Writing a wrong key reactivates the write protection.
* @note The protection mechanism is not affected by system reset.
* @param NewState: new state of the write protection.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RTC_WriteProtectionCmd(FunctionalState NewState)
@ -575,7 +575,7 @@ ErrorStatus RTC_WaitForSynchro(void)
/**
* @brief Enables or disables the RTC reference clock detection.
* @param NewState: new state of the RTC reference clock.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval An ErrorStatus enumeration value:
* - SUCCESS: RTC reference clock detection is enabled
* - ERROR: RTC reference clock detection is disabled
@ -673,9 +673,9 @@ void RTC_BypassShadowCmd(FunctionalState NewState)
/**
* @brief Set the RTC current time.
* @param RTC_Format: specifies the format of the entered parameters.
* This parameter can be one of the following values:
* @arg RTC_Format_BIN: Binary data format
* @arg RTC_Format_BCD: BCD data format
* This parameter can be one of the following values:
* @arg RTC_Format_BIN: Binary data format
* @arg RTC_Format_BCD: BCD data format
* @param RTC_TimeStruct: pointer to a RTC_TimeTypeDef structure that contains
* the time configuration information for the RTC.
* @retval An ErrorStatus enumeration value:
@ -798,9 +798,9 @@ void RTC_TimeStructInit(RTC_TimeTypeDef* RTC_TimeStruct)
/**
* @brief Get the RTC current Time.
* @param RTC_Format: specifies the format of the returned parameters.
* This parameter can be one of the following values:
* @arg RTC_Format_BIN: Binary data format
* @arg RTC_Format_BCD: BCD data format
* This parameter can be one of the following values:
* @arg RTC_Format_BIN: Binary data format
* @arg RTC_Format_BCD: BCD data format
* @param RTC_TimeStruct: pointer to a RTC_TimeTypeDef structure that will
* contain the returned current time configuration.
* @retval None
@ -854,9 +854,9 @@ uint32_t RTC_GetSubSecond(void)
/**
* @brief Set the RTC current date.
* @param RTC_Format: specifies the format of the entered parameters.
* This parameter can be one of the following values:
* @arg RTC_Format_BIN: Binary data format
* @arg RTC_Format_BCD: BCD data format
* This parameter can be one of the following values:
* @arg RTC_Format_BIN: Binary data format
* @arg RTC_Format_BCD: BCD data format
* @param RTC_DateStruct: pointer to a RTC_DateTypeDef structure that contains
* the date configuration information for the RTC.
* @retval An ErrorStatus enumeration value:
@ -966,9 +966,9 @@ void RTC_DateStructInit(RTC_DateTypeDef* RTC_DateStruct)
/**
* @brief Get the RTC current date.
* @param RTC_Format: specifies the format of the returned parameters.
* This parameter can be one of the following values:
* @arg RTC_Format_BIN: Binary data format
* @arg RTC_Format_BCD: BCD data format
* This parameter can be one of the following values:
* @arg RTC_Format_BIN: Binary data format
* @arg RTC_Format_BCD: BCD data format
* @param RTC_DateStruct: pointer to a RTC_DateTypeDef structure that will
* contain the returned current date configuration.
* @retval None
@ -1023,12 +1023,12 @@ void RTC_GetDate(uint32_t RTC_Format, RTC_DateTypeDef* RTC_DateStruct)
* @note The Alarm register can only be written when the corresponding Alarm
* is disabled (Use the RTC_AlarmCmd(DISABLE)).
* @param RTC_Format: specifies the format of the returned parameters.
* This parameter can be one of the following values:
* @arg RTC_Format_BIN: Binary data format
* @arg RTC_Format_BCD: BCD data format
* This parameter can be one of the following values:
* @arg RTC_Format_BIN: Binary data format
* @arg RTC_Format_BCD: BCD data format
* @param RTC_Alarm: specifies the alarm to be configured.
* This parameter can be one of the following values:
* @arg RTC_Alarm_A: to select Alarm A
* This parameter can be one of the following values:
* @arg RTC_Alarm_A: to select Alarm A
* @param RTC_AlarmStruct: pointer to a RTC_AlarmTypeDef structure that
* contains the alarm configuration parameters.
* @retval None
@ -1156,12 +1156,12 @@ void RTC_AlarmStructInit(RTC_AlarmTypeDef* RTC_AlarmStruct)
/**
* @brief Get the RTC Alarm value and masks.
* @param RTC_Format: specifies the format of the output parameters.
* This parameter can be one of the following values:
* @arg RTC_Format_BIN: Binary data format
* @arg RTC_Format_BCD: BCD data format
* This parameter can be one of the following values:
* @arg RTC_Format_BIN: Binary data format
* @arg RTC_Format_BCD: BCD data format
* @param RTC_Alarm: specifies the alarm to be read.
* This parameter can be one of the following values:
* @arg RTC_Alarm_A: to select Alarm A
* This parameter can be one of the following values:
* @arg RTC_Alarm_A: to select Alarm A
* @param RTC_AlarmStruct: pointer to a RTC_AlarmTypeDef structure that will
* contains the output alarm configuration values.
* @retval None
@ -1204,10 +1204,10 @@ void RTC_GetAlarm(uint32_t RTC_Format, uint32_t RTC_Alarm, RTC_AlarmTypeDef* RTC
/**
* @brief Enables or disables the specified RTC Alarm.
* @param RTC_Alarm: specifies the alarm to be configured.
* This parameter can be any combination of the following values:
* @arg RTC_Alarm_A: to select Alarm A
* This parameter can be any combination of the following values:
* @arg RTC_Alarm_A: to select Alarm A
* @param NewState: new state of the specified alarm.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval An ErrorStatus enumeration value:
* - SUCCESS: RTC Alarm is enabled/disabled
* - ERROR: RTC Alarm is not enabled/disabled
@ -1265,44 +1265,43 @@ ErrorStatus RTC_AlarmCmd(uint32_t RTC_Alarm, FunctionalState NewState)
* @brief Configure the RTC AlarmA/B Subseconds value and mask.
* @note This function is performed only when the Alarm is disabled.
* @param RTC_Alarm: specifies the alarm to be configured.
* This parameter can be one of the following values:
* @arg RTC_Alarm_A: to select Alarm A
* This parameter can be one of the following values:
* @arg RTC_Alarm_A: to select Alarm A
* @param RTC_AlarmSubSecondValue: specifies the Subseconds value.
* This parameter can be a value from 0 to 0x00007FFF.
* This parameter can be a value from 0 to 0x00007FFF.
* @param RTC_AlarmSubSecondMask: specifies the Subseconds Mask.
* This parameter can be any combination of the following values:
* @arg RTC_AlarmSubSecondMask_All: All Alarm SS fields are masked.
* There is no comparison on sub seconds for Alarm.
* @arg RTC_AlarmSubSecondMask_SS14_1: SS[14:1] are don't care in Alarm comparison.
* Only SS[0] is compared
* @arg RTC_AlarmSubSecondMask_SS14_2: SS[14:2] are don't care in Alarm comparison.
* Only SS[1:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_3: SS[14:3] are don't care in Alarm comparison.
* Only SS[2:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_4: SS[14:4] are don't care in Alarm comparison.
* Only SS[3:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_5: SS[14:5] are don't care in Alarm comparison.
* Only SS[4:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_6: SS[14:6] are don't care in Alarm comparison.
* Only SS[5:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_7: SS[14:7] are don't care in Alarm comparison.
* Only SS[6:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_8: SS[14:8] are don't care in Alarm comparison.
* Only SS[7:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_9: SS[14:9] are don't care in Alarm comparison.
* Only SS[8:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_10: SS[14:10] are don't care in Alarm comparison.
* Only SS[9:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_11: SS[14:11] are don't care in Alarm comparison.
* Only SS[10:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_12: SS[14:12] are don't care in Alarm comparison.
* Only SS[11:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_13: SS[14:13] are don't care in Alarm comparison.
* Only SS[12:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14: SS[14] is don't care in Alarm comparison.
* Only SS[13:0] are compared
* @arg RTC_AlarmSubSecondMask_None: SS[14:0] are compared and must match
* to activate alarm
* This parameter can be any combination of the following values:
* @arg RTC_AlarmSubSecondMask_All: All Alarm SS fields are masked.
* There is no comparison on sub seconds for Alarm.
* @arg RTC_AlarmSubSecondMask_SS14_1: SS[14:1] are don't care in Alarm comparison.
* Only SS[0] is compared
* @arg RTC_AlarmSubSecondMask_SS14_2: SS[14:2] are don't care in Alarm comparison.
* Only SS[1:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_3: SS[14:3] are don't care in Alarm comparison.
* Only SS[2:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_4: SS[14:4] are don't care in Alarm comparison.
* Only SS[3:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_5: SS[14:5] are don't care in Alarm comparison.
* Only SS[4:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_6: SS[14:6] are don't care in Alarm comparison.
* Only SS[5:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_7: SS[14:7] are don't care in Alarm comparison.
* Only SS[6:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_8: SS[14:8] are don't care in Alarm comparison.
* Only SS[7:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_9: SS[14:9] are don't care in Alarm comparison.
* Only SS[8:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_10: SS[14:10] are don't care in Alarm comparison.
* Only SS[9:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_11: SS[14:11] are don't care in Alarm comparison.
* Only SS[10:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_12: SS[14:12] are don't care in Alarm comparison.
* Only SS[11:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14_13: SS[14:13] are don't care in Alarm comparison.
* Only SS[12:0] are compared
* @arg RTC_AlarmSubSecondMask_SS14: SS[14] is don't care in Alarm comparison.
* Only SS[13:0] are compared
* @arg RTC_AlarmSubSecondMask_None: SS[14:0] are compared and must match to activate alarm
* @retval None
*/
void RTC_AlarmSubSecondConfig(uint32_t RTC_Alarm, uint32_t RTC_AlarmSubSecondValue, uint8_t RTC_AlarmSubSecondMask)
@ -1332,8 +1331,8 @@ void RTC_AlarmSubSecondConfig(uint32_t RTC_Alarm, uint32_t RTC_AlarmSubSecondVal
/**
* @brief Gets the RTC Alarm Subseconds value.
* @param RTC_Alarm: specifies the alarm to be read.
* This parameter can be one of the following values:
* @arg RTC_Alarm_A: to select Alarm A
* This parameter can be one of the following values:
* @arg RTC_Alarm_A: to select Alarm A
* @param None
* @retval RTC Alarm Subseconds value.
*/
@ -1369,14 +1368,14 @@ uint32_t RTC_GetAlarmSubSecond(uint32_t RTC_Alarm)
/**
* @brief Adds or substract one hour from the current time.
* @param RTC_DayLightSaveOperation: the value of hour adjustment.
* This parameter can be one of the following values:
* @arg RTC_DayLightSaving_SUB1H: Substract one hour (winter time)
* @arg RTC_DayLightSaving_ADD1H: Add one hour (summer time)
* This parameter can be one of the following values:
* @arg RTC_DayLightSaving_SUB1H: Substract one hour (winter time)
* @arg RTC_DayLightSaving_ADD1H: Add one hour (summer time)
* @param RTC_StoreOperation: Specifies the value to be written in the BCK bit
* in CR register to store the operation.
* This parameter can be one of the following values:
* @arg RTC_StoreOperation_Reset
* @arg RTC_StoreOperation_Set
* This parameter can be one of the following values:
* @arg RTC_StoreOperation_Reset: BCK Bit Reset
* @arg RTC_StoreOperation_Set: BCK Bit Set
* @retval None
*/
void RTC_DayLightSavingConfig(uint32_t RTC_DayLightSaving, uint32_t RTC_StoreOperation)
@ -1431,15 +1430,15 @@ uint32_t RTC_GetStoreOperation(void)
/**
* @brief Configures the RTC output source (AFO_ALARM).
* @param RTC_Output: Specifies which signal will be routed to the RTC output.
* This parameter can be one of the following values:
* @arg RTC_Output_Disable: No output selected
* @arg RTC_Output_AlarmA: signal of AlarmA mapped to output
* This parameter can be one of the following values:
* @arg RTC_Output_Disable: No output selected
* @arg RTC_Output_AlarmA: signal of AlarmA mapped to output
* @param RTC_OutputPolarity: Specifies the polarity of the output signal.
* This parameter can be one of the following:
* @arg RTC_OutputPolarity_High: The output pin is high when the
* ALRAF is high (depending on OSEL)
* @arg RTC_OutputPolarity_Low: The output pin is low when the
* ALRAF is high (depending on OSEL)
* This parameter can be one of the following:
* @arg RTC_OutputPolarity_High: The output pin is high when the
* ALRAF is high (depending on OSEL)
* @arg RTC_OutputPolarity_Low: The output pin is low when the
* ALRAF is high (depending on OSEL)
* @retval None
*/
void RTC_OutputConfig(uint32_t RTC_Output, uint32_t RTC_OutputPolarity)
@ -1479,10 +1478,9 @@ void RTC_OutputConfig(uint32_t RTC_Output, uint32_t RTC_OutputPolarity)
*/
/**
* @brief Enables or disables the RTC clock to be output through the relative
* pin.
* @brief Enables or disables the RTC clock to be output through the relative pin.
* @param NewState: new state of the digital calibration Output.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RTC_CalibOutputCmd(FunctionalState NewState)
@ -1511,10 +1509,10 @@ void RTC_CalibOutputCmd(FunctionalState NewState)
/**
* @brief Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
* @param RTC_CalibOutput : Select the Calibration output Selection .
* This parameter can be one of the following values:
* @arg RTC_CalibOutput_512Hz: A signal has a regular waveform at 512Hz.
* @arg RTC_CalibOutput_1Hz: A signal has a regular waveform at 1Hz.
* @param RTC_CalibOutput: Select the Calibration output Selection .
* This parameter can be one of the following values:
* @arg RTC_CalibOutput_512Hz: A signal has a regular waveform at 512Hz.
* @arg RTC_CalibOutput_1Hz: A signal has a regular waveform at 1Hz.
* @retval None
*/
void RTC_CalibOutputConfig(uint32_t RTC_CalibOutput)
@ -1539,16 +1537,16 @@ void RTC_CalibOutputConfig(uint32_t RTC_CalibOutput)
/**
* @brief Configures the Smooth Calibration Settings.
* @param RTC_SmoothCalibPeriod: Select the Smooth Calibration Period.
* This parameter can be can be one of the following values:
* @arg RTC_SmoothCalibPeriod_32sec: The smooth calibration periode is 32s.
* @arg RTC_SmoothCalibPeriod_16sec: The smooth calibration periode is 16s.
* @arg RTC_SmoothCalibPeriod_8sec: The smooth calibartion periode is 8s.
* This parameter can be can be one of the following values:
* @arg RTC_SmoothCalibPeriod_32sec: The smooth calibration periode is 32s.
* @arg RTC_SmoothCalibPeriod_16sec: The smooth calibration periode is 16s.
* @arg RTC_SmoothCalibPeriod_8sec: The smooth calibartion periode is 8s.
* @param RTC_SmoothCalibPlusPulses: Select to Set or reset the CALP bit.
* This parameter can be one of the following values:
* @arg RTC_SmoothCalibPlusPulses_Set: Add one RTCCLK puls every 2**11 pulses.
* @arg RTC_SmoothCalibPlusPulses_Reset: No RTCCLK pulses are added.
* This parameter can be one of the following values:
* @arg RTC_SmoothCalibPlusPulses_Set: Add one RTCCLK puls every 2**11 pulses.
* @arg RTC_SmoothCalibPlusPulses_Reset: No RTCCLK pulses are added.
* @param RTC_SmouthCalibMinusPulsesValue: Select the value of CALM[8:0] bits.
* This parameter can be one any value from 0 to 0x000001FF.
* This parameter can be one any value from 0 to 0x000001FF.
* @retval An ErrorStatus enumeration value:
* - SUCCESS: RTC Calib registers are configured
* - ERROR: RTC Calib registers are not configured
@ -1620,13 +1618,13 @@ ErrorStatus RTC_SmoothCalibConfig(uint32_t RTC_SmoothCalibPeriod,
* specified time stamp pin stimulating edge.
* @param RTC_TimeStampEdge: Specifies the pin edge on which the TimeStamp is
* activated.
* This parameter can be one of the following:
* @arg RTC_TimeStampEdge_Rising: the Time stamp event occurs on the rising
* edge of the related pin.
* @arg RTC_TimeStampEdge_Falling: the Time stamp event occurs on the
* falling edge of the related pin.
* This parameter can be one of the following:
* @arg RTC_TimeStampEdge_Rising: the Time stamp event occurs on the rising
* edge of the related pin.
* @arg RTC_TimeStampEdge_Falling: the Time stamp event occurs on the
* falling edge of the related pin.
* @param NewState: new state of the TimeStamp.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RTC_TimeStampCmd(uint32_t RTC_TimeStampEdge, FunctionalState NewState)
@ -1664,9 +1662,9 @@ void RTC_TimeStampCmd(uint32_t RTC_TimeStampEdge, FunctionalState NewState)
/**
* @brief Get the RTC TimeStamp value and masks.
* @param RTC_Format: specifies the format of the output parameters.
* This parameter can be one of the following values:
* @arg RTC_Format_BIN: Binary data format
* @arg RTC_Format_BCD: BCD data format
* This parameter can be one of the following values:
* @arg RTC_Format_BIN: Binary data format
* @arg RTC_Format_BCD: BCD data format
* @param RTC_StampTimeStruct: pointer to a RTC_TimeTypeDef structure that will
* contains the TimeStamp time values.
* @param RTC_StampDateStruct: pointer to a RTC_DateTypeDef structure that will
@ -1742,17 +1740,16 @@ uint32_t RTC_GetTimeStampSubSecond(void)
/**
* @brief Configures the select Tamper pin edge.
* @param RTC_Tamper: Selected tamper pin.
* This parameter can be any combination of the following values:
* @arg RTC_Tamper_1: Select Tamper 1.
* @arg RTC_Tamper_2: Select Tamper 2.
* @arg RTC_Tamper_3: Select Tamper 3.
* This parameter can be any combination of the following values:
* @arg RTC_Tamper_1: Select Tamper 1.
* @arg RTC_Tamper_2: Select Tamper 2.
* @param RTC_TamperTrigger: Specifies the trigger on the tamper pin that
* stimulates tamper event.
* This parameter can be one of the following values:
* @arg RTC_TamperTrigger_RisingEdge: Rising Edge of the tamper pin causes tamper event.
* @arg RTC_TamperTrigger_FallingEdge: Falling Edge of the tamper pin causes tamper event.
* @arg RTC_TamperTrigger_LowLevel: Low Level of the tamper pin causes tamper event.
* @arg RTC_TamperTrigger_HighLevel: High Level of the tamper pin causes tamper event.
* This parameter can be one of the following values:
* @arg RTC_TamperTrigger_RisingEdge: Rising Edge of the tamper pin causes tamper event.
* @arg RTC_TamperTrigger_FallingEdge: Falling Edge of the tamper pin causes tamper event.
* @arg RTC_TamperTrigger_LowLevel: Low Level of the tamper pin causes tamper event.
* @arg RTC_TamperTrigger_HighLevel: High Level of the tamper pin causes tamper event.
* @retval None
*/
void RTC_TamperTriggerConfig(uint32_t RTC_Tamper, uint32_t RTC_TamperTrigger)
@ -1776,10 +1773,9 @@ void RTC_TamperTriggerConfig(uint32_t RTC_Tamper, uint32_t RTC_TamperTrigger)
/**
* @brief Enables or Disables the Tamper detection.
* @param RTC_Tamper: Selected tamper pin.
* This parameter can be any combination of the following values:
* @arg RTC_Tamper_1: Select Tamper 1.
* @arg RTC_Tamper_2: Select Tamper 2.
* @arg RTC_Tamper_3: Select Tamper 3.
* This parameter can be any combination of the following values:
* @arg RTC_Tamper_1: Select Tamper 1.
* @arg RTC_Tamper_2: Select Tamper 2.
* @param NewState: new state of the tamper pin.
* This parameter can be: ENABLE or DISABLE.
* @retval None
@ -1805,14 +1801,14 @@ void RTC_TamperCmd(uint32_t RTC_Tamper, FunctionalState NewState)
/**
* @brief Configures the Tampers Filter.
* @param RTC_TamperFilter: Specifies the tampers filter.
* This parameter can be one of the following values:
* @arg RTC_TamperFilter_Disable: Tamper filter is disabled.
* @arg RTC_TamperFilter_2Sample: Tamper is activated after 2 consecutive
* samples at the active level
* @arg RTC_TamperFilter_4Sample: Tamper is activated after 4 consecutive
* samples at the active level
* @arg RTC_TamperFilter_8Sample: Tamper is activated after 8 consecutive
* samples at the active level
* This parameter can be one of the following values:
* @arg RTC_TamperFilter_Disable: Tamper filter is disabled.
* @arg RTC_TamperFilter_2Sample: Tamper is activated after 2 consecutive
* samples at the active level
* @arg RTC_TamperFilter_4Sample: Tamper is activated after 4 consecutive
* samples at the active level
* @arg RTC_TamperFilter_8Sample: Tamper is activated after 8 consecutive
* samples at the active level
* @retval None
*/
void RTC_TamperFilterConfig(uint32_t RTC_TamperFilter)
@ -1830,23 +1826,23 @@ void RTC_TamperFilterConfig(uint32_t RTC_TamperFilter)
/**
* @brief Configures the Tampers Sampling Frequency.
* @param RTC_TamperSamplingFreq: Specifies the tampers Sampling Frequency.
* This parameter can be one of the following values:
* @arg RTC_TamperSamplingFreq_RTCCLK_Div32768: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 32768
* @arg RTC_TamperSamplingFreq_RTCCLK_Div16384: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 16384
* @arg RTC_TamperSamplingFreq_RTCCLK_Div8192: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 8192
* @arg RTC_TamperSamplingFreq_RTCCLK_Div4096: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 4096
* @arg RTC_TamperSamplingFreq_RTCCLK_Div2048: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 2048
* @arg RTC_TamperSamplingFreq_RTCCLK_Div1024: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 1024
* @arg RTC_TamperSamplingFreq_RTCCLK_Div512: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 512
* @arg RTC_TamperSamplingFreq_RTCCLK_Div256: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 256
* This parameter can be one of the following values:
* @arg RTC_TamperSamplingFreq_RTCCLK_Div32768: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 32768
* @arg RTC_TamperSamplingFreq_RTCCLK_Div16384: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 16384
* @arg RTC_TamperSamplingFreq_RTCCLK_Div8192: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 8192
* @arg RTC_TamperSamplingFreq_RTCCLK_Div4096: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 4096
* @arg RTC_TamperSamplingFreq_RTCCLK_Div2048: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 2048
* @arg RTC_TamperSamplingFreq_RTCCLK_Div1024: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 1024
* @arg RTC_TamperSamplingFreq_RTCCLK_Div512: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 512
* @arg RTC_TamperSamplingFreq_RTCCLK_Div256: Each of the tamper inputs are sampled
* with a frequency = RTCCLK / 256
* @retval None
*/
void RTC_TamperSamplingFreqConfig(uint32_t RTC_TamperSamplingFreq)
@ -1865,11 +1861,11 @@ void RTC_TamperSamplingFreqConfig(uint32_t RTC_TamperSamplingFreq)
* @brief Configures the Tampers Pins input Precharge Duration.
* @param RTC_TamperPrechargeDuration: Specifies the Tampers Pins input
* Precharge Duration.
* This parameter can be one of the following values:
* @arg RTC_TamperPrechargeDuration_1RTCCLK: Tamper pins are pre-charged before sampling during 1 RTCCLK cycle
* @arg RTC_TamperPrechargeDuration_2RTCCLK: Tamper pins are pre-charged before sampling during 2 RTCCLK cycle
* @arg RTC_TamperPrechargeDuration_4RTCCLK: Tamper pins are pre-charged before sampling during 4 RTCCLK cycle
* @arg RTC_TamperPrechargeDuration_8RTCCLK: Tamper pins are pre-charged before sampling during 8 RTCCLK cycle
* This parameter can be one of the following values:
* @arg RTC_TamperPrechargeDuration_1RTCCLK: Tamper pins are pre-charged before sampling during 1 RTCCLK cycle
* @arg RTC_TamperPrechargeDuration_2RTCCLK: Tamper pins are pre-charged before sampling during 2 RTCCLK cycle
* @arg RTC_TamperPrechargeDuration_4RTCCLK: Tamper pins are pre-charged before sampling during 4 RTCCLK cycle
* @arg RTC_TamperPrechargeDuration_8RTCCLK: Tamper pins are pre-charged before sampling during 8 RTCCLK cycle
* @retval None
*/
void RTC_TamperPinsPrechargeDuration(uint32_t RTC_TamperPrechargeDuration)
@ -1912,7 +1908,7 @@ void RTC_TimeStampOnTamperDetectionCmd(FunctionalState NewState)
/**
* @brief Enables or Disables the Precharge of Tamper pin.
* @param NewState: new state of tamper pull up.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RTC_TamperPullUpCmd(FunctionalState NewState)
@ -1951,8 +1947,8 @@ void RTC_TamperPullUpCmd(FunctionalState NewState)
/**
* @brief Writes a data in a specified RTC Backup data register.
* @param RTC_BKP_DR: RTC Backup data Register number.
* This parameter can be: RTC_BKP_DRx where x can be from 0 to 4 to
* specify the register.
* This parameter can be: RTC_BKP_DRx where x can be from 0 to 4 to
* specify the register.
* @param Data: Data to be written in the specified RTC Backup data register.
* @retval None
*/
@ -1973,7 +1969,7 @@ void RTC_WriteBackupRegister(uint32_t RTC_BKP_DR, uint32_t Data)
/**
* @brief Reads data from the specified RTC Backup data Register.
* @param RTC_BKP_DR: RTC Backup data Register number.
* This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to
* This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to
* specify the register.
* @retval None
*/
@ -2010,10 +2006,10 @@ uint32_t RTC_ReadBackupRegister(uint32_t RTC_BKP_DR)
/**
* @brief Configures the RTC Output Pin mode.
* @param RTC_OutputType: specifies the RTC Output (PC13) pin mode.
* This parameter can be one of the following values:
* @arg RTC_OutputType_OpenDrain: RTC Output (PC13) is configured in
* This parameter can be one of the following values:
* @arg RTC_OutputType_OpenDrain: RTC Output (PC13) is configured in
* Open Drain mode.
* @arg RTC_OutputType_PushPull: RTC Output (PC13) is configured in
* @arg RTC_OutputType_PushPull: RTC Output (PC13) is configured in
* Push Pull mode.
* @retval None
*/
@ -2046,9 +2042,9 @@ void RTC_OutputTypeConfig(uint32_t RTC_OutputType)
* @brief Configures the Synchronization Shift Control Settings.
* @note When REFCKON is set, firmware must not write to Shift control register
* @param RTC_ShiftAdd1S: Select to add or not 1 second to the time Calendar.
* This parameter can be one of the following values :
* @arg RTC_ShiftAdd1S_Set: Add one second to the clock calendar.
* @arg RTC_ShiftAdd1S_Reset: No effect.
* This parameter can be one of the following values :
* @arg RTC_ShiftAdd1S_Set: Add one second to the clock calendar.
* @arg RTC_ShiftAdd1S_Reset: No effect.
* @param RTC_ShiftSubFS: Select the number of Second Fractions to Substitute.
* This parameter can be one any value from 0 to 0x7FFF.
* @retval An ErrorStatus enumeration value:
@ -2156,12 +2152,12 @@ ErrorStatus RTC_SynchroShiftConfig(uint32_t RTC_ShiftAdd1S, uint32_t RTC_ShiftSu
/**
* @brief Enables or disables the specified RTC interrupts.
* @param RTC_IT: specifies the RTC interrupt sources to be enabled or disabled.
* This parameter can be any combination of the following values:
* @arg RTC_IT_TS: Time Stamp interrupt mask
* @arg RTC_IT_ALRA: Alarm A interrupt mask
* @arg RTC_IT_TAMP: Tamper event interrupt mask
* This parameter can be any combination of the following values:
* @arg RTC_IT_TS: Time Stamp interrupt mask
* @arg RTC_IT_ALRA: Alarm A interrupt mask
* @arg RTC_IT_TAMP: Tamper event interrupt mask
* @param NewState: new state of the specified RTC interrupts.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void RTC_ITConfig(uint32_t RTC_IT, FunctionalState NewState)
@ -2195,17 +2191,16 @@ void RTC_ITConfig(uint32_t RTC_IT, FunctionalState NewState)
/**
* @brief Checks whether the specified RTC flag is set or not.
* @param RTC_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* @arg RTC_FLAG_RECALPF: RECALPF event flag
* @arg RTC_FLAG_TAMP3F: Tamper 3 event flag
* @arg RTC_FLAG_TAMP2F: Tamper 2 event flag
* @arg RTC_FLAG_TAMP1F: Tamper 1 event flag
* @arg RTC_FLAG_TSOVF: Time Stamp OverFlow flag
* @arg RTC_FLAG_TSF: Time Stamp event flag
* @arg RTC_FLAG_ALRAF: Alarm A flag
* @arg RTC_FLAG_INITF: Initialization mode flag
* @arg RTC_FLAG_RSF: Registers Synchronized flag
* @arg RTC_FLAG_INITS: Registers Configured flag
* This parameter can be one of the following values:
* @arg RTC_FLAG_RECALPF: RECALPF event flag
* @arg RTC_FLAG_TAMP2F: Tamper 2 event flag
* @arg RTC_FLAG_TAMP1F: Tamper 1 event flag
* @arg RTC_FLAG_TSOVF: Time Stamp OverFlow flag
* @arg RTC_FLAG_TSF: Time Stamp event flag
* @arg RTC_FLAG_ALRAF: Alarm A flag
* @arg RTC_FLAG_INITF: Initialization mode flag
* @arg RTC_FLAG_RSF: Registers Synchronized flag
* @arg RTC_FLAG_INITS: Registers Configured flag
* @retval The new state of RTC_FLAG (SET or RESET).
*/
FlagStatus RTC_GetFlagStatus(uint32_t RTC_FLAG)
@ -2234,14 +2229,13 @@ FlagStatus RTC_GetFlagStatus(uint32_t RTC_FLAG)
/**
* @brief Clears the RTC's pending flags.
* @param RTC_FLAG: specifies the RTC flag to clear.
* This parameter can be any combination of the following values:
* @arg RTC_FLAG_TAMP3F: Tamper 3 event flag
* @arg RTC_FLAG_TAMP2F: Tamper 2 event flag
* @arg RTC_FLAG_TAMP1F: Tamper 1 event flag
* @arg RTC_FLAG_TSOVF: Time Stamp Overflow flag
* @arg RTC_FLAG_TSF: Time Stamp event flag
* @arg RTC_FLAG_ALRAF: Alarm A flag
* @arg RTC_FLAG_RSF: Registers Synchronized flag
* This parameter can be any combination of the following values:
* @arg RTC_FLAG_TAMP2F: Tamper 2 event flag
* @arg RTC_FLAG_TAMP1F: Tamper 1 event flag
* @arg RTC_FLAG_TSOVF: Time Stamp Overflow flag
* @arg RTC_FLAG_TSF: Time Stamp event flag
* @arg RTC_FLAG_ALRAF: Alarm A flag
* @arg RTC_FLAG_RSF: Registers Synchronized flag
* @retval None
*/
void RTC_ClearFlag(uint32_t RTC_FLAG)
@ -2256,12 +2250,11 @@ void RTC_ClearFlag(uint32_t RTC_FLAG)
/**
* @brief Checks whether the specified RTC interrupt has occurred or not.
* @param RTC_IT: specifies the RTC interrupt source to check.
* This parameter can be one of the following values:
* @arg RTC_IT_TS: Time Stamp interrupt
* @arg RTC_IT_ALRA: Alarm A interrupt
* @arg RTC_IT_TAMP1: Tamper1 event interrupt
* @arg RTC_IT_TAMP2: Tamper2 event interrupt
* @arg RTC_IT_TAMP3: Tamper3 event interrupt
* This parameter can be one of the following values:
* @arg RTC_IT_TS: Time Stamp interrupt
* @arg RTC_IT_ALRA: Alarm A interrupt
* @arg RTC_IT_TAMP1: Tamper1 event interrupt
* @arg RTC_IT_TAMP2: Tamper2 event interrupt
* @retval The new state of RTC_IT (SET or RESET).
*/
ITStatus RTC_GetITStatus(uint32_t RTC_IT)
@ -2296,12 +2289,11 @@ ITStatus RTC_GetITStatus(uint32_t RTC_IT)
/**
* @brief Clears the RTC's interrupt pending bits.
* @param RTC_IT: specifies the RTC interrupt pending bit to clear.
* This parameter can be any combination of the following values:
* @arg RTC_IT_TS: Time Stamp interrupt
* @arg RTC_IT_ALRA: Alarm A interrupt
* @arg RTC_IT_TAMP1: Tamper1 event interrupt
* @arg RTC_IT_TAMP2: Tamper2 event interrupt
* @arg RTC_IT_TAMP3: Tamper3 event interrupt
* This parameter can be any combination of the following values:
* @arg RTC_IT_TS: Time Stamp interrupt
* @arg RTC_IT_ALRA: Alarm A interrupt
* @arg RTC_IT_TAMP1: Tamper1 event interrupt
* @arg RTC_IT_TAMP2: Tamper2 event interrupt
* @retval None
*/
void RTC_ClearITPendingBit(uint32_t RTC_IT)

249
lib/src/peripherals/stm32f0xx_spi.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_spi.c Executable file → Normal file
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_spi.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the Serial peripheral interface (SPI):
* + Initialization and Configuration
@ -288,7 +288,7 @@ void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
/**
* @brief Fills each I2S_InitStruct member with its default value.
* @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure which will be initialized.
* @param I2S_InitStruct: pointer to a I2S_InitTypeDef structure which will be initialized.
* @retval None
*/
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
@ -315,16 +315,15 @@ void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
/**
* @brief Initializes the SPIx peripheral according to the specified
* parameters in the I2S_InitStruct.
* @param SPIx: where x can be 1 to select the SPI peripheral.
* parameters in the I2S_InitStruct.
* @param SPIx: where x can be 1 to select the SPI peripheral (configured in I2S mode).
* @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
* contains the configuration information for the specified SPI peripheral
* configured in I2S mode.
* @note
* The function calculates the optimal prescaler needed to obtain the most
* accurate audio frequency (depending on the I2S clock source, the PLL values
* and the product configuration). But in case the prescaler value is greater
* than 511, the default value (0x02) will be configured instead.
* contains the configuration information for the specified SPI peripheral
* configured in I2S mode.
* @note This function calculates the optimal prescaler needed to obtain the most
* accurate audio frequency (depending on the I2S clock source, the PLL values
* and the product configuration). But in case the prescaler value is greater
* than 511, the default value (0x02) will be configured instead.
* @retval None
*/
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
@ -427,7 +426,7 @@ void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
* @brief Enables or disables the specified SPI peripheral.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @param NewState: new state of the SPIx peripheral.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
@ -450,14 +449,16 @@ void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
/**
* @brief Enables or disables the TI Mode.
* @note This function can be called only after the SPI_Init() function has
* been called.
* @note When TI mode is selected, the control bits SSM, SSI, CPOL and CPHA
* are not taken into consideration and are configured by hardware
* respectively to the TI mode requirements.
*
* @note This function can be called only after the SPI_Init() function has
* been called.
* @note When TI mode is selected, the control bits SSM, SSI, CPOL and CPHA
* are not taken into consideration and are configured by hardware
* respectively to the TI mode requirements.
*
* @param SPIx: where x can be 1 to select the SPI peripheral.
* @param NewState: new state of the selected SPI TI communication mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
@ -482,7 +483,7 @@ void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
* @brief Enables or disables the specified SPI peripheral (in I2S mode).
* @param SPIx: where x can be 1 to select the SPI peripheral.
* @param NewState: new state of the SPIx peripheral.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
@ -506,20 +507,20 @@ void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
* @brief Configures the data size for the selected SPI.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @param SPI_DataSize: specifies the SPI data size.
* For the SPIx peripheral this parameter can be one of the following values:
* @arg SPI_DataSize_4b: Set data size to 4 bits
* @arg SPI_DataSize_5b: Set data size to 5 bits
* @arg SPI_DataSize_6b: Set data size to 6 bits
* @arg SPI_DataSize_7b: Set data size to 7 bits
* @arg SPI_DataSize_8b: Set data size to 8 bits
* @arg SPI_DataSize_9b: Set data size to 9 bits
* @arg SPI_DataSize_10b: Set data size to 10 bits
* @arg SPI_DataSize_11b: Set data size to 11 bits
* @arg SPI_DataSize_12b: Set data size to 12 bits
* @arg SPI_DataSize_13b: Set data size to 13 bits
* @arg SPI_DataSize_14b: Set data size to 14 bits
* @arg SPI_DataSize_15b: Set data size to 15 bits
* @arg SPI_DataSize_16b: Set data size to 16 bits
* For the SPIx peripheral this parameter can be one of the following values:
* @arg SPI_DataSize_4b: Set data size to 4 bits
* @arg SPI_DataSize_5b: Set data size to 5 bits
* @arg SPI_DataSize_6b: Set data size to 6 bits
* @arg SPI_DataSize_7b: Set data size to 7 bits
* @arg SPI_DataSize_8b: Set data size to 8 bits
* @arg SPI_DataSize_9b: Set data size to 9 bits
* @arg SPI_DataSize_10b: Set data size to 10 bits
* @arg SPI_DataSize_11b: Set data size to 11 bits
* @arg SPI_DataSize_12b: Set data size to 12 bits
* @arg SPI_DataSize_13b: Set data size to 13 bits
* @arg SPI_DataSize_14b: Set data size to 14 bits
* @arg SPI_DataSize_15b: Set data size to 15 bits
* @arg SPI_DataSize_16b: Set data size to 16 bits
* @retval None
*/
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
@ -542,11 +543,11 @@ void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
* @brief Configures the FIFO reception threshold for the selected SPI.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @param SPI_RxFIFOThreshold: specifies the FIFO reception threshold.
* This parameter can be one of the following values:
* @arg SPI_RxFIFOThreshold_HF: RXNE event is generated if the FIFO
* level is greater or equal to 1/2.
* @arg SPI_RxFIFOThreshold_QF: RXNE event is generated if the FIFO
* level is greater or equal to 1/4.
* This parameter can be one of the following values:
* @arg SPI_RxFIFOThreshold_HF: RXNE event is generated if the FIFO
* level is greater or equal to 1/2.
* @arg SPI_RxFIFOThreshold_QF: RXNE event is generated if the FIFO
* level is greater or equal to 1/4.
* @retval None
*/
void SPI_RxFIFOThresholdConfig(SPI_TypeDef* SPIx, uint16_t SPI_RxFIFOThreshold)
@ -566,9 +567,9 @@ void SPI_RxFIFOThresholdConfig(SPI_TypeDef* SPIx, uint16_t SPI_RxFIFOThreshold)
* @brief Selects the data transfer direction in bidirectional mode for the specified SPI.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @param SPI_Direction: specifies the data transfer direction in bidirectional mode.
* This parameter can be one of the following values:
* @arg SPI_Direction_Tx: Selects Tx transmission direction
* @arg SPI_Direction_Rx: Selects Rx receive direction
* This parameter can be one of the following values:
* @arg SPI_Direction_Tx: Selects Tx transmission direction
* @arg SPI_Direction_Rx: Selects Rx receive direction
* @retval None
*/
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
@ -590,13 +591,13 @@ void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
/**
* @brief Configures internally by software the NSS pin for the selected SPI.
* @note - This function can be called only after the SPI_Init() function has
* been called.
* @note This function can be called only after the SPI_Init() function has
* been called.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
* This parameter can be one of the following values:
* @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
* @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
* This parameter can be one of the following values:
* @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
* @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
* @retval None
*/
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
@ -619,11 +620,11 @@ void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSo
/**
* @brief Enables or disables the SS output for the selected SPI.
* @note - This function can be called only after the SPI_Init() function has
* been called and the NSS hardware management mode is selected.
* @note This function can be called only after the SPI_Init() function has
* been called and the NSS hardware management mode is selected.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @param NewState: new state of the SPIx SS output.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
@ -645,14 +646,14 @@ void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
/**
* @brief Enables or disables the NSS pulse management mode.
* @note This function can be called only after the SPI_Init() function has
* been called.
* @note When TI mode is selected, the control bits NSSP is not taken into
* consideration and are configured by hardware respectively to the
* TI mode requirements.
* @note This function can be called only after the SPI_Init() function has
* been called.
* @note When TI mode is selected, the control bits NSSP is not taken into
* consideration and are configured by hardware respectively to the
* TI mode requirements.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @param NewState: new state of the NSS pulse management mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void SPI_NSSPulseModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
@ -725,7 +726,7 @@ void SPI_SendData8(SPI_TypeDef* SPIx, uint8_t Data)
/**
* @brief Transmits a Data through the SPIx/I2Sx peripheral.
* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
* the SPI peripheral.
* the SPI peripheral.
* @param Data: Data to be transmitted.
* @retval None
*/
@ -755,7 +756,7 @@ uint8_t SPI_ReceiveData8(SPI_TypeDef* SPIx)
/**
* @brief Returns the most recent received data by the SPIx peripheral.
* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
* the SPI peripheral.
* the SPI peripheral.
* @retval The value of the received data.
*/
uint16_t SPI_I2S_ReceiveData16(SPI_TypeDef* SPIx)
@ -830,13 +831,13 @@ uint16_t SPI_I2S_ReceiveData16(SPI_TypeDef* SPIx)
/**
* @brief Configures the CRC calculation length for the selected SPI.
* @note - This function can be called only after the SPI_Init() function has
* been called.
* @note This function can be called only after the SPI_Init() function has
* been called.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @param SPI_CRCLength: specifies the SPI CRC calculation length.
* This parameter can be one of the following values:
* @arg SPI_CRCLength_8b: Set CRC Calculation to 8 bits
* @arg SPI_CRCLength_16b: Set CRC Calculation to 16 bits
* This parameter can be one of the following values:
* @arg SPI_CRCLength_8b: Set CRC Calculation to 8 bits
* @arg SPI_CRCLength_16b: Set CRC Calculation to 16 bits
* @retval None
*/
void SPI_CRCLengthConfig(SPI_TypeDef* SPIx, uint16_t SPI_CRCLength)
@ -854,11 +855,11 @@ void SPI_CRCLengthConfig(SPI_TypeDef* SPIx, uint16_t SPI_CRCLength)
/**
* @brief Enables or disables the CRC value calculation of the transferred bytes.
* @note - This function can be called only after the SPI_Init() function has
* been called.
* @note This function can be called only after the SPI_Init() function has
* been called.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @param NewState: new state of the SPIx CRC value calculation.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
@ -897,9 +898,9 @@ void SPI_TransmitCRC(SPI_TypeDef* SPIx)
* @brief Returns the transmit or the receive CRC register value for the specified SPI.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @param SPI_CRC: specifies the CRC register to be read.
* This parameter can be one of the following values:
* @arg SPI_CRC_Tx: Selects Tx CRC register
* @arg SPI_CRC_Rx: Selects Rx CRC register
* This parameter can be one of the following values:
* @arg SPI_CRC_Tx: Selects Tx CRC register
* @arg SPI_CRC_Rx: Selects Rx CRC register
* @retval The selected CRC register value..
*/
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
@ -957,13 +958,13 @@ uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
/**
* @brief Enables or disables the SPIx/I2Sx DMA interface.
* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
* the SPI peripheral.
* the SPI peripheral.
* @param SPI_I2S_DMAReq: specifies the SPI DMA transfer request to be enabled or disabled.
* This parameter can be any combination of the following values:
* @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
* @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
* This parameter can be any combination of the following values:
* @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
* @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
* @param NewState: new state of the selected SPI DMA transfer request.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
@ -988,19 +989,19 @@ void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState
/**
* @brief Configures the number of data to transfer type(Even/Odd) for the DMA
* last transfers and for the selected SPI.
* @note - This function have a meaning only if DMA mode is selected and if
* @note This function have a meaning only if DMA mode is selected and if
* the packing mode is used (data length <= 8 and DMA transfer size halfword)
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @param SPI_LastDMATransfer: specifies the SPI last DMA transfers state.
* This parameter can be one of the following values:
* @arg SPI_LastDMATransfer_TxEvenRxEven: Number of data for transmission Even
* and number of data for reception Even.
* @arg SPI_LastDMATransfer_TxOddRxEven: Number of data for transmission Odd
* and number of data for reception Even.
* @arg SPI_LastDMATransfer_TxEvenRxOdd: Number of data for transmission Even
* and number of data for reception Odd.
* @arg SPI_LastDMATransfer_TxOddRxOdd: Number of data for transmission Odd
* and number of data for reception Odd.
* This parameter can be one of the following values:
* @arg SPI_LastDMATransfer_TxEvenRxEven: Number of data for transmission Even
* and number of data for reception Even.
* @arg SPI_LastDMATransfer_TxOddRxEven: Number of data for transmission Odd
* and number of data for reception Even.
* @arg SPI_LastDMATransfer_TxEvenRxOdd: Number of data for transmission Even
* and number of data for reception Odd.
* @arg SPI_LastDMATransfer_TxOddRxOdd: Number of data for transmission Odd
* and number of data for reception Odd.
* @retval None
*/
void SPI_LastDMATransferCmd(SPI_TypeDef* SPIx, uint16_t SPI_LastDMATransfer)
@ -1098,14 +1099,14 @@ void SPI_LastDMATransferCmd(SPI_TypeDef* SPIx, uint16_t SPI_LastDMATransfer)
/**
* @brief Enables or disables the specified SPI/I2S interrupts.
* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
* the SPI peripheral.
* the SPI peripheral.
* @param SPI_I2S_IT: specifies the SPI interrupt source to be enabled or disabled.
* This parameter can be one of the following values:
* @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
* @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
* @arg SPI_I2S_IT_ERR: Error interrupt mask
* This parameter can be one of the following values:
* @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
* @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
* @arg SPI_I2S_IT_ERR: Error interrupt mask
* @param NewState: new state of the specified SPI interrupt.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
@ -1139,10 +1140,10 @@ void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState New
* @brief Returns the current SPIx Transmission FIFO filled level.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @retval The Transmission FIFO filling state.
* - SPI_TransmissionFIFOStatus_Empty: when FIFO is empty
* - SPI_TransmissionFIFOStatus_1QuarterFull: if more than 1 quarter-full.
* - SPI_TransmissionFIFOStatus_HalfFull: if more than 1 half-full.
* - SPI_TransmissionFIFOStatus_Full: when FIFO is full.
* - SPI_TransmissionFIFOStatus_Empty: when FIFO is empty
* - SPI_TransmissionFIFOStatus_1QuarterFull: if more than 1 quarter-full.
* - SPI_TransmissionFIFOStatus_HalfFull: if more than 1 half-full.
* - SPI_TransmissionFIFOStatus_Full: when FIFO is full.
*/
uint16_t SPI_GetTransmissionFIFOStatus(SPI_TypeDef* SPIx)
{
@ -1154,10 +1155,10 @@ uint16_t SPI_GetTransmissionFIFOStatus(SPI_TypeDef* SPIx)
* @brief Returns the current SPIx Reception FIFO filled level.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @retval The Reception FIFO filling state.
* - SPI_ReceptionFIFOStatus_Empty: when FIFO is empty
* - SPI_ReceptionFIFOStatus_1QuarterFull: if more than 1 quarter-full.
* - SPI_ReceptionFIFOStatus_HalfFull: if more than 1 half-full.
* - SPI_ReceptionFIFOStatus_Full: when FIFO is full.
* - SPI_ReceptionFIFOStatus_Empty: when FIFO is empty
* - SPI_ReceptionFIFOStatus_1QuarterFull: if more than 1 quarter-full.
* - SPI_ReceptionFIFOStatus_HalfFull: if more than 1 half-full.
* - SPI_ReceptionFIFOStatus_Full: when FIFO is full.
*/
uint16_t SPI_GetReceptionFIFOStatus(SPI_TypeDef* SPIx)
{
@ -1168,18 +1169,18 @@ uint16_t SPI_GetReceptionFIFOStatus(SPI_TypeDef* SPIx)
/**
* @brief Checks whether the specified SPI flag is set or not.
* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
* the SPI peripheral.
* the SPI peripheral.
* @param SPI_I2S_FLAG: specifies the SPI flag to check.
* This parameter can be one of the following values:
* @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
* @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
* @arg SPI_I2S_FLAG_BSY: Busy flag.
* @arg SPI_I2S_FLAG_OVR: Overrun flag.
* @arg SPI_I2S_FLAG_MODF: Mode Fault flag.
* @arg SPI_I2S_FLAG_CRCERR: CRC Error flag.
* @arg SPI_I2S_FLAG_FRE: TI frame format error flag.
* @arg I2S_FLAG_UDR: Underrun Error flag.
* @arg I2S_FLAG_CHSIDE: Channel Side flag.
* This parameter can be one of the following values:
* @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
* @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
* @arg SPI_I2S_FLAG_BSY: Busy flag.
* @arg SPI_I2S_FLAG_OVR: Overrun flag.
* @arg SPI_FLAG_MODF: Mode Fault flag.
* @arg SPI_FLAG_CRCERR: CRC Error flag.
* @arg SPI_I2S_FLAG_FRE: TI frame format error flag.
* @arg I2S_FLAG_UDR: Underrun Error flag.
* @arg I2S_FLAG_CHSIDE: Channel Side flag.
* @retval The new state of SPI_I2S_FLAG (SET or RESET).
*/
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
@ -1208,13 +1209,13 @@ FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
* @brief Clears the SPIx CRC Error (CRCERR) flag.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @param SPI_I2S_FLAG: specifies the SPI flag to clear.
* This function clears only CRCERR flag.
* @note OVR (OverRun error) flag is cleared by software sequence: a read
* operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by
* a read operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
* @note MODF (Mode Fault) flag is cleared by software sequence: a read/write
* operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by
* a write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
* This function clears only CRCERR flag.
* @note OVR (OverRun error) flag is cleared by software sequence: a read
* operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by
* a read operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
* @note MODF (Mode Fault) flag is cleared by software sequence: a read/write
* operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by
* a write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
* @retval None
*/
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
@ -1230,15 +1231,15 @@ void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
/**
* @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
* the SPI peripheral.
* the SPI peripheral.
* @param SPI_I2S_IT: specifies the SPI interrupt source to check.
* This parameter can be one of the following values:
* @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
* @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
* @arg SPI_IT_MODF: Mode Fault interrupt.
* @arg SPI_I2S_IT_OVR: Overrun interrupt.
* @arg I2S_IT_UDR: Underrun interrupt.
* @arg SPI_I2S_IT_FRE: Format Error interrupt.
* This parameter can be one of the following values:
* @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
* @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
* @arg SPI_IT_MODF: Mode Fault interrupt.
* @arg SPI_I2S_IT_OVR: Overrun interrupt.
* @arg I2S_IT_UDR: Underrun interrupt.
* @arg SPI_I2S_IT_FRE: Format Error interrupt.
* @retval The new state of SPI_I2S_IT (SET or RESET).
*/
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)

71
lib/src/peripherals/stm32f0xx_syscfg.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_syscfg.c Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_syscfg.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the SYSCFG peripheral:
* + Remapping the memory mapped at 0x00000000
@ -84,10 +84,10 @@
* @param None
* @retval None
* @note MEM_MODE bits are not affected by APB reset.
* MEM_MODE bits took the value from the user option bytes.
* @note MEM_MODE bits took the value from the user option bytes.
* @note CFGR2 register is not affected by APB reset.
* CLABBB configuration bits are locked when set.
* To unlock the configuration, perform a system reset.
* @note CLABBB configuration bits are locked when set.
* @note To unlock the configuration, perform a system reset.
*/
void SYSCFG_DeInit(void)
{
@ -105,10 +105,10 @@ void SYSCFG_DeInit(void)
/**
* @brief Configures the memory mapping at address 0x00000000.
* @param SYSCFG_MemoryRemap: selects the memory remapping.
* This parameter can be one of the following values:
* @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000
* @arg SYSCFG_MemoryRemap_SystemMemory: System Flash memory mapped at 0x00000000
* @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM mapped at 0x00000000
* This parameter can be one of the following values:
* @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000
* @arg SYSCFG_MemoryRemap_SystemMemory: System Flash memory mapped at 0x00000000
* @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM mapped at 0x00000000
* @retval None
*/
void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap)
@ -134,22 +134,21 @@ void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap)
/**
* @brief Configure the DMA channels remapping.
* @param SYSCFG_DMARemap: selects the DMA channels remap.
* This parameter can be one of the following values:
* @arg SYSCFG_DMARemap_TIM17: Remap TIM17 DMA requests from channel1 to channel2
* @arg SYSCFG_DMARemap_TIM16: Remap TIM16 DMA requests from channel3 to channel4
* @arg SYSCFG_DMARemap_USART1Rx: Remap USART1 Rx DMA requests from channel3 to channel5
* @arg SYSCFG_DMARemap_USART1Tx: Remap USART1 Tx DMA requests from channel2 to channel4
* @arg SYSCFG_DMARemap_ADC1: Remap ADC1 DMA requests from channel1 to channel2
* This parameter can be one of the following values:
* @arg SYSCFG_DMARemap_TIM17: Remap TIM17 DMA requests from channel1 to channel2
* @arg SYSCFG_DMARemap_TIM16: Remap TIM16 DMA requests from channel3 to channel4
* @arg SYSCFG_DMARemap_USART1Rx: Remap USART1 Rx DMA requests from channel3 to channel5
* @arg SYSCFG_DMARemap_USART1Tx: Remap USART1 Tx DMA requests from channel2 to channel4
* @arg SYSCFG_DMARemap_ADC1: Remap ADC1 DMA requests from channel1 to channel2
* @param NewState: new state of the DMA channel remapping.
* This parameter can be: ENABLE or DISABLE.
* @note When enabled, DMA channel of the selected peripheral is remapped
* @note When disabled, Default DMA channel is mapped to the selected peripheral
* @note
* By default TIM17 DMA requests is mapped to channel 1
* use SYSCFG_DMAChannelRemapConfig(SYSCFG_DMARemap_TIM17, Enable)
* to remap TIM17 DMA requests to channel 2
* use SYSCFG_DMAChannelRemapConfig(SYSCFG_DMARemap_TIM17, Disable)
* to map TIM17 DMA requests to channel 1 (default mapping)
* @note By default TIM17 DMA requests is mapped to channel 1,
* use SYSCFG_DMAChannelRemapConfig(SYSCFG_DMARemap_TIM17, Enable) to remap
* TIM17 DMA requests to channel 2 and use
* SYSCFG_DMAChannelRemapConfig(SYSCFG_DMARemap_TIM17, Disable) to map
* TIM17 DMA requests to channel 1 (default mapping)
* @retval None
*/
void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState)
@ -173,11 +172,11 @@ void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewS
/**
* @brief Configure the I2C fast mode plus driving capability.
* @param SYSCFG_I2CFastModePlus: selects the pin.
* This parameter can be one of the following values:
* @arg SYSCFG_I2CFastModePlus_PB6: Configure fast mode plus driving capability for PB6
* @arg SYSCFG_I2CFastModePlus_PB7: Configure fast mode plus driving capability for PB7
* @arg SYSCFG_I2CFastModePlus_PB8: Configure fast mode plus driving capability for PB8
* @arg SYSCFG_I2CFastModePlus_PB9: Configure fast mode plus driving capability for PB9
* This parameter can be one of the following values:
* @arg SYSCFG_I2CFastModePlus_PB6: Configure fast mode plus driving capability for PB6
* @arg SYSCFG_I2CFastModePlus_PB7: Configure fast mode plus driving capability for PB7
* @arg SYSCFG_I2CFastModePlus_PB8: Configure fast mode plus driving capability for PB8
* @arg SYSCFG_I2CFastModePlus_PB9: Configure fast mode plus driving capability for PB9
* @param NewState: new state of the DMA channel remapping.
* This parameter can be: ENABLE or DISABLE.
* @note ENABLE: Enable fast mode plus driving capability for selected pin
@ -204,8 +203,8 @@ void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalSta
/**
* @brief Selects the GPIO pin used as EXTI Line.
* @param EXTI_PortSourceGPIOx : selects the GPIO port to be used as source
* for EXTI lines where x can be (A, B, C, D or F).
* @param EXTI_PortSourceGPIOx: selects the GPIO port to be used as source
* for EXTI lines where x can be (A, B, C, D or F).
* @param EXTI_PinSourcex: specifies the EXTI line to be configured.
* This parameter can be EXTI_PinSourcex where x can be (0..15)
* @retval None
@ -228,10 +227,10 @@ void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex
* @note The selected configuration is locked and can be unlocked by system reset
* @param SYSCFG_Break: selects the configuration to be connected to break
* input of TIM1
* This parameter can be any combination of the following values:
* @arg SYSCFG_Break_PVD: Connects the PVD event to the Break Input of TIM1.
* @arg SYSCFG_Break_SRAMParity: Connects the SRAM_PARITY error signal to the Break Input of TIM1 .
* @arg SYSCFG_Break_Lockup: Connects Lockup output of CortexM0 to the break input of TIM1.
* This parameter can be any combination of the following values:
* @arg SYSCFG_Break_PVD: Connects the PVD event to the Break Input of TIM1.
* @arg SYSCFG_Break_SRAMParity: Connects the SRAM_PARITY error signal to the Break Input of TIM1 .
* @arg SYSCFG_Break_Lockup: Connects Lockup output of CortexM0 to the break input of TIM1.
* @retval None
*/
void SYSCFG_BreakConfig(uint32_t SYSCFG_Break)
@ -245,8 +244,8 @@ void SYSCFG_BreakConfig(uint32_t SYSCFG_Break)
/**
* @brief Checks whether the specified SYSCFG flag is set or not.
* @param SYSCFG_Flag: specifies the SYSCFG flag to check.
* This parameter can be one of the following values:
* @arg SYSCFG_FLAG_PE: SRAM parity error flag.
* This parameter can be one of the following values:
* @arg SYSCFG_FLAG_PE: SRAM parity error flag.
* @retval The new state of SYSCFG_Flag (SET or RESET).
*/
FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag)
@ -274,8 +273,8 @@ FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag)
/**
* @brief Clear the selected SYSCFG flag.
* @param SYSCFG_Flag: selects the flag to be cleared.
* This parameter can be any combination of the following values:
* @arg SYSCFG_FLAG_PE: SRAM parity error flag.
* This parameter can be any combination of the following values:
* @arg SYSCFG_FLAG_PE: SRAM parity error flag.
* @retval None
*/
void SYSCFG_ClearFlag(uint32_t SYSCFG_Flag)

832
lib/src/peripherals/stm32f0xx_tim.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_tim.c Executable file → Normal file
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File diff suppressed because it is too large Load Diff

472
lib/src/peripherals/stm32f0xx_usart.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_usart.c Executable file → Normal file
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_usart.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the Universal synchronous asynchronous receiver
* transmitter (USART):
@ -191,19 +191,17 @@ void USART_DeInit(USART_TypeDef* USARTx)
/**
* @brief Initializes the USARTx peripheral according to the specified
* parameters in the USART_InitStruct .
* parameters in the USART_InitStruct .
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_InitStruct: pointer to a USART_InitTypeDef structure
* that contains the configuration information for the specified USART peripheral.
* @param USART_InitStruct: pointer to a USART_InitTypeDef structure that contains
* the configuration information for the specified USART peripheral.
* @retval None
*/
void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct)
{
uint32_t tmpreg = 0, apbclock = 0;
uint32_t integerdivider = 0;
uint32_t fractionaldivider = 0;
uint32_t divider = 0, apbclock = 0, tmpreg = 0;
RCC_ClocksTypeDef RCC_ClocksStatus;
/* Check the parameters */
assert_param(IS_USART_ALL_PERIPH(USARTx));
assert_param(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate));
@ -216,46 +214,46 @@ void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct)
/* Disable USART */
USARTx->CR1 &= (uint32_t)~((uint32_t)USART_CR1_UE);
/*---------------------------- USART CR2 Configuration -----------------------*/
/*---------------------------- USART CR2 Configuration -----------------------*/
tmpreg = USARTx->CR2;
/* Clear STOP[13:12] bits */
tmpreg &= (uint32_t)~((uint32_t)USART_CR2_STOP);
/* Configure the USART Stop Bits, Clock, CPOL, CPHA and LastBit ------------*/
/* Set STOP[13:12] bits according to USART_StopBits value */
tmpreg |= (uint32_t)USART_InitStruct->USART_StopBits;
/* Write to USART CR2 */
USARTx->CR2 = tmpreg;
/*---------------------------- USART CR1 Configuration -----------------------*/
/*---------------------------- USART CR1 Configuration -----------------------*/
tmpreg = USARTx->CR1;
/* Clear M, PCE, PS, TE and RE bits */
tmpreg &= (uint32_t)~((uint32_t)CR1_CLEAR_MASK);
/* Configure the USART Word Length, Parity and mode ----------------------- */
/* Set the M bits according to USART_WordLength value */
/* Set PCE and PS bits according to USART_Parity value */
/* Set TE and RE bits according to USART_Mode value */
tmpreg |= (uint32_t)USART_InitStruct->USART_WordLength | USART_InitStruct->USART_Parity |
USART_InitStruct->USART_Mode;
USART_InitStruct->USART_Mode;
/* Write to USART CR1 */
USARTx->CR1 = tmpreg;
/*---------------------------- USART CR3 Configuration -----------------------*/
/*---------------------------- USART CR3 Configuration -----------------------*/
tmpreg = USARTx->CR3;
/* Clear CTSE and RTSE bits */
tmpreg &= (uint32_t)~((uint32_t)CR3_CLEAR_MASK);
/* Configure the USART HFC -------------------------------------------------*/
/* Set CTSE and RTSE bits according to USART_HardwareFlowControl value */
tmpreg |= USART_InitStruct->USART_HardwareFlowControl;
/* Write to USART CR3 */
USARTx->CR3 = tmpreg;
/*---------------------------- USART BRR Configuration -----------------------*/
/*---------------------------- USART BRR Configuration -----------------------*/
/* Configure the USART Baud Rate -------------------------------------------*/
RCC_GetClocksFreq(&RCC_ClocksStatus);
@ -267,40 +265,45 @@ void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct)
{
apbclock = RCC_ClocksStatus.PCLK_Frequency;
}
/* Determine the integer part */
if ((USARTx->CR1 & USART_CR1_OVER8) != 0)
{
/* Integer part computing in case Oversampling mode is 8 Samples */
integerdivider = ((25 * apbclock) / (2 * (USART_InitStruct->USART_BaudRate)));
/* (divider * 10) computing in case Oversampling mode is 8 Samples */
divider = (uint32_t)((2 * apbclock) / (USART_InitStruct->USART_BaudRate));
tmpreg = (uint32_t)((2 * apbclock) % (USART_InitStruct->USART_BaudRate));
}
else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */
{
/* Integer part computing in case Oversampling mode is 16 Samples */
integerdivider = ((25 * apbclock) / (4 * (USART_InitStruct->USART_BaudRate)));
/* (divider * 10) computing in case Oversampling mode is 16 Samples */
divider = (uint32_t)((apbclock) / (USART_InitStruct->USART_BaudRate));
tmpreg = (uint32_t)((apbclock) % (USART_InitStruct->USART_BaudRate));
}
tmpreg = (integerdivider / 100) << 4;
/* Determine the fractional part */
fractionaldivider = integerdivider - (100 * (tmpreg >> 4));
/* Implement the fractional part in the register */
/* round the divider : if fractional part i greater than 0.5 increment divider */
if (tmpreg >= (USART_InitStruct->USART_BaudRate) / 2)
{
divider++;
}
/* Implement the divider in case Oversampling mode is 8 Samples */
if ((USARTx->CR1 & USART_CR1_OVER8) != 0)
{
tmpreg |= ((((fractionaldivider * 8) + 50) / 100)) & ((uint8_t)0x07);
/* get the LSB of divider and shift it to the right by 1 bit */
tmpreg = (divider & (uint16_t)0x000F) >> 1;
/* update the divider value */
divider = (divider & (uint16_t)0xFFF0) | tmpreg;
}
else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */
{
tmpreg |= ((((fractionaldivider * 16) + 50) / 100)) & ((uint8_t)0x0F);
}
/* Write to USART BRR */
USARTx->BRR = (uint16_t)tmpreg;
USARTx->BRR = (uint16_t)divider;
}
/**
* @brief Fills each USART_InitStruct member with its default value.
* @param USART_InitStruct: pointer to a USART_InitTypeDef structure
* which will be initialized.
* which will be initialized.
* @retval None
*/
void USART_StructInit(USART_InitTypeDef* USART_InitStruct)
@ -316,11 +319,11 @@ void USART_StructInit(USART_InitTypeDef* USART_InitStruct)
/**
* @brief Initializes the USARTx peripheral Clock according to the
* specified parameters in the USART_ClockInitStruct.
* specified parameters in the USART_ClockInitStruct.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef
* structure that contains the configuration information for the specified
* USART peripheral.
* structure that contains the configuration information for the specified
* USART peripheral.
* @retval None
*/
void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct)
@ -350,7 +353,7 @@ void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockI
/**
* @brief Fills each USART_ClockInitStruct member with its default value.
* @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef
* structure which will be initialized.
* structure which will be initialized.
* @retval None
*/
void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct)
@ -366,7 +369,7 @@ void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct)
* @brief Enables or disables the specified USART peripheral.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param NewState: new state of the USARTx peripheral.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -391,11 +394,11 @@ void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
* @brief Enables or disables the USART's transmitter or receiver.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_Direction: specifies the USART direction.
* This parameter can be any combination of the following values:
* @arg USART_Mode_Tx: USART Transmitter
* @arg USART_Mode_Rx: USART Receiver
* This parameter can be any combination of the following values:
* @arg USART_Mode_Tx: USART Transmitter
* @arg USART_Mode_Rx: USART Receiver
* @param NewState: new state of the USART transfer direction.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void USART_DirectionModeCmd(USART_TypeDef* USARTx, uint32_t USART_DirectionMode, FunctionalState NewState)
@ -422,11 +425,10 @@ void USART_DirectionModeCmd(USART_TypeDef* USARTx, uint32_t USART_DirectionMode,
/**
* @brief Enables or disables the USART's 8x oversampling mode.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param NewState: new state of the USART 8x oversampling mode.
* This parameter can be: ENABLE or DISABLE.
* @note
* This function has to be called before calling USART_Init()
* function in order to have correct baudrate Divider value.
* @param NewState: new state of the USART 8x oversampling mode.
* This parameter can be: ENABLE or DISABLE.
* @note This function has to be called before calling USART_Init() function
* in order to have correct baudrate Divider value.
* @retval None
*/
void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -451,9 +453,8 @@ void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
* @brief Enables or disables the USART's one bit sampling method.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param NewState: new state of the USART one bit sampling method.
* This parameter can be: ENABLE or DISABLE.
* @note
* This function has to be called before calling USART_Cmd() function.
* This parameter can be: ENABLE or DISABLE.
* @note This function has to be called before calling USART_Cmd() function.
* @retval None
*/
void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -480,9 +481,8 @@ void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState)
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param NewState: new state of the USART most significant bit first
* transmitted/received following the start bit.
* This parameter can be: ENABLE or DISABLE.
* @note
* This function has to be called before calling USART_Cmd() function.
* This parameter can be: ENABLE or DISABLE.
* @note This function has to be called before calling USART_Cmd() function.
* @retval None
*/
void USART_MSBFirstCmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -508,14 +508,13 @@ void USART_MSBFirstCmd(USART_TypeDef* USARTx, FunctionalState NewState)
/**
* @brief Enables or disables the binary data inversion.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param NewState: new defined levels for the USART data.
* This parameter can be: ENABLE or DISABLE.
* - ENABLE: Logical data from the data register are send/received in negative
* logic. (1=L, 0=H). The parity bit is also inverted.
* - DISABLE: Logical data from the data register are send/received in positive
* logic. (1=H, 0=L)
* @note
* This function has to be called before calling USART_Cmd() function.
* @param NewState: new defined levels for the USART data.
* This parameter can be:
* @arg ENABLE: Logical data from the data register are send/received in negative
* logic (1=L, 0=H). The parity bit is also inverted.
* @arg DISABLE: Logical data from the data register are send/received in positive
* logic (1=H, 0=L)
* @note This function has to be called before calling USART_Cmd() function.
* @retval None
*/
void USART_DataInvCmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -542,15 +541,14 @@ void USART_DataInvCmd(USART_TypeDef* USARTx, FunctionalState NewState)
* @brief Enables or disables the Pin(s) active level inversion.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_InvPin: specifies the USART pin(s) to invert.
* This parameter can be any combination of the following values:
* @arg USART_InvPin_Tx: USART Tx pin active level inversion.
* @arg USART_InvPin_Rx: USART Rx pin active level inversion.
* @param NewState: new active level status for the USART pin(s).
* This parameter can be: ENABLE or DISABLE.
* - ENABLE: pin(s) signal values are inverted (Vdd =0, Gnd =1).
* - DISABLE: pin(s) signal works using the standard logic levels (Vdd =1, Gnd =0).
* @note
* This function has to be called before calling USART_Cmd() function.
* This parameter can be any combination of the following values:
* @arg USART_InvPin_Tx: USART Tx pin active level inversion.
* @arg USART_InvPin_Rx: USART Rx pin active level inversion.
* @param NewState: new active level status for the USART pin(s).
* This parameter can be:
* @arg ENABLE: pin(s) signal values are inverted (Vdd =0, Gnd =1).
* @arg DISABLE: pin(s) signal works using the standard logic levels (Vdd =1, Gnd =0).
* @note This function has to be called before calling USART_Cmd() function.
* @retval None
*/
void USART_InvPinCmd(USART_TypeDef* USARTx, uint32_t USART_InvPin, FunctionalState NewState)
@ -577,12 +575,11 @@ void USART_InvPinCmd(USART_TypeDef* USARTx, uint32_t USART_InvPin, FunctionalSta
/**
* @brief Enables or disables the swap Tx/Rx pins.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param NewState: new state of the USARTx TX/RX pins pinout.
* This parameter can be: ENABLE or DISABLE.
* - ENABLE: The TX and RX pins functions are swapped.
* - DISABLE: TX/RX pins are used as defined in standard pinout
* @note
* This function has to be called before calling USART_Cmd() function.
* @param NewState: new state of the USARTx TX/RX pins pinout.
* This parameter can be:
* @arg ENABLE: The TX and RX pins functions are swapped.
* @arg DISABLE: TX/RX pins are used as defined in standard pinout
* @note This function has to be called before calling USART_Cmd() function.
* @retval None
*/
void USART_SWAPPinCmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -606,8 +603,8 @@ void USART_SWAPPinCmd(USART_TypeDef* USARTx, FunctionalState NewState)
/**
* @brief Enables or disables the receiver Time Out feature.
* @param USARTx: where x can be 1 to select the USART peripheral.
* @param NewState: new state of the USARTx receiver Time Out.
* This parameter can be: ENABLE or DISABLE.
* @param NewState: new state of the USARTx receiver Time Out.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void USART_ReceiverTimeOutCmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -654,8 +651,7 @@ void USART_SetReceiverTimeOut(USART_TypeDef* USARTx, uint32_t USART_ReceiverTime
* @brief Sets the system clock prescaler.
* @param USARTx: where x can be 1 to select the USART peripheral.
* @param USART_Prescaler: specifies the prescaler clock.
* @note
* This function has to be called before calling USART_Cmd() function.
* @note This function has to be called before calling USART_Cmd() function.
* @retval None
*/
void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler)
@ -701,9 +697,8 @@ void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler)
* @brief Enables or disables the specified USART peripheral in STOP Mode.
* @param USARTx: where x can be 1 to select the USART peripheral.
* @param NewState: new state of the USARTx peripheral state in stop mode.
* This parameter can be: ENABLE or DISABLE.
* @note
* This function has to be called when USART clock is set to HSI or LSE.
* This parameter can be: ENABLE or DISABLE.
* @note This function has to be called when USART clock is set to HSI or LSE.
* @retval None
*/
void USART_STOPModeCmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -730,12 +725,11 @@ void USART_STOPModeCmd(USART_TypeDef* USARTx, FunctionalState NewState)
* @brief Selects the USART WakeUp method form stop mode.
* @param USARTx: where x can be 1 to select the USART peripheral.
* @param USART_WakeUp: specifies the selected USART wakeup method.
* This parameter can be one of the following values:
* @arg USART_WakeUpSource_AddressMatch: WUF active on address match.
* @arg USART_WakeUpSource_StartBit: WUF active on Start bit detection.
* @arg USART_WakeUpSource_RXNE: WUF active on RXNE.
* @note
* This function has to be called before calling USART_Cmd() function.
* This parameter can be one of the following values:
* @arg USART_WakeUpSource_AddressMatch: WUF active on address match.
* @arg USART_WakeUpSource_StartBit: WUF active on Start bit detection.
* @arg USART_WakeUpSource_RXNE: WUF active on RXNE.
* @note This function has to be called before calling USART_Cmd() function.
* @retval None
*/
void USART_StopModeWakeUpSourceConfig(USART_TypeDef* USARTx, uint32_t USART_WakeUpSource)
@ -770,7 +764,7 @@ void USART_StopModeWakeUpSourceConfig(USART_TypeDef* USARTx, uint32_t USART_Wake
(#)USART_AutoBaudRate_FallingEdge : any character starting with a 10xx bit pattern.
[..] At any later time, another request for AutoBaudRate detection can be performed
using USART_AutoBaudRateNewRequest() function.
using USART_RequestCmd() function.
[..] The AutoBaudRate detection is monitored by the status of ABRF flag which indicate
that the AutoBaudRate detection is completed. In addition to ABRF flag, the ABRE flag
@ -784,8 +778,8 @@ void USART_StopModeWakeUpSourceConfig(USART_TypeDef* USARTx, uint32_t USART_Wake
/**
* @brief Enables or disables the Auto Baud Rate.
* @param USARTx: where x can be 1 to select the USART peripheral.
* @param NewState: new state of the USARTx auto baud rate.
* This parameter can be: ENABLE or DISABLE.
* @param NewState: new state of the USARTx auto baud rate.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void USART_AutoBaudRateCmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -812,11 +806,10 @@ void USART_AutoBaudRateCmd(USART_TypeDef* USARTx, FunctionalState NewState)
* @brief Selects the USART auto baud rate method.
* @param USARTx: where x can be 1 to select the USART peripheral.
* @param USART_AutoBaudRate: specifies the selected USART auto baud rate method.
* This parameter can be one of the following values:
* @arg USART_AutoBaudRate_StartBit: Start Bit duration measurement.
* @arg USART_AutoBaudRate_FallingEdge: Falling edge to falling edge measurement.
* @note
* This function has to be called before calling USART_Cmd() function.
* This parameter can be one of the following values:
* @arg USART_AutoBaudRate_StartBit: Start Bit duration measurement.
* @arg USART_AutoBaudRate_FallingEdge: Falling edge to falling edge measurement.
* @note This function has to be called before calling USART_Cmd() function.
* @retval None
*/
void USART_AutoBaudRateConfig(USART_TypeDef* USARTx, uint32_t USART_AutoBaudRate)
@ -829,19 +822,6 @@ void USART_AutoBaudRateConfig(USART_TypeDef* USARTx, uint32_t USART_AutoBaudRate
USARTx->CR2 |= USART_AutoBaudRate;
}
/**
* @brief Requests a new AutoBaudRate detection.
* @param USARTx: where x can be 1 to select the USART peripheral.
* @retval None
*/
void USART_AutoBaudRateNewRequest(USART_TypeDef* USARTx)
{
/* Check the parameters */
assert_param(IS_USART_ALL_PERIPH(USARTx));
USARTx->ISR &= (uint32_t)~((uint32_t)USART_FLAG_ABRF);
}
/**
* @}
*/
@ -953,7 +933,7 @@ void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address)
* @brief Enables or disables the USART's mute mode.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param NewState: new state of the USART mute mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void USART_MuteModeCmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -978,9 +958,9 @@ void USART_MuteModeCmd(USART_TypeDef* USARTx, FunctionalState NewState)
* @brief Selects the USART WakeUp method from mute mode.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_WakeUp: specifies the USART wakeup method.
* This parameter can be one of the following values:
* @arg USART_WakeUp_IdleLine: WakeUp by an idle line detection
* @arg USART_WakeUp_AddressMark: WakeUp by an address mark
* This parameter can be one of the following values:
* @arg USART_WakeUp_IdleLine: WakeUp by an idle line detection
* @arg USART_WakeUp_AddressMark: WakeUp by an address mark
* @retval None
*/
void USART_MuteModeWakeUpConfig(USART_TypeDef* USARTx, uint32_t USART_WakeUp)
@ -997,9 +977,9 @@ void USART_MuteModeWakeUpConfig(USART_TypeDef* USARTx, uint32_t USART_WakeUp)
* @brief Configure the the USART Address detection length.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_AddressLength: specifies the USART address length detection.
* This parameter can be one of the following values:
* @arg USART_AddressLength_4b: 4-bit address length detection
* @arg USART_AddressLength_7b: 7-bit address length detection
* This parameter can be one of the following values:
* @arg USART_AddressLength_4b: 4-bit address length detection
* @arg USART_AddressLength_7b: 7-bit address length detection
* @retval None
*/
void USART_AddressDetectionConfig(USART_TypeDef* USARTx, uint32_t USART_AddressLength)
@ -1060,9 +1040,9 @@ void USART_AddressDetectionConfig(USART_TypeDef* USARTx, uint32_t USART_AddressL
* @brief Sets the USART LIN Break detection length.
* @param USARTx: where x can be 1 to select the USART peripheral.
* @param USART_LINBreakDetectLength: specifies the LIN break detection length.
* This parameter can be one of the following values:
* @arg USART_LINBreakDetectLength_10b: 10-bit break detection
* @arg USART_LINBreakDetectLength_11b: 11-bit break detection
* This parameter can be one of the following values:
* @arg USART_LINBreakDetectLength_10b: 10-bit break detection
* @arg USART_LINBreakDetectLength_11b: 11-bit break detection
* @retval None
*/
void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint32_t USART_LINBreakDetectLength)
@ -1079,7 +1059,7 @@ void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint32_t USART_LINB
* @brief Enables or disables the USART's LIN mode.
* @param USARTx: where x can be 1 to select the USART peripheral.
* @param NewState: new state of the USART LIN mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -1135,7 +1115,7 @@ void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState)
* @brief Enables or disables the USART's Half Duplex communication.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param NewState: new state of the USART Communication.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -1233,7 +1213,7 @@ void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime)
* @brief Enables or disables the USART's Smart Card mode.
* @param USARTx: where x can be 1 to select the USART peripheral.
* @param NewState: new state of the Smart Card mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -1257,7 +1237,7 @@ void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState)
* @brief Enables or disables NACK transmission.
* @param USARTx: where x can be 1 to select the USART peripheral.
* @param NewState: new state of the NACK transmission.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -1357,9 +1337,9 @@ void USART_SetBlockLength(USART_TypeDef* USARTx, uint8_t USART_BlockLength)
* @brief Configures the USART's IrDA interface.
* @param USARTx: where x can be 1 to select the USART peripheral.
* @param USART_IrDAMode: specifies the IrDA mode.
* This parameter can be one of the following values:
* @arg USART_IrDAMode_LowPower
* @arg USART_IrDAMode_Normal
* This parameter can be one of the following values:
* @arg USART_IrDAMode_LowPower
* @arg USART_IrDAMode_Normal
* @retval None
*/
void USART_IrDAConfig(USART_TypeDef* USARTx, uint32_t USART_IrDAMode)
@ -1376,7 +1356,7 @@ void USART_IrDAConfig(USART_TypeDef* USARTx, uint32_t USART_IrDAMode)
* @brief Enables or disables the USART's IrDA interface.
* @param USARTx: where x can be 1 to select the USART peripheral.
* @param NewState: new state of the IrDA mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -1433,7 +1413,7 @@ void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState)
* @brief Enables or disables the USART's DE functionality.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param NewState: new state of the driver enable mode.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void USART_DECmd(USART_TypeDef* USARTx, FunctionalState NewState)
@ -1457,9 +1437,9 @@ void USART_DECmd(USART_TypeDef* USARTx, FunctionalState NewState)
* @brief Configures the USART's DE polarity
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_DEPolarity: specifies the DE polarity.
* This parameter can be one of the following values:
* @arg USART_DEPolarity_Low
* @arg USART_DEPolarity_High
* This parameter can be one of the following values:
* @arg USART_DEPolarity_Low
* @arg USART_DEPolarity_High
* @retval None
*/
void USART_DEPolarityConfig(USART_TypeDef* USARTx, uint32_t USART_DEPolarity)
@ -1475,8 +1455,8 @@ void USART_DEPolarityConfig(USART_TypeDef* USARTx, uint32_t USART_DEPolarity)
/**
* @brief Sets the specified RS485 DE assertion time
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_AssertionTime: specifies the time between the activation of the DE
* signal and the beginning of the start bit
* @param USART_DEAssertionTime: specifies the time between the activation of
* the DE signal and the beginning of the start bit
* @retval None
*/
void USART_SetDEAssertionTime(USART_TypeDef* USARTx, uint32_t USART_DEAssertionTime)
@ -1494,8 +1474,8 @@ void USART_SetDEAssertionTime(USART_TypeDef* USARTx, uint32_t USART_DEAssertionT
/**
* @brief Sets the specified RS485 DE deassertion time
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_DeassertionTime: specifies the time between the middle of the last
* stop bit in a transmitted message and the de-activation of the DE signal
* @param USART_DeassertionTime: specifies the time between the middle of the last
* stop bit in a transmitted message and the de-activation of the DE signal
* @retval None
*/
void USART_SetDEDeassertionTime(USART_TypeDef* USARTx, uint32_t USART_DEDeassertionTime)
@ -1537,11 +1517,11 @@ void USART_SetDEDeassertionTime(USART_TypeDef* USARTx, uint32_t USART_DEDeassert
* @brief Enables or disables the USART's DMA interface.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_DMAReq: specifies the DMA request.
* This parameter can be any combination of the following values:
* @arg USART_DMAReq_Tx: USART DMA transmit request
* @arg USART_DMAReq_Rx: USART DMA receive request
* This parameter can be any combination of the following values:
* @arg USART_DMAReq_Tx: USART DMA transmit request
* @arg USART_DMAReq_Rx: USART DMA receive request
* @param NewState: new state of the DMA Request sources.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void USART_DMACmd(USART_TypeDef* USARTx, uint32_t USART_DMAReq, FunctionalState NewState)
@ -1569,11 +1549,11 @@ void USART_DMACmd(USART_TypeDef* USARTx, uint32_t USART_DMAReq, FunctionalState
* @brief Enables or disables the USART's DMA interface when reception error occurs.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_DMAOnError: specifies the DMA status in case of reception error.
* This parameter can be any combination of the following values:
* @arg USART_DMAOnError_Enable: DMA receive request enabled when the USART DMA
* reception error is asserted.
* @arg USART_DMAOnError_Disable: DMA receive request disabled when the USART DMA
* reception error is asserted.
* This parameter can be any combination of the following values:
* @arg USART_DMAOnError_Enable: DMA receive request enabled when the USART DMA
* reception error is asserted.
* @arg USART_DMAOnError_Disable: DMA receive request disabled when the USART DMA
* reception error is asserted.
* @retval None
*/
void USART_DMAReceptionErrorConfig(USART_TypeDef* USARTx, uint32_t USART_DMAOnError)
@ -1611,15 +1591,15 @@ void USART_DMAReceptionErrorConfig(USART_TypeDef* USARTx, uint32_t USART_DMAOnEr
acknowledge flag
(#) USART_FLAG_TEACK: to indicate the status of the Transmit Enable
acknowledge flag.
(#) USART_FLAG_WUF: to indicate the status of the Wake up flag.
(#) USART_FLAG_WU: to indicate the status of the Wake up flag.
(#) USART_FLAG_RWU: to indicate the status of the Receive Wake up flag.
(#) USART_FLAG_SBK: to indicate the status of the Send Break flag.
(#) USART_FLAG_CMF: to indicate the status of the Character match flag.
(#) USART_FLAG_CM: to indicate the status of the Character match flag.
(#) USART_FLAG_BUSY: to indicate the status of the Busy flag.
(#) USART_FLAG_ABRF: to indicate the status of the Auto baud rate flag.
(#) USART_FLAG_ABRE: to indicate the status of the Auto baud rate error flag.
(#) USART_FLAG_EOBF: to indicate the status of the End of block flag.
(#) USART_FLAG_RTOF: to indicate the status of the Receive time out flag.
(#) USART_FLAG_EOB: to indicate the status of the End of block flag.
(#) USART_FLAG_RTO: to indicate the status of the Receive time out flag.
(#) USART_FLAG_nCTSS: to indicate the status of the Inverted nCTS input
bit status.
(#) USART_FLAG_TXE: to indicate the status of the transmit buffer register.
@ -1691,21 +1671,21 @@ void USART_DMAReceptionErrorConfig(USART_TypeDef* USARTx, uint32_t USART_DMAOnEr
* @brief Enables or disables the specified USART interrupts.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_IT: specifies the USART interrupt sources to be enabled or disabled.
* This parameter can be one of the following values:
* @arg USART_IT_WU: Wake up interrupt.
* @arg USART_IT_CM: Character match interrupt.
* @arg USART_IT_EOB: End of block interrupt.
* @arg USART_IT_RTO: Receive time out interrupt.
* @arg USART_IT_CTS: CTS change interrupt.
* @arg USART_IT_LBD: LIN Break detection interrupt.
* @arg USART_IT_TXE: Tansmit Data Register empty interrupt.
* @arg USART_IT_TC: Transmission complete interrupt.
* @arg USART_IT_RXNE: Receive Data register not empty interrupt.
* @arg USART_IT_IDLE: Idle line detection interrupt.
* @arg USART_IT_PE: Parity Error interrupt.
* @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
* This parameter can be one of the following values:
* @arg USART_IT_WU: Wake up interrupt.
* @arg USART_IT_CM: Character match interrupt.
* @arg USART_IT_EOB: End of block interrupt.
* @arg USART_IT_RTO: Receive time out interrupt.
* @arg USART_IT_CTS: CTS change interrupt.
* @arg USART_IT_LBD: LIN Break detection interrupt.
* @arg USART_IT_TXE: Tansmit Data Register empty interrupt.
* @arg USART_IT_TC: Transmission complete interrupt.
* @arg USART_IT_RXNE: Receive Data register not empty interrupt.
* @arg USART_IT_IDLE: Idle line detection interrupt.
* @arg USART_IT_PE: Parity Error interrupt.
* @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
* @param NewState: new state of the specified USARTx interrupts.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void USART_ITConfig(USART_TypeDef* USARTx, uint32_t USART_IT, FunctionalState NewState)
@ -1751,14 +1731,14 @@ void USART_ITConfig(USART_TypeDef* USARTx, uint32_t USART_IT, FunctionalState Ne
* @brief Enables the specified USART's Request.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_Request: specifies the USART request.
* This parameter can be any combination of the following values:
* @arg USART_Request_TXFRQ: Transmit data flush ReQuest
* @arg USART_Request_RXFRQ: Receive data flush ReQuest
* @arg USART_Request_MMRQ: Mute Mode ReQuest
* @arg USART_Request_SBKRQ: Send Break ReQuest
* @arg USART_Request_ABRRQ: Auto Baud Rate ReQuest
* This parameter can be any combination of the following values:
* @arg USART_Request_TXFRQ: Transmit data flush ReQuest
* @arg USART_Request_RXFRQ: Receive data flush ReQuest
* @arg USART_Request_MMRQ: Mute Mode ReQuest
* @arg USART_Request_SBKRQ: Send Break ReQuest
* @arg USART_Request_ABRRQ: Auto Baud Rate ReQuest
* @param NewState: new state of the DMA interface when reception error occurs.
* This parameter can be: ENABLE or DISABLE.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void USART_RequestCmd(USART_TypeDef* USARTx, uint32_t USART_Request, FunctionalState NewState)
@ -1786,11 +1766,11 @@ void USART_RequestCmd(USART_TypeDef* USARTx, uint32_t USART_Request, FunctionalS
* @brief Enables or disables the USART's Overrun detection.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_OVRDetection: specifies the OVR detection status in case of OVR error.
* This parameter can be any combination of the following values:
* @arg USART_OVRDetection_Enable: OVR error detection enabled when the USART OVR error
* is asserted.
* @arg USART_OVRDetection_Disable: OVR error detection disabled when the USART OVR error
* is asserted.
* This parameter can be any combination of the following values:
* @arg USART_OVRDetection_Enable: OVR error detection enabled when
* the USART OVR error is asserted.
* @arg USART_OVRDetection_Disable: OVR error detection disabled when
* the USART OVR error is asserted.
* @retval None
*/
void USART_OverrunDetectionConfig(USART_TypeDef* USARTx, uint32_t USART_OVRDetection)
@ -1809,29 +1789,29 @@ void USART_OverrunDetectionConfig(USART_TypeDef* USARTx, uint32_t USART_OVRDetec
* @brief Checks whether the specified USART flag is set or not.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* @arg USART_FLAG_REACK: Receive Enable acknowledge flag.
* @arg USART_FLAG_TEACK: Transmit Enable acknowledge flag.
* @arg USART_FLAG_WUF: Wake up flag.
* @arg USART_FLAG_RWU: Receive Wake up flag.
* @arg USART_FLAG_SBK: Send Break flag.
* @arg USART_FLAG_CMF: Character match flag.
* @arg USART_FLAG_BUSY: Busy flag.
* @arg USART_FLAG_ABRF: Auto baud rate flag.
* @arg USART_FLAG_ABRE: Auto baud rate error flag.
* @arg USART_FLAG_EOBF: End of block flag.
* @arg USART_FLAG_RTOF: Receive time out flag.
* @arg USART_FLAG_nCTSS: Inverted nCTS input bit status.
* @arg USART_FLAG_CTS: CTS Change flag.
* @arg USART_FLAG_LBD: LIN Break detection flag.
* @arg USART_FLAG_TXE: Transmit data register empty flag.
* @arg USART_FLAG_TC: Transmission Complete flag.
* @arg USART_FLAG_RXNE: Receive data register not empty flag.
* @arg USART_FLAG_IDLE: Idle Line detection flag.
* @arg USART_FLAG_ORE: OverRun Error flag.
* @arg USART_FLAG_NE: Noise Error flag.
* @arg USART_FLAG_FE: Framing Error flag.
* @arg USART_FLAG_PE: Parity Error flag.
* This parameter can be one of the following values:
* @arg USART_FLAG_REACK: Receive Enable acknowledge flag.
* @arg USART_FLAG_TEACK: Transmit Enable acknowledge flag.
* @arg USART_FLAG_WU: Wake up flag.
* @arg USART_FLAG_RWU: Receive Wake up flag.
* @arg USART_FLAG_SBK: Send Break flag.
* @arg USART_FLAG_CM: Character match flag.
* @arg USART_FLAG_BUSY: Busy flag.
* @arg USART_FLAG_ABRF: Auto baud rate flag.
* @arg USART_FLAG_ABRE: Auto baud rate error flag.
* @arg USART_FLAG_EOB: End of block flag.
* @arg USART_FLAG_RTO: Receive time out flag.
* @arg USART_FLAG_nCTSS: Inverted nCTS input bit status.
* @arg USART_FLAG_CTS: CTS Change flag.
* @arg USART_FLAG_LBD: LIN Break detection flag.
* @arg USART_FLAG_TXE: Transmit data register empty flag.
* @arg USART_FLAG_TC: Transmission Complete flag.
* @arg USART_FLAG_RXNE: Receive data register not empty flag.
* @arg USART_FLAG_IDLE: Idle Line detection flag.
* @arg USART_FLAG_ORE: OverRun Error flag.
* @arg USART_FLAG_NE: Noise Error flag.
* @arg USART_FLAG_FE: Framing Error flag.
* @arg USART_FLAG_PE: Parity Error flag.
* @retval The new state of USART_FLAG (SET or RESET).
*/
FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint32_t USART_FLAG)
@ -1856,19 +1836,19 @@ FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint32_t USART_FLAG)
* @brief Clears the USARTx's pending flags.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_FLAG: specifies the flag to clear.
* This parameter can be any combination of the following values:
* @arg USART_FLAG_WUF: Wake up flag.
* @arg USART_FLAG_CMF: Character match flag.
* @arg USART_FLAG_EOBF: End of block flag.
* @arg USART_FLAG_RTOF: Receive time out flag.
* @arg USART_FLAG_CTS: CTS Change flag.
* @arg USART_FLAG_LBD: LIN Break detection flag.
* @arg USART_FLAG_TC: Transmission Complete flag.
* @arg USART_FLAG_IDLE: IDLE line detected flag.
* @arg USART_FLAG_ORE: OverRun Error flag.
* @arg USART_FLAG_NE: Noise Error flag.
* @arg USART_FLAG_FE: Framing Error flag.
* @arg USART_FLAG_PE: Parity Errorflag.
* This parameter can be any combination of the following values:
* @arg USART_FLAG_WU: Wake up flag.
* @arg USART_FLAG_CM: Character match flag.
* @arg USART_FLAG_EOB: End of block flag.
* @arg USART_FLAG_RTO: Receive time out flag.
* @arg USART_FLAG_CTS: CTS Change flag.
* @arg USART_FLAG_LBD: LIN Break detection flag.
* @arg USART_FLAG_TC: Transmission Complete flag.
* @arg USART_FLAG_IDLE: IDLE line detected flag.
* @arg USART_FLAG_ORE: OverRun Error flag.
* @arg USART_FLAG_NE: Noise Error flag.
* @arg USART_FLAG_FE: Framing Error flag.
* @arg USART_FLAG_PE: Parity Errorflag.
*
* @note RXNE pending bit is cleared by a read to the USART_RDR register
* (USART_ReceiveData()) or by writing 1 to the RXFRQ in the register
@ -1895,21 +1875,21 @@ void USART_ClearFlag(USART_TypeDef* USARTx, uint32_t USART_FLAG)
* @brief Checks whether the specified USART interrupt has occurred or not.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_IT: specifies the USART interrupt source to check.
* This parameter can be one of the following values:
* @arg USART_IT_WU: Wake up interrupt.
* @arg USART_IT_CM: Character match interrupt.
* @arg USART_IT_EOB: End of block interrupt.
* @arg USART_IT_RTO: Receive time out interrupt.
* @arg USART_IT_CTS: CTS change interrupt.
* @arg USART_IT_LBD: LIN Break detection interrupt.
* @arg USART_IT_TXE: Tansmit Data Register empty interrupt.
* @arg USART_IT_TC: Transmission complete interrupt.
* @arg USART_IT_RXNE: Receive Data register not empty interrupt.
* @arg USART_IT_IDLE: Idle line detection interrupt.
* @arg USART_IT_ORE: OverRun Error interrupt.
* @arg USART_IT_NE: Noise Error interrupt.
* @arg USART_IT_FE: Framing Error interrupt.
* @arg USART_IT_PE: Parity Error interrupt.
* This parameter can be one of the following values:
* @arg USART_IT_WU: Wake up interrupt.
* @arg USART_IT_CM: Character match interrupt.
* @arg USART_IT_EOB: End of block interrupt.
* @arg USART_IT_RTO: Receive time out interrupt.
* @arg USART_IT_CTS: CTS change interrupt.
* @arg USART_IT_LBD: LIN Break detection interrupt.
* @arg USART_IT_TXE: Tansmit Data Register empty interrupt.
* @arg USART_IT_TC: Transmission complete interrupt.
* @arg USART_IT_RXNE: Receive Data register not empty interrupt.
* @arg USART_IT_IDLE: Idle line detection interrupt.
* @arg USART_IT_ORE: OverRun Error interrupt.
* @arg USART_IT_NE: Noise Error interrupt.
* @arg USART_IT_FE: Framing Error interrupt.
* @arg USART_IT_PE: Parity Error interrupt.
* @retval The new state of USART_IT (SET or RESET).
*/
ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint32_t USART_IT)
@ -1958,19 +1938,19 @@ ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint32_t USART_IT)
* @brief Clears the USARTx's interrupt pending bits.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_IT: specifies the interrupt pending bit to clear.
* This parameter can be one of the following values:
* @arg USART_IT_WU: Wake up interrupt.
* @arg USART_IT_CM: Character match interrupt.
* @arg USART_IT_EOB: End of block interrupt.
* @arg USART_IT_RTO: Receive time out interrupt.
* @arg USART_IT_CTS: CTS change interrupt.
* @arg USART_IT_LBD: LIN Break detection interrupt.
* @arg USART_IT_TC: Transmission complete interrupt.
* @arg USART_IT_IDLE: IDLE line detected interrupt.
* @arg USART_IT_ORE: OverRun Error interrupt.
* @arg USART_IT_NE: Noise Error interrupt.
* @arg USART_IT_FE: Framing Error interrupt.
* @arg USART_IT_PE: Parity Error interrupt.
* This parameter can be one of the following values:
* @arg USART_IT_WU: Wake up interrupt.
* @arg USART_IT_CM: Character match interrupt.
* @arg USART_IT_EOB: End of block interrupt.
* @arg USART_IT_RTO: Receive time out interrupt.
* @arg USART_IT_CTS: CTS change interrupt.
* @arg USART_IT_LBD: LIN Break detection interrupt.
* @arg USART_IT_TC: Transmission complete interrupt.
* @arg USART_IT_IDLE: IDLE line detected interrupt.
* @arg USART_IT_ORE: OverRun Error interrupt.
* @arg USART_IT_NE: Noise Error interrupt.
* @arg USART_IT_FE: Framing Error interrupt.
* @arg USART_IT_PE: Parity Error interrupt.
*
* @note RXNE pending bit is cleared by a read to the USART_RDR register
* (USART_ReceiveData()) or by writing 1 to the RXFRQ in the register

24
lib/src/peripherals/stm32f0xx_wwdg.c → Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_wwdg.c Executable file → Normal file
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_wwdg.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @version V1.0.1
* @date 20-April-2012
* @brief This file provides firmware functions to manage the following
* functionalities of the Window watchdog (WWDG) peripheral:
* + Prescaler, Refresh window and Counter configuration
@ -138,11 +138,11 @@ void WWDG_DeInit(void)
/**
* @brief Sets the WWDG Prescaler.
* @param WWDG_Prescaler: specifies the WWDG Prescaler.
* This parameter can be one of the following values:
* @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
* @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
* @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
* @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
* This parameter can be one of the following values:
* @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
* @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
* @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
* @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
* @retval None
*/
void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
@ -161,7 +161,7 @@ void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
/**
* @brief Sets the WWDG window value.
* @param WindowValue: specifies the window value to be compared to the downcounter.
* This parameter value must be lower than 0x80.
* This parameter value must be lower than 0x80.
* @retval None
*/
void WWDG_SetWindowValue(uint8_t WindowValue)
@ -195,8 +195,8 @@ void WWDG_EnableIT(void)
/**
* @brief Sets the WWDG counter value.
* @param Counter: specifies the watchdog counter value.
* This parameter must be a number between 0x40 and 0x7F (to prevent generating
* an immediate reset).
* This parameter must be a number between 0x40 and 0x7F (to prevent
* generating an immediate reset).
* @retval None
*/
void WWDG_SetCounter(uint8_t Counter)
@ -227,8 +227,8 @@ void WWDG_SetCounter(uint8_t Counter)
/**
* @brief Enables WWDG and load the counter value.
* @param Counter: specifies the watchdog counter value.
* This parameter must be a number between 0x40 and 0x7F (to prevent generating
* an immediate reset).
* This parameter must be a number between 0x40 and 0x7F (to prevent
* generating an immediate reset).
* @retval None
*/
void WWDG_Enable(uint8_t Counter)

20
Makefile
View File

@ -6,6 +6,9 @@ SRCS = main.c system_stm32f0xx.c
PROJ_NAME=main
# location of OpenOCD Board .cfg files (only used with 'make program')
OPENOCD_BOARD_DIR=/usr/share/openocd/scripts/board
# that's it, no need to change anything below this line!
###################################################
@ -13,20 +16,20 @@ PROJ_NAME=main
CC=arm-none-eabi-gcc
OBJCOPY=arm-none-eabi-objcopy
CFLAGS = -g -O2 -Wall -Tstm32_flash.ld
CFLAGS = -g -O2 -Wall -TDevice/stm32_flash.ld
CFLAGS += -mlittle-endian -mthumb -mcpu=cortex-m0 -march=armv6s-m
###################################################
vpath %.c src
vpath %.a lib
vpath %.a Libraries
ROOT=$(shell pwd)
CFLAGS += -Iinc -Ilib -Ilib/inc
CFLAGS += -Ilib/inc/core -Ilib/inc/peripherals
CFLAGS += -Iinc -IDevice -ILibraries/CMSIS/Device/ST/STM32F0xx/Include
CFLAGS += -ILibraries/CMSIS/Include -ILibraries/STM32F0xx_StdPeriph_Driver/inc
SRCS += lib/startup_stm32f0xx.s # add startup file to build
SRCS += Device/startup_stm32f0xx.s # add startup file to build
OBJS = $(SRCS:.c=.o)
@ -37,14 +40,17 @@ OBJS = $(SRCS:.c=.o)
all: lib proj
lib:
$(MAKE) -C lib
$(MAKE) -C Libraries
proj: $(PROJ_NAME).elf
$(PROJ_NAME).elf: $(SRCS)
$(CC) $(CFLAGS) $^ -o $@ -Llib -lstm32f0
$(CC) $(CFLAGS) $^ -o $@ -LLibraries -lstm32f0
$(OBJCOPY) -O ihex $(PROJ_NAME).elf $(PROJ_NAME).hex
$(OBJCOPY) -O binary $(PROJ_NAME).elf $(PROJ_NAME).bin
program: $(PROJ_NAME).bin
openocd -f $(OPENOCD_BOARD_DIR)/stm32f0discovery.cfg -f extra/stm32f0-openocd.cfg -c "stm_flash `pwd`/$(PROJ_NAME).bin" -c shutdown
clean:
rm -f *.o

56
README.md
View File

@ -1,5 +1,53 @@
This program illuminates the blue LED on an STM32F0-Discovery board.
(it's actually blinking really really fast)
#STM32F0-Discovery Application Template
This package is for use when compiling programs for STM32F05xx ARM microcontrollers using arm-none-eabi-gcc (I'm using the [Code Sourcery G++:Lite Edition](http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/editions/lite-edition/) toolchain). The Makefile in the main directory will call the Make file in the Libraries directory, thereby automatically building the STM peripheral library. However, running 'make clean' will not affect the peripherals library (the same command can be run from the Libraries directory to do this).
This template will serve as a quick-start for those who do not wish to use an IDE, but rather develop in a text editor of choice and build from the command line. It is based on [an example template for the F4 Discovery board](http://jeremyherbert.net/get/stm32f4_getting_started) put together by Jeremy Herbert.
##Possible bug in the STM32F0xx peripheral library??
>It should be noted that I currently cannot compile the stock STM32F0xx peripheral library files (v1.0.0) without getting the following error:
>>STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dac.c:151:26: error: 'RCC_APB1Periph_DAC' undeclared (first use in this function)
>The workaround is to include stm32f0xx_rcc.h in the stm32f0xx_dac.c file. That is because the constant the compiler is complaining about is defined in that header file.
>**Compiler warning about assert_param():** When compiling the standard peripherals a warning is thrown about implicit declaration of assert_param(). This is due to the order in which files are being included. The function prototype is found in the stm32f0xx_conf.h file which for some reason is included after the peripherals are compiled. I don't know how to give it priority so it is included at right away. Please open an issue (or submit a pull request) if you know the compiler directives necessary to fix these warnings.
##Subfolders:
1. Library/
* This is the Library/ folder from the STM32F0xx_StdPeriph_Lib_V1.0.0 standard peripheral driver library produced by STM. This preserves the original structure which should make it easy to roll in library upgrades as they are published
* **Makefile** is not part of the STM release, and must be copied over if the library is upgraded.
* **IMPORTANT:** Please read the section about regarding a possible bug in one of the peripheral library files.
* Device/
* Folder contains device specific files:
* **stm32_flash.ld** is the linker script taken from the STM32F0-Discovery firmware package. It is found in the following directory:
>Project/Demonstration/TrueSTUDIO/STM32F0-Discovery_Demo/
* **startup_stm32f0xx.s** is the startup file taken from the STM32F0-Discovery firmware package. It is found in the following directory:
>Libraries/CMSIS/ST/STM32F0xx/Source/Templates/TrueSTUDIO/
* **stm32f0xx_conf.h** is used to configure the peripheral library. The file was file taken from the STM32F0-Discovery firmware package. It is found in the following directory:
>Project/Demonstration/
* inc/
* All include files for this particular project.
* src/
* All source files for this particular project (including main.c).
* **system_stm32f0xx.c** can be generated using an XLS file developed by STM. This sets up the system clock values for the project. The file included in this repository is taken from the STM32F0-Discovery firmware package. It is found in the following directory:
>Libraries/CMSIS/ST/STM32F0xx/Source/Templates/
* extra/
* This contains a procedure file used to write the image to the board via OpenOCD
##Loading the image on the board
If you have OpenOCD installed 'make program' can be used to flash the .bin file to the board. OpenOCD must be installed with stlink enabled. Clone the github repository and use these commands to compile/install it:
>./bootstrap
>./configure --prefix=/usr --enable-maintainer-mode --enable-stlink
>make
>sudo make install
If there is an error finding the .cfg file, please double-check the OPENOCD_BOARD_DIR constant at the top of the Makefile (in this template directory, not in OpenOCD).
This is modelled afer the STM32F4 example found here:
http://jeremyherbert.net/get/stm32f4_getting_started

22
extra/stm32f0-openocd.cfg Normal file
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@ -0,0 +1,22 @@
#This file can be used to automatically program the STM32F0-Discovery board's Flash memory from the command line
#After programming, the board must be power-cycled (briefly remove the power) for the program to start running
#This can be done by unpluggin the USB cable, or removing JP2
init
proc stm_flash {IMGFILE} {
reset halt
sleep 100
wait_halt 2
flash write_image erase $IMGFILE 0x08000000
sleep 100
verify_image $IMGFILE 0x08000000
sleep 100
}
proc stm_erase {} {
reset halt
sleep 100
stm32f1x mass_erase 0
sleep 100
}

156
lib/inc/stm32f0_discovery.h
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@ -1,156 +0,0 @@
/**
******************************************************************************
* @file stm32f0_discovery.h
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @brief This file contains definitions for STM32F0-Discovery's Leds, push-
* buttons hardware resources.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F0_DISCOVERY_H
#define __STM32F0_DISCOVERY_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f0xx.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32F0_DISCOVERY
* @{
*/
/** @addtogroup STM32F0_DISCOVERY_LOW_LEVEL
* @{
*/
/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Exported_Types
* @{
*/
typedef enum
{
LED3 = 0,
LED4 = 1
} Led_TypeDef;
typedef enum
{
BUTTON_USER = 0,
} Button_TypeDef;
typedef enum
{
BUTTON_MODE_GPIO = 0,
BUTTON_MODE_EXTI = 1
} ButtonMode_TypeDef;
/**
* @}
*/
/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Exported_Constants
* @{
*/
/** @addtogroup STM32F0_DISCOVERY_LOW_LEVEL_LED
* @{
*/
#define LEDn 2
#define LED3_PIN GPIO_Pin_9
#define LED3_GPIO_PORT GPIOC
#define LED3_GPIO_CLK RCC_AHBPeriph_GPIOC
#define LED4_PIN GPIO_Pin_8
#define LED4_GPIO_PORT GPIOC
#define LED4_GPIO_CLK RCC_AHBPeriph_GPIOC
/**
* @}
*/
/** @addtogroup SSTM32F0_DISCOVERY_LOW_LEVEL_BUTTON
* @{
*/
#define BUTTONn 1
/**
* @brief USER push-button
*/
#define USER_BUTTON_PIN GPIO_Pin_0
#define USER_BUTTON_GPIO_PORT GPIOA
#define USER_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOA
#define USER_BUTTON_EXTI_LINE EXTI_Line0
#define USER_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOA
#define USER_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource0
#define USER_BUTTON_EXTI_IRQn EXTI0_1_IRQn
/**
* @}
*/
/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Exported_Functions
* @{
*/
void STM_EVAL_LEDInit(Led_TypeDef Led);
void STM_EVAL_LEDOn(Led_TypeDef Led);
void STM_EVAL_LEDOff(Led_TypeDef Led);
void STM_EVAL_LEDToggle(Led_TypeDef Led);
void STM_EVAL_PBInit(Button_TypeDef Button, ButtonMode_TypeDef Button_Mode);
uint32_t STM_EVAL_PBGetState(Button_TypeDef Button);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32F0_DISCOVERY_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

256
lib/src/stm32f0_discovery.c
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@ -1,256 +0,0 @@
/**
******************************************************************************
* @file stm32f0_discovery.c
* @author MCD Application Team
* @version V1.0.0
* @date 23-March-2012
* @brief This file provides set of firmware functions to manage Leds and
* push-button available on STM32F0-DISCOVERY Kit from STMicroelectronics.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f0_discovery.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32F0_DISCOVERY
* @{
*/
/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL
* @brief This file provides firmware functions to manage Leds and push-buttons,
* available on STM32F0_DISCOVERY evaluation board from STMicroelectronics.
* @{
*/
/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Private_Defines
* @{
*/
/**
* @}
*/
/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Private_Variables
* @{
*/
GPIO_TypeDef* GPIO_PORT[LEDn] = {LED3_GPIO_PORT, LED4_GPIO_PORT};
const uint16_t GPIO_PIN[LEDn] = {LED3_PIN, LED4_PIN};
const uint32_t GPIO_CLK[LEDn] = {LED3_GPIO_CLK, LED4_GPIO_CLK};
GPIO_TypeDef* BUTTON_PORT[BUTTONn] = {USER_BUTTON_GPIO_PORT};
const uint16_t BUTTON_PIN[BUTTONn] = {USER_BUTTON_PIN};
const uint32_t BUTTON_CLK[BUTTONn] = {USER_BUTTON_GPIO_CLK};
const uint16_t BUTTON_EXTI_LINE[BUTTONn] = {USER_BUTTON_EXTI_LINE};
const uint16_t BUTTON_PORT_SOURCE[BUTTONn] = {USER_BUTTON_EXTI_PORT_SOURCE};
const uint16_t BUTTON_PIN_SOURCE[BUTTONn] = {USER_BUTTON_EXTI_PIN_SOURCE};
const uint16_t BUTTON_IRQn[BUTTONn] = {USER_BUTTON_EXTI_IRQn};
/**
* @}
*/
/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @defgroup STM32F0_DISCOVERY_LOW_LEVEL_Private_Functions
* @{
*/
/**
* @brief Configures LED GPIO.
* @param Led: Specifies the Led to be configured.
* This parameter can be one of following parameters:
* @arg LED3
* @arg LED4
* @retval None
*/
void STM_EVAL_LEDInit(Led_TypeDef Led)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* Enable the GPIO_LED Clock */
RCC_AHBPeriphClockCmd(GPIO_CLK[Led], ENABLE);
/* Configure the GPIO_LED pin */
GPIO_InitStructure.GPIO_Pin = GPIO_PIN[Led];
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIO_PORT[Led], &GPIO_InitStructure);
}
/**
* @brief Turns selected LED On.
* @param Led: Specifies the Led to be set on.
* This parameter can be one of following parameters:
* @arg LED3
* @arg LED4
* @retval None
*/
void STM_EVAL_LEDOn(Led_TypeDef Led)
{
GPIO_PORT[Led]->BSRR = GPIO_PIN[Led];
}
/**
* @brief Turns selected LED Off.
* @param Led: Specifies the Led to be set off.
* This parameter can be one of following parameters:
* @arg LED3
* @arg LED4
* @retval None
*/
void STM_EVAL_LEDOff(Led_TypeDef Led)
{
GPIO_PORT[Led]->BRR = GPIO_PIN[Led];
}
/**
* @brief Toggles the selected LED.
* @param Led: Specifies the Led to be toggled.
* This parameter can be one of following parameters:
* @arg LED3
* @arg LED4
* @retval None
*/
void STM_EVAL_LEDToggle(Led_TypeDef Led)
{
GPIO_PORT[Led]->ODR ^= GPIO_PIN[Led];
}
/**
* @brief Configures Button GPIO and EXTI Line.
* @param Button: Specifies the Button to be configured.
* This parameter can be:
* @arg BUTTON_USER: User Push Button
* @param Button_Mode: Specifies Button mode.
* This parameter can be one of following parameters:
* @arg BUTTON_MODE_GPIO: Button will be used as simple IO
* @arg BUTTON_MODE_EXTI: Button will be connected to EXTI line with interrupt
* generation capability
* @retval None
*/
void STM_EVAL_PBInit(Button_TypeDef Button, ButtonMode_TypeDef Button_Mode)
{
GPIO_InitTypeDef GPIO_InitStructure;
EXTI_InitTypeDef EXTI_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
/* Enable the BUTTON Clock */
RCC_AHBPeriphClockCmd(BUTTON_CLK[Button], ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
/* Configure Button pin as input */
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_InitStructure.GPIO_Pin = BUTTON_PIN[Button];
GPIO_Init(BUTTON_PORT[Button], &GPIO_InitStructure);
if (Button_Mode == BUTTON_MODE_EXTI)
{
/* Connect Button EXTI Line to Button GPIO Pin */
SYSCFG_EXTILineConfig(BUTTON_PORT_SOURCE[Button], BUTTON_PIN_SOURCE[Button]);
/* Configure Button EXTI line */
EXTI_InitStructure.EXTI_Line = BUTTON_EXTI_LINE[Button];
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
if (Button != BUTTON_USER)
{
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
}
else
{
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
}
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
EXTI_Init(&EXTI_InitStructure);
/* Enable and set Button EXTI Interrupt to the lowest priority */
NVIC_InitStructure.NVIC_IRQChannel = BUTTON_IRQn[Button];
NVIC_InitStructure.NVIC_IRQChannelPriority = 0x03;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
}
/**
* @brief Returns the selected Button state.
* @param Button: Specifies the Button to be checked.
* This parameter can be one of following parameters:
* @arg BUTTON_USER: User Push Button
* @retval The Button GPIO pin value.
*/
uint32_t STM_EVAL_PBGetState(Button_TypeDef Button)
{
/* There is no Wakeup button on STM32f0-Discovery Kit */
return GPIO_ReadInputDataBit(BUTTON_PORT[Button], BUTTON_PIN[Button]);
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

33
src/main.c
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@ -1,17 +1,8 @@
#include "stm32f0xx_conf.h"
/*
void TIM2_IRQHandler(void) {
// flash on update event
if (TIM2->SR & TIM_SR_UIF) GPIOC->ODR ^= (1 << 8);
TIM2->SR = 0x0; // reset the status register
}
*/
void SysTick_Handler(void) {
static uint16_t tick = 0;
switch (tick++) {
case 100:
tick = 0;
@ -23,32 +14,20 @@ void SysTick_Handler(void) {
int main(void)
{
//#elif CONFIG_STM32F0_DISCOVERY
//
//#define GPIOC 0x48000800 /* port C */
//#define GPIOC_MODER (GPIOC + 0x00) /* port mode register */
//#define LED_PORT_ODR (GPIOC + 0x14) /* port output data register */
//
//#define LED_BLUE (1 << 8) /* port C, pin 8 */
//#define LED_GREEN (1 << 9) /* port C, pin 9 */
//#define LED_ORANGE 0
//#define LED_RED 0
RCC->AHBENR |= RCC_AHBENR_GPIOCEN; // enable the clock to GPIOC
RCC->AHBENR |= RCC_AHBENR_GPIOCEN; // enable the clock to GPIOC
//(RM0091 lists this as IOPCEN, not GPIOCEN)
RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // enable TIM2 clock
GPIOC->MODER = (1 << 16);
//NVIC->ISER[0] |= 1<< (TIM2_IRQn); // enable the TIM2 IRQ
SysTick_Config(SystemCoreClock/100);
TIM2->PSC = 0x0; // no prescaler, timer counts up in sync with the peripheral clock
TIM2->DIER |= TIM_DIER_UIE; // enable update interrupt
TIM2->ARR = 0x01; // count to 1 (autoreload value 1)
TIM2->CR1 |= TIM_CR1_ARPE | TIM_CR1_CEN; // autoreload on, counter enabled
TIM2->EGR = 1; // trigger update event to reload timer registers
while(1);
}

0
src/system_stm32f0xx.c Executable file → Normal file
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