Switched to using SysTick for blinking; LAST COMMIT BEFORE MAJOR FILE STRUCTURE OVERHAUL
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@ -10,7 +10,6 @@ CFLAGS += -mlittle-endian -mthumb -mcpu=cortex-m0 -march=armv6s-m
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CFLAGS += -ffreestanding -nostdlib
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CFLAGS += -ffreestanding -nostdlib
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CFLAGS += -Iinc -Iinc/core -Iinc/peripherals
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CFLAGS += -Iinc -Iinc/core -Iinc/peripherals
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SRCS = stm32f0_discovery.c
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SRCS = stm32f0xx_adc.c stm32f0xx_cec.c stm32f0xx_comp.c stm32f0xx_crc.c \
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SRCS = stm32f0xx_adc.c stm32f0xx_cec.c stm32f0xx_comp.c stm32f0xx_crc.c \
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stm32f0xx_dac.c stm32f0xx_dbgmcu.c stm32f0xx_dma.c stm32f0xx_exti.c \
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stm32f0xx_dac.c stm32f0xx_dbgmcu.c stm32f0xx_dma.c stm32f0xx_exti.c \
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stm32f0xx_flash.c stm32f0xx_gpio.c stm32f0xx_i2c.c stm32f0xx_iwdg.c \
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stm32f0xx_flash.c stm32f0xx_gpio.c stm32f0xx_i2c.c stm32f0xx_iwdg.c \
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16
src/main.c
16
src/main.c
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@ -1,11 +1,24 @@
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#include "stm32f0xx_conf.h"
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#include "stm32f0xx_conf.h"
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/*
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void TIM2_IRQHandler(void) {
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void TIM2_IRQHandler(void) {
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// flash on update event
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// flash on update event
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if (TIM2->SR & TIM_SR_UIF) GPIOC->ODR ^= (1 << 8);
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if (TIM2->SR & TIM_SR_UIF) GPIOC->ODR ^= (1 << 8);
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TIM2->SR = 0x0; // reset the status register
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TIM2->SR = 0x0; // reset the status register
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}
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}
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*/
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void SysTick_Handler(void) {
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static uint16_t tick = 0;
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switch (tick++) {
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case 100:
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tick = 0;
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GPIOC->ODR ^= (1 << 8);
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break;
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}
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}
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int main(void)
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int main(void)
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{
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{
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@ -27,7 +40,8 @@ int main(void)
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GPIOC->MODER = (1 << 16);
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GPIOC->MODER = (1 << 16);
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NVIC->ISER[0] |= 1<< (TIM2_IRQn); // enable the TIM2 IRQ
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//NVIC->ISER[0] |= 1<< (TIM2_IRQn); // enable the TIM2 IRQ
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SysTick_Config(SystemCoreClock/100);
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TIM2->PSC = 0x0; // no prescaler, timer counts up in sync with the peripheral clock
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TIM2->PSC = 0x0; // no prescaler, timer counts up in sync with the peripheral clock
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TIM2->DIER |= TIM_DIER_UIE; // enable update interrupt
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TIM2->DIER |= TIM_DIER_UIE; // enable update interrupt
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