294 lines
11 KiB
C
Executable File
294 lines
11 KiB
C
Executable File
/**
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******************************************************************************
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* @file stm32f0xx_iwdg.c
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* @author MCD Application Team
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* @version V1.0.0
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* @date 23-March-2012
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* @brief This file provides firmware functions to manage the following
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* functionalities of the Independent watchdog (IWDG) peripheral:
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* + Prescaler and Counter configuration
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* + IWDG activation
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* + Flag management
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*
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* @verbatim
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*
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==============================================================================
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##### IWDG features #####
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==============================================================================
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[..] The IWDG can be started by either software or hardware (configurable
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through option byte).
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[..] The IWDG is clocked by its own dedicated low-speed clock (LSI) and
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thus stays active even if the main clock fails.
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Once the IWDG is started, the LSI is forced ON and cannot be disabled
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(LSI cannot be disabled too), and the counter starts counting down from
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the reset value of 0xFFF. When it reaches the end of count value (0x000)
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a system reset is generated.
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The IWDG counter should be reloaded at regular intervals to prevent
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an MCU reset.
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[..] The IWDG is implemented in the VDD voltage domain that is still functional
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in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
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[..] IWDGRST flag in RCC_CSR register can be used to inform when a IWDG
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reset occurs.
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[..] Min-max timeout value @40KHz (LSI): ~0.1ms / ~28.3s
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The IWDG timeout may vary due to LSI frequency dispersion. STM32F0xx
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devices provide the capability to measure the LSI frequency (LSI clock
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should be seleted as RTC clock which is internally connected to TIM10 CH1
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input capture). The measured value can be used to have an IWDG timeout with
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an acceptable accuracy.
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For more information, please refer to the STM32F0xx Reference manual.
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##### How to use this driver #####
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==============================================================================
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[..] This driver allows to use IWDG peripheral with either window option enabled
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or disabled. To do so follow one of the two procedures below.
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(#) Window option is enabled:
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(++) Start the IWDG using IWDG_Enable() function, when the IWDG is used
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in software mode (no need to enable the LSI, it will be enabled
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by hardware).
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(++) Enable write access to IWDG_PR and IWDG_RLR registers using
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IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function.
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(++) Configure the IWDG prescaler using IWDG_SetPrescaler() function.
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(++) Configure the IWDG counter value using IWDG_SetReload() function.
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This value will be loaded in the IWDG counter each time the counter
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is reloaded, then the IWDG will start counting down from this value.
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(++) Wait for the IWDG registers to be updated using IWDG_GetFlagStatus() function.
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(++) Configure the IWDG refresh window using IWDG_SetWindowValue() function.
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(#) Window option is disabled:
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(++) Enable write access to IWDG_PR and IWDG_RLR registers using
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IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function.
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(++) Configure the IWDG prescaler using IWDG_SetPrescaler() function.
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(++) Configure the IWDG counter value using IWDG_SetReload() function.
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This value will be loaded in the IWDG counter each time the counter
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is reloaded, then the IWDG will start counting down from this value.
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(++) Wait for the IWDG registers to be updated using IWDG_GetFlagStatus() function.
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(++) reload the IWDG counter at regular intervals during normal operation
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to prevent an MCU reset, using IWDG_ReloadCounter() function.
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(++) Start the IWDG using IWDG_Enable() function, when the IWDG is used
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in software mode (no need to enable the LSI, it will be enabled
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by hardware).
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@endverbatim
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f0xx_iwdg.h"
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/** @addtogroup STM32F0xx_StdPeriph_Driver
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* @{
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*/
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/** @defgroup IWDG
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* @brief IWDG driver modules
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* ---------------------- IWDG registers bit mask ----------------------------*/
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/* KR register bit mask */
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#define KR_KEY_RELOAD ((uint16_t)0xAAAA)
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#define KR_KEY_ENABLE ((uint16_t)0xCCCC)
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup IWDG_Private_Functions
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* @{
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*/
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/** @defgroup IWDG_Group1 Prescaler and Counter configuration functions
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* @brief Prescaler and Counter configuration functions
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*
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@verbatim
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==============================================================================
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##### Prescaler and Counter configuration functions #####
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==============================================================================
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@endverbatim
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* @{
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*/
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/**
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* @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
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* @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
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* This parameter can be one of the following values:
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* @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
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* @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
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* @retval None
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*/
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void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
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{
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/* Check the parameters */
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assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
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IWDG->KR = IWDG_WriteAccess;
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}
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/**
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* @brief Sets IWDG Prescaler value.
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* @param IWDG_Prescaler: specifies the IWDG Prescaler value.
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* This parameter can be one of the following values:
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* @arg IWDG_Prescaler_4: IWDG prescaler set to 4
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* @arg IWDG_Prescaler_8: IWDG prescaler set to 8
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* @arg IWDG_Prescaler_16: IWDG prescaler set to 16
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* @arg IWDG_Prescaler_32: IWDG prescaler set to 32
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* @arg IWDG_Prescaler_64: IWDG prescaler set to 64
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* @arg IWDG_Prescaler_128: IWDG prescaler set to 128
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* @arg IWDG_Prescaler_256: IWDG prescaler set to 256
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* @retval None
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*/
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void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
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{
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/* Check the parameters */
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assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
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IWDG->PR = IWDG_Prescaler;
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}
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/**
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* @brief Sets IWDG Reload value.
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* @param Reload: specifies the IWDG Reload value.
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* This parameter must be a number between 0 and 0x0FFF.
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* @retval None
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*/
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void IWDG_SetReload(uint16_t Reload)
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{
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/* Check the parameters */
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assert_param(IS_IWDG_RELOAD(Reload));
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IWDG->RLR = Reload;
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}
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/**
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* @brief Reloads IWDG counter with value defined in the reload register
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* (write access to IWDG_PR and IWDG_RLR registers disabled).
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* @param None
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* @retval None
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*/
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void IWDG_ReloadCounter(void)
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{
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IWDG->KR = KR_KEY_RELOAD;
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}
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/**
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* @brief Sets the IWDG window value.
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* @param WindowValue: specifies the window value to be compared to the downcounter.
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* @retval None
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*/
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void IWDG_SetWindowValue(uint16_t WindowValue)
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{
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/* Check the parameters */
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assert_param(IS_IWDG_WINDOW_VALUE(WindowValue));
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IWDG->WINR = WindowValue;
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}
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/**
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* @}
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*/
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/** @defgroup IWDG_Group2 IWDG activation function
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* @brief IWDG activation function
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*
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@verbatim
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==============================================================================
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##### IWDG activation function #####
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==============================================================================
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@endverbatim
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* @{
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*/
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/**
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* @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
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* @param None.
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* @retval None.
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*/
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void IWDG_Enable(void)
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{
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IWDG->KR = KR_KEY_ENABLE;
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}
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/**
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* @}
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*/
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/** @defgroup IWDG_Group3 Flag management function
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* @brief Flag management function
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*
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@verbatim
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===============================================================================
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##### Flag management function #####
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===============================================================================
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@endverbatim
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* @{
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*/
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/**
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* @brief Checks whether the specified IWDG flag is set or not.
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* @param IWDG_FLAG: specifies the flag to check.
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* This parameter can be one of the following values:
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* @arg IWDG_FLAG_PVU: Prescaler Value Update on going
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* @arg IWDG_FLAG_RVU: Reload Value Update on going
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* @arg IWDG_FLAG_WVU: Counter Window Value Update on going
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* @retval The new state of IWDG_FLAG (SET or RESET).
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*/
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FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
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{
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FlagStatus bitstatus = RESET;
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/* Check the parameters */
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assert_param(IS_IWDG_FLAG(IWDG_FLAG));
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if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
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{
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bitstatus = SET;
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}
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else
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{
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bitstatus = RESET;
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}
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/* Return the flag status */
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return bitstatus;
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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