/*
 * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
 *
 * Copyright 2007,2008 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/dts-v1/;

/ {
	model = "pq2fads";
	compatible = "fsl,pq2fads";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		serial0 = &serial0;
		serial1 = &serial1;
		pci0 = &pci0;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			reg = <0x0>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <16384>;
			i-cache-size = <16384>;
			timebase-frequency = <0>;
			clock-frequency = <0>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x0>;
	};

	localbus@f0010100 {
		compatible = "fsl,mpc8280-localbus",
		             "fsl,pq2-localbus";
		#address-cells = <2>;
		#size-cells = <1>;
		reg = <0xf0010100 0x60>;

		ranges = <0x0 0x0 0xff800000 0x800000
		          0x1 0x0 0xf4500000 0x8000
		          0x8 0x0 0xf8200000 0x8000>;

		flash@0,0 {
			compatible = "jedec-flash";
			reg = <0x0 0x0 0x800000>;
			bank-width = <4>;
			device-width = <1>;
		};

		bcsr@1,0 {
			reg = <0x1 0x0 0x20>;
			compatible = "fsl,pq2fads-bcsr";
		};

		PCI_PIC: pic@8,0 {
			#interrupt-cells = <1>;
			interrupt-controller;
			reg = <0x8 0x0 0x8>;
			compatible = "fsl,pq2ads-pci-pic";
			interrupt-parent = <&PIC>;
			interrupts = <24 8>;
		};
	};

	pci0: pci@f0010800 {
		device_type = "pci";
		reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
		compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		clock-frequency = <66000000>;
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <
		                /* IDSEL 0x16 */
		                 0xb000 0x0 0x0 0x1 &PCI_PIC 0
		                 0xb000 0x0 0x0 0x2 &PCI_PIC 1
		                 0xb000 0x0 0x0 0x3 &PCI_PIC 2
		                 0xb000 0x0 0x0 0x4 &PCI_PIC 3

		                /* IDSEL 0x17 */
		                 0xb800 0x0 0x0 0x1 &PCI_PIC 4
		                 0xb800 0x0 0x0 0x2 &PCI_PIC 5
		                 0xb800 0x0 0x0 0x3 &PCI_PIC 6
		                 0xb800 0x0 0x0 0x4 &PCI_PIC 7

		                /* IDSEL 0x18 */
		                 0xc000 0x0 0x0 0x1 &PCI_PIC 8
		                 0xc000 0x0 0x0 0x2 &PCI_PIC 9
		                 0xc000 0x0 0x0 0x3 &PCI_PIC 10
		                 0xc000 0x0 0x0 0x4 &PCI_PIC 11>;

		interrupt-parent = <&PIC>;
		interrupts = <18 8>;
		ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
		          0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
		          0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
	};

	soc@f0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "fsl,mpc8280", "fsl,pq2-soc";
		ranges = <0x0 0xf0000000 0x53000>;

		// Temporary -- will go away once kernel uses ranges for get_immrbase().
		reg = <0xf0000000 0x53000>;

		cpm@119c0 {
			#address-cells = <1>;
			#size-cells = <1>;
			#interrupt-cells = <2>;
			compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
			reg = <0x119c0 0x30>;
			ranges;

			muram@0 {
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0x0 0x0 0x10000>;

				data@0 {
					compatible = "fsl,cpm-muram-data";
					reg = <0x0 0x2000 0x9800 0x800>;
				};
			};

			brg@119f0 {
				compatible = "fsl,mpc8280-brg",
				             "fsl,cpm2-brg",
				             "fsl,cpm-brg";
				reg = <0x119f0 0x10 0x115f0 0x10>;
			};

			serial0: serial@11a00 {
				device_type = "serial";
				compatible = "fsl,mpc8280-scc-uart",
				             "fsl,cpm2-scc-uart";
				reg = <0x11a00 0x20 0x8000 0x100>;
				interrupts = <40 8>;
				interrupt-parent = <&PIC>;
				fsl,cpm-brg = <1>;
				fsl,cpm-command = <0x800000>;
			};

			serial1: serial@11a20 {
				device_type = "serial";
				compatible = "fsl,mpc8280-scc-uart",
				             "fsl,cpm2-scc-uart";
				reg = <0x11a20 0x20 0x8100 0x100>;
				interrupts = <41 8>;
				interrupt-parent = <&PIC>;
				fsl,cpm-brg = <2>;
				fsl,cpm-command = <0x4a00000>;
			};

			enet0: ethernet@11320 {
				device_type = "network";
				compatible = "fsl,mpc8280-fcc-enet",
				             "fsl,cpm2-fcc-enet";
				reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
				interrupts = <33 8>;
				interrupt-parent = <&PIC>;
				phy-handle = <&PHY0>;
				linux,network-index = <0>;
				fsl,cpm-command = <0x16200300>;
			};

			enet1: ethernet@11340 {
				device_type = "network";
				compatible = "fsl,mpc8280-fcc-enet",
				             "fsl,cpm2-fcc-enet";
				reg = <0x11340 0x20 0x8600 0x100 0x113d0 0x1>;
				interrupts = <34 8>;
				interrupt-parent = <&PIC>;
				phy-handle = <&PHY1>;
				linux,network-index = <1>;
				fsl,cpm-command = <0x1a400300>;
				local-mac-address = [00 e0 0c 00 79 01];
			};

			mdio@10d40 {
				compatible = "fsl,pq2fads-mdio-bitbang",
				             "fsl,mpc8280-mdio-bitbang",
				             "fsl,cpm2-mdio-bitbang";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x10d40 0x14>;
				fsl,mdio-pin = <9>;
				fsl,mdc-pin = <10>;

				PHY0: ethernet-phy@0 {
					interrupt-parent = <&PIC>;
					interrupts = <25 2>;
					reg = <0x0>;
				};

				PHY1: ethernet-phy@1 {
					interrupt-parent = <&PIC>;
					interrupts = <25 2>;
					reg = <0x3>;
				};
			};

			usb@11b60 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,mpc8280-usb",
				             "fsl,cpm2-usb";
				reg = <0x11b60 0x18 0x8b00 0x100>;
				interrupt-parent = <&PIC>;
				interrupts = <11 8>;
				fsl,cpm-command = <0x2e600000>;
			};
		};

		PIC: interrupt-controller@10c00 {
			#interrupt-cells = <2>;
			interrupt-controller;
			reg = <0x10c00 0x80>;
			compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
		};

	};

	chosen {
		linux,stdout-path = "/soc/cpm/serial@11a00";
	};
};
