2003-06-19 23:01:32 +00:00
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/*
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* (C) Copyright 2003
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* David M<EFBFBD>ller ELSOFT AG Switzerland. d.mueller@elsoft.ch
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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2002-07-15 06:49:56 +00:00
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/************************************************
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* NAME : s3c2400.h
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2003-06-19 23:01:32 +00:00
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* Version : 31.3.2003
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2002-07-15 06:49:56 +00:00
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*
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2003-06-19 23:01:32 +00:00
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* Based on S3C2400X User's manual Rev 1.1
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2002-07-15 06:49:56 +00:00
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************************************************/
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#ifndef __S3C2400_H__
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#define __S3C2400_H__
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2003-06-19 23:01:32 +00:00
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#define S3C24X0_UART_CHANNELS 2
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#define S3C24X0_SPI_CHANNELS 1
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#define PALETTE (0x14A00400) /* SJS */
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typedef enum {
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S3C24X0_UART0,
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S3C24X0_UART1,
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} S3C24X0_UARTS_NR;
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/* S3C2400 device base addresses */
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#define S3C24X0_MEMCTL_BASE 0x14000000
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#define S3C24X0_USB_HOST_BASE 0x14200000
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#define S3C24X0_INTERRUPT_BASE 0x14400000
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#define S3C24X0_DMA_BASE 0x14600000
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#define S3C24X0_CLOCK_POWER_BASE 0x14800000
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#define S3C24X0_LCD_BASE 0x14A00000
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#define S3C24X0_UART_BASE 0x15000000
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#define S3C24X0_TIMER_BASE 0x15100000
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#define S3C24X0_USB_DEVICE_BASE 0x15200140
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#define S3C24X0_WATCHDOG_BASE 0x15300000
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#define S3C24X0_I2C_BASE 0x15400000
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#define S3C24X0_I2S_BASE 0x15508000
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#define S3C24X0_GPIO_BASE 0x15600000
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#define S3C24X0_RTC_BASE 0x15700000
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#define S3C24X0_ADC_BASE 0x15800000
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#define S3C24X0_SPI_BASE 0x15900000
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#define S3C2400_MMC_BASE 0x15A00000
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/* include common stuff */
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#include <s3c24x0.h>
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2006-06-26 08:54:52 +00:00
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static inline S3C24X0_MEMCTL * S3C24X0_GetBase_MEMCTL(void)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C24X0_MEMCTL * const)S3C24X0_MEMCTL_BASE;
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}
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static inline S3C24X0_USB_HOST * S3C24X0_GetBase_USB_HOST(void)
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{
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return (S3C24X0_USB_HOST * const)S3C24X0_USB_HOST_BASE;
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}
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static inline S3C24X0_INTERRUPT * S3C24X0_GetBase_INTERRUPT(void)
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{
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return (S3C24X0_INTERRUPT * const)S3C24X0_INTERRUPT_BASE;
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}
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2006-06-26 08:54:52 +00:00
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static inline S3C24X0_DMAS * S3C24X0_GetBase_DMAS(void)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C24X0_DMAS * const)S3C24X0_DMA_BASE;
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}
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static inline S3C24X0_CLOCK_POWER * S3C24X0_GetBase_CLOCK_POWER(void)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C24X0_CLOCK_POWER * const)S3C24X0_CLOCK_POWER_BASE;
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}
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static inline S3C24X0_LCD * S3C24X0_GetBase_LCD(void)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C24X0_LCD * const)S3C24X0_LCD_BASE;
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}
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static inline S3C24X0_UART * S3C24X0_GetBase_UART(S3C24X0_UARTS_NR nr)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C24X0_UART * const)(S3C24X0_UART_BASE + (nr * 0x4000));
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}
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static inline S3C24X0_TIMERS * S3C24X0_GetBase_TIMERS(void)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C24X0_TIMERS * const)S3C24X0_TIMER_BASE;
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}
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static inline S3C24X0_USB_DEVICE * S3C24X0_GetBase_USB_DEVICE(void)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C24X0_USB_DEVICE * const)S3C24X0_USB_DEVICE_BASE;
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}
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static inline S3C24X0_WATCHDOG * S3C24X0_GetBase_WATCHDOG(void)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C24X0_WATCHDOG * const)S3C24X0_WATCHDOG_BASE;
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}
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static inline S3C24X0_I2C * S3C24X0_GetBase_I2C(void)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C24X0_I2C * const)S3C24X0_I2C_BASE;
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}
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static inline S3C24X0_I2S * S3C24X0_GetBase_I2S(void)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C24X0_I2S * const)S3C24X0_I2S_BASE;
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}
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2006-06-26 08:54:52 +00:00
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static inline S3C24X0_GPIO * S3C24X0_GetBase_GPIO(void)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C24X0_GPIO * const)S3C24X0_GPIO_BASE;
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}
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static inline S3C24X0_RTC * S3C24X0_GetBase_RTC(void)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C24X0_RTC * const)S3C24X0_RTC_BASE;
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}
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static inline S3C2400_ADC * S3C2400_GetBase_ADC(void)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C2400_ADC * const)S3C24X0_ADC_BASE;
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}
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static inline S3C24X0_SPI * S3C24X0_GetBase_SPI(void)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C24X0_SPI * const)S3C24X0_SPI_BASE;
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}
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static inline S3C2400_MMC * S3C2400_GetBase_MMC(void)
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2003-06-19 23:01:32 +00:00
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{
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return (S3C2400_MMC * const)S3C2400_MMC_BASE;
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}
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2002-07-15 06:49:56 +00:00
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#endif /*__S3C2400_H__*/
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