2012-11-27 15:49:14 +00:00
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#ifndef __MACH_ESDCTL_V2_H
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#define __MACH_ESDCTL_V2_H
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2008-12-19 11:00:25 +00:00
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/* SDRAM Controller registers */
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2012-10-09 19:11:54 +00:00
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#define IMX_ESDCTL0 0x00 /* Enhanced SDRAM Control Register 0 */
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#define IMX_ESDCFG0 0x04 /* Enhanced SDRAM Configuration Register 0 */
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#define IMX_ESDCTL1 0x08 /* Enhanced SDRAM Control Register 1 */
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#define IMX_ESDCFG1 0x0C /* Enhanced SDRAM Configuration Register 1 */
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#define IMX_ESDMISC 0x10 /* Enhanced SDRAM Miscellanious Register */
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2008-12-19 11:00:25 +00:00
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#define ESDCTL0_SDE (1 << 31)
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#define ESDCTL0_SMODE_NORMAL (0 << 28)
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#define ESDCTL0_SMODE_PRECHARGE (1 << 28)
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#define ESDCTL0_SMODE_AUTO_REFRESH (2 << 28)
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#define ESDCTL0_SMODE_LOAD_MODE (3 << 28)
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#define ESDCTL0_SMODE_MANUAL_SELF_REFRESH (4 << 28)
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#define ESDCTL0_SP (1 << 27)
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#define ESDCTL0_ROW11 (0 << 24)
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#define ESDCTL0_ROW12 (1 << 24)
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#define ESDCTL0_ROW13 (2 << 24)
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#define ESDCTL0_ROW14 (3 << 24)
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#define ESDCTL0_ROW15 (4 << 24)
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2010-10-12 14:31:38 +00:00
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#define ESDCTL0_ROW_MASK (7 << 24)
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2008-12-19 11:00:25 +00:00
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#define ESDCTL0_COL8 (0 << 20)
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#define ESDCTL0_COL9 (1 << 20)
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#define ESDCTL0_COL10 (2 << 20)
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2010-10-12 14:31:38 +00:00
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#define ESDCTL0_COL_MASK (3 << 20)
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2008-12-19 11:00:25 +00:00
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#define ESDCTL0_DSIZ_31_16 (0 << 16)
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#define ESDCTL0_DSIZ_15_0 (1 << 16)
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#define ESDCTL0_DSIZ_31_0 (2 << 16)
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2012-10-16 07:43:55 +00:00
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#define ESDCTL0_DSIZ_MASK (3 << 16)
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2008-12-19 11:00:25 +00:00
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#define ESDCTL0_REF1 (1 << 13)
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#define ESDCTL0_REF2 (2 << 13)
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#define ESDCTL0_REF4 (3 << 13)
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#define ESDCTL0_REF8 (4 << 13)
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#define ESDCTL0_REF16 (5 << 13)
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2011-02-17 10:04:26 +00:00
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#define ESDCTL0_PWDT_DISABLED (0 << 10)
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#define ESDCTL0_PWDT_PRECHARGE_PWDN (1 << 10)
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#define ESDCTL0_PWDT_PWDN_64 (2 << 10)
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#define ESDCTL0_PWDT_PWDN_128 (3 << 10)
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2008-12-19 11:00:25 +00:00
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#define ESDCTL0_FP (1 << 8)
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#define ESDCTL0_BL (1 << 7)
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2010-10-12 14:31:38 +00:00
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#define ESDMISC_RST 0x00000002
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#define ESDMISC_MDDR_EN 0x00000004
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#define ESDMISC_MDDR_DIS 0x00000000
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#define ESDMISC_MDDR_DL_RST 0x00000008
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#define ESDMISC_MDDR_MDIS 0x00000010
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#define ESDMISC_LHD 0x00000020
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#define ESDMISC_SDRAMRDY 0x80000000
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#define ESDCFGx_tXP_MASK 0x00600000
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#define ESDCFGx_tXP_1 0x00000000
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#define ESDCFGx_tXP_2 0x00200000
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#define ESDCFGx_tXP_3 0x00400000
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#define ESDCFGx_tXP_4 0x00600000
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#define ESDCFGx_tWTR_MASK 0x00100000
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#define ESDCFGx_tWTR_1 0x00000000
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#define ESDCFGx_tWTR_2 0x00100000
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#define ESDCFGx_tRP_MASK 0x000c0000
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#define ESDCFGx_tRP_1 0x00000000
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#define ESDCFGx_tRP_2 0x00040000
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#define ESDCFGx_tRP_3 0x00080000
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#define ESDCFGx_tRP_4 0x000c0000
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#define ESDCFGx_tMRD_MASK 0x00030000
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#define ESDCFGx_tMRD_1 0x00000000
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#define ESDCFGx_tMRD_2 0x00010000
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#define ESDCFGx_tMRD_3 0x00020000
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#define ESDCFGx_tMRD_4 0x00030000
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#define ESDCFGx_tWR_MASK 0x00008000
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#define ESDCFGx_tWR_1_2 0x00000000
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#define ESDCFGx_tWR_2_3 0x00008000
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#define ESDCFGx_tRAS_MASK 0x00007000
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#define ESDCFGx_tRAS_1 0x00000000
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#define ESDCFGx_tRAS_2 0x00001000
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#define ESDCFGx_tRAS_3 0x00002000
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#define ESDCFGx_tRAS_4 0x00003000
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#define ESDCFGx_tRAS_5 0x00004000
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#define ESDCFGx_tRAS_6 0x00005000
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#define ESDCFGx_tRAS_7 0x00006000
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#define ESDCFGx_tRAS_8 0x00007000
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#define ESDCFGx_tRRD_MASK 0x00000c00
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#define ESDCFGx_tRRD_1 0x00000000
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#define ESDCFGx_tRRD_2 0x00000400
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#define ESDCFGx_tRRD_3 0x00000800
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#define ESDCFGx_tRRD_4 0x00000c00
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#define ESDCFGx_tCAS_MASK 0x00000300
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#define ESDCFGx_tCAS_2 0x00000200
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#define ESDCFGx_tCAS_3 0x00000300
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#define ESDCFGx_tRCD_MASK 0x00000070
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#define ESDCFGx_tRCD_1 0x00000000
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#define ESDCFGx_tRCD_2 0x00000010
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#define ESDCFGx_tRCD_3 0x00000020
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#define ESDCFGx_tRCD_4 0x00000030
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#define ESDCFGx_tRCD_5 0x00000040
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#define ESDCFGx_tRCD_6 0x00000050
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#define ESDCFGx_tRCD_7 0x00000060
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#define ESDCFGx_tRCD_8 0x00000070
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#define ESDCFGx_tRC_MASK 0x0000000f
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#define ESDCFGx_tRC_20 0x00000000
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#define ESDCFGx_tRC_2 0x00000001
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#define ESDCFGx_tRC_3 0x00000002
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#define ESDCFGx_tRC_4 0x00000003
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#define ESDCFGx_tRC_5 0x00000004
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#define ESDCFGx_tRC_6 0x00000005
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#define ESDCFGx_tRC_7 0x00000006
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#define ESDCFGx_tRC_8 0x00000007
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#define ESDCFGx_tRC_9 0x00000008
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#define ESDCFGx_tRC_10 0x00000009
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#define ESDCFGx_tRC_11 0x0000000a
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#define ESDCFGx_tRC_12 0x0000000b
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#define ESDCFGx_tRC_13 0x0000000c
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#define ESDCFGx_tRC_14 0x0000000d
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//#define ESDCFGx_tRC_14 0x0000000e // 15 seems to not exist
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#define ESDCFGx_tRC_16 0x0000000f
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2012-10-16 07:43:55 +00:00
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#ifndef __ASSEMBLY__
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void __naked __noreturn imx1_barebox_entry(uint32_t boarddata);
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void __naked __noreturn imx25_barebox_entry(uint32_t boarddata);
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void __naked __noreturn imx27_barebox_entry(uint32_t boarddata);
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void __naked __noreturn imx31_barebox_entry(uint32_t boarddata);
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void __naked __noreturn imx35_barebox_entry(uint32_t boarddata);
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void __naked __noreturn imx51_barebox_entry(uint32_t boarddata);
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void __naked __noreturn imx53_barebox_entry(uint32_t boarddata);
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void __naked __noreturn imx6_barebox_entry(uint32_t boarddata);
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2013-04-26 21:48:35 +00:00
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void imx_esdctl_disable(void);
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2012-10-16 07:43:55 +00:00
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#endif
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2012-11-27 15:49:14 +00:00
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#endif /* __MACH_ESDCTL_V2_H */
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