2014-04-30 10:01:36 +00:00
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/*
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* Copyright (C) 2014 Christian Hemp <c.hemp@phytec.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <debug_ll.h>
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#include <common.h>
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#include <sizes.h>
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#include <io.h>
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#include <asm/barebox-arm-head.h>
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#include <asm/barebox-arm.h>
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#include <asm/sections.h>
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#include <asm/cache.h>
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#include <asm/mmu.h>
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#include <mach/imx6-mmdc.h>
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#include <mach/imx6.h>
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static inline void setup_uart(void)
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{
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void __iomem *ccmbase = IOMEM(MX6_CCM_BASE_ADDR);
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void __iomem *uartbase = IOMEM(MX6_UART3_BASE_ADDR);
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void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR);
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writel(0x4, iomuxbase + 0x01f8);
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writel(0xffffffff, ccmbase + 0x68);
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writel(0xffffffff, ccmbase + 0x6c);
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writel(0xffffffff, ccmbase + 0x70);
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writel(0xffffffff, ccmbase + 0x74);
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writel(0xffffffff, ccmbase + 0x78);
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writel(0xffffffff, ccmbase + 0x7c);
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writel(0xffffffff, ccmbase + 0x80);
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writel(0x00000000, uartbase + 0x80);
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writel(0x00004027, uartbase + 0x84);
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writel(0x00000704, uartbase + 0x88);
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writel(0x00000a81, uartbase + 0x90);
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writel(0x0000002b, uartbase + 0x9c);
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writel(0x00013880, uartbase + 0xb0);
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writel(0x0000047f, uartbase + 0xa4);
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writel(0x0000c34f, uartbase + 0xa8);
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writel(0x00000001, uartbase + 0x80);
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putc_ll('>');
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}
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extern char __dtb_imx6q_phytec_pbaa03_start[];
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static void __noreturn start_imx6q_phytec_pbaa03_common(uint32_t size)
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{
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2014-05-06 19:28:16 +00:00
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void *fdt;
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2014-04-30 10:01:36 +00:00
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2014-06-25 07:18:20 +00:00
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imx6_cpu_lowlevel_init();
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2014-04-30 10:01:36 +00:00
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arm_setup_stack(0x00920000 - 8);
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if (IS_ENABLED(CONFIG_DEBUG_LL))
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setup_uart();
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2014-05-06 19:28:16 +00:00
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fdt = __dtb_imx6q_phytec_pbaa03_start - get_runtime_offset();
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2014-04-30 10:01:36 +00:00
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barebox_arm_entry(0x10000000, size, fdt);
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}
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ENTRY_FUNCTION(start_phytec_pbaa03_1gib, r0, r1, r2)
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{
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start_imx6q_phytec_pbaa03_common(SZ_1G);
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}
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ENTRY_FUNCTION(start_phytec_pbaa03_1gib_1bank, r0, r1, r2)
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{
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start_imx6q_phytec_pbaa03_common(SZ_1G);
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}
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ENTRY_FUNCTION(start_phytec_pbaa03_2gib, r0, r1, r2)
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{
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start_imx6q_phytec_pbaa03_common(SZ_2G);
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}
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