barebox/arch/ppc/mach-mpc85xx/Makefile

obj-y 			+= cpuid.o
obj-y 			+= cpu.o
obj-y 			+= cpu_init.o
obj-y			+= fsl_law.o
obj-y			+= speed.o
obj-y			+=time.o
obj-$(CONFIG_MP)	+= mp.o
obj-$(CONFIG_OFTREE)	+= fdt.o
obj-$(CONFIG_DRIVER_NET_GIANFAR) += eth-devices.o
MPC85xx start-up support code This patch adds initialization functions used by the e500v2 start-up code and board specific code (L2 cache initialization). Other functions help identify the CPU or return the programmed memory size. Finally, the Makefile and Kconfig file are added. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> 2012-05-17 16:49:48 +00:00			`obj-y += cpuid.o`
			`obj-y += cpu.o`
			`obj-y += cpu_init.o`
			`obj-y += fsl_law.o`
			`obj-y += speed.o`
			`obj-y +=time.o`
			`obj-$(CONFIG_MP) += mp.o`
ppc: add and update device tree fixup functions This adds support for populating derived properties of the mpc85xx SOC which are not typically included in the dtb directly. This update is based on U-Boot code from common/fdt_support.c and arch/powerpc/cpu/mpc85xx/fdt.c - version git-2b26201. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> 2013-09-04 06:42:29 +00:00			`obj-$(CONFIG_OFTREE) += fdt.o`
fsl: Freescale TSEC specific initialization. The fsl_eth_init function maps the TSEC registers (MAC, TBI and external PHY access registers). It also passes the PHY address and TBI registers initialization values. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> 2012-08-07 14:30:57 +00:00			`obj-$(CONFIG_DRIVER_NET_GIANFAR) += eth-devices.o`