2007-10-17 15:57:55 +00:00
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/*
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*
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* (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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2004-08-01 22:48:16 +00:00
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#ifndef _IMX_REGS_H
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#define _IMX_REGS_H
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2007-10-17 15:57:55 +00:00
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2004-08-01 22:48:16 +00:00
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/* ------------------------------------------------------------------------
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* Motorola IMX system registers
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* ------------------------------------------------------------------------
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*/
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# ifndef __ASSEMBLY__
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2007-07-05 16:01:24 +00:00
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# define __REG(x) (*((volatile u32 *)(x)))
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# define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y)))
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2004-08-01 22:48:16 +00:00
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# else
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# define __REG(x) (x)
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# define __REG2(x,y) ((x)+(y))
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#endif
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2007-10-07 14:31:54 +00:00
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#ifdef CONFIG_ARCH_IMX1
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2007-10-17 15:57:55 +00:00
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# include <asm/arch/imx1-regs.h>
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2007-10-07 14:31:54 +00:00
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#elif defined CONFIG_ARCH_IMX27
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2007-10-17 15:57:55 +00:00
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# include <asm/arch/imx27-regs.h>
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#elif defined CONFIG_ARCH_IMX31
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# include <asm/arch/imx31-regs.h>
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2007-10-07 14:31:54 +00:00
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#else
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2007-10-17 15:57:55 +00:00
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# error "unknown i.MX soc type"
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2007-10-07 14:31:54 +00:00
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#endif
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2004-08-01 22:48:16 +00:00
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/*
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* GPIO Module and I/O Multiplexer
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* x = 0..3 for reg_A, reg_B, reg_C, reg_D
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2007-10-07 14:31:54 +00:00
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*
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* i.MX1 and i.MXL: 0 <= x <= 3
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* i.MX27 : 0 <= x <= 5
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2004-08-01 22:48:16 +00:00
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*/
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#define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8)
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#define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8)
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#define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8)
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#define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8)
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#define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8)
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#define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8)
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#define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8)
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#define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8)
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#define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8)
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#define SSR(x) __REG2(IMX_GPIO_BASE + 0x24, ((x) & 3) << 8)
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#define ICR1(x) __REG2(IMX_GPIO_BASE + 0x28, ((x) & 3) << 8)
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#define ICR2(x) __REG2(IMX_GPIO_BASE + 0x2c, ((x) & 3) << 8)
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#define IMR(x) __REG2(IMX_GPIO_BASE + 0x30, ((x) & 3) << 8)
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#define ISR(x) __REG2(IMX_GPIO_BASE + 0x34, ((x) & 3) << 8)
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#define GPR(x) __REG2(IMX_GPIO_BASE + 0x38, ((x) & 3) << 8)
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#define SWR(x) __REG2(IMX_GPIO_BASE + 0x3c, ((x) & 3) << 8)
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#define PUEN(x) __REG2(IMX_GPIO_BASE + 0x40, ((x) & 3) << 8)
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#define GPIO_PIN_MASK 0x1f
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2007-10-07 14:31:54 +00:00
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#define GPIO_PORT_MASK (0x7 << 5)
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2004-08-01 22:48:16 +00:00
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2007-10-07 14:31:54 +00:00
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#define GPIO_PORTA (0 << 5)
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#define GPIO_PORTB (1 << 5)
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#define GPIO_PORTC (2 << 5)
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#define GPIO_PORTD (3 << 5)
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#define GPIO_PORTE (4 << 5)
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#define GPIO_PORTF (5 << 5)
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2004-08-01 22:48:16 +00:00
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2007-10-07 14:31:54 +00:00
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#define GPIO_OUT (1 << 8)
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#define GPIO_IN (0 << 8)
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#define GPIO_PUEN (1 << 9)
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2004-08-01 22:48:16 +00:00
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2007-10-07 14:31:54 +00:00
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#define GPIO_PF (0 << 10)
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#define GPIO_AF (1 << 10)
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2004-08-01 22:48:16 +00:00
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2007-10-07 14:31:54 +00:00
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#define GPIO_OCR_MASK (3 << 11)
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#define GPIO_AIN (0 << 11)
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#define GPIO_BIN (1 << 11)
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#define GPIO_CIN (2 << 11)
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#define GPIO_GPIO (3 << 11)
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2004-08-01 22:48:16 +00:00
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2007-10-07 14:31:54 +00:00
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#define GPIO_AOUT (1 << 13)
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#define GPIO_BOUT (1 << 14)
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2004-08-01 22:48:16 +00:00
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/* General purpose timers registers */
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2007-10-07 14:31:54 +00:00
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#define GPT_TCTL 0x00
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#define GPT_TPRER 0x04
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#define GPT_TCMP 0x08
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#define GPT_TCR 0x0c
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#define GPT_TCN 0x10
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#define GPT_TSTAT 0x14
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2004-08-01 22:48:16 +00:00
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/* General purpose timers bitfields */
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#define TCTL_SWR (1<<15) /* Software reset */
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#define TCTL_FRR (1<<8) /* Freerun / restart */
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#define TCTL_CAP (3<<6) /* Capture Edge */
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#define TCTL_OM (1<<5) /* output mode */
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#define TCTL_IRQEN (1<<4) /* interrupt enable */
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#define TCTL_CLKSOURCE (7<<1) /* Clock source */
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#define TCTL_TEN (1) /* Timer enable */
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#define TPRER_PRES (0xff) /* Prescale */
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#define TSTAT_CAPT (1<<1) /* Capture event */
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#define TSTAT_COMP (1) /* Compare event */
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#endif /* _IMX_REGS_H */
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