Merge with /home/m8/git/u-boot
This commit is contained in:
Wolfgang Denk
commit
0095b787fe
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@ -2,6 +2,15 @@
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Changes since U-Boot 1.1.4:
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======================================================================
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* Add AMCC bamboo board to MAKEALL build script.
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* Fix AMCC bamboo eval board compilation errors.
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* Add system memory to the PCI region list for AMCC PPC44x CPUs.
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Enabled it for Yucca board.
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* Cleanup config file and bootup output for Yucca board.
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* Fix CONFIG_440_GX define usage.
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* Remove autogenerated bmp_logo.h file.
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2
MAKEALL
2
MAKEALL
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@ -75,7 +75,7 @@ LIST_4xx=" \
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PIP405 PLU405 PMC405 PPChameleonEVB \
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sbc405 VOH405 VOM405 W7OLMC \
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W7OLMG walnut WUH405 XPEDITE1K \
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yellowstone yosemite yucca \
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yellowstone yosemite yucca bamboo \
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"
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#########################################################################
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@ -435,7 +435,7 @@ long int initdram (int board_type)
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*/
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init_spd_array();
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dram_size = spd_sdram (0);
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dram_size = spd_sdram();
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return dram_size;
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}
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@ -283,10 +283,8 @@
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/*----------------------------------------------------------------------------+
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| PPC440EP GPIOs addresses.
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+----------------------------------------------------------------------------*/
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#define GPIO0_BASE 0xEF600B00
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#define GPIO0_REAL 0xEF600B00
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#define GPIO1_BASE 0xEF600C00
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#define GPIO1_REAL 0xEF600C00
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/* Offsets */
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@ -331,17 +329,6 @@
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#define GPIO_IS3(x) (x+GPIOx_IS3L) /* GPIO Input register3 High or Low */
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/*----------------------------------------------------------------------------+
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| Declare Configuration values
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+----------------------------------------------------------------------------*/
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typedef enum gpio_select { GPIO_SEL, GPIO_ALT1, GPIO_ALT2, GPIO_ALT3 } gpio_select_t;
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typedef enum gpio_driver { GPIO_DIS, GPIO_IN, GPIO_OUT, GPIO_BI } gpio_driver_t;
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typedef struct { unsigned long add; /* gpio core base address */
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gpio_driver_t in_out; /* Driver Setting */
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gpio_select_t alt_nb; /* Selected Alternate */
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} gpio_param_s;
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/*----------------------------------------------------------------------------+
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| XX XX
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@ -541,18 +541,15 @@ int board_early_init_f (void)
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int checkboard (void)
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{
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sys_info_t sysinfo;
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char *s = getenv("serial#");
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get_sys_info (&sysinfo);
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printf("Board: Yucca - AMCC 440SPe Evaluation Board");
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if (s != NULL) {
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puts(", serial# ");
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puts(s);
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}
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putc('\n');
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printf ("Board: AMCC 440SPe Evaluation Board\n");
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printf ("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz / 1000000);
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printf ("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000);
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printf ("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000);
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printf ("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000);
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printf ("\tEPB: %lu MHz\n", sysinfo.freqEPB / 1000000);
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printf ("\tPCI: %lu MHz\n", sysinfo.freqPCI / 1000000);
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printf ("\tDDR: %lu MHz\n", sysinfo.freqDDR / 1000000);
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return 0;
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}
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@ -465,17 +465,30 @@ void pci_440_init (struct pci_controller *hose)
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hose->first_busno = 0;
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hose->last_busno = 0xff;
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/* PCI I/O space */
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pci_set_region(hose->regions + reg_num++,
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0x00000000,
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PCIX0_IOBASE,
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0x10000,
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PCI_REGION_IO);
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/* PCI memory space */
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pci_set_region(hose->regions + reg_num++,
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CFG_PCI_TARGBASE,
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CFG_PCI_MEMBASE,
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0x10000000,
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PCI_REGION_MEM );
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#if defined(CONFIG_PCI_SYS_MEM_BUS) && defined(CONFIG_PCI_SYS_MEM_PHYS) && \
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defined(CONFIG_PCI_SYS_MEM_SIZE)
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/* System memory space */
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pci_set_region(hose->regions + reg_num++,
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CONFIG_PCI_SYS_MEM_BUS,
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CONFIG_PCI_SYS_MEM_PHYS,
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CONFIG_PCI_SYS_MEM_SIZE,
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PCI_REGION_MEM | PCI_REGION_MEMORY );
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#endif
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hose->region_count = reg_num;
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pci_setup_indirect(hose, PCIX0_CFGADR, PCIX0_CFGDATA);
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@ -253,11 +253,13 @@ int checkcpu (void)
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break;
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case PVR_440SPe_RA:
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puts("SPe 3GA533C");
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puts("SPe Rev. A");
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break;
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case PVR_440SPe_RB:
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puts("SPe 3GB533C");
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puts("SPe Rev. B");
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break;
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default:
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printf (" UNKNOWN (PVR=%08x)", pvr);
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break;
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@ -736,7 +736,7 @@
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#define PVR_440SP_RA 0x53221850
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#define PVR_440SP_RB 0x53221891
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#define PVR_440SPe_RA 0x53421890
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#define PVR_440SPe_RB 0x53521891
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#define PVR_440SPe_RB 0x53421891
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#define PVR_601 0x00010000
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#define PVR_602 0x00050000
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#define PVR_603 0x00030000
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@ -34,7 +34,6 @@
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#define DEBUG
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#undef DEBUG
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#define CONFIG_IDENT_STRING "\nU_440SPe_V1R01 level06"
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/*-----------------------------------------------------------------------
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* High Level Configuration Options
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*----------------------------------------------------------------------*/
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@ -76,6 +75,11 @@
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/* #define CFG_PCI_BASE_REGS 0xBEC00000 */ /* internal PCI regs */
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/* #define CFG_PCI_BASE_CYCLE 0xBED00000 */ /* internal PCI regs */
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/* System RAM mapped to PCI space */
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#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
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#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE
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#define CONFIG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024)
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#define CFG_FPGA_BASE 0xe2000000 /* epld */
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#define CFG_OPER_FLASH 0xe7000000 /* SRAM - OPER Flash */
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@ -149,8 +153,8 @@
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#define CONFIG_ENV_OVERWRITE 1
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#define CONFIG_BOOTARGS "console=ttyS0,115200n8 root=/dev/nfs rw"
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#define CONFIG_BOOTCOMMAND "bootm E7C00000" /* autoboot command */
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#define CONFIG_BOOTDELAY -1 /* -1 to disable autoboot */
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#define CONFIG_BOOTCOMMAND "bootm E7C00000" /* autoboot command */
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#define CONFIG_BOOTDELAY -1 /* -1 to disable autoboot */
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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@ -192,7 +196,7 @@
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"ramdisk_addr=E7F20000\0" \
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"load=tftp 100000 yuca/u-boot.bin\0" \
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"update=protect off 2:4-7;era 2:4-7;" \
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"cp.b ${fileaddr} fffc0000 ${filesize};" \
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"cp.b ${fileaddr} FFFB0000 ${filesize};" \
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"setenv filesize;saveenv\0" \
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"upd=run load;run update\0" \
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""
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@ -267,7 +271,7 @@
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/* General PCI */
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#define CONFIG_PCI /* include pci support */
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#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
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#define CONFIG_PCI_SCAN_SHOW i /* show pci devices on startup */
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#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
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#undef CONFIG_PCI_CONFIG_HOST_BRIDGE
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/* Board-specific PCI */
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