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Make mc13892_reg enum as define 

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Alexander Shiyan 2012-04-10 23:44:03 +04:00 committed by Sascha Hauer
parent 9a643f143e
commit 03817cd5a6
2 changed files with 74 additions and 76 deletions
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14
drivers/mfd/mc13892.c
View File

@ -70,7 +70,7 @@ static int spi_rw(struct spi_device *spi, void * buf, size_t len)
#define MXC_PMIC_REG_NUM(reg) (((reg) & 0x3f) << 25)
#define MXC_PMIC_WRITE (1 << 31)
static int mc13892_spi_reg_read(struct mc13892 *mc13892, enum mc13892_reg reg, u32 *val)
static int mc13892_spi_reg_read(struct mc13892 *mc13892, u8 reg, u32 *val)
{
uint32_t buf;
@ -83,7 +83,7 @@ static int mc13892_spi_reg_read(struct mc13892 *mc13892, enum mc13892_reg reg, u
return 0;
}
static int mc13892_spi_reg_write(struct mc13892 *mc13892, enum mc13892_reg reg, u32 val)
static int mc13892_spi_reg_write(struct mc13892 *mc13892, u8 reg, u32 val)
{
uint32_t buf = MXC_PMIC_REG_NUM(reg) | MXC_PMIC_WRITE | (val & 0xffffff);
@ -94,7 +94,7 @@ static int mc13892_spi_reg_write(struct mc13892 *mc13892, enum mc13892_reg reg,
#endif
#ifdef CONFIG_I2C
static int mc13892_i2c_reg_read(struct mc13892 *mc13892, enum mc13892_reg reg, u32 *val)
static int mc13892_i2c_reg_read(struct mc13892 *mc13892, u8 reg, u32 *val)
{
u8 buf[3];
int ret;
@ -105,7 +105,7 @@ static int mc13892_i2c_reg_read(struct mc13892 *mc13892, enum mc13892_reg reg, u
return ret == 3 ? 0 : ret;
}
static int mc13892_i2c_reg_write(struct mc13892 *mc13892, enum mc13892_reg reg, u32 val)
static int mc13892_i2c_reg_write(struct mc13892 *mc13892, u8 reg, u32 val)
{
u8 buf[] = {
val >> 16,
@ -120,7 +120,7 @@ static int mc13892_i2c_reg_write(struct mc13892 *mc13892, enum mc13892_reg reg,
}
#endif
int mc13892_reg_write(struct mc13892 *mc13892, enum mc13892_reg reg, u32 val)
int mc13892_reg_write(struct mc13892 *mc13892, u8 reg, u32 val)
{
#ifdef CONFIG_I2C
if (mc13892->mode == MC13892_MODE_I2C)
@ -134,7 +134,7 @@ int mc13892_reg_write(struct mc13892 *mc13892, enum mc13892_reg reg, u32 val)
}
EXPORT_SYMBOL(mc13892_reg_write);
int mc13892_reg_read(struct mc13892 *mc13892, enum mc13892_reg reg, u32 *val)
int mc13892_reg_read(struct mc13892 *mc13892, u8 reg, u32 *val)
{
#ifdef CONFIG_I2C
if (mc13892->mode == MC13892_MODE_I2C)
@ -148,7 +148,7 @@ int mc13892_reg_read(struct mc13892 *mc13892, enum mc13892_reg reg, u32 *val)
}
EXPORT_SYMBOL(mc13892_reg_read);
int mc13892_set_bits(struct mc13892 *mc13892, enum mc13892_reg reg, u32 mask, u32 val)
int mc13892_set_bits(struct mc13892 *mc13892, u8 reg, u32 mask, u32 val)
{
u32 tmp;
int err;

136
include/mfd/mc13xxx.h
View File

@ -12,72 +12,70 @@
#ifndef __MFD_MC13XXX_H
#define __MFD_MC13XXX_H
enum mc13892_reg {
MC13892_REG_INT_STATUS0 = 0x00,
MC13892_REG_INT_MASK0 = 0x01,
MC13892_REG_INT_SENSE0 = 0x02,
MC13892_REG_INT_STATUS1 = 0x03,
MC13892_REG_INT_MASK1 = 0x04,
MC13892_REG_INT_SENSE1 = 0x05,
MC13892_REG_PU_MODE_S = 0x06,
MC13892_REG_IDENTIFICATION = 0x07,
MC13892_REG_UNUSED0 = 0x08,
MC13892_REG_ACC0 = 0x09,
MC13892_REG_ACC1 = 0x0a,
MC13892_REG_UNUSED1 = 0x0b,
MC13892_REG_UNUSED2 = 0x0c,
MC13892_REG_POWER_CTL0 = 0x0d,
MC13892_REG_POWER_CTL1 = 0x0e,
MC13892_REG_POWER_CTL2 = 0x0f,
MC13892_REG_REGEN_ASSIGN = 0x10,
MC13892_REG_UNUSED3 = 0x11,
MC13892_REG_MEM_A = 0x12,
MC13892_REG_MEM_B = 0x13,
MC13892_REG_RTC_TIME = 0x14,
MC13892_REG_RTC_ALARM = 0x15,
MC13892_REG_RTC_DAY = 0x16,
MC13892_REG_RTC_DAY_ALARM = 0x17,
MC13892_REG_SW_0 = 0x18,
MC13892_REG_SW_1 = 0x19,
MC13892_REG_SW_2 = 0x1a,
MC13892_REG_SW_3 = 0x1b,
MC13892_REG_SW_4 = 0x1c,
MC13892_REG_SW_5 = 0x1d,
MC13892_REG_SETTING_0 = 0x1e,
MC13892_REG_SETTING_1 = 0x1f,
MC13892_REG_MODE_0 = 0x20,
MC13892_REG_MODE_1 = 0x21,
MC13892_REG_POWER_MISC = 0x22,
MC13892_REG_UNUSED4 = 0x23,
MC13892_REG_UNUSED5 = 0x24,
MC13892_REG_UNUSED6 = 0x25,
MC13892_REG_UNUSED7 = 0x26,
MC13892_REG_UNUSED8 = 0x27,
MC13892_REG_UNUSED9 = 0x28,
MC13892_REG_UNUSED10 = 0x29,
MC13892_REG_UNUSED11 = 0x2a,
MC13892_REG_ADC0 = 0x2b,
MC13892_REG_ADC1 = 0x2c,
MC13892_REG_ADC2 = 0x2d,
MC13892_REG_ADC3 = 0x2e,
MC13892_REG_ADC4 = 0x2f,
MC13892_REG_CHARGE = 0x30,
MC13892_REG_USB0 = 0x31,
MC13892_REG_USB1 = 0x32,
MC13892_REG_LED_CTL0 = 0x33,
MC13892_REG_LED_CTL1 = 0x34,
MC13892_REG_LED_CTL2 = 0x35,
MC13892_REG_LED_CTL3 = 0x36,
MC13892_REG_UNUSED12 = 0x37,
MC13892_REG_UNUSED13 = 0x38,
MC13892_REG_TRIM0 = 0x39,
MC13892_REG_TRIM1 = 0x3a,
MC13892_REG_TEST0 = 0x3b,
MC13892_REG_TEST1 = 0x3c,
MC13892_REG_TEST2 = 0x3d,
MC13892_REG_TEST3 = 0x3e,
MC13892_REG_TEST4 = 0x3f,
};
#define MC13892_REG_INT_STATUS0 0x00
#define MC13892_REG_INT_MASK0 0x01
#define MC13892_REG_INT_SENSE0 0x02
#define MC13892_REG_INT_STATUS1 0x03
#define MC13892_REG_INT_MASK1 0x04
#define MC13892_REG_INT_SENSE1 0x05
#define MC13892_REG_PU_MODE_S 0x06
#define MC13892_REG_IDENTIFICATION 0x07
#define MC13892_REG_UNUSED0 0x08
#define MC13892_REG_ACC0 0x09
#define MC13892_REG_ACC1 0x0a
#define MC13892_REG_UNUSED1 0x0b
#define MC13892_REG_UNUSED2 0x0c
#define MC13892_REG_POWER_CTL0 0x0d
#define MC13892_REG_POWER_CTL1 0x0e
#define MC13892_REG_POWER_CTL2 0x0f
#define MC13892_REG_REGEN_ASSIGN 0x10
#define MC13892_REG_UNUSED3 0x11
#define MC13892_REG_MEM_A 0x12
#define MC13892_REG_MEM_B 0x13
#define MC13892_REG_RTC_TIME 0x14
#define MC13892_REG_RTC_ALARM 0x15
#define MC13892_REG_RTC_DAY 0x16
#define MC13892_REG_RTC_DAY_ALARM 0x17
#define MC13892_REG_SW_0 0x18
#define MC13892_REG_SW_1 0x19
#define MC13892_REG_SW_2 0x1a
#define MC13892_REG_SW_3 0x1b
#define MC13892_REG_SW_4 0x1c
#define MC13892_REG_SW_5 0x1d
#define MC13892_REG_SETTING_0 0x1e
#define MC13892_REG_SETTING_1 0x1f
#define MC13892_REG_MODE_0 0x20
#define MC13892_REG_MODE_1 0x21
#define MC13892_REG_POWER_MISC 0x22
#define MC13892_REG_UNUSED4 0x23
#define MC13892_REG_UNUSED5 0x24
#define MC13892_REG_UNUSED6 0x25
#define MC13892_REG_UNUSED7 0x26
#define MC13892_REG_UNUSED8 0x27
#define MC13892_REG_UNUSED9 0x28
#define MC13892_REG_UNUSED10 0x29
#define MC13892_REG_UNUSED11 0x2a
#define MC13892_REG_ADC0 0x2b
#define MC13892_REG_ADC1 0x2c
#define MC13892_REG_ADC2 0x2d
#define MC13892_REG_ADC3 0x2e
#define MC13892_REG_ADC4 0x2f
#define MC13892_REG_CHARGE 0x30
#define MC13892_REG_USB0 0x31
#define MC13892_REG_USB1 0x32
#define MC13892_REG_LED_CTL0 0x33
#define MC13892_REG_LED_CTL1 0x34
#define MC13892_REG_LED_CTL2 0x35
#define MC13892_REG_LED_CTL3 0x36
#define MC13892_REG_UNUSED12 0x37
#define MC13892_REG_UNUSED13 0x38
#define MC13892_REG_TRIM0 0x39
#define MC13892_REG_TRIM1 0x3a
#define MC13892_REG_TEST0 0x3b
#define MC13892_REG_TEST1 0x3c
#define MC13892_REG_TEST2 0x3d
#define MC13892_REG_TEST3 0x3e
#define MC13892_REG_TEST4 0x3f
enum mc13892_revision {
MC13892_REVISION_1_0,
@ -109,9 +107,9 @@ struct mc13892 {
extern struct mc13892 *mc13892_get(void);
extern int mc13892_reg_read(struct mc13892 *mc13892, enum mc13892_reg reg, u32 *val);
extern int mc13892_reg_write(struct mc13892 *mc13892, enum mc13892_reg reg, u32 val);
extern int mc13892_set_bits(struct mc13892 *mc13892, enum mc13892_reg reg, u32 mask, u32 val);
extern int mc13892_reg_read(struct mc13892 *mc13892, u8 reg, u32 *val);
extern int mc13892_reg_write(struct mc13892 *mc13892, u8 reg, u32 val);
extern int mc13892_set_bits(struct mc13892 *mc13892, u8 reg, u32 mask, u32 val);
static inline enum mc13892_revision mc13892_get_revision(struct mc13892 *mc13892)
{