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NAND Flash SMC timings update (nwe_pulse) for calao board based on AT91SAM9G20 SoC 

Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
gregory hermant 2012-08-28 08:40:57 +02:00 committed by Sascha Hauer
parent 93cd86f6e6
commit 03a37761fb
2 changed files with 2 additions and 2 deletions
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2
arch/arm/boards/tny-a926x/init.c
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@ -89,7 +89,7 @@ static struct sam9_smc_config tny_a9g20_nand_smc_config = {
.ncs_read_pulse = 4,
.nrd_pulse = 4,
.ncs_write_pulse = 4,
.nwe_pulse = 2,
.nwe_pulse = 4,
.read_cycle = 7,
.write_cycle = 7,

2
arch/arm/boards/usb-a926x/init.c
View File

@ -90,7 +90,7 @@ static struct sam9_smc_config usb_a9g20_nand_smc_config = {
.ncs_read_pulse = 4,
.nrd_pulse = 4,
.ncs_write_pulse = 4,
.nwe_pulse = 2,
.nwe_pulse = 4,
.read_cycle = 7,
.write_cycle = 7,