remove /nand_spl dir
This commit is contained in:
Sascha Hauer
parent
79f70b4fa0
commit
040943381b
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@ -1,101 +0,0 @@
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#
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# (C) Copyright 2006
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# Stefan Roese, DENX Software Engineering, sr@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
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LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
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LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
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AFLAGS += -DCONFIG_NAND_SPL
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CFLAGS += -DCONFIG_NAND_SPL
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SOBJS = start.o init.o resetvec.o
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COBJS = nand_boot.o ndfc.o sdram.o
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SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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__OBJS := $(SOBJS) $(COBJS)
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LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
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nandobj := $(OBJTREE)/nand_spl/
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ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
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all: $(obj).depend $(ALL)
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$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
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$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
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$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
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$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
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$(nandobj)u-boot-spl: $(OBJS)
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cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
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-Map $(nandobj)u-boot-spl.map \
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-o $(nandobj)u-boot-spl
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# create symbolic links for common files
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# from cpu directory
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$(obj)ndfc.c:
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@rm -f $(obj)ndfc.c
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ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
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$(obj)resetvec.S:
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@rm -f $(obj)resetvec.S
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ln -s $(SRCTREE)/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
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$(obj)start.S:
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@rm -f $(obj)start.S
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ln -s $(SRCTREE)/cpu/ppc4xx/start.S $(obj)start.S
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# from board directory
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$(obj)init.S:
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@rm -f $(obj)init.S
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ln -s $(SRCTREE)/board/amcc/sequoia/init.S $(obj)init.S
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$(obj)sdram.c:
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@rm -f $(obj)sdram.c
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@rm -f $(obj)sdram.h
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ln -s $(SRCTREE)/board/amcc/sequoia/sdram.c $(obj)sdram.c
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ln -s $(SRCTREE)/board/amcc/sequoia/sdram.h $(obj)sdram.h
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# from nand_spl directory
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$(obj)nand_boot.c:
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@rm -f $(obj)nand_boot.c
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ln -s $(SRCTREE)/nand_spl/nand_boot.c $(obj)nand_boot.c
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#########################################################################
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$(obj)%.o: $(obj)%.S
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$(CC) $(AFLAGS) -c -o $@ $<
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$(obj)%.o: $(obj)%.c
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$(CC) $(CFLAGS) -c -o $@ $<
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -1,49 +0,0 @@
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#
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# (C) Copyright 2006
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# Stefan Roese, DENX Software Engineering, sr@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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#
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# AMCC 440EPx Reference Platform (Sequoia) board
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#
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#
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# TEXT_BASE for SPL:
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#
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# On 440EP(x) platforms the SPL is located at 0xfffff000...0xffffffff,
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# in the last 4kBytes of memory space in cache.
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# We will copy this SPL into internal SRAM in start.S. So we set
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# TEXT_BASE to starting address in internal SRAM here.
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#
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TEXT_BASE = 0xE0013000
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# PAD_TO used to generate a 16kByte binary needed for the combined image
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# -> PAD_TO = TEXT_BASE + 0x4000
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PAD_TO = 0xE0017000
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PLATFORM_CPPFLAGS += -DCONFIG_440=1
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ifeq ($(debug),1)
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PLATFORM_CPPFLAGS += -DDEBUG
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endif
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ifeq ($(dbcr),1)
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PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
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endif
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@ -1,65 +0,0 @@
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/*
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* (C) Copyright 2006
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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OUTPUT_ARCH(powerpc:common)
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SECTIONS
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{
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.resetvec 0xE0013FFC :
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{
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*(.resetvec)
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} = 0xffff
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.text :
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{
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start.o (.text)
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init.o (.text)
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nand_boot.o (.text)
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sdram.o (.text)
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ndfc.o (.text)
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*(.text)
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*(.fixup)
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}
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_etext = .;
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.data :
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{
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*(.rodata*)
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*(.data*)
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*(.sdata*)
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__got2_start = .;
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*(.got2)
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__got2_end = .;
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}
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_edata = .;
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__bss_start = .;
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.bss :
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{
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*(.sbss)
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*(.bss)
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}
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_end = . ;
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}
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@ -1,177 +0,0 @@
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/*
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* (C) Copyright 2006
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <nand.h>
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#define CFG_NAND_READ_DELAY \
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{ volatile int dummy; int i; for (i=0; i<10000; i++) dummy = i; }
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extern void board_nand_init(struct nand_chip *nand);
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extern void ndfc_hwcontrol(struct mtd_info *mtdinfo, int cmd);
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extern void ndfc_write_byte(struct mtd_info *mtdinfo, u_char byte);
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extern u_char ndfc_read_byte(struct mtd_info *mtdinfo);
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extern int ndfc_dev_ready(struct mtd_info *mtdinfo);
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extern int jump_to_ram(ulong delta);
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extern int jump_to_uboot(ulong addr);
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static int nand_is_bad_block(struct mtd_info *mtd, int block)
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{
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struct nand_chip *this = mtd->priv;
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int page_addr = block * CFG_NAND_PAGE_COUNT;
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/* Begin command latch cycle */
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this->hwcontrol(mtd, NAND_CTL_SETCLE);
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this->write_byte(mtd, NAND_CMD_READOOB);
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/* Set ALE and clear CLE to start address cycle */
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this->hwcontrol(mtd, NAND_CTL_CLRCLE);
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this->hwcontrol(mtd, NAND_CTL_SETALE);
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/* Column address */
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this->write_byte(mtd, CFG_NAND_BAD_BLOCK_POS); /* A[7:0] */
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this->write_byte(mtd, (uchar)(page_addr & 0xff)); /* A[16:9] */
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this->write_byte(mtd, (uchar)((page_addr >> 8) & 0xff)); /* A[24:17] */
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#ifdef CFG_NAND_4_ADDR_CYCLE
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/* One more address cycle for devices > 32MiB */
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this->write_byte(mtd, (uchar)((page_addr >> 16) & 0x0f)); /* A[xx:25] */
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#endif
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/* Latch in address */
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this->hwcontrol(mtd, NAND_CTL_CLRALE);
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/*
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* Wait a while for the data to be ready
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*/
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if (this->dev_ready)
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this->dev_ready(mtd);
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else
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CFG_NAND_READ_DELAY;
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/*
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* Read on byte
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*/
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if (this->read_byte(mtd) != 0xff)
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return 1;
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return 0;
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}
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static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
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{
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struct nand_chip *this = mtd->priv;
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int page_addr = page + block * CFG_NAND_PAGE_COUNT;
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int i;
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/* Begin command latch cycle */
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this->hwcontrol(mtd, NAND_CTL_SETCLE);
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this->write_byte(mtd, NAND_CMD_READ0);
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/* Set ALE and clear CLE to start address cycle */
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this->hwcontrol(mtd, NAND_CTL_CLRCLE);
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this->hwcontrol(mtd, NAND_CTL_SETALE);
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/* Column address */
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this->write_byte(mtd, 0); /* A[7:0] */
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this->write_byte(mtd, (uchar)(page_addr & 0xff)); /* A[16:9] */
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this->write_byte(mtd, (uchar)((page_addr >> 8) & 0xff)); /* A[24:17] */
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#ifdef CFG_NAND_4_ADDR_CYCLE
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/* One more address cycle for devices > 32MiB */
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this->write_byte(mtd, (uchar)((page_addr >> 16) & 0x0f)); /* A[xx:25] */
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#endif
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/* Latch in address */
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this->hwcontrol(mtd, NAND_CTL_CLRALE);
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/*
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* Wait a while for the data to be ready
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*/
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if (this->dev_ready)
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this->dev_ready(mtd);
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else
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CFG_NAND_READ_DELAY;
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/*
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* Read page into buffer
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*/
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for (i=0; i<CFG_NAND_PAGE_SIZE; i++)
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*dst++ = this->read_byte(mtd);
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return 0;
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}
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static int nand_load(struct mtd_info *mtd, int offs, int uboot_size, uchar *dst)
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{
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int block;
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int blockcopy_count;
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int page;
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/*
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* offs has to be aligned to a block address!
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*/
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block = offs / CFG_NAND_BLOCK_SIZE;
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blockcopy_count = 0;
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while (blockcopy_count < (uboot_size / CFG_NAND_BLOCK_SIZE)) {
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if (!nand_is_bad_block(mtd, block)) {
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/*
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* Skip bad blocks
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*/
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for (page = 0; page < CFG_NAND_PAGE_COUNT; page++) {
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nand_read_page(mtd, block, page, dst);
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dst += CFG_NAND_PAGE_SIZE;
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}
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blockcopy_count++;
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}
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block++;
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}
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return 0;
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}
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void nand_boot(void)
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{
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ulong mem_size;
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struct nand_chip nand_chip;
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nand_info_t nand_info;
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int ret;
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void (*uboot)(void);
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/*
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* Init sdram, so we have access to memory
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*/
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mem_size = initdram(0);
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/*
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* Init board specific nand support
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*/
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nand_info.priv = &nand_chip;
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nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CFG_NAND_BASE;
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nand_chip.dev_ready = NULL; /* preset to NULL */
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board_nand_init(&nand_chip);
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/*
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* Load U-Boot image from NAND into RAM
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*/
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ret = nand_load(&nand_info, CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE,
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(uchar *)CFG_NAND_U_BOOT_DST);
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/*
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* Jump to U-Boot image
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*/
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uboot = (void (*)(void))CFG_NAND_U_BOOT_START;
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(*uboot)();
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}
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