Merge branch 'for-next/socfpga'
This commit is contained in:
Sascha Hauer
commit
074a8fdc92
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@ -2,6 +2,9 @@
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#include <types.h>
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#include <driver.h>
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#include <init.h>
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#include <bbu.h>
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#include <bootsource.h>
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#include <filetype.h>
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#include <asm/armlinux.h>
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#include <linux/micrel_phy.h>
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#include <linux/phy.h>
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@ -26,12 +29,45 @@ static int phy_fixup(struct phy_device *dev)
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static int socrates_init(void)
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{
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enum bootsource bootsource = bootsource_get();
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uint32_t flag_qspi = 0;
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uint32_t flag_mmc = 0;
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if (!of_machine_is_compatible("ebv,socrates"))
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return 0;
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if (IS_ENABLED(CONFIG_PHYLIB))
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phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, phy_fixup);
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switch (bootsource) {
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case BOOTSOURCE_MMC:
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flag_mmc |= BBU_HANDLER_FLAG_DEFAULT;
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break;
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case BOOTSOURCE_SPI:
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flag_qspi |= BBU_HANDLER_FLAG_DEFAULT;
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break;
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default:
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break;
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}
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bbu_register_std_file_update("qspi-xload0", flag_qspi,
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"/dev/mtd0.prebootloader0",
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filetype_socfpga_xload);
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bbu_register_std_file_update("qspi-xload1", 0,
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"/dev/mtd0.prebootloader1",
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filetype_socfpga_xload);
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bbu_register_std_file_update("qspi-xload2", 0,
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"/dev/mtd0.prebootloader2",
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filetype_socfpga_xload);
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bbu_register_std_file_update("qspi-xload3", 0,
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"/dev/mtd0.prebootloader3",
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filetype_socfpga_xload);
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bbu_register_std_file_update("qspi", 0, "/dev/mtd0.barebox",
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filetype_arm_barebox);
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bbu_register_std_file_update("mmc-xload", flag_mmc, "/dev/mmc0.0",
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filetype_socfpga_xload);
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return 0;
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}
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postcore_initcall(socrates_init);
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@ -19,42 +19,12 @@
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#include "socfpga.dtsi"
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/ {
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model = "EBV SoCrates";
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compatible = "ebv,socrates", "altr,socfpga";
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chosen {
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stdout-path = &uart0;
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};
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leds: gpio-leds {
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};
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&leds {
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compatible = "gpio-leds";
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led@0 {
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label = "0";
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gpios = <&porta 28 1>;
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linux,default-trigger = "heartbeat";
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};
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led@1 {
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label = "1";
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gpios = <&portb 19 1>;
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};
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led@2 {
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label = "2";
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gpios = <&portb 25 1>;
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aliases {
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ethernet0 = &gmac1;
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};
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};
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@ -75,5 +45,35 @@
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cdns,tsd2d-ns = <50>;
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cdns,tchsh-ns = <4>;
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cdns,tslch-ns = <4>;
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partition@0 {
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label = "prebootloader0";
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reg = <0x00000 0x10000>;
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};
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partition@1 {
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label = "prebootloader1";
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reg = <0x10000 0x10000>;
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};
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partition@2 {
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label = "prebootloader2";
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reg = <0x20000 0x10000>;
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};
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partition@3 {
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label = "prebootloader3";
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reg = <0x30000 0x10000>;
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};
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partition@4 {
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label = "barebox";
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reg = <0x40000 0x80000>;
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};
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partition@5 {
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label = "data";
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reg = <0xc0000 0x1f40000>;
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};
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};
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};
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@ -20,13 +20,15 @@
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#include <mach/system-manager.h>
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#include <mach/socfpga-regs.h>
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static struct socfpga_barebox_part default_part = {
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.nor_offset = SZ_256K,
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.nor_size = SZ_1M,
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.mmc_disk = "disk0.1",
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static struct socfpga_barebox_part default_parts[] = {
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{
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.nor_offset = SZ_256K,
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.nor_size = SZ_1M,
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.mmc_disk = "disk0.1",
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},
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{ /* sentinel */ }
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};
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const struct socfpga_barebox_part *barebox_part = &default_part;
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const struct socfpga_barebox_part *barebox_parts = &default_parts;
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enum socfpga_clks {
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timer, mmc, qspi_clk, uart, clk_max
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@ -109,28 +111,52 @@ static void socfpga_timer_init(void)
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static __noreturn int socfpga_xload(void)
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{
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enum bootsource bootsource = bootsource_get();
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void *buf;
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struct socfpga_barebox_part *part;
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void *buf = NULL;
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switch (bootsource) {
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case BOOTSOURCE_MMC:
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socfpga_mmc_init();
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buf = bootstrap_read_disk(barebox_part->mmc_disk, "fat");
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for (part = barebox_parts; part->mmc_disk; part++) {
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buf = bootstrap_read_disk(barebox_parts->mmc_disk, "fat");
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if (!buf) {
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pr_info("failed to load barebox from MMC %s\n",
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part->mmc_disk);
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continue;
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}
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}
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if (!buf) {
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pr_err("failed to load barebox.bin from MMC\n");
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hang();
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}
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break;
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case BOOTSOURCE_SPI:
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socfpga_qspi_init();
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buf = bootstrap_read_devfs("mtd0", false, barebox_part->nor_offset,
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barebox_part->nor_size, SZ_1M);
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for (part = barebox_parts; part->nor_size; part++) {
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buf = bootstrap_read_devfs("mtd0", false,
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part->nor_offset, part->nor_size, SZ_1M);
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if (!buf) {
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pr_info("failed to load barebox from QSPI NOR flash at offset %#x\n",
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part->nor_offset);
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continue;
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}
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break;
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}
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if (!buf) {
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pr_err("failed to load barebox from QSPI NOR flash\n");
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hang();
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}
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break;
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default:
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pr_err("unknown bootsource %d\n", bootsource);
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hang();
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}
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if (!buf) {
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pr_err("failed to load barebox.bin\n");
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hang();
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}
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pr_info("starting bootloader...\n");
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bootstrap_boot(buf, 0);
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@ -61,6 +61,7 @@ static const struct filetype_str filetype_str[] = {
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[filetype_xz_compressed] = { "XZ compressed", "xz" },
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[filetype_exe] = { "MS-DOS executable", "exe" },
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[filetype_mxs_bootstream] = { "Freescale MXS bootstream", "mxsbs" },
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[filetype_socfpga_xload] = { "SoCFPGA prebootloader image", "socfpga-xload" },
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};
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const char *file_type_to_string(enum filetype f)
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@ -294,6 +295,9 @@ enum filetype file_detect_type(const void *_buf, size_t bufsize)
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if (le32_to_cpu(buf[5]) == 0x504d5453)
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return filetype_mxs_bootstream;
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if (buf[16] == 0x31305341)
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return filetype_socfpga_xload;
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if (is_barebox_arm_head(_buf))
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return filetype_arm_barebox;
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if (buf[9] == 0x016f2818 || buf[9] == 0x18286f01)
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@ -116,18 +116,27 @@ struct clk_periph {
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const char *parent;
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unsigned regofs;
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unsigned int fixed_div;
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void __iomem *div_reg;
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unsigned int width;
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unsigned int shift;
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};
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static unsigned long clk_periph_recalc_rate(struct clk *clk,
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unsigned long parent_rate)
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{
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struct clk_periph *periph = container_of(clk, struct clk_periph, clk);
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u32 div;
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u32 div, val;
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if (periph->fixed_div)
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if (periph->fixed_div) {
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div = periph->fixed_div;
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else
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} else {
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if (periph->div_reg) {
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val = readl(periph->div_reg) >> periph->shift;
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val &= div_mask(periph->width);
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parent_rate /= (val + 1);
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}
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div = ((readl(clk_mgr_base_addr + periph->regofs) & 0x1ff) + 1);
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}
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return parent_rate / div;
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}
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@ -140,6 +149,7 @@ static struct clk *socfpga_periph_clk(struct device_node *node)
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{
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struct clk_periph *periph;
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int ret;
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u32 div_reg[3];
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periph = xzalloc(sizeof(*periph));
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@ -152,6 +162,15 @@ static struct clk *socfpga_periph_clk(struct device_node *node)
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periph->clk.name = xstrdup(node->name);
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periph->clk.ops = &clk_periph_ops;
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ret = of_property_read_u32_array(node, "div-reg", div_reg, 3);
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if (!ret) {
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periph->div_reg = clk_mgr_base_addr + div_reg[0];
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periph->shift = div_reg[1];
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periph->width = div_reg[2];
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} else {
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periph->div_reg = 0;
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}
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of_property_read_u32(node, "reg", &periph->regofs);
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of_property_read_u32(node, "fixed-divider", &periph->fixed_div);
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|
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@ -36,6 +36,7 @@ enum filetype {
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filetype_exe,
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filetype_xz_compressed,
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filetype_mxs_bootstream,
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filetype_socfpga_xload,
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filetype_max,
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};
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|
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@ -14,7 +14,10 @@
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#define BRANCH_INST 0xea /* ARM opcode for "b" (unconditional branch) */
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#define MAX_IMAGE_SIZE (60 * 1024 - 4)
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#define MAX_V0IMAGE_SIZE (60 * 1024 - 4)
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/* Max size without authentication is 224 KB, due to memory used by
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* the ROM boot code as a workspace out of the 256 KB of OCRAM */
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#define MAX_V1IMAGE_SIZE (224 * 1024 - 4)
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static int add_barebox_header;
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@ -22,10 +25,21 @@ struct socfpga_header {
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uint8_t validation_word[4];
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uint8_t version;
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uint8_t flags;
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uint8_t program_length[2];
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uint8_t spare[2];
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uint8_t checksum[2];
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uint8_t start_vector[4];
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union {
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struct {
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uint8_t program_length[2];
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uint8_t spare[2];
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uint8_t checksum[2];
|
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uint8_t start_vector[4];
|
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} v0;
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struct {
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uint8_t header_length[2];
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uint8_t program_length[4];
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uint8_t entry_offset[4];
|
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uint8_t spare[2];
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uint8_t checksum[2];
|
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} v1;
|
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};
|
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};
|
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|
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static uint32_t bb_header[] = {
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|
|
@ -87,7 +101,7 @@ static int write_full(int fd, void *buf, size_t size)
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return insize;
|
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}
|
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|
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static uint32_t crc_table[256] = {
|
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static const uint32_t crc_table[256] = {
|
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0x00000000, 0x04c11db7, 0x09823b6e, 0x0d4326d9, 0x130476dc, 0x17c56b6b,
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0x1a864db2, 0x1e475005, 0x2608edb8, 0x22c9f00f, 0x2f8ad6d6, 0x2b4bcb61,
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0x350c9b64, 0x31cd86d3, 0x3c8ea00a, 0x384fbdbd, 0x4c11db70, 0x48d0c6c7,
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|
|
@ -143,47 +157,94 @@ uint32_t crc32(uint32_t crc, void *_buf, int length)
|
|||
return crc;
|
||||
}
|
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|
||||
/* Create an ARM relative branch instuction
|
||||
* branch is where the instruction will be placed and dest points to where
|
||||
* it should branch too. */
|
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static void branch(uint8_t *branch, uint8_t *dest)
|
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{
|
||||
int offset = dest - branch - 8; /* PC is offset +8 bytes on ARM */
|
||||
|
||||
branch[0] = (offset >> 2) & 0xff; /* instruction uses offset/4 */
|
||||
branch[1] = (offset >> 10) & 0xff;
|
||||
branch[2] = (offset >> 18) & 0xff;
|
||||
branch[3] = BRANCH_INST;
|
||||
}
|
||||
|
||||
/* start_addr is where the socfpga header's start instruction should branch to.
|
||||
* It should be relative to the start of buf */
|
||||
static int add_socfpga_header(void *buf, size_t size, unsigned start_addr)
|
||||
static int add_socfpga_header(void *buf, size_t size, unsigned start_addr, unsigned version)
|
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{
|
||||
struct socfpga_header *header = buf + 0x40;
|
||||
uint8_t *bufp;
|
||||
void *entry;
|
||||
uint8_t *bufp, *sumendp;
|
||||
uint32_t *crc;
|
||||
unsigned checksum;
|
||||
size_t length = size >> 2;
|
||||
|
||||
if (size & 0x3) {
|
||||
fprintf(stderr, "%s: size must be multiple of 4\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Calculate relative address of requested start_addr from the
|
||||
* start_vector's branch instuction PC (+8 bytes on arm). */
|
||||
start_addr = start_addr + (int)(buf - (void*)&header->start_vector[0]) - 8;
|
||||
/* Absolute address of entry point in buf */
|
||||
entry = buf + start_addr;
|
||||
if (version == 0) {
|
||||
sumendp = &header->v0.checksum[0];
|
||||
} else {
|
||||
sumendp = &header->v1.checksum[0];
|
||||
|
||||
/* The ROM loader can't handle a negative offset */
|
||||
if (entry < (void*)header) {
|
||||
/* add a trampoline branch inst after end of the header */
|
||||
uint8_t *trampoline = (void*)(header + 1);
|
||||
branch(trampoline, entry);
|
||||
|
||||
/* and then make the trampoline the entry point */
|
||||
entry = trampoline;
|
||||
}
|
||||
/* Calculate start address as offset relative to start of header */
|
||||
start_addr = entry - (void*)header;
|
||||
}
|
||||
|
||||
header->validation_word[0] = VALIDATION_WORD & 0xff;
|
||||
header->validation_word[1] = (VALIDATION_WORD >> 8) & 0xff;
|
||||
header->validation_word[2] = (VALIDATION_WORD >> 16) & 0xff;
|
||||
header->validation_word[3] = (VALIDATION_WORD >> 24) & 0xff;
|
||||
header->version = 0;
|
||||
header->version = version;
|
||||
header->flags = 0;
|
||||
header->program_length[0] = length & 0xff;
|
||||
header->program_length[1] = (length >> 8) & 0xff;
|
||||
header->spare[0] = 0;
|
||||
header->spare[1] = 0;
|
||||
header->start_vector[0] = (start_addr >> 2) & 0xff; /* instruction uses offset/4 */
|
||||
header->start_vector[1] = (start_addr >> 10) & 0xff;
|
||||
header->start_vector[2] = (start_addr >> 18) & 0xff;
|
||||
header->start_vector[3] = BRANCH_INST;
|
||||
|
||||
if (version == 0) {
|
||||
header->v0.program_length[0] = (size >> 2) & 0xff; /* length in words */
|
||||
header->v0.program_length[1] = (size >> 10) & 0xff;
|
||||
header->v0.spare[0] = 0;
|
||||
header->v0.spare[1] = 0;
|
||||
branch(header->v0.start_vector, entry);
|
||||
} else {
|
||||
header->v1.header_length[0] = (sizeof(*header) >> 0) & 0xff;
|
||||
header->v1.header_length[1] = (sizeof(*header) >> 8) & 0xff;
|
||||
header->v1.program_length[0] = (size >> 0) & 0xff;
|
||||
header->v1.program_length[1] = (size >> 8) & 0xff;
|
||||
header->v1.program_length[2] = (size >> 16) & 0xff;
|
||||
header->v1.program_length[3] = (size >> 24) & 0xff;
|
||||
header->v1.entry_offset[0] = (start_addr >> 0) & 0xff;
|
||||
header->v1.entry_offset[1] = (start_addr >> 8) & 0xff;
|
||||
header->v1.entry_offset[2] = (start_addr >> 16) & 0xff;
|
||||
header->v1.entry_offset[3] = (start_addr >> 24) & 0xff;
|
||||
header->v1.spare[0] = 0;
|
||||
header->v1.spare[1] = 0;
|
||||
}
|
||||
|
||||
/* Sum from beginning of header to start of checksum field */
|
||||
checksum = 0;
|
||||
for (bufp = (uint8_t*)header; bufp < &header->checksum[0]; bufp++)
|
||||
for (bufp = (uint8_t*)header; bufp < sumendp; bufp++)
|
||||
checksum += *bufp;
|
||||
|
||||
header->checksum[0] = checksum & 0xff;;
|
||||
header->checksum[1] = (checksum >> 8) & 0xff;;
|
||||
if (version == 0) {
|
||||
header->v0.checksum[0] = checksum & 0xff;;
|
||||
header->v0.checksum[1] = (checksum >> 8) & 0xff;;
|
||||
} else {
|
||||
header->v1.checksum[0] = checksum & 0xff;;
|
||||
header->v1.checksum[1] = (checksum >> 8) & 0xff;;
|
||||
}
|
||||
|
||||
crc = buf + size - sizeof(uint32_t);
|
||||
|
||||
|
|
@ -195,7 +256,7 @@ static int add_socfpga_header(void *buf, size_t size, unsigned start_addr)
|
|||
|
||||
static void usage(const char *prgname)
|
||||
{
|
||||
fprintf(stderr, "usage: %s [OPTIONS] <infile>\n", prgname);
|
||||
fprintf(stderr, "usage: %s [-hb] [-v version] <infile> -o <outfile>\n", prgname);
|
||||
}
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
|
|
@ -205,16 +266,23 @@ int main(int argc, char *argv[])
|
|||
struct stat s;
|
||||
void *buf;
|
||||
int fd;
|
||||
int min_image_size = 80;
|
||||
int max_image_size = MAX_IMAGE_SIZE;
|
||||
int max_image_size, min_image_size = 80;
|
||||
int addsize = 0, pad;
|
||||
unsigned int version = 0;
|
||||
|
||||
while ((opt = getopt(argc, argv, "o:hb")) != -1) {
|
||||
while ((opt = getopt(argc, argv, "o:hbv:")) != -1) {
|
||||
switch (opt) {
|
||||
case 'v':
|
||||
version = atoi(optarg);
|
||||
if (version > 1) {
|
||||
printf("Versions supported: 0 or 1\n");
|
||||
usage(argv[0]);
|
||||
exit(1);
|
||||
}
|
||||
break;
|
||||
case 'b':
|
||||
add_barebox_header = 1;
|
||||
min_image_size = 0;
|
||||
max_image_size = MAX_IMAGE_SIZE - 512;
|
||||
addsize = 512;
|
||||
break;
|
||||
case 'h':
|
||||
|
|
@ -224,15 +292,21 @@ int main(int argc, char *argv[])
|
|||
outfile = optarg;
|
||||
break;
|
||||
default:
|
||||
usage(argv[0]);
|
||||
exit(1);
|
||||
}
|
||||
}
|
||||
if (version == 0) {
|
||||
max_image_size = MAX_V0IMAGE_SIZE;
|
||||
} else {
|
||||
max_image_size = MAX_V1IMAGE_SIZE;
|
||||
}
|
||||
max_image_size -= addsize;
|
||||
|
||||
if (optind == argc) {
|
||||
if (optind == argc || !outfile) {
|
||||
usage(argv[0]);
|
||||
exit(1);
|
||||
}
|
||||
|
||||
infile = argv[optind];
|
||||
|
||||
ret = stat(infile, &s);
|
||||
|
|
@ -242,7 +316,8 @@ int main(int argc, char *argv[])
|
|||
}
|
||||
|
||||
if (s.st_size < min_image_size) {
|
||||
fprintf(stderr, "input image too small. Minimum is 80 bytes\n");
|
||||
fprintf(stderr, "input image too small. Minimum is %d bytes\n",
|
||||
min_image_size);
|
||||
exit(1);
|
||||
}
|
||||
|
||||
|
|
@ -253,7 +328,7 @@ int main(int argc, char *argv[])
|
|||
}
|
||||
|
||||
fd = open(infile, O_RDONLY);
|
||||
if (fd < 0) {
|
||||
if (fd == -1) {
|
||||
perror("open infile");
|
||||
exit(1);
|
||||
}
|
||||
|
|
@ -280,7 +355,8 @@ int main(int argc, char *argv[])
|
|||
memcpy(buf, bb_header, sizeof(bb_header));
|
||||
}
|
||||
|
||||
ret = add_socfpga_header(buf, s.st_size + 4 + addsize + pad, addsize);
|
||||
ret = add_socfpga_header(buf, s.st_size + 4 + addsize + pad, addsize,
|
||||
version);
|
||||
if (ret)
|
||||
exit(1);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue