highbank: add of fixup
depending on the power domain register we need to disable sata or mmc and update the cpu informations take from Calxeda U-Boot git Register the original dtb to /dev/firmware-dtb and the fixed dtb to /dev/dtb Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -10,15 +10,57 @@
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#include <asm/system_info.h>
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#include <generated/mach-types.h>
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#include <mach/devices.h>
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#include <mach/hardware.h>
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#include <mach/sysregs.h>
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#include <environment.h>
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#include <partition.h>
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#include <sizes.h>
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#include <io.h>
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#include <libfdt.h>
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#define FIRMWARE_DTB_BASE 0x1000
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#define HB_OPP_VERSION 0
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struct fdt_header *fdt = NULL;
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static int hb_fixup(struct fdt_header *fdt)
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{
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u32 reg = readl(sregs_base + HB_SREG_A9_PWRDOM_DATA);
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u32 *opp_table = (u32 *)HB_SYSRAM_OPP_TABLE_BASE;
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u32 dtb_table[2*10];
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u32 i;
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u32 num_opps;
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__be32 latency;
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if (!(reg & HB_PWRDOM_STAT_SATA))
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do_fixup_by_compatible_string(fdt, "calxeda,hb-ahci", "status",
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"disabled", 1);
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if (!(reg & HB_PWRDOM_STAT_EMMC))
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do_fixup_by_compatible_string(fdt, "calxeda,hb-sdhci", "status",
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"disabled", 1);
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if ((opp_table[0] >> 16) != HB_OPP_VERSION)
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return 0;
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num_opps = opp_table[0] & 0xff;
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for (i = 0; i < num_opps; i++) {
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dtb_table[2 * i] = cpu_to_be32(opp_table[3 + 3 * i]);
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dtb_table[2 * i + 1] = cpu_to_be32(opp_table[2 + 3 * i]);
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}
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latency = cpu_to_be32(opp_table[1]);
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fdt_find_and_setprop(fdt, "/cpus/cpu@0", "transition-latency",
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&latency, 4, 1);
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fdt_find_and_setprop(fdt, "/cpus/cpu@0", "operating-points",
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dtb_table, 8 * num_opps, 1);
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return 0;
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}
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static int highbank_mem_init(void)
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{
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struct device_node *np;
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@ -57,6 +99,7 @@ mem_initcall(highbank_mem_init);
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static int highbank_devices_init(void)
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{
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of_register_fixup(hb_fixup);
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if (!fdt) {
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highbank_register_gpio(0);
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highbank_register_gpio(1);
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@ -66,7 +109,10 @@ static int highbank_devices_init(void)
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highbank_register_xgmac(0);
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highbank_register_xgmac(1);
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} else {
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devfs_add_partition("ram0", FIRMWARE_DTB_BASE, SZ_64K, DEVFS_PARTITION_FIXED, "dtb");
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fdt = of_get_fixed_tree(fdt);
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add_mem_device("dtb", (unsigned long)fdt, fdt_totalsize(fdt),
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IORESOURCE_MEM_WRITEABLE);
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devfs_add_partition("ram0", FIRMWARE_DTB_BASE, SZ_64K, DEVFS_PARTITION_FIXED, "firmware-dtb");
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}
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armlinux_set_bootparams((void *)(0x00000100));
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@ -23,6 +23,11 @@ extern void __iomem *sregs_base;
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#define HB_SREG_A9_PWR_REQ 0xf00
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#define HB_SREG_A9_BOOT_STAT 0xf04
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#define HB_SREG_A9_BOOT_DATA 0xf08
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#define HB_SREG_A9_PWRDOM_DATA 0xf20
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#define HB_PWRDOM_STAT_SATA 0x80000000
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#define HB_PWRDOM_STAT_PCI 0x40000000
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#define HB_PWRDOM_STAT_EMMC 0x20000000
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#define HB_PWR_SUSPEND 0
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#define HB_PWR_SOFT_RESET 1
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