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tegra: hardcode entry address for main cluster 

I don't know why get_runtime_offset fails on T124 yet,
but this is a safe workaround, with the nice side-effect
of fixing second stage barebox loading.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Lucas Stach 2014-06-03 22:35:04 +02:00 committed by Sascha Hauer
parent 8dc05ab677
commit 08f5fcbad6
1 changed files with 16 additions and 2 deletions
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18
arch/arm/mach-tegra/tegra_avp_init.c
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@ -260,6 +260,10 @@ static void tegra_cluster_switch_hp(void)
void tegra_avp_reset_vector(uint32_t boarddata)
{
int num_cores;
unsigned int entry_address = 0;
if (tegra_cpu_is_maincomplex())
tegra_maincomplex_entry();
/* we want to bring up the high performance CPU complex */
if (tegra_get_chiptype() >= TEGRA30)
@ -274,8 +278,18 @@ void tegra_avp_reset_vector(uint32_t boarddata)
stop_maincomplex_clocks(num_cores);
/* set start address for the main CPU complex processors */
writel(tegra_maincomplex_entry - get_runtime_offset(),
TEGRA_EXCEPTION_VECTORS_BASE + 0x100);
switch (tegra_get_chiptype()) {
case TEGRA20:
entry_address = 0x108000;
break;
case TEGRA30:
case TEGRA124:
entry_address = 0x80108000;
break;
default:
break;
}
writel(entry_address, TEGRA_EXCEPTION_VECTORS_BASE + 0x100);
/* put boarddata in scratch reg, for main CPU to fetch after startup */
writel(boarddata, TEGRA_PMC_BASE + PMC_SCRATCH(10));