tegra: avp_init: write DT address register earlier
Otherwise the write would be skipped if we are already running on the main CPU cluster. In practice this means that a second stage barebox will reuse the DT of the first stage, instead of using it's own. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -262,6 +262,9 @@ void tegra_avp_reset_vector(uint32_t boarddata)
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int num_cores;
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unsigned int entry_address = 0;
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/* put boarddata in scratch reg, for main CPU to fetch after startup */
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writel(boarddata, TEGRA_PMC_BASE + PMC_SCRATCH(10));
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if (tegra_cpu_is_maincomplex())
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tegra_maincomplex_entry();
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@ -291,9 +294,6 @@ void tegra_avp_reset_vector(uint32_t boarddata)
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}
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writel(entry_address, TEGRA_EXCEPTION_VECTORS_BASE + 0x100);
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/* put boarddata in scratch reg, for main CPU to fetch after startup */
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writel(boarddata, TEGRA_PMC_BASE + PMC_SCRATCH(10));
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/* bring up main CPU complex */
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start_cpu0_clocks();
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maincomplex_powerup();
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