sysmo-bts
/
barebox
9
0
Fork 0
Code Releases Activity

nand_base: fix chipsize for multi LUN nands 

Chipsize didn't take number of LUNs into account. Sync chipsize calculation
to kernel commit 63795755
Tested with MT29F8G16ADBDAH4 on OMAP4

Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Jan Weitzel 2013-06-24 14:08:42 +02:00 committed by Sascha Hauer
parent fc01f5db56
commit 0cbb215519
1 changed files with 2 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/mtd/nand/nand_base.c
View File

@ -1117,7 +1117,8 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
mtd->writesize = le32_to_cpu(p->byte_per_page);
mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize;
chip->chipsize = le32_to_cpu(p->blocks_per_lun);
chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
*busw = 0;
if (le16_to_cpu(p->features) & 1)
*busw = NAND_BUSWIDTH_16;