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tegra: source MSELECT clock from CLK_M 

We need to reprogram PLL_P at a later time, so
we have to make sure MSELECT is able to operate
correctly when we stop PLL_P.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Lucas Stach 2014-04-13 15:27:34 +02:00 committed by Sascha Hauer
parent bd4cbd927c
commit 0fe976103e
1 changed files with 2 additions and 2 deletions
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4
arch/arm/mach-tegra/tegra_avp_init.c
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@ -164,8 +164,8 @@ static void start_cpu0_clocks(void)
/* init MSELECT */
writel(CRC_RST_DEV_V_MSELECT,
TEGRA_CLK_RESET_BASE + CRC_RST_DEV_V_SET);
writel((CRC_CLK_SOURCE_MSEL_SRC_PLLP <<
CRC_CLK_SOURCE_MSEL_SRC_SHIFT) | 2,
writel((CRC_CLK_SOURCE_MSEL_SRC_CLKM <<
CRC_CLK_SOURCE_MSEL_SRC_SHIFT),
TEGRA_CLK_RESET_BASE + CRC_CLK_SOURCE_MSEL);
writel(CRC_CLK_OUT_ENB_V_MSELECT,
TEGRA_CLK_RESET_BASE + CRC_CLK_OUT_ENB_V);