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svn_rev_003 

remove all #if 0 and #if 1
This commit is contained in:
Sascha Hauer 2007-07-05 18:01:13 +02:00 committed by Sascha Hauer
parent 13a0908f07
commit 162484b83c
287 changed files with 0 additions and 10945 deletions
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4
board/MAI/bios_emulator/glue.c
View File

@ -379,10 +379,6 @@ int attempt_map_rom(pci_dev_t dev, void *copy_address)
/*
* Set the interrupt pin to 0
*/
#if 0
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 0);
pci_write_config_byte(dev, PCI_INTERRUPT_PIN, 0);
#endif
pci_write_config_byte(bridge, PCI_INTERRUPT_LINE, 0);
pci_write_config_byte(bridge, PCI_INTERRUPT_PIN, 0);

73
board/MAI/bios_emulator/scitech/src/pm/ntdrv/int86.c
View File

@ -144,24 +144,6 @@ void PMAPI PM_callRealMode(
RMSREGS *sregs)
{
/* TODO!! */
#if 0
CLIENT_STRUCT saveRegs;
/* Bail if we do not have BIOS access (ie: the VxD was dynamically
* loaded, and not statically loaded.
*/
if (!_PM_haveBIOS)
return;
TRACE("SDDHELP: Entering PM_callRealMode()\n");
Begin_Nest_V86_Exec();
LoadV86Registers(&saveRegs,regs,sregs);
Simulate_Far_Call(seg, off);
Resume_Exec();
ReadV86Registers(&saveRegs,regs,sregs);
End_Nest_Exec();
TRACE("SDDHELP: Exiting PM_callRealMode()\n");
#endif
}
/****************************************************************************
@ -175,31 +157,7 @@ int PMAPI PM_int86(
RMREGS *out)
{
/* TODO!! */
#if 0
RMSREGS sregs = {0};
CLIENT_STRUCT saveRegs;
ushort oldDisable;
/* Disable pass-up to our VxD handler so we directly call BIOS */
TRACE("SDDHELP: Entering PM_int86()\n");
if (disableTSRFlag) {
oldDisable = *disableTSRFlag;
*disableTSRFlag = 0;
}
Begin_Nest_V86_Exec();
LoadV86Registers(&saveRegs,in,&sregs);
Exec_Int(intno);
ReadV86Registers(&saveRegs,out,&sregs);
End_Nest_Exec();
/* Re-enable pass-up to our VxD handler if previously enabled */
if (disableTSRFlag)
*disableTSRFlag = oldDisable;
TRACE("SDDHELP: Exiting PM_int86()\n");
#else
*out = *in;
#endif
return out->x.ax;
}
@ -215,37 +173,6 @@ int PMAPI PM_int86x(
RMSREGS *sregs)
{
/* TODO!! */
#if 0
CLIENT_STRUCT saveRegs;
ushort oldDisable;
/* Bail if we do not have BIOS access (ie: the VxD was dynamically
* loaded, and not statically loaded.
*/
if (!_PM_haveBIOS) {
*out = *in;
return out->x.ax;
}
/* Disable pass-up to our VxD handler so we directly call BIOS */
TRACE("SDDHELP: Entering PM_int86x()\n");
if (disableTSRFlag) {
oldDisable = *disableTSRFlag;
*disableTSRFlag = 0;
}
Begin_Nest_V86_Exec();
LoadV86Registers(&saveRegs,in,sregs);
Exec_Int(intno);
ReadV86Registers(&saveRegs,out,sregs);
End_Nest_Exec();
/* Re-enable pass-up to our VxD handler if previously enabled */
if (disableTSRFlag)
*disableTSRFlag = oldDisable;
TRACE("SDDHELP: Exiting PM_int86x()\n");
#else
*out = *in;
#endif
return out->x.ax;
}

75
board/MAI/bios_emulator/scitech/src/pm/vdd/pm.c
View File

@ -359,24 +359,6 @@ ulong MapPhysicalToLinear(
{
ulong linear,length = limit+1;
int i,ppage,flags;
#if 0
ppage = base >> 12;
*npages = (length + (base & 0xFFF) + 4095) >> 12;
flags = PR_FIXED | PR_STATIC;
if (base == 0xA0000) {
/* We require the linear address to be aligned to a 64Kb boundary
* for mapping the banked framebuffer (so we can do efficient
* carry checking for bank changes in the assembler code). The only
* way to ensure this is to force the linear address to be aligned
* to a 4Mb boundary.
*/
flags |= PR_4MEG;
}
if ((linear = (ulong)PageReserve(PR_SYSTEM,*npages,flags)) == (ulong)-1)
return 0;
if (!PageCommitPhys(linear >> 12,*npages,ppage,PC_INCR | PC_USER | PC_WRITEABLE))
return 0;
#endif
return linear + (base & 0xFFF);
}
@ -434,37 +416,6 @@ void * PMAPI PM_mapPhysicalAddr(
maps[numMappings].isCached = isCached;
numMappings++;
#if 0
/* Finally disable caching where necessary */
if (!isCached && (PDB = _PM_getPDB()) != 0) {
int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage;
ulong pageTable,*pPageTable;
if (PDB >= 0x100000)
pPDB = (ulong*)MapPhysicalToLinear(PDB,0xFFF,&npages);
else
pPDB = (ulong*)PDB;
if (pPDB) {
startPDB = (linear >> 22) & 0x3FF;
startPage = (linear >> 12) & 0x3FF;
endPDB = ((linear+limit) >> 22) & 0x3FF;
endPage = ((linear+limit) >> 12) & 0x3FF;
for (iPDB = startPDB; iPDB <= endPDB; iPDB++) {
pageTable = pPDB[iPDB] & ~0xFFF;
if (pageTable >= 0x100000)
pPageTable = (ulong*)MapPhysicalToLinear(pageTable,0xFFF,&npages);
else
pPageTable = (ulong*)pageTable;
start = (iPDB == startPDB) ? startPage : 0;
end = (iPDB == endPDB) ? endPage : 0x3FF;
for (iPage = start; iPage <= end; iPage++)
pPageTable[iPage] |= 0x10;
PageFree((ulong)pPageTable,PR_STATIC);
}
PageFree((ulong)pPDB,PR_STATIC);
}
}
#endif
return (void*)linear;
}
@ -662,14 +613,6 @@ int PMAPI PM_int86(
memset(SSToDS(&sregs), 0, sizeof(sregs));
#if 0 /* do we need this?? */
/* Disable pass-up to our VDD handler so we directly call BIOS */
TRACE("SDDHELP: Entering PM_int86()\n");
if (disableTSRFlag) {
oldDisable = *disableTSRFlag;
*disableTSRFlag = 0;
}
#endif
LoadV86Registers(SSToDS(&saveRegs), in, SSToDS(&sregs));
@ -686,11 +629,6 @@ int PMAPI PM_int86(
ReadV86Registers(SSToDS(&saveRegs), out, SSToDS(&sregs));
#if 0
/* Re-enable pass-up to our VDD handler if previously enabled */
if (disableTSRFlag)
*disableTSRFlag = oldDisable;
#endif
TRACE("SDDHELP: Exiting PM_int86()\n");
return out->x.ax;
@ -712,14 +650,6 @@ int PMAPI PM_int86x(
ushort oldDisable;
ULONG rc;
#if 0
/* Disable pass-up to our VxD handler so we directly call BIOS */
TRACE("SDDHELP: Entering PM_int86x()\n");
if (disableTSRFlag) {
oldDisable = *disableTSRFlag;
*disableTSRFlag = 0;
}
#endif
LoadV86Registers(SSToDS(&saveRegs), in, sregs);
VDHResetEventSem(hevIRet);
@ -735,11 +665,6 @@ int PMAPI PM_int86x(
ReadV86Registers(SSToDS(&saveRegs), out, sregs);
#if 0
/* Re-enable pass-up to our VxD handler if previously enabled */
if (disableTSRFlag)
*disableTSRFlag = oldDisable;
#endif
TRACE("SDDHELP: Exiting PM_int86x()\n");
return out->x.ax;

9
board/MAI/bios_emulator/scitech/src/v86bios/console.c
View File

@ -69,12 +69,6 @@ open_console(void)
close(fd);
return Con;
}
#if 0
if (ioctl(fd, KDSETMODE, KD_GRAPHICS) < 0) {
close(fd);
return Con;
}
#endif
Con.fd = fd;
return Con;
}
@ -85,9 +79,6 @@ close_console(console Con)
if (Con.fd == -1)
return;
#if 0
ioctl(Con.fd, KDSETMODE, KD_TEXT);
#endif
if (Con.vt >=0)
ioctl(Con.fd, VT_ACTIVATE, Con.vt);

12
board/MAI/bios_emulator/scitech/src/v86bios/mem.c
View File

@ -36,7 +36,6 @@ CARD8
mem_rb(CARD32 addr)
{
unsigned long result, shift;
#if 1
if (addr >= 0xA0000 && addr <= 0xBFFFF) {
addr -= 0xA0000;
shift = (addr & 0x3) * 8;
@ -44,7 +43,6 @@ mem_rb(CARD32 addr)
result >>= shift;
return 0xffUL & result;
} else
#endif
return rdb(addr);
}
@ -52,7 +50,6 @@ CARD16
mem_rw(CARD32 addr)
{
unsigned long result, shift;
#if 1
if (addr >= 0xA0000 && addr <= 0xBFFFF) {
addr -= 0xA0000;
shift = (addr & 0x2) * 8;
@ -61,7 +58,6 @@ mem_rw(CARD32 addr)
result >>= shift;
return 0xffffUL & result;
} else
#endif
return rdw(addr);
}
@ -69,13 +65,11 @@ CARD32
mem_rl(CARD32 addr)
{
unsigned long result;
#if 1
if (addr >= 0xA0000 && addr <= 0xBFFFF) {
addr -= 0xA0000;
result = *(vuip)((unsigned long)vram_map+(addr<<sparse_shift)+(3<<(sparse_shift-2)));
return result;
} else
#endif
return rdl(addr);
}
@ -83,13 +77,11 @@ void
mem_wb(CARD32 addr, CARD8 val)
{
unsigned int b = val & 0xffU;
#if 1
if (addr >= 0xA0000 && addr <= 0xBFFFF) {
addr -= 0xA0000;
*(vuip) ((unsigned long)vram_map + (addr << sparse_shift)) = b * 0x01010101;
mem_barrier();
} else
#endif
wrb(addr,val);
}
@ -97,28 +89,24 @@ void
mem_ww(CARD32 addr, CARD16 val)
{
unsigned int w = val & 0xffffU;
#if 1
if (addr >= 0xA0000 && addr <= 0xBFFFF) {
addr -= 0xA0000;
*(vuip)((unsigned long)vram_map+(addr<<sparse_shift)
+(1<<(sparse_shift-2))) = w * 0x00010001;
mem_barrier();
} else
#endif
wrw(addr,val);
}
void
mem_wl(CARD32 addr, CARD32 val)
{
#if 1
if (addr >= 0xA0000 && addr <= 0xBFFFF) {
addr -= 0xA0000;
*(vuip)((unsigned long)vram_map+(addr<<sparse_shift)
+(3<<(sparse_shift-2))) = val;
mem_barrier();
} else
#endif
wrl(addr,val);
}
#endif

11
board/MAI/bios_emulator/scitech/src/v86bios/x86emu.c
View File

@ -297,17 +297,6 @@ getIntVect(int num)
{
return ((CARD32*)0)[num];
}
#if 0
void
printk(const char *fmt, ...)
{
va_list argptr;
va_start(argptr, fmt);
vfprintf(stdout, fmt, argptr);
fflush(stdout);
va_end(argptr);
}
#endif
CARD32
getIP(void)

4
board/MAI/bios_emulator/x86interface.c
View File

@ -437,7 +437,6 @@ int execute_bios(pci_dev_t gr_dev, void *reloc_addr)
return 0;
}
#if 1 /*def DEBUG*/
s = getenv("x86_ask_start");
if (s)
{
@ -455,7 +454,6 @@ int execute_bios(pci_dev_t gr_dev, void *reloc_addr)
}
#endif
#ifdef EASTEREGG
/* if (tstc())
@ -507,13 +505,11 @@ int execute_bios(pci_dev_t gr_dev, void *reloc_addr)
*strap++ = 0x9A; *strap++ = 0x03; *strap++ = 0x00;
*strap++ = 0x00; *strap++ = 0xC0;
#if 1
/* insert additional strap code */
for (i=0; i < MORE_STRAP_BYTES; i++)
{
*strap++ = more_strap[i];
}
#endif
/* HALT */
*strap++ = 0xF4;

4
board/Marvell/db64360/db64360.c
View File

@ -370,10 +370,6 @@ int misc_init_r ()
mpsc_init2 ();
#endif
#if 0
/* disable the dcache and MMU */
dcache_lock ();
#endif
return 0;
}

17
board/Marvell/db64360/mpsc.c
View File

@ -193,11 +193,6 @@ static int mpsc_putchar_sdma (char ch)
p[2] = 0; /* 8 */
p[3] = (unsigned int) &p[4]; /* c */
#if 0
p[9] = DESC_FIRST | DESC_LAST;
p[10] = (unsigned int) &p[0];
p[11] = (unsigned int) &p[12];
#endif
FLUSH_DCACHE (&p[0], &p[8]);
@ -587,18 +582,6 @@ static int galbrg_set_CUV (int channel, int value)
return 0;
}
#if 0
static int galbrg_reset (int channel)
{
unsigned int temp;
temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
temp |= 0x20000;
GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
return 0;
}
#endif
static int galsdma_set_RFT (int channel)
{

404
board/Marvell/db64360/mv_eth.c
View File

@ -1308,14 +1308,6 @@ static void eth_set_access_control (ETH_PORT eth_port_num,
ETH_WIN_PARAM * param);
static bool eth_port_uc_addr (ETH_PORT eth_port_num, unsigned char uc_nibble,
ETH_QUEUE queue, int option);
#if 0 /* FIXME */
static bool eth_port_smc_addr (ETH_PORT eth_port_num,
unsigned char mc_byte,
ETH_QUEUE queue, int option);
static bool eth_port_omc_addr (ETH_PORT eth_port_num,
unsigned char crc8,
ETH_QUEUE queue, int option);
#endif
static void eth_b_copy (unsigned int src_addr, unsigned int dst_addr,
int byte_count);
@ -1742,274 +1734,6 @@ static bool eth_port_uc_addr (ETH_PORT eth_port_num,
return true;
}
#if 0 /* FIXME */
/*******************************************************************************
* eth_port_mc_addr - Multicast address settings.
*
* DESCRIPTION:
* This API controls the MV device MAC multicast support.
* The MV device supports multicast using two tables:
* 1) Special Multicast Table for MAC addresses of the form
* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_fF).
* The MAC DA[7:0] bits are used as a pointer to the Special Multicast
* Table entries in the DA-Filter table.
* In this case, the function calls eth_port_smc_addr() routine to set the
* Special Multicast Table.
* 2) Other Multicast Table for multicast of another type. A CRC-8bit
* is used as an index to the Other Multicast Table entries in the
* DA-Filter table.
* In this case, the function calculates the CRC-8bit value and calls
* eth_port_omc_addr() routine to set the Other Multicast Table.
* INPUT:
* ETH_PORT eth_port_num Port number.
* unsigned char *p_addr Unicast MAC Address.
* ETH_QUEUE queue Rx queue number for this MAC address.
* int option 0 = Add, 1 = remove address.
*
* OUTPUT:
* See description.
*
* RETURN:
* true is output succeeded.
* false if add_address_table_entry( ) failed.
*
*******************************************************************************/
static void eth_port_mc_addr (ETH_PORT eth_port_num,
unsigned char *p_addr,
ETH_QUEUE queue, int option)
{
unsigned int mac_h;
unsigned int mac_l;
unsigned char crc_result = 0;
int mac_array[48];
int crc[8];
int i;
if ((p_addr[0] == 0x01) &&
(p_addr[1] == 0x00) &&
(p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00))
eth_port_smc_addr (eth_port_num, p_addr[5], queue, option);
else {
/* Calculate CRC-8 out of the given address */
mac_h = (p_addr[0] << 8) | (p_addr[1]);
mac_l = (p_addr[2] << 24) | (p_addr[3] << 16) |
(p_addr[4] << 8) | (p_addr[5] << 0);
for (i = 0; i < 32; i++)
mac_array[i] = (mac_l >> i) & 0x1;
for (i = 32; i < 48; i++)
mac_array[i] = (mac_h >> (i - 32)) & 0x1;
crc[0] = mac_array[45] ^ mac_array[43] ^ mac_array[40] ^
mac_array[39] ^ mac_array[35] ^ mac_array[34] ^
mac_array[31] ^ mac_array[30] ^ mac_array[28] ^
mac_array[23] ^ mac_array[21] ^ mac_array[19] ^
mac_array[18] ^ mac_array[16] ^ mac_array[14] ^
mac_array[12] ^ mac_array[8] ^ mac_array[7] ^
mac_array[6] ^ mac_array[0];
crc[1] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^
mac_array[43] ^ mac_array[41] ^ mac_array[39] ^
mac_array[36] ^ mac_array[34] ^ mac_array[32] ^
mac_array[30] ^ mac_array[29] ^ mac_array[28] ^
mac_array[24] ^ mac_array[23] ^ mac_array[22] ^
mac_array[21] ^ mac_array[20] ^ mac_array[18] ^
mac_array[17] ^ mac_array[16] ^ mac_array[15] ^
mac_array[14] ^ mac_array[13] ^ mac_array[12] ^
mac_array[9] ^ mac_array[6] ^ mac_array[1] ^
mac_array[0];
crc[2] = mac_array[47] ^ mac_array[46] ^ mac_array[44] ^
mac_array[43] ^ mac_array[42] ^ mac_array[39] ^
mac_array[37] ^ mac_array[34] ^ mac_array[33] ^
mac_array[29] ^ mac_array[28] ^ mac_array[25] ^
mac_array[24] ^ mac_array[22] ^ mac_array[17] ^
mac_array[15] ^ mac_array[13] ^ mac_array[12] ^
mac_array[10] ^ mac_array[8] ^ mac_array[6] ^
mac_array[2] ^ mac_array[1] ^ mac_array[0];
crc[3] = mac_array[47] ^ mac_array[45] ^ mac_array[44] ^
mac_array[43] ^ mac_array[40] ^ mac_array[38] ^
mac_array[35] ^ mac_array[34] ^ mac_array[30] ^
mac_array[29] ^ mac_array[26] ^ mac_array[25] ^
mac_array[23] ^ mac_array[18] ^ mac_array[16] ^
mac_array[14] ^ mac_array[13] ^ mac_array[11] ^
mac_array[9] ^ mac_array[7] ^ mac_array[3] ^
mac_array[2] ^ mac_array[1];
crc[4] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^
mac_array[41] ^ mac_array[39] ^ mac_array[36] ^
mac_array[35] ^ mac_array[31] ^ mac_array[30] ^
mac_array[27] ^ mac_array[26] ^ mac_array[24] ^
mac_array[19] ^ mac_array[17] ^ mac_array[15] ^
mac_array[14] ^ mac_array[12] ^ mac_array[10] ^
mac_array[8] ^ mac_array[4] ^ mac_array[3] ^
mac_array[2];
crc[5] = mac_array[47] ^ mac_array[46] ^ mac_array[45] ^
mac_array[42] ^ mac_array[40] ^ mac_array[37] ^
mac_array[36] ^ mac_array[32] ^ mac_array[31] ^
mac_array[28] ^ mac_array[27] ^ mac_array[25] ^
mac_array[20] ^ mac_array[18] ^ mac_array[16] ^
mac_array[15] ^ mac_array[13] ^ mac_array[11] ^
mac_array[9] ^ mac_array[5] ^ mac_array[4] ^
mac_array[3];
crc[6] = mac_array[47] ^ mac_array[46] ^ mac_array[43] ^
mac_array[41] ^ mac_array[38] ^ mac_array[37] ^
mac_array[33] ^ mac_array[32] ^ mac_array[29] ^
mac_array[28] ^ mac_array[26] ^ mac_array[21] ^
mac_array[19] ^ mac_array[17] ^ mac_array[16] ^
mac_array[14] ^ mac_array[12] ^ mac_array[10] ^
mac_array[6] ^ mac_array[5] ^ mac_array[4];
crc[7] = mac_array[47] ^ mac_array[44] ^ mac_array[42] ^
mac_array[39] ^ mac_array[38] ^ mac_array[34] ^
mac_array[33] ^ mac_array[30] ^ mac_array[29] ^
mac_array[27] ^ mac_array[22] ^ mac_array[20] ^
mac_array[18] ^ mac_array[17] ^ mac_array[15] ^
mac_array[13] ^ mac_array[11] ^ mac_array[7] ^
mac_array[6] ^ mac_array[5];
for (i = 0; i < 8; i++)
crc_result = crc_result | (crc[i] << i);
eth_port_omc_addr (eth_port_num, crc_result, queue, option);
}
return;
}
/*******************************************************************************
* eth_port_smc_addr - Special Multicast address settings.
*
* DESCRIPTION:
* This routine controls the MV device special MAC multicast support.
* The Special Multicast Table for MAC addresses supports MAC of the form
* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_fF).
* The MAC DA[7:0] bits are used as a pointer to the Special Multicast
* Table entries in the DA-Filter table.
* This function set the Special Multicast Table appropriate entry
* according to the argument given.
*
* INPUT:
* ETH_PORT eth_port_num Port number.
* unsigned char mc_byte Multicast addr last byte (MAC DA[7:0] bits).
* ETH_QUEUE queue Rx queue number for this MAC address.
* int option 0 = Add, 1 = remove address.
*
* OUTPUT:
* See description.
*
* RETURN:
* true is output succeeded.
* false if option parameter is invalid.
*
*******************************************************************************/
static bool eth_port_smc_addr (ETH_PORT eth_port_num,
unsigned char mc_byte,
ETH_QUEUE queue, int option)
{
unsigned int smc_table_reg;
unsigned int tbl_offset;
unsigned int reg_offset;
/* Locate the SMC table entry */
tbl_offset = (mc_byte / 4) * 4; /* Register offset from SMC table base */
reg_offset = mc_byte % 4; /* Entry offset within the above register */
queue &= 0x7;
switch (option) {
case REJECT_MAC_ADDR:
/* Clear accepts frame bit at specified Special DA table entry */
smc_table_reg =
MV_REG_READ ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
smc_table_reg &= (0x0E << (8 * reg_offset));
MV_REG_WRITE ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), smc_table_reg);
break;
case ACCEPT_MAC_ADDR:
/* Set accepts frame bit at specified Special DA table entry */
smc_table_reg =
MV_REG_READ ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
smc_table_reg |= ((0x01 | queue) << (8 * reg_offset));
MV_REG_WRITE ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), smc_table_reg);
break;
default:
return false;
}
return true;
}
/*******************************************************************************
* eth_port_omc_addr - Multicast address settings.
*
* DESCRIPTION:
* This routine controls the MV device Other MAC multicast support.
* The Other Multicast Table is used for multicast of another type.
* A CRC-8bit is used as an index to the Other Multicast Table entries
* in the DA-Filter table.
* The function gets the CRC-8bit value from the calling routine and
* set the Other Multicast Table appropriate entry according to the
* CRC-8 argument given.
*
* INPUT:
* ETH_PORT eth_port_num Port number.
* unsigned char crc8 A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
* ETH_QUEUE queue Rx queue number for this MAC address.
* int option 0 = Add, 1 = remove address.
*
* OUTPUT:
* See description.
*
* RETURN:
* true is output succeeded.
* false if option parameter is invalid.
*
*******************************************************************************/
static bool eth_port_omc_addr (ETH_PORT eth_port_num,
unsigned char crc8,
ETH_QUEUE queue, int option)
{
unsigned int omc_table_reg;
unsigned int tbl_offset;
unsigned int reg_offset;
/* Locate the OMC table entry */
tbl_offset = (crc8 / 4) * 4; /* Register offset from OMC table base */
reg_offset = crc8 % 4; /* Entry offset within the above register */
queue &= 0x7;
switch (option) {
case REJECT_MAC_ADDR:
/* Clear accepts frame bit at specified Other DA table entry */
omc_table_reg =
MV_REG_READ ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
omc_table_reg &= (0x0E << (8 * reg_offset));
MV_REG_WRITE ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), omc_table_reg);
break;
case ACCEPT_MAC_ADDR:
/* Set accepts frame bit at specified Other DA table entry */
omc_table_reg =
MV_REG_READ ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
omc_table_reg |= ((0x01 | queue) << (8 * reg_offset));
MV_REG_WRITE ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), omc_table_reg);
break;
default:
return false;
}
return true;
}
#endif
/*******************************************************************************
* eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
@ -2278,104 +2002,8 @@ static void eth_port_reset (ETH_PORT eth_port_num)
return;
}
#if 0 /* Not needed here */
/*******************************************************************************
* ethernet_set_config_reg - Set specified bits in configuration register.
*
* DESCRIPTION:
* This function sets specified bits in the given ethernet
* configuration register.
*
* INPUT:
* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
* unsigned int value 32 bit value.
*
* OUTPUT:
* The set bits in the value parameter are set in the configuration
* register.
*
* RETURN:
* None.
*
*******************************************************************************/
static void ethernet_set_config_reg (ETH_PORT eth_port_num,
unsigned int value)
{
unsigned int eth_config_reg;
eth_config_reg =
MV_REG_READ (MV64360_ETH_PORT_CONFIG_REG (eth_port_num));
eth_config_reg |= value;
MV_REG_WRITE (MV64360_ETH_PORT_CONFIG_REG (eth_port_num),
eth_config_reg);
return;
}
#endif
#if 0 /* FIXME */
/*******************************************************************************
* ethernet_reset_config_reg - Reset specified bits in configuration register.
*
* DESCRIPTION:
* This function resets specified bits in the given Ethernet
* configuration register.
*
* INPUT:
* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
* unsigned int value 32 bit value.
*
* OUTPUT:
* The set bits in the value parameter are reset in the configuration
* register.
*
* RETURN:
* None.
*
*******************************************************************************/
static void ethernet_reset_config_reg (ETH_PORT eth_port_num,
unsigned int value)
{
unsigned int eth_config_reg;
eth_config_reg = MV_REG_READ (MV64360_ETH_PORT_CONFIG_EXTEND_REG
(eth_port_num));
eth_config_reg &= ~value;
MV_REG_WRITE (MV64360_ETH_PORT_CONFIG_EXTEND_REG (eth_port_num),
eth_config_reg);
return;
}
#endif
#if 0 /* Not needed here */
/*******************************************************************************
* ethernet_get_config_reg - Get the port configuration register
*
* DESCRIPTION:
* This function returns the configuration register value of the given
* ethernet port.
*
* INPUT:
* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
*
* OUTPUT:
* None.
*
* RETURN:
* Port configuration register value.
*
*******************************************************************************/
static unsigned int ethernet_get_config_reg (ETH_PORT eth_port_num)
{
unsigned int eth_config_reg;
eth_config_reg = MV_REG_READ (MV64360_ETH_PORT_CONFIG_EXTEND_REG
(eth_port_num));
return eth_config_reg;
}
#endif
/*******************************************************************************
* eth_port_read_smi_reg - Read PHY registers
@ -3093,24 +2721,6 @@ static ETH_FUNC_RET_STATUS eth_rx_return_buff (ETH_PORT_INFO *
* The interrupt coalescing value set in the gigE port.
*
*******************************************************************************/
#if 0 /* FIXME */
static unsigned int eth_port_set_rx_coal (ETH_PORT eth_port_num,
unsigned int t_clk,
unsigned int delay)
{
unsigned int coal;
coal = ((t_clk / 1000000) * delay) / 64;
/* Set RX Coalescing mechanism */
MV_REG_WRITE (MV64360_ETH_SDMA_CONFIG_REG (eth_port_num),
((coal & 0x3fff) << 8) |
(MV_REG_READ
(MV64360_ETH_SDMA_CONFIG_REG (eth_port_num))
& 0xffc000ff));
return coal;
}
#endif
/*******************************************************************************
* eth_port_set_tx_coal - Sets coalescing interrupt mechanism on TX path
*
@ -3134,20 +2744,6 @@ static unsigned int eth_port_set_rx_coal (ETH_PORT eth_port_num,
* The interrupt coalescing value set in the gigE port.
*
*******************************************************************************/
#if 0 /* FIXME */
static unsigned int eth_port_set_tx_coal (ETH_PORT eth_port_num,
unsigned int t_clk,
unsigned int delay)
{
unsigned int coal;
coal = ((t_clk / 1000000) * delay) / 64;
/* Set TX Coalescing mechanism */
MV_REG_WRITE (MV64360_ETH_TX_FIFO_URGENT_THRESHOLD_REG (eth_port_num),
coal << 4);
return coal;
}
#endif
/*******************************************************************************
* eth_b_copy - Copy bytes from source to destination

6
board/Marvell/db64360/mv_eth.h
View File

@ -792,12 +792,6 @@ static bool eth_port_start(ETH_PORT_INFO *p_eth_port_ctrl);
static void eth_port_uc_addr_set (ETH_PORT eth_port_num,
unsigned char *p_addr,
ETH_QUEUE queue);
#if 0 /* FIXME */
static void eth_port_mc_addr (ETH_PORT eth_port_num,
unsigned char *p_addr,
ETH_QUEUE queue,
int option);
#endif
/* PHY and MIB routines */
static bool ethernet_phy_reset(ETH_PORT eth_port_num);

15
board/Marvell/db64360/pci.c
View File

@ -812,21 +812,6 @@ static void gt_setup_ide (struct pci_controller *hose,
/* TODO BJW: Change this for DB64360. This was pulled from the EV64260 */
/* and is curently not called *. */
#if 0
static void gt_fixup_irq (struct pci_controller *hose, pci_dev_t dev)
{
unsigned char pin, irq;
pci_read_config_byte (dev, PCI_INTERRUPT_PIN, &pin);
if (pin == 1) { /* only allow INT A */
irq = pci_irq_swizzle[(PCI_HOST) hose->
cfg_addr][PCI_DEV (dev)];
if (irq)
pci_write_config_byte (dev, PCI_INTERRUPT_LINE, irq);
}
}
#endif
struct pci_config_table gt_config_table[] = {
{PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE,

4
board/Marvell/db64460/db64460.c
View File

@ -370,10 +370,6 @@ int misc_init_r ()
mpsc_init2 ();
#endif
#if 0
/* disable the dcache and MMU */
dcache_lock ();
#endif
return 0;
}

17
board/Marvell/db64460/mpsc.c
View File

@ -193,11 +193,6 @@ static int mpsc_putchar_sdma (char ch)
p[2] = 0; /* 8 */
p[3] = (unsigned int) &p[4]; /* c */
#if 0
p[9] = DESC_FIRST | DESC_LAST;
p[10] = (unsigned int) &p[0];
p[11] = (unsigned int) &p[12];
#endif
FLUSH_DCACHE (&p[0], &p[8]);
@ -587,18 +582,6 @@ static int galbrg_set_CUV (int channel, int value)
return 0;
}
#if 0
static int galbrg_reset (int channel)
{
unsigned int temp;
temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
temp |= 0x20000;
GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
return 0;
}
#endif
static int galsdma_set_RFT (int channel)
{

404
board/Marvell/db64460/mv_eth.c
View File

@ -1307,14 +1307,6 @@ static void eth_set_access_control (ETH_PORT eth_port_num,
ETH_WIN_PARAM * param);
static bool eth_port_uc_addr (ETH_PORT eth_port_num, unsigned char uc_nibble,
ETH_QUEUE queue, int option);
#if 0 /* FIXME */
static bool eth_port_smc_addr (ETH_PORT eth_port_num,
unsigned char mc_byte,
ETH_QUEUE queue, int option);
static bool eth_port_omc_addr (ETH_PORT eth_port_num,
unsigned char crc8,
ETH_QUEUE queue, int option);
#endif
static void eth_b_copy (unsigned int src_addr, unsigned int dst_addr,
int byte_count);
@ -1741,274 +1733,6 @@ static bool eth_port_uc_addr (ETH_PORT eth_port_num,
return true;
}
#if 0 /* FIXME */
/*******************************************************************************
* eth_port_mc_addr - Multicast address settings.
*
* DESCRIPTION:
* This API controls the MV device MAC multicast support.
* The MV device supports multicast using two tables:
* 1) Special Multicast Table for MAC addresses of the form
* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_fF).
* The MAC DA[7:0] bits are used as a pointer to the Special Multicast
* Table entries in the DA-Filter table.
* In this case, the function calls eth_port_smc_addr() routine to set the
* Special Multicast Table.
* 2) Other Multicast Table for multicast of another type. A CRC-8bit
* is used as an index to the Other Multicast Table entries in the
* DA-Filter table.
* In this case, the function calculates the CRC-8bit value and calls
* eth_port_omc_addr() routine to set the Other Multicast Table.
* INPUT:
* ETH_PORT eth_port_num Port number.
* unsigned char *p_addr Unicast MAC Address.
* ETH_QUEUE queue Rx queue number for this MAC address.
* int option 0 = Add, 1 = remove address.
*
* OUTPUT:
* See description.
*
* RETURN:
* true is output succeeded.
* false if add_address_table_entry( ) failed.
*
*******************************************************************************/
static void eth_port_mc_addr (ETH_PORT eth_port_num,
unsigned char *p_addr,
ETH_QUEUE queue, int option)
{
unsigned int mac_h;
unsigned int mac_l;
unsigned char crc_result = 0;
int mac_array[48];
int crc[8];
int i;
if ((p_addr[0] == 0x01) &&
(p_addr[1] == 0x00) &&
(p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00))
eth_port_smc_addr (eth_port_num, p_addr[5], queue, option);
else {
/* Calculate CRC-8 out of the given address */
mac_h = (p_addr[0] << 8) | (p_addr[1]);
mac_l = (p_addr[2] << 24) | (p_addr[3] << 16) |
(p_addr[4] << 8) | (p_addr[5] << 0);
for (i = 0; i < 32; i++)
mac_array[i] = (mac_l >> i) & 0x1;
for (i = 32; i < 48; i++)
mac_array[i] = (mac_h >> (i - 32)) & 0x1;
crc[0] = mac_array[45] ^ mac_array[43] ^ mac_array[40] ^
mac_array[39] ^ mac_array[35] ^ mac_array[34] ^
mac_array[31] ^ mac_array[30] ^ mac_array[28] ^
mac_array[23] ^ mac_array[21] ^ mac_array[19] ^
mac_array[18] ^ mac_array[16] ^ mac_array[14] ^
mac_array[12] ^ mac_array[8] ^ mac_array[7] ^
mac_array[6] ^ mac_array[0];
crc[1] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^
mac_array[43] ^ mac_array[41] ^ mac_array[39] ^
mac_array[36] ^ mac_array[34] ^ mac_array[32] ^
mac_array[30] ^ mac_array[29] ^ mac_array[28] ^
mac_array[24] ^ mac_array[23] ^ mac_array[22] ^
mac_array[21] ^ mac_array[20] ^ mac_array[18] ^
mac_array[17] ^ mac_array[16] ^ mac_array[15] ^
mac_array[14] ^ mac_array[13] ^ mac_array[12] ^
mac_array[9] ^ mac_array[6] ^ mac_array[1] ^
mac_array[0];
crc[2] = mac_array[47] ^ mac_array[46] ^ mac_array[44] ^
mac_array[43] ^ mac_array[42] ^ mac_array[39] ^
mac_array[37] ^ mac_array[34] ^ mac_array[33] ^
mac_array[29] ^ mac_array[28] ^ mac_array[25] ^
mac_array[24] ^ mac_array[22] ^ mac_array[17] ^
mac_array[15] ^ mac_array[13] ^ mac_array[12] ^
mac_array[10] ^ mac_array[8] ^ mac_array[6] ^
mac_array[2] ^ mac_array[1] ^ mac_array[0];
crc[3] = mac_array[47] ^ mac_array[45] ^ mac_array[44] ^
mac_array[43] ^ mac_array[40] ^ mac_array[38] ^
mac_array[35] ^ mac_array[34] ^ mac_array[30] ^
mac_array[29] ^ mac_array[26] ^ mac_array[25] ^
mac_array[23] ^ mac_array[18] ^ mac_array[16] ^
mac_array[14] ^ mac_array[13] ^ mac_array[11] ^
mac_array[9] ^ mac_array[7] ^ mac_array[3] ^
mac_array[2] ^ mac_array[1];
crc[4] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^
mac_array[41] ^ mac_array[39] ^ mac_array[36] ^
mac_array[35] ^ mac_array[31] ^ mac_array[30] ^
mac_array[27] ^ mac_array[26] ^ mac_array[24] ^
mac_array[19] ^ mac_array[17] ^ mac_array[15] ^
mac_array[14] ^ mac_array[12] ^ mac_array[10] ^
mac_array[8] ^ mac_array[4] ^ mac_array[3] ^
mac_array[2];
crc[5] = mac_array[47] ^ mac_array[46] ^ mac_array[45] ^
mac_array[42] ^ mac_array[40] ^ mac_array[37] ^
mac_array[36] ^ mac_array[32] ^ mac_array[31] ^
mac_array[28] ^ mac_array[27] ^ mac_array[25] ^
mac_array[20] ^ mac_array[18] ^ mac_array[16] ^
mac_array[15] ^ mac_array[13] ^ mac_array[11] ^
mac_array[9] ^ mac_array[5] ^ mac_array[4] ^
mac_array[3];
crc[6] = mac_array[47] ^ mac_array[46] ^ mac_array[43] ^
mac_array[41] ^ mac_array[38] ^ mac_array[37] ^
mac_array[33] ^ mac_array[32] ^ mac_array[29] ^
mac_array[28] ^ mac_array[26] ^ mac_array[21] ^
mac_array[19] ^ mac_array[17] ^ mac_array[16] ^
mac_array[14] ^ mac_array[12] ^ mac_array[10] ^
mac_array[6] ^ mac_array[5] ^ mac_array[4];
crc[7] = mac_array[47] ^ mac_array[44] ^ mac_array[42] ^
mac_array[39] ^ mac_array[38] ^ mac_array[34] ^
mac_array[33] ^ mac_array[30] ^ mac_array[29] ^
mac_array[27] ^ mac_array[22] ^ mac_array[20] ^
mac_array[18] ^ mac_array[17] ^ mac_array[15] ^
mac_array[13] ^ mac_array[11] ^ mac_array[7] ^
mac_array[6] ^ mac_array[5];
for (i = 0; i < 8; i++)
crc_result = crc_result | (crc[i] << i);
eth_port_omc_addr (eth_port_num, crc_result, queue, option);
}
return;
}
/*******************************************************************************
* eth_port_smc_addr - Special Multicast address settings.
*
* DESCRIPTION:
* This routine controls the MV device special MAC multicast support.
* The Special Multicast Table for MAC addresses supports MAC of the form
* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_fF).
* The MAC DA[7:0] bits are used as a pointer to the Special Multicast
* Table entries in the DA-Filter table.
* This function set the Special Multicast Table appropriate entry
* according to the argument given.
*
* INPUT:
* ETH_PORT eth_port_num Port number.
* unsigned char mc_byte Multicast addr last byte (MAC DA[7:0] bits).
* ETH_QUEUE queue Rx queue number for this MAC address.
* int option 0 = Add, 1 = remove address.
*
* OUTPUT:
* See description.
*
* RETURN:
* true is output succeeded.
* false if option parameter is invalid.
*
*******************************************************************************/
static bool eth_port_smc_addr (ETH_PORT eth_port_num,
unsigned char mc_byte,
ETH_QUEUE queue, int option)
{
unsigned int smc_table_reg;
unsigned int tbl_offset;
unsigned int reg_offset;
/* Locate the SMC table entry */
tbl_offset = (mc_byte / 4) * 4; /* Register offset from SMC table base */
reg_offset = mc_byte % 4; /* Entry offset within the above register */
queue &= 0x7;
switch (option) {
case REJECT_MAC_ADDR:
/* Clear accepts frame bit at specified Special DA table entry */
smc_table_reg =
MV_REG_READ ((MV64460_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
smc_table_reg &= (0x0E << (8 * reg_offset));
MV_REG_WRITE ((MV64460_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), smc_table_reg);
break;
case ACCEPT_MAC_ADDR:
/* Set accepts frame bit at specified Special DA table entry */
smc_table_reg =
MV_REG_READ ((MV64460_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
smc_table_reg |= ((0x01 | queue) << (8 * reg_offset));
MV_REG_WRITE ((MV64460_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), smc_table_reg);
break;
default:
return false;
}
return true;
}
/*******************************************************************************
* eth_port_omc_addr - Multicast address settings.
*
* DESCRIPTION:
* This routine controls the MV device Other MAC multicast support.
* The Other Multicast Table is used for multicast of another type.
* A CRC-8bit is used as an index to the Other Multicast Table entries
* in the DA-Filter table.
* The function gets the CRC-8bit value from the calling routine and
* set the Other Multicast Table appropriate entry according to the
* CRC-8 argument given.
*
* INPUT:
* ETH_PORT eth_port_num Port number.
* unsigned char crc8 A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
* ETH_QUEUE queue Rx queue number for this MAC address.
* int option 0 = Add, 1 = remove address.
*
* OUTPUT:
* See description.
*
* RETURN:
* true is output succeeded.
* false if option parameter is invalid.
*
*******************************************************************************/
static bool eth_port_omc_addr (ETH_PORT eth_port_num,
unsigned char crc8,
ETH_QUEUE queue, int option)
{
unsigned int omc_table_reg;
unsigned int tbl_offset;
unsigned int reg_offset;
/* Locate the OMC table entry */
tbl_offset = (crc8 / 4) * 4; /* Register offset from OMC table base */
reg_offset = crc8 % 4; /* Entry offset within the above register */
queue &= 0x7;
switch (option) {
case REJECT_MAC_ADDR:
/* Clear accepts frame bit at specified Other DA table entry */
omc_table_reg =
MV_REG_READ ((MV64460_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
omc_table_reg &= (0x0E << (8 * reg_offset));
MV_REG_WRITE ((MV64460_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), omc_table_reg);
break;
case ACCEPT_MAC_ADDR:
/* Set accepts frame bit at specified Other DA table entry */
omc_table_reg =
MV_REG_READ ((MV64460_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
omc_table_reg |= ((0x01 | queue) << (8 * reg_offset));
MV_REG_WRITE ((MV64460_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), omc_table_reg);
break;
default:
return false;
}
return true;
}
#endif
/*******************************************************************************
* eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
@ -2277,104 +2001,8 @@ static void eth_port_reset (ETH_PORT eth_port_num)
return;
}
#if 0 /* Not needed here */
/*******************************************************************************
* ethernet_set_config_reg - Set specified bits in configuration register.
*
* DESCRIPTION:
* This function sets specified bits in the given ethernet
* configuration register.
*
* INPUT:
* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
* unsigned int value 32 bit value.
*
* OUTPUT:
* The set bits in the value parameter are set in the configuration
* register.
*
* RETURN:
* None.
*
*******************************************************************************/
static void ethernet_set_config_reg (ETH_PORT eth_port_num,
unsigned int value)
{
unsigned int eth_config_reg;
eth_config_reg =
MV_REG_READ (MV64460_ETH_PORT_CONFIG_REG (eth_port_num));
eth_config_reg |= value;
MV_REG_WRITE (MV64460_ETH_PORT_CONFIG_REG (eth_port_num),
eth_config_reg);
return;
}
#endif
#if 0 /* FIXME */
/*******************************************************************************
* ethernet_reset_config_reg - Reset specified bits in configuration register.
*
* DESCRIPTION:
* This function resets specified bits in the given Ethernet
* configuration register.
*
* INPUT:
* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
* unsigned int value 32 bit value.
*
* OUTPUT:
* The set bits in the value parameter are reset in the configuration
* register.
*
* RETURN:
* None.
*
*******************************************************************************/
static void ethernet_reset_config_reg (ETH_PORT eth_port_num,
unsigned int value)
{
unsigned int eth_config_reg;
eth_config_reg = MV_REG_READ (MV64460_ETH_PORT_CONFIG_EXTEND_REG
(eth_port_num));
eth_config_reg &= ~value;
MV_REG_WRITE (MV64460_ETH_PORT_CONFIG_EXTEND_REG (eth_port_num),
eth_config_reg);
return;
}
#endif
#if 0 /* Not needed here */
/*******************************************************************************
* ethernet_get_config_reg - Get the port configuration register
*
* DESCRIPTION:
* This function returns the configuration register value of the given
* ethernet port.
*
* INPUT:
* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
*
* OUTPUT:
* None.
*
* RETURN:
* Port configuration register value.
*
*******************************************************************************/
static unsigned int ethernet_get_config_reg (ETH_PORT eth_port_num)
{
unsigned int eth_config_reg;
eth_config_reg = MV_REG_READ (MV64460_ETH_PORT_CONFIG_EXTEND_REG
(eth_port_num));
return eth_config_reg;
}
#endif
/*******************************************************************************
* eth_port_read_smi_reg - Read PHY registers
@ -3092,24 +2720,6 @@ static ETH_FUNC_RET_STATUS eth_rx_return_buff (ETH_PORT_INFO *
* The interrupt coalescing value set in the gigE port.
*
*******************************************************************************/
#if 0 /* FIXME */
static unsigned int eth_port_set_rx_coal (ETH_PORT eth_port_num,
unsigned int t_clk,
unsigned int delay)
{
unsigned int coal;
coal = ((t_clk / 1000000) * delay) / 64;
/* Set RX Coalescing mechanism */
MV_REG_WRITE (MV64460_ETH_SDMA_CONFIG_REG (eth_port_num),
((coal & 0x3fff) << 8) |
(MV_REG_READ
(MV64460_ETH_SDMA_CONFIG_REG (eth_port_num))
& 0xffc000ff));
return coal;
}
#endif
/*******************************************************************************
* eth_port_set_tx_coal - Sets coalescing interrupt mechanism on TX path
*
@ -3133,20 +2743,6 @@ static unsigned int eth_port_set_rx_coal (ETH_PORT eth_port_num,
* The interrupt coalescing value set in the gigE port.
*
*******************************************************************************/
#if 0 /* FIXME */
static unsigned int eth_port_set_tx_coal (ETH_PORT eth_port_num,
unsigned int t_clk,
unsigned int delay)
{
unsigned int coal;
coal = ((t_clk / 1000000) * delay) / 64;
/* Set TX Coalescing mechanism */
MV_REG_WRITE (MV64460_ETH_TX_FIFO_URGENT_THRESHOLD_REG (eth_port_num),
coal << 4);
return coal;
}
#endif
/*******************************************************************************
* eth_b_copy - Copy bytes from source to destination

6
board/Marvell/db64460/mv_eth.h
View File

@ -788,12 +788,6 @@ static bool eth_port_start(ETH_PORT_INFO *p_eth_port_ctrl);
static void eth_port_uc_addr_set (ETH_PORT eth_port_num,
unsigned char *p_addr,
ETH_QUEUE queue);
#if 0 /* FIXME */
static void eth_port_mc_addr (ETH_PORT eth_port_num,
unsigned char *p_addr,
ETH_QUEUE queue,
int option);
#endif
/* PHY and MIB routines */
static bool ethernet_phy_reset(ETH_PORT eth_port_num);

15
board/Marvell/db64460/pci.c
View File

@ -812,21 +812,6 @@ static void gt_setup_ide (struct pci_controller *hose,
/* TODO BJW: Change this for DB64360. This was pulled from the EV64260 */
/* and is curently not called *. */
#if 0
static void gt_fixup_irq (struct pci_controller *hose, pci_dev_t dev)
{
unsigned char pin, irq;
pci_read_config_byte (dev, PCI_INTERRUPT_PIN, &pin);
if (pin == 1) { /* only allow INT A */
irq = pci_irq_swizzle[(PCI_HOST) hose->
cfg_addr][PCI_DEV (dev)];
if (irq)
pci_write_config_byte (dev, PCI_INTERRUPT_LINE, irq);
}
}
#endif
struct pci_config_table gt_config_table[] = {
{PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE,

43
board/Marvell/include/pci.h
View File

@ -196,49 +196,6 @@ unsigned int pciGetSpaceSize(PCI_HOST host, PCI_REGION region);
void pciMapMemoryBank(PCI_HOST host, MEMORY_BANK bank,
unsigned int pci0Dram0Base, unsigned int pci0Dram0Size);
#if 0 /* GARBAGE routines - dont use till they get cleaned up */
void pci0ScanSelfBars(PCI_SELF_BARS *pci0SelfBars);
void pci1ScanSelfBars(PCI_SELF_BARS *pci1SelfBars);
void pci0MapInternalRegSpace(unsigned int pci0InternalBase);
void pci1MapInternalRegSpace(unsigned int pci1InternalBase);
void pci0MapInternalRegIOSpace(unsigned int pci0InternalBase);
void pci1MapInternalRegIOSpace(unsigned int pci1InternalBase);
void pci0MapDevice0MemorySpace(unsigned int pci0Dev0Base,
unsigned int pci0Dev0Length);
void pci1MapDevice0MemorySpace(unsigned int pci1Dev0Base,
unsigned int pci1Dev0Length);
void pci0MapDevice1MemorySpace(unsigned int pci0Dev1Base,
unsigned int pci0Dev1Length);
void pci1MapDevice1MemorySpace(unsigned int pci1Dev1Base,
unsigned int pci1Dev1Length);
void pci0MapDevice2MemorySpace(unsigned int pci0Dev2Base,
unsigned int pci0Dev2Length);
void pci1MapDevice2MemorySpace(unsigned int pci1Dev2Base,
unsigned int pci1Dev2Length);
void pci0MapDevice3MemorySpace(unsigned int pci0Dev3Base,
unsigned int pci0Dev3Length);
void pci1MapDevice3MemorySpace(unsigned int pci1Dev3Base,
unsigned int pci1Dev3Length);
void pci0MapBootDeviceMemorySpace(unsigned int pci0DevBootBase,
unsigned int pci0DevBootLength);
void pci1MapBootDeviceMemorySpace(unsigned int pci1DevBootBase,
unsigned int pci1DevBootLength);
void pci0MapP2pMem0Space(unsigned int pci0P2pMem0Base,
unsigned int pci0P2pMem0Length);
void pci1MapP2pMem0Space(unsigned int pci1P2pMem0Base,
unsigned int pci1P2pMem0Length);
void pci0MapP2pMem1Space(unsigned int pci0P2pMem1Base,
unsigned int pci0P2pMem1Length);
void pci1MapP2pMem1Space(unsigned int pci1P2pMem1Base,
unsigned int pci1P2pMem1Length);
void pci0MapP2pIoSpace(unsigned int pci0P2pIoBase,
unsigned int pci0P2pIoLength);
void pci1MapP2pIoSpace(unsigned int pci1P2pIoBase,
unsigned int pci1P2pIoLength);
void pci0MapCPUspace(unsigned int pci0CpuBase, unsigned int pci0CpuLengs);
void pci1MapCPUspace(unsigned int pci1CpuBase, unsigned int pci1CpuLengs);
#endif
/* PCI region options */

11
board/adsvix/pcmcia.c
View File

@ -26,21 +26,10 @@
void pcmcia_power_on(void)
{
#if 0
if (!(GPLR(20) & GPIO_bit(20))) { /* 3.3V */
GPCR(81) = GPIO_bit(81);
GPSR(82) = GPIO_bit(82);
}
else if (!(GPLR(21) & GPIO_bit(21))) { /* 5.0V */
GPCR(81) = GPIO_bit(81);
GPCR(82) = GPIO_bit(82);
}
#else
#warning "Board will only supply 5V, wait for next HW spin for selectable power"
/* 5.0V */
GPCR(81) = GPIO_bit(81);
GPCR(82) = GPIO_bit(82);
#endif
udelay(300000);

13
board/amcc/sequoia/sequoia.c
View File

@ -419,19 +419,6 @@ int testdram(void)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long addr;
#if 0
/*--------------------------------------------------------------------------+
* Cactus is always configured as the host & requires the
* PCI arbiter to be enabled ???
*--------------------------------------------------------------------------*/
unsigned long strap;
mfsdr(sdr_sdstp1, strap);
if ((strap & SDR0_SDSTP1_PAE_MASK) == 0) {
printf("PCI: SDR0_STRP1[PAE] not set.\n");
printf("PCI: Configuration aborted.\n");
return 0;
}
#endif
/*-------------------------------------------------------------------------+
| Set priority for all PLB3 devices to 0.

12
board/amcc/yellowstone/yellowstone.c
View File

@ -83,14 +83,6 @@ int board_early_init_f(void)
out32(GPIO1_TSRL, in32(GPIO1_TSRL) & ~0x0000ff00);
out32(GPIO1_ISR1L, in32(GPIO1_ISR1L) | 0x00005500);
#if 0 /* test-only */
/*setup USB 2.0 */
out32(GPIO1_TCR, in32(GPIO1_TCR) | 0xc0000000);
out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0x50000000);
out32(GPIO0_TCR, in32(GPIO0_TCR) | 0xf);
out32(GPIO0_OSRH, in32(GPIO0_OSRH) | 0xaa);
out32(GPIO0_ISR2H, in32(GPIO0_ISR2H) | 0x00000500);
#endif
/*--------------------------------------------------------------------
* Setup the interrupt controller polarities, triggers, etc.
@ -125,10 +117,6 @@ int board_early_init_f(void)
/*enable ethernet */
*(unsigned char *)(CFG_BCSR_BASE | 0x08) = 0xf0;
#if 0 /* test-only */
/*enable usb 1.1 fs device and remove usb 2.0 reset */
*(unsigned char *)(CFG_BCSR_BASE | 0x09) = 0x00;
#endif
/*get rid of flash write protect */
*(unsigned char *)(CFG_BCSR_BASE | 0x07) = 0x00;

20
board/delta/delta.c
View File

@ -219,9 +219,6 @@ static uchar *key_match (uchar *kbd_data)
*/
for (suffix=(uchar *)kbd_magic_keys; *suffix || suffix==(uchar *)kbd_magic_keys; ++suffix) {
sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
#if 0
printf ("### Check magic \"%s\"\n", magic);
#endif
if (compare_magic(kbd_data, (uchar *)getenv(magic)) == 0) {
char cmd_name[sizeof (kbd_command_prefix) + 1];
char *cmd;
@ -229,17 +226,10 @@ static uchar *key_match (uchar *kbd_data)
sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
cmd = getenv (cmd_name);
#if 0
printf ("### Set PREBOOT to $(%s): \"%s\"\n",
cmd_name, cmd ? cmd : "<<NULL>>");
#endif
*kbd_data = *suffix;
return ((uchar *)cmd);
}
}
#if 0
printf ("### Delete PREBOOT\n");
#endif
*kbd_data = '\0';
return (NULL);
}
@ -352,13 +342,3 @@ static void init_DA9030()
}
#if 0
/* reset the DA9030 watchdog */
void hw_watchdog_reset(void)
{
uchar addr = (uchar) DA9030_I2C_ADDR, val = 0;
val = i2c_reg_read(addr, SYS_CONTROL_A);
val |= SYS_CONTROL_A_WATCHDOG;
i2c_reg_write(addr, SYS_CONTROL_A, val);
}
#endif

11
board/delta/nand.c
View File

@ -74,17 +74,6 @@ static void dfc_hwcontrol(struct mtd_info *mtdinfo, int cmd)
return;
}
#if 0
/* read device ready pin */
static int dfc_device_ready(struct mtd_info *mtdinfo)
{
if(NDSR & NDSR_RDY)
return 1;
else
return 0;
return 0;
}
#endif
/*
* Write buf to the DFC Controller Data Buffer

27
board/emk/top5200/top5200.c
View File

@ -36,10 +36,6 @@ long int initdram (int board_type)
{
ulong dramsize = 0;
#ifndef CFG_RAMBOOT
#if 0
ulong t;
ulong tap_del;
#endif
#define MODE_EN 0x80000000
#define SOFT_PRE 2
@ -74,29 +70,6 @@ long int initdram (int board_type)
/* write default TAP delay */
*(vu_long *)MPC5XXX_CDM_PORCFG = CFG_DRAM_TAP_DEL << 24;
#if 0
for (tap_del = 0; tap_del < 32; tap_del++)
{
*(vu_long *)MPC5XXX_CDM_PORCFG = tap_del << 24;
printf ("\nTAP Delay:%x Filling DRAM...", *(vu_long *)MPC5XXX_CDM_PORCFG);
for (t = 0; t < 0x04000000; t+=4)
*(vu_long *) t = t;
printf ("Checking DRAM...\n");
for (t = 0; t < 0x04000000; t+=4)
{
ulong rval = *(vu_long *) t;
if (rval != t)
{
printf ("mismatch at %x: ", t);
printf (" 1.read %x", rval);
printf (" 2.read %x", *(vu_long *) t);
printf (" 3.read %x", *(vu_long *) t);
break;
}
}
}
#endif
#endif /* CFG_RAMBOOT */
dramsize = ((1 << (*(vu_long *)MPC5XXX_SDRAM_CS0CFG - 0x13)) << 20);

4
board/esd/cpci750/cpci750.c
View File

@ -360,10 +360,6 @@ int misc_init_r ()
mpsc_init2 ();
#endif
#if 0
/* disable the dcache and MMU */
dcache_lock ();
#endif
if (flash_info[3].size < CFG_FLASH_INCREMENT) {
unsigned int flash_offset;
unsigned int l;

17
board/esd/cpci750/mpsc.c
View File

@ -194,11 +194,6 @@ static int mpsc_putchar_sdma (char ch)
p[2] = 0; /* 8 */
p[3] = (unsigned int) &p[4]; /* c */
#if 0
p[9] = DESC_FIRST | DESC_LAST;
p[10] = (unsigned int) &p[0];
p[11] = (unsigned int) &p[12];
#endif
FLUSH_DCACHE (&p[0], &p[8]);
@ -588,18 +583,6 @@ static int galbrg_set_CUV (int channel, int value)
return 0;
}
#if 0
static int galbrg_reset (int channel)
{
unsigned int temp;
temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
temp |= 0x20000;
GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
return 0;
}
#endif
static int galsdma_set_RFT (int channel)
{

404
board/esd/cpci750/mv_eth.c
View File

@ -1309,14 +1309,6 @@ static void eth_set_access_control (ETH_PORT eth_port_num,
ETH_WIN_PARAM * param);
static bool eth_port_uc_addr (ETH_PORT eth_port_num, unsigned char uc_nibble,
ETH_QUEUE queue, int option);
#if 0 /* FIXME */
static bool eth_port_smc_addr (ETH_PORT eth_port_num,
unsigned char mc_byte,
ETH_QUEUE queue, int option);
static bool eth_port_omc_addr (ETH_PORT eth_port_num,
unsigned char crc8,
ETH_QUEUE queue, int option);
#endif
static void eth_b_copy (unsigned int src_addr, unsigned int dst_addr,
int byte_count);
@ -1743,274 +1735,6 @@ static bool eth_port_uc_addr (ETH_PORT eth_port_num,
return true;
}
#if 0 /* FIXME */
/*******************************************************************************
* eth_port_mc_addr - Multicast address settings.
*
* DESCRIPTION:
* This API controls the MV device MAC multicast support.
* The MV device supports multicast using two tables:
* 1) Special Multicast Table for MAC addresses of the form
* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_fF).
* The MAC DA[7:0] bits are used as a pointer to the Special Multicast
* Table entries in the DA-Filter table.
* In this case, the function calls eth_port_smc_addr() routine to set the
* Special Multicast Table.
* 2) Other Multicast Table for multicast of another type. A CRC-8bit
* is used as an index to the Other Multicast Table entries in the
* DA-Filter table.
* In this case, the function calculates the CRC-8bit value and calls
* eth_port_omc_addr() routine to set the Other Multicast Table.
* INPUT:
* ETH_PORT eth_port_num Port number.
* unsigned char *p_addr Unicast MAC Address.
* ETH_QUEUE queue Rx queue number for this MAC address.
* int option 0 = Add, 1 = remove address.
*
* OUTPUT:
* See description.
*
* RETURN:
* true is output succeeded.
* false if add_address_table_entry( ) failed.
*
*******************************************************************************/
static void eth_port_mc_addr (ETH_PORT eth_port_num,
unsigned char *p_addr,
ETH_QUEUE queue, int option)
{
unsigned int mac_h;
unsigned int mac_l;
unsigned char crc_result = 0;
int mac_array[48];
int crc[8];
int i;
if ((p_addr[0] == 0x01) &&
(p_addr[1] == 0x00) &&
(p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00))
eth_port_smc_addr (eth_port_num, p_addr[5], queue, option);
else {
/* Calculate CRC-8 out of the given address */
mac_h = (p_addr[0] << 8) | (p_addr[1]);
mac_l = (p_addr[2] << 24) | (p_addr[3] << 16) |
(p_addr[4] << 8) | (p_addr[5] << 0);
for (i = 0; i < 32; i++)
mac_array[i] = (mac_l >> i) & 0x1;
for (i = 32; i < 48; i++)
mac_array[i] = (mac_h >> (i - 32)) & 0x1;
crc[0] = mac_array[45] ^ mac_array[43] ^ mac_array[40] ^
mac_array[39] ^ mac_array[35] ^ mac_array[34] ^
mac_array[31] ^ mac_array[30] ^ mac_array[28] ^
mac_array[23] ^ mac_array[21] ^ mac_array[19] ^
mac_array[18] ^ mac_array[16] ^ mac_array[14] ^
mac_array[12] ^ mac_array[8] ^ mac_array[7] ^
mac_array[6] ^ mac_array[0];
crc[1] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^
mac_array[43] ^ mac_array[41] ^ mac_array[39] ^
mac_array[36] ^ mac_array[34] ^ mac_array[32] ^
mac_array[30] ^ mac_array[29] ^ mac_array[28] ^
mac_array[24] ^ mac_array[23] ^ mac_array[22] ^
mac_array[21] ^ mac_array[20] ^ mac_array[18] ^
mac_array[17] ^ mac_array[16] ^ mac_array[15] ^
mac_array[14] ^ mac_array[13] ^ mac_array[12] ^
mac_array[9] ^ mac_array[6] ^ mac_array[1] ^
mac_array[0];
crc[2] = mac_array[47] ^ mac_array[46] ^ mac_array[44] ^
mac_array[43] ^ mac_array[42] ^ mac_array[39] ^
mac_array[37] ^ mac_array[34] ^ mac_array[33] ^
mac_array[29] ^ mac_array[28] ^ mac_array[25] ^
mac_array[24] ^ mac_array[22] ^ mac_array[17] ^
mac_array[15] ^ mac_array[13] ^ mac_array[12] ^
mac_array[10] ^ mac_array[8] ^ mac_array[6] ^
mac_array[2] ^ mac_array[1] ^ mac_array[0];
crc[3] = mac_array[47] ^ mac_array[45] ^ mac_array[44] ^
mac_array[43] ^ mac_array[40] ^ mac_array[38] ^
mac_array[35] ^ mac_array[34] ^ mac_array[30] ^
mac_array[29] ^ mac_array[26] ^ mac_array[25] ^
mac_array[23] ^ mac_array[18] ^ mac_array[16] ^
mac_array[14] ^ mac_array[13] ^ mac_array[11] ^
mac_array[9] ^ mac_array[7] ^ mac_array[3] ^
mac_array[2] ^ mac_array[1];
crc[4] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^
mac_array[41] ^ mac_array[39] ^ mac_array[36] ^
mac_array[35] ^ mac_array[31] ^ mac_array[30] ^
mac_array[27] ^ mac_array[26] ^ mac_array[24] ^
mac_array[19] ^ mac_array[17] ^ mac_array[15] ^
mac_array[14] ^ mac_array[12] ^ mac_array[10] ^
mac_array[8] ^ mac_array[4] ^ mac_array[3] ^
mac_array[2];
crc[5] = mac_array[47] ^ mac_array[46] ^ mac_array[45] ^
mac_array[42] ^ mac_array[40] ^ mac_array[37] ^
mac_array[36] ^ mac_array[32] ^ mac_array[31] ^
mac_array[28] ^ mac_array[27] ^ mac_array[25] ^
mac_array[20] ^ mac_array[18] ^ mac_array[16] ^
mac_array[15] ^ mac_array[13] ^ mac_array[11] ^
mac_array[9] ^ mac_array[5] ^ mac_array[4] ^
mac_array[3];
crc[6] = mac_array[47] ^ mac_array[46] ^ mac_array[43] ^
mac_array[41] ^ mac_array[38] ^ mac_array[37] ^
mac_array[33] ^ mac_array[32] ^ mac_array[29] ^
mac_array[28] ^ mac_array[26] ^ mac_array[21] ^
mac_array[19] ^ mac_array[17] ^ mac_array[16] ^
mac_array[14] ^ mac_array[12] ^ mac_array[10] ^
mac_array[6] ^ mac_array[5] ^ mac_array[4];
crc[7] = mac_array[47] ^ mac_array[44] ^ mac_array[42] ^
mac_array[39] ^ mac_array[38] ^ mac_array[34] ^
mac_array[33] ^ mac_array[30] ^ mac_array[29] ^
mac_array[27] ^ mac_array[22] ^ mac_array[20] ^
mac_array[18] ^ mac_array[17] ^ mac_array[15] ^
mac_array[13] ^ mac_array[11] ^ mac_array[7] ^
mac_array[6] ^ mac_array[5];
for (i = 0; i < 8; i++)
crc_result = crc_result | (crc[i] << i);
eth_port_omc_addr (eth_port_num, crc_result, queue, option);
}
return;
}
/*******************************************************************************
* eth_port_smc_addr - Special Multicast address settings.
*
* DESCRIPTION:
* This routine controls the MV device special MAC multicast support.
* The Special Multicast Table for MAC addresses supports MAC of the form
* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_fF).
* The MAC DA[7:0] bits are used as a pointer to the Special Multicast
* Table entries in the DA-Filter table.
* This function set the Special Multicast Table appropriate entry
* according to the argument given.
*
* INPUT:
* ETH_PORT eth_port_num Port number.
* unsigned char mc_byte Multicast addr last byte (MAC DA[7:0] bits).
* ETH_QUEUE queue Rx queue number for this MAC address.
* int option 0 = Add, 1 = remove address.
*
* OUTPUT:
* See description.
*
* RETURN:
* true is output succeeded.
* false if option parameter is invalid.
*
*******************************************************************************/
static bool eth_port_smc_addr (ETH_PORT eth_port_num,
unsigned char mc_byte,
ETH_QUEUE queue, int option)
{
unsigned int smc_table_reg;
unsigned int tbl_offset;
unsigned int reg_offset;
/* Locate the SMC table entry */
tbl_offset = (mc_byte / 4) * 4; /* Register offset from SMC table base */
reg_offset = mc_byte % 4; /* Entry offset within the above register */
queue &= 0x7;
switch (option) {
case REJECT_MAC_ADDR:
/* Clear accepts frame bit at specified Special DA table entry */
smc_table_reg =
MV_REG_READ ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
smc_table_reg &= (0x0E << (8 * reg_offset));
MV_REG_WRITE ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), smc_table_reg);
break;
case ACCEPT_MAC_ADDR:
/* Set accepts frame bit at specified Special DA table entry */
smc_table_reg =
MV_REG_READ ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
smc_table_reg |= ((0x01 | queue) << (8 * reg_offset));
MV_REG_WRITE ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), smc_table_reg);
break;
default:
return false;
}
return true;
}
/*******************************************************************************
* eth_port_omc_addr - Multicast address settings.
*
* DESCRIPTION:
* This routine controls the MV device Other MAC multicast support.
* The Other Multicast Table is used for multicast of another type.
* A CRC-8bit is used as an index to the Other Multicast Table entries
* in the DA-Filter table.
* The function gets the CRC-8bit value from the calling routine and
* set the Other Multicast Table appropriate entry according to the
* CRC-8 argument given.
*
* INPUT:
* ETH_PORT eth_port_num Port number.
* unsigned char crc8 A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
* ETH_QUEUE queue Rx queue number for this MAC address.
* int option 0 = Add, 1 = remove address.
*
* OUTPUT:
* See description.
*
* RETURN:
* true is output succeeded.
* false if option parameter is invalid.
*
*******************************************************************************/
static bool eth_port_omc_addr (ETH_PORT eth_port_num,
unsigned char crc8,
ETH_QUEUE queue, int option)
{
unsigned int omc_table_reg;
unsigned int tbl_offset;
unsigned int reg_offset;
/* Locate the OMC table entry */
tbl_offset = (crc8 / 4) * 4; /* Register offset from OMC table base */
reg_offset = crc8 % 4; /* Entry offset within the above register */
queue &= 0x7;
switch (option) {
case REJECT_MAC_ADDR:
/* Clear accepts frame bit at specified Other DA table entry */
omc_table_reg =
MV_REG_READ ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
omc_table_reg &= (0x0E << (8 * reg_offset));
MV_REG_WRITE ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), omc_table_reg);
break;
case ACCEPT_MAC_ADDR:
/* Set accepts frame bit at specified Other DA table entry */
omc_table_reg =
MV_REG_READ ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
omc_table_reg |= ((0x01 | queue) << (8 * reg_offset));
MV_REG_WRITE ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), omc_table_reg);
break;
default:
return false;
}
return true;
}
#endif
/*******************************************************************************
* eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
@ -2279,104 +2003,8 @@ static void eth_port_reset (ETH_PORT eth_port_num)
return;
}
#if 0 /* Not needed here */
/*******************************************************************************
* ethernet_set_config_reg - Set specified bits in configuration register.
*
* DESCRIPTION:
* This function sets specified bits in the given ethernet
* configuration register.
*
* INPUT:
* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
* unsigned int value 32 bit value.
*
* OUTPUT:
* The set bits in the value parameter are set in the configuration
* register.
*
* RETURN:
* None.
*
*******************************************************************************/
static void ethernet_set_config_reg (ETH_PORT eth_port_num,
unsigned int value)
{
unsigned int eth_config_reg;
eth_config_reg =
MV_REG_READ (MV64360_ETH_PORT_CONFIG_REG (eth_port_num));
eth_config_reg |= value;
MV_REG_WRITE (MV64360_ETH_PORT_CONFIG_REG (eth_port_num),
eth_config_reg);
return;
}
#endif
#if 0 /* FIXME */
/*******************************************************************************
* ethernet_reset_config_reg - Reset specified bits in configuration register.
*
* DESCRIPTION:
* This function resets specified bits in the given Ethernet
* configuration register.
*
* INPUT:
* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
* unsigned int value 32 bit value.
*
* OUTPUT:
* The set bits in the value parameter are reset in the configuration
* register.
*
* RETURN:
* None.
*
*******************************************************************************/
static void ethernet_reset_config_reg (ETH_PORT eth_port_num,
unsigned int value)
{
unsigned int eth_config_reg;
eth_config_reg = MV_REG_READ (MV64360_ETH_PORT_CONFIG_EXTEND_REG
(eth_port_num));
eth_config_reg &= ~value;
MV_REG_WRITE (MV64360_ETH_PORT_CONFIG_EXTEND_REG (eth_port_num),
eth_config_reg);
return;
}
#endif
#if 0 /* Not needed here */
/*******************************************************************************
* ethernet_get_config_reg - Get the port configuration register
*
* DESCRIPTION:
* This function returns the configuration register value of the given
* ethernet port.
*
* INPUT:
* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
*
* OUTPUT:
* None.
*
* RETURN:
* Port configuration register value.
*
*******************************************************************************/
static unsigned int ethernet_get_config_reg (ETH_PORT eth_port_num)
{
unsigned int eth_config_reg;
eth_config_reg = MV_REG_READ (MV64360_ETH_PORT_CONFIG_EXTEND_REG
(eth_port_num));
return eth_config_reg;
}
#endif
/*******************************************************************************
* eth_port_read_smi_reg - Read PHY registers
@ -3094,24 +2722,6 @@ static ETH_FUNC_RET_STATUS eth_rx_return_buff (ETH_PORT_INFO *
* The interrupt coalescing value set in the gigE port.
*
*******************************************************************************/
#if 0 /* FIXME */
static unsigned int eth_port_set_rx_coal (ETH_PORT eth_port_num,
unsigned int t_clk,
unsigned int delay)
{
unsigned int coal;
coal = ((t_clk / 1000000) * delay) / 64;
/* Set RX Coalescing mechanism */
MV_REG_WRITE (MV64360_ETH_SDMA_CONFIG_REG (eth_port_num),
((coal & 0x3fff) << 8) |
(MV_REG_READ
(MV64360_ETH_SDMA_CONFIG_REG (eth_port_num))
& 0xffc000ff));
return coal;
}
#endif
/*******************************************************************************
* eth_port_set_tx_coal - Sets coalescing interrupt mechanism on TX path
*
@ -3135,20 +2745,6 @@ static unsigned int eth_port_set_rx_coal (ETH_PORT eth_port_num,
* The interrupt coalescing value set in the gigE port.
*
*******************************************************************************/
#if 0 /* FIXME */
static unsigned int eth_port_set_tx_coal (ETH_PORT eth_port_num,
unsigned int t_clk,
unsigned int delay)
{
unsigned int coal;
coal = ((t_clk / 1000000) * delay) / 64;
/* Set TX Coalescing mechanism */
MV_REG_WRITE (MV64360_ETH_TX_FIFO_URGENT_THRESHOLD_REG (eth_port_num),
coal << 4);
return coal;
}
#endif
/*******************************************************************************
* eth_b_copy - Copy bytes from source to destination

6
board/esd/cpci750/mv_eth.h
View File

@ -792,12 +792,6 @@ static bool eth_port_start(ETH_PORT_INFO *p_eth_port_ctrl);
static void eth_port_uc_addr_set (ETH_PORT eth_port_num,
unsigned char *p_addr,
ETH_QUEUE queue);
#if 0 /* FIXME */
static void eth_port_mc_addr (ETH_PORT eth_port_num,
unsigned char *p_addr,
ETH_QUEUE queue,
int option);
#endif
/* PHY and MIB routines */
static bool ethernet_phy_reset(ETH_PORT eth_port_num);

15
board/esd/cpci750/pci.c
View File

@ -868,21 +868,6 @@ void gt_cpcidvi_out8(unsigned int offset, unsigned char data)
/* TODO BJW: Change this for DB64360. This was pulled from the EV64260 */
/* and is curently not called *. */
#if 0
static void gt_fixup_irq (struct pci_controller *hose, pci_dev_t dev)
{
unsigned char pin, irq;
pci_read_config_byte (dev, PCI_INTERRUPT_PIN, &pin);
if (pin == 1) { /* only allow INT A */
irq = pci_irq_swizzle[(PCI_HOST) hose->
cfg_addr][PCI_DEV (dev)];
if (irq)
pci_write_config_byte (dev, PCI_INTERRUPT_LINE, irq);
}
}
#endif
struct pci_config_table gt_config_table[] = {
#ifdef CONFIG_USE_CPCIDVI

15
board/esd/cpci750/sdram_init.c
View File

@ -404,19 +404,6 @@ static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
/* calculate SPD checksum */
/*------------------------------------------------------------------------------------------------------------------------------*/
spd_checksum = 0;
#if 0 /* test-only */
for (i = 0; i <= 62; i++) {
spd_checksum += data[i];
}
if ((spd_checksum & 0xff) != data[63]) {
printf ("### Error in SPD Checksum !!! Is_value: %2x should value %2x\n", (unsigned int) (spd_checksum & 0xff), data[63]);
hang ();
}
else
printf ("SPD Checksum ok!\n");
#endif /* test-only */
/*------------------------------------------------------------------------------------------------------------------------------*/
for (i = 2; i <= 35; i++) {
@ -1510,7 +1497,6 @@ int setup_sdram (AUX_MEM_DIMM_INFO * info)
/* map the bank */
memory_map_bank (i, 0, GB / 4);
#if 1 /* test only */
/* set SDRAM mode */ /* To_do check it */
GT_REG_WRITE (SDRAM_OPERATION, 0x3);
check = GTREGREAD (SDRAM_OPERATION);
@ -1525,7 +1511,6 @@ int setup_sdram (AUX_MEM_DIMM_INFO * info)
DP (printf
("\n*** SDRAM_OPERATION 1418 (0 = Normal Operation) = %08lx ***\n",
check));
#endif /* test only */
/* unmap the bank */
memory_map_bank (i, 0, 0);
}

56
board/esd/cpci750/serial.h
View File

@ -29,61 +29,5 @@
#ifndef __SERIAL_H__
#define __SERIAL_H__
#if 0
#define B230400 1
#define B115200 2
#define B57600 4
#define B38400 82
#define B19200 163
#define B9600 24
#define B4800 651
#define B2400 1302
#define B1200 2604
#define B600 5208
#define B300 10417
#define B150 20833
#define B110 28409
#define BDEFAULT B115200
/* this stuff is important to initialize
the DUART channels */
#define Scale 0x01L /* distance between port addresses */
#define COM1 0x000003f8 /* Keyboard */
#define COM2 0x000002f8 /* Host */
/* Port Definitions relative to base COM port addresses */
#define DataIn (0x00*Scale) /* data input port */
#define DataOut (0x00*Scale) /* data output port */
#define BaudLsb (0x00*Scale) /* baud rate divisor least significant byte */
#define BaudMsb (0x01*Scale) /* baud rate divisor most significant byte */
#define Ier (0x01*Scale) /* interrupt enable register */
#define Iir (0x02*Scale) /* interrupt identification register */
#define Lcr (0x03*Scale) /* line control register */
#define Mcr (0x04*Scale) /* modem control register */
#define Lsr (0x05*Scale) /* line status register */
#define Msr (0x06*Scale) /* modem status register */
/* Bit Definitions for above ports */
#define LcrDlab 0x80 /* b7: enable baud rate divisor registers */
#define LcrDflt 0x03 /* b6-0: no parity, 1 stop, 8 data */
#define McrRts 0x02 /* b1: request to send (I am ready to xmit) */
#define McrDtr 0x01 /* b0: data terminal ready (I am alive ready to rcv) */
#define McrDflt (McrRts|McrDtr)
#define LsrTxD 0x6000 /* b5: transmit holding register empty (i.e. xmit OK!)*/
/* b6: transmitter empty */
#define LsrRxD 0x0100 /* b0: received data ready (i.e. got a byte!) */
#define MsrRi 0x0040 /* b6: ring indicator (other guy is ready to rcv) */
#define MsrDsr 0x0020 /* b5: data set ready (other guy is alive ready to rcv */
#define MsrCts 0x0010 /* b4: clear to send (other guy is ready to rcv) */
#define IerRda 0xf /* b0: Enable received data available interrupt */
#endif
#endif /* __SERIAL_H__ */

4
board/esd/pmc405/pmc405.c
View File

@ -164,10 +164,6 @@ long int initdram (int board_type)
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
#if 0
printf("\nmb0cf=%x\n", val); /* test-only */
printf("strap=%x\n", mfdcr(strap)); /* test-only */
#endif
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}

20
board/kup/kup4k/kup4k.c
View File

@ -200,19 +200,6 @@ long int initdram (int board_type)
memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
udelay (1000);
#if 0 /* 3 x 8MB */
size_b0 = 0x00800000;
size_b1 = 0x00800000;
size_b2 = 0x00800000;
memctl->memc_mptpr = CFG_MPTPR;
udelay (1000);
memctl->memc_or1 = 0xFF800A00;
memctl->memc_br1 = 0x00000081;
memctl->memc_or2 = 0xFF000A00;
memctl->memc_br2 = 0x00800081;
memctl->memc_or3 = 0xFE000A00;
memctl->memc_br3 = 0x01000081;
#else /* 3 x 16 MB */
size_b0 = 0x01000000;
size_b1 = 0x01000000;
size_b2 = 0x01000000;
@ -224,7 +211,6 @@ long int initdram (int board_type)
memctl->memc_br2 = 0x01000081;
memctl->memc_or3 = 0xFC000A00;
memctl->memc_br3 = 0x02000081;
#endif
udelay (10000);
@ -320,12 +306,6 @@ void lcd_logo (bd_t * bd)
else
tft = 0;
}
#if 0
if (((S1D_VALUE *) fb_info.RegAddr)[0xAC] & 0x04)
tft = 0;
else
tft = 1;
#endif
debugk ("Port=0x%02x -> TFT=%d\n", tft,
((S1D_VALUE *) fb_info.RegAddr)[0xAC]);

61
board/kup/kup4x/kup4x.c
View File

@ -202,22 +202,6 @@ long int initdram (int board_type)
memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
udelay (1000);
#if 0 /* 4 x 8MB */
size_b0 = 0x00800000;
size_b1 = 0x00800000;
size_b2 = 0x00800000;
size_b3 = 0x00800000;
memctl->memc_mptpr = CFG_MPTPR;
udelay (1000);
memctl->memc_or1 = 0xFF800A00;
memctl->memc_br1 = 0x00000081;
memctl->memc_or2 = 0xFF000A00;
memctl->memc_br2 = 0x00800081;
memctl->memc_or3 = 0xFE000A00;
memctl->memc_br3 = 0x01000081;
memctl->memc_or6 = 0xFE000A00;
memctl->memc_br6 = 0x01800081;
#else /* 4 x 16 MB */
size_b0 = 0x01000000;
size_b1 = 0x01000000;
size_b2 = 0x01000000;
@ -232,7 +216,6 @@ long int initdram (int board_type)
memctl->memc_br3 = 0x02000081;
memctl->memc_or6 = 0xFC000A00;
memctl->memc_br6 = 0x03000081;
#endif
udelay (10000);
return (size_b0 + size_b1 + size_b2 + size_b3);
@ -247,50 +230,6 @@ long int initdram (int board_type)
* - short between address lines
* - short between data lines
*/
#if 0
static long int dram_size (long int mamr_value, long int *base,
long int maxsize)
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
volatile long int *addr;
ulong cnt, val;
ulong save[32]; /* to make test non-destructive */
unsigned char i = 0;
memctl->memc_mamr = mamr_value;
for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
addr = base + cnt; /* pointer arith! */
save[i++] = *addr;
*addr = ~cnt;
}
/* write 0 to base address */
addr = base;
save[i] = *addr;
*addr = 0;
/* check at base address */
if ((val = *addr) != 0) {
*addr = save[i];
return (0);
}
for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
addr = base + cnt; /* pointer arith! */
val = *addr;
*addr = save[--i];
if (val != (~cnt)) {
return (cnt * sizeof (long));
}
}
return (maxsize);
}
#endif
int misc_init_r (void)
{

10
board/mx1ads/mx1ads.c
View File

@ -53,16 +53,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define U_M_SDIV 0x2
#endif
#if 0
static inline void delay (unsigned long loops)
{
__asm__ volatile ("1:\n"
"subs %0, %1, #1\n"
"bne 1b":"=r" (loops):"0" (loops));
}
#endif
/*
* Miscellaneous platform dependent initialisations

17
board/prodrive/p3mx/mpsc.c
View File

@ -193,11 +193,6 @@ static int mpsc_putchar_sdma (char ch)
p[2] = 0; /* 8 */
p[3] = (unsigned int) &p[4]; /* c */
#if 0
p[9] = DESC_FIRST | DESC_LAST;
p[10] = (unsigned int) &p[0];
p[11] = (unsigned int) &p[12];
#endif
FLUSH_DCACHE (&p[0], &p[8]);
@ -583,18 +578,6 @@ static int galbrg_set_CUV (int channel, int value)
return 0;
}
#if 0
static int galbrg_reset (int channel)
{
unsigned int temp;
temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
temp |= 0x20000;
GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
return 0;
}
#endif
static int galsdma_set_RFT (int channel)
{

402
board/prodrive/p3mx/mv_eth.c
View File

@ -1384,14 +1384,6 @@ static void eth_set_access_control (ETH_PORT eth_port_num,
ETH_WIN_PARAM * param);
static bool eth_port_uc_addr (ETH_PORT eth_port_num, unsigned char uc_nibble,
ETH_QUEUE queue, int option);
#if 0 /* FIXME */
static bool eth_port_smc_addr (ETH_PORT eth_port_num,
unsigned char mc_byte,
ETH_QUEUE queue, int option);
static bool eth_port_omc_addr (ETH_PORT eth_port_num,
unsigned char crc8,
ETH_QUEUE queue, int option);
#endif
static void eth_b_copy (unsigned int src_addr, unsigned int dst_addr,
int byte_count);
@ -1817,272 +1809,6 @@ static bool eth_port_uc_addr (ETH_PORT eth_port_num,
return true;
}
#if 0 /* FIXME */
/*******************************************************************************
* eth_port_mc_addr - Multicast address settings.
*
* DESCRIPTION:
* This API controls the MV device MAC multicast support.
* The MV device supports multicast using two tables:
* 1) Special Multicast Table for MAC addresses of the form
* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_fF).
* The MAC DA[7:0] bits are used as a pointer to the Special Multicast
* Table entries in the DA-Filter table.
* In this case, the function calls eth_port_smc_addr() routine to set the
* Special Multicast Table.
* 2) Other Multicast Table for multicast of another type. A CRC-8bit
* is used as an index to the Other Multicast Table entries in the
* DA-Filter table.
* In this case, the function calculates the CRC-8bit value and calls
* eth_port_omc_addr() routine to set the Other Multicast Table.
* INPUT:
* ETH_PORT eth_port_num Port number.
* unsigned char *p_addr Unicast MAC Address.
* ETH_QUEUE queue Rx queue number for this MAC address.
* int option 0 = Add, 1 = remove address.
*
* OUTPUT:
* See description.
*
* RETURN:
* true is output succeeded.
* false if add_address_table_entry( ) failed.
*
*******************************************************************************/
static void eth_port_mc_addr (ETH_PORT eth_port_num,
unsigned char *p_addr,
ETH_QUEUE queue, int option)
{
unsigned int mac_h;
unsigned int mac_l;
unsigned char crc_result = 0;
int mac_array[48];
int crc[8];
int i;
if ((p_addr[0] == 0x01) &&
(p_addr[1] == 0x00) &&
(p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00)) {
eth_port_smc_addr (eth_port_num, p_addr[5], queue, option);
} else {
/* Calculate CRC-8 out of the given address */
mac_h = (p_addr[0] << 8) | (p_addr[1]);
mac_l = (p_addr[2] << 24) | (p_addr[3] << 16) |
(p_addr[4] << 8) | (p_addr[5] << 0);
for (i = 0; i < 32; i++)
mac_array[i] = (mac_l >> i) & 0x1;
for (i = 32; i < 48; i++)
mac_array[i] = (mac_h >> (i - 32)) & 0x1;
crc[0] = mac_array[45] ^ mac_array[43] ^ mac_array[40] ^
mac_array[39] ^ mac_array[35] ^ mac_array[34] ^
mac_array[31] ^ mac_array[30] ^ mac_array[28] ^
mac_array[23] ^ mac_array[21] ^ mac_array[19] ^
mac_array[18] ^ mac_array[16] ^ mac_array[14] ^
mac_array[12] ^ mac_array[8] ^ mac_array[7] ^
mac_array[6] ^ mac_array[0];
crc[1] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^
mac_array[43] ^ mac_array[41] ^ mac_array[39] ^
mac_array[36] ^ mac_array[34] ^ mac_array[32] ^
mac_array[30] ^ mac_array[29] ^ mac_array[28] ^
mac_array[24] ^ mac_array[23] ^ mac_array[22] ^
mac_array[21] ^ mac_array[20] ^ mac_array[18] ^
mac_array[17] ^ mac_array[16] ^ mac_array[15] ^
mac_array[14] ^ mac_array[13] ^ mac_array[12] ^
mac_array[9] ^ mac_array[6] ^ mac_array[1] ^
mac_array[0];
crc[2] = mac_array[47] ^ mac_array[46] ^ mac_array[44] ^
mac_array[43] ^ mac_array[42] ^ mac_array[39] ^
mac_array[37] ^ mac_array[34] ^ mac_array[33] ^
mac_array[29] ^ mac_array[28] ^ mac_array[25] ^
mac_array[24] ^ mac_array[22] ^ mac_array[17] ^
mac_array[15] ^ mac_array[13] ^ mac_array[12] ^
mac_array[10] ^ mac_array[8] ^ mac_array[6] ^
mac_array[2] ^ mac_array[1] ^ mac_array[0];
crc[3] = mac_array[47] ^ mac_array[45] ^ mac_array[44] ^
mac_array[43] ^ mac_array[40] ^ mac_array[38] ^
mac_array[35] ^ mac_array[34] ^ mac_array[30] ^
mac_array[29] ^ mac_array[26] ^ mac_array[25] ^
mac_array[23] ^ mac_array[18] ^ mac_array[16] ^
mac_array[14] ^ mac_array[13] ^ mac_array[11] ^
mac_array[9] ^ mac_array[7] ^ mac_array[3] ^
mac_array[2] ^ mac_array[1];
crc[4] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^
mac_array[41] ^ mac_array[39] ^ mac_array[36] ^
mac_array[35] ^ mac_array[31] ^ mac_array[30] ^
mac_array[27] ^ mac_array[26] ^ mac_array[24] ^
mac_array[19] ^ mac_array[17] ^ mac_array[15] ^
mac_array[14] ^ mac_array[12] ^ mac_array[10] ^
mac_array[8] ^ mac_array[4] ^ mac_array[3] ^
mac_array[2];
crc[5] = mac_array[47] ^ mac_array[46] ^ mac_array[45] ^
mac_array[42] ^ mac_array[40] ^ mac_array[37] ^
mac_array[36] ^ mac_array[32] ^ mac_array[31] ^
mac_array[28] ^ mac_array[27] ^ mac_array[25] ^
mac_array[20] ^ mac_array[18] ^ mac_array[16] ^
mac_array[15] ^ mac_array[13] ^ mac_array[11] ^
mac_array[9] ^ mac_array[5] ^ mac_array[4] ^
mac_array[3];
crc[6] = mac_array[47] ^ mac_array[46] ^ mac_array[43] ^
mac_array[41] ^ mac_array[38] ^ mac_array[37] ^
mac_array[33] ^ mac_array[32] ^ mac_array[29] ^
mac_array[28] ^ mac_array[26] ^ mac_array[21] ^
mac_array[19] ^ mac_array[17] ^ mac_array[16] ^
mac_array[14] ^ mac_array[12] ^ mac_array[10] ^
mac_array[6] ^ mac_array[5] ^ mac_array[4];
crc[7] = mac_array[47] ^ mac_array[44] ^ mac_array[42] ^
mac_array[39] ^ mac_array[38] ^ mac_array[34] ^
mac_array[33] ^ mac_array[30] ^ mac_array[29] ^
mac_array[27] ^ mac_array[22] ^ mac_array[20] ^
mac_array[18] ^ mac_array[17] ^ mac_array[15] ^
mac_array[13] ^ mac_array[11] ^ mac_array[7] ^
mac_array[6] ^ mac_array[5];
for (i = 0; i < 8; i++)
crc_result = crc_result | (crc[i] << i);
eth_port_omc_addr (eth_port_num, crc_result, queue, option);
}
return;
}
/*******************************************************************************
* eth_port_smc_addr - Special Multicast address settings.
*
* DESCRIPTION:
* This routine controls the MV device special MAC multicast support.
* The Special Multicast Table for MAC addresses supports MAC of the form
* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_fF).
* The MAC DA[7:0] bits are used as a pointer to the Special Multicast
* Table entries in the DA-Filter table.
* This function set the Special Multicast Table appropriate entry
* according to the argument given.
*
* INPUT:
* ETH_PORT eth_port_num Port number.
* unsigned char mc_byte Multicast addr last byte (MAC DA[7:0] bits).
* ETH_QUEUE queue Rx queue number for this MAC address.
* int option 0 = Add, 1 = remove address.
*
* OUTPUT:
* See description.
*
* RETURN:
* true is output succeeded.
* false if option parameter is invalid.
*
*******************************************************************************/
static bool eth_port_smc_addr (ETH_PORT eth_port_num,
unsigned char mc_byte,
ETH_QUEUE queue, int option)
{
unsigned int smc_table_reg;
unsigned int tbl_offset;
unsigned int reg_offset;
/* Locate the SMC table entry */
tbl_offset = (mc_byte / 4) * 4; /* Register offset from SMC table base */
reg_offset = mc_byte % 4; /* Entry offset within the above register */
queue &= 0x7;
switch (option) {
case REJECT_MAC_ADDR:
/* Clear accepts frame bit at specified Special DA table entry */
smc_table_reg =
MV_REG_READ ((MV64460_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
smc_table_reg &= (0x0E << (8 * reg_offset));
MV_REG_WRITE ((MV64460_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), smc_table_reg);
break;
case ACCEPT_MAC_ADDR:
/* Set accepts frame bit at specified Special DA table entry */
smc_table_reg =
MV_REG_READ ((MV64460_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
smc_table_reg |= ((0x01 | queue) << (8 * reg_offset));
MV_REG_WRITE ((MV64460_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), smc_table_reg);
break;
default:
return false;
}
return true;
}
/*******************************************************************************
* eth_port_omc_addr - Multicast address settings.
*
* DESCRIPTION:
* This routine controls the MV device Other MAC multicast support.
* The Other Multicast Table is used for multicast of another type.
* A CRC-8bit is used as an index to the Other Multicast Table entries
* in the DA-Filter table.
* The function gets the CRC-8bit value from the calling routine and
* set the Other Multicast Table appropriate entry according to the
* CRC-8 argument given.
*
* INPUT:
* ETH_PORT eth_port_num Port number.
* unsigned char crc8 A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
* ETH_QUEUE queue Rx queue number for this MAC address.
* int option 0 = Add, 1 = remove address.
*
* OUTPUT:
* See description.
*
* RETURN:
* true is output succeeded.
* false if option parameter is invalid.
*
*******************************************************************************/
static bool eth_port_omc_addr (ETH_PORT eth_port_num,
unsigned char crc8,
ETH_QUEUE queue, int option)
{
unsigned int omc_table_reg;
unsigned int tbl_offset;
unsigned int reg_offset;
/* Locate the OMC table entry */
tbl_offset = (crc8 / 4) * 4; /* Register offset from OMC table base */
reg_offset = crc8 % 4; /* Entry offset within the above register */
queue &= 0x7;
switch (option) {
case REJECT_MAC_ADDR:
/* Clear accepts frame bit at specified Other DA table entry */
omc_table_reg =
MV_REG_READ ((MV64460_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
omc_table_reg &= (0x0E << (8 * reg_offset));
MV_REG_WRITE ((MV64460_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), omc_table_reg);
break;
case ACCEPT_MAC_ADDR:
/* Set accepts frame bit at specified Other DA table entry */
omc_table_reg =
MV_REG_READ ((MV64460_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
omc_table_reg |= ((0x01 | queue) << (8 * reg_offset));
MV_REG_WRITE ((MV64460_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), omc_table_reg);
break;
default:
return false;
}
return true;
}
#endif
/*******************************************************************************
* eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
@ -2380,104 +2106,8 @@ static void eth_port_reset (ETH_PORT eth_port_num)
return;
}
#if 0 /* Not needed here */
/*******************************************************************************
* ethernet_set_config_reg - Set specified bits in configuration register.
*
* DESCRIPTION:
* This function sets specified bits in the given ethernet
* configuration register.
*
* INPUT:
* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
* unsigned int value 32 bit value.
*
* OUTPUT:
* The set bits in the value parameter are set in the configuration
* register.
*
* RETURN:
* None.
*
*******************************************************************************/
static void ethernet_set_config_reg (ETH_PORT eth_port_num,
unsigned int value)
{
unsigned int eth_config_reg;
eth_config_reg =
MV_REG_READ (MV64460_ETH_PORT_CONFIG_REG (eth_port_num));
eth_config_reg |= value;
MV_REG_WRITE (MV64460_ETH_PORT_CONFIG_REG (eth_port_num),
eth_config_reg);
return;
}
#endif
#if 0 /* FIXME */
/*******************************************************************************
* ethernet_reset_config_reg - Reset specified bits in configuration register.
*
* DESCRIPTION:
* This function resets specified bits in the given Ethernet
* configuration register.
*
* INPUT:
* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
* unsigned int value 32 bit value.
*
* OUTPUT:
* The set bits in the value parameter are reset in the configuration
* register.
*
* RETURN:
* None.
*
*******************************************************************************/
static void ethernet_reset_config_reg (ETH_PORT eth_port_num,
unsigned int value)
{
unsigned int eth_config_reg;
eth_config_reg = MV_REG_READ (MV64460_ETH_PORT_CONFIG_EXTEND_REG
(eth_port_num));
eth_config_reg &= ~value;
MV_REG_WRITE (MV64460_ETH_PORT_CONFIG_EXTEND_REG (eth_port_num),
eth_config_reg);
return;
}
#endif
#if 0 /* Not needed here */
/*******************************************************************************
* ethernet_get_config_reg - Get the port configuration register
*
* DESCRIPTION:
* This function returns the configuration register value of the given
* ethernet port.
*
* INPUT:
* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
*
* OUTPUT:
* None.
*
* RETURN:
* Port configuration register value.
*
*******************************************************************************/
static unsigned int ethernet_get_config_reg (ETH_PORT eth_port_num)
{
unsigned int eth_config_reg;
eth_config_reg = MV_REG_READ (MV64460_ETH_PORT_CONFIG_EXTEND_REG
(eth_port_num));
return eth_config_reg;
}
#endif
/*******************************************************************************
* eth_port_read_smi_reg - Read PHY registers
@ -3253,24 +2883,6 @@ static ETH_FUNC_RET_STATUS eth_rx_return_buff (ETH_PORT_INFO *
* The interrupt coalescing value set in the gigE port.
*
*******************************************************************************/
#if 0 /* FIXME */
static unsigned int eth_port_set_rx_coal (ETH_PORT eth_port_num,
unsigned int t_clk,
unsigned int delay)
{
unsigned int coal;
coal = ((t_clk / 1000000) * delay) / 64;
/* Set RX Coalescing mechanism */
MV_REG_WRITE (MV64460_ETH_SDMA_CONFIG_REG (eth_port_num),
((coal & 0x3fff) << 8) |
(MV_REG_READ
(MV64460_ETH_SDMA_CONFIG_REG (eth_port_num))
& 0xffc000ff));
return coal;
}
#endif
/*******************************************************************************
* eth_port_set_tx_coal - Sets coalescing interrupt mechanism on TX path
*
@ -3294,20 +2906,6 @@ static unsigned int eth_port_set_rx_coal (ETH_PORT eth_port_num,
* The interrupt coalescing value set in the gigE port.
*
*******************************************************************************/
#if 0 /* FIXME */
static unsigned int eth_port_set_tx_coal (ETH_PORT eth_port_num,
unsigned int t_clk,
unsigned int delay)
{
unsigned int coal;
coal = ((t_clk / 1000000) * delay) / 64;
/* Set TX Coalescing mechanism */
MV_REG_WRITE (MV64460_ETH_TX_FIFO_URGENT_THRESHOLD_REG (eth_port_num),
coal << 4);
return coal;
}
#endif
/*******************************************************************************
* eth_b_copy - Copy bytes from source to destination

6
board/prodrive/p3mx/mv_eth.h
View File

@ -788,12 +788,6 @@ static bool eth_port_start(ETH_PORT_INFO *p_eth_port_ctrl);
static void eth_port_uc_addr_set (ETH_PORT eth_port_num,
unsigned char *p_addr,
ETH_QUEUE queue);
#if 0 /* FIXME */
static void eth_port_mc_addr (ETH_PORT eth_port_num,
unsigned char *p_addr,
ETH_QUEUE queue,
int option);
#endif
/* PHY and MIB routines */
static bool ethernet_phy_reset(ETH_PORT eth_port_num);

15
board/prodrive/p3mx/pci.c
View File

@ -868,21 +868,6 @@ void gt_cpcidvi_out8(unsigned int offset, unsigned char data)
/* TODO BJW: Change this for DB64360. This was pulled from the EV64260 */
/* and is curently not called *. */
#if 0
static void gt_fixup_irq (struct pci_controller *hose, pci_dev_t dev)
{
unsigned char pin, irq;
pci_read_config_byte (dev, PCI_INTERRUPT_PIN, &pin);
if (pin == 1) { /* only allow INT A */
irq = pci_irq_swizzle[(PCI_HOST) hose->
cfg_addr][PCI_DEV (dev)];
if (irq)
pci_write_config_byte (dev, PCI_INTERRUPT_LINE, irq);
}
}
#endif
struct pci_config_table gt_config_table[] = {
#ifdef CONFIG_USE_CPCIDVI

56
board/prodrive/p3mx/serial.h
View File

@ -29,61 +29,5 @@
#ifndef __SERIAL_H__
#define __SERIAL_H__
#if 0
#define B230400 1
#define B115200 2
#define B57600 4
#define B38400 82
#define B19200 163
#define B9600 24
#define B4800 651
#define B2400 1302
#define B1200 2604
#define B600 5208
#define B300 10417
#define B150 20833
#define B110 28409
#define BDEFAULT B115200
/* this stuff is important to initialize
the DUART channels */
#define Scale 0x01L /* distance between port addresses */
#define COM1 0x000003f8 /* Keyboard */
#define COM2 0x000002f8 /* Host */
/* Port Definitions relative to base COM port addresses */
#define DataIn (0x00*Scale) /* data input port */
#define DataOut (0x00*Scale) /* data output port */
#define BaudLsb (0x00*Scale) /* baud rate divisor least significant byte */
#define BaudMsb (0x01*Scale) /* baud rate divisor most significant byte */
#define Ier (0x01*Scale) /* interrupt enable register */
#define Iir (0x02*Scale) /* interrupt identification register */
#define Lcr (0x03*Scale) /* line control register */
#define Mcr (0x04*Scale) /* modem control register */
#define Lsr (0x05*Scale) /* line status register */
#define Msr (0x06*Scale) /* modem status register */
/* Bit Definitions for above ports */
#define LcrDlab 0x80 /* b7: enable baud rate divisor registers */
#define LcrDflt 0x03 /* b6-0: no parity, 1 stop, 8 data */
#define McrRts 0x02 /* b1: request to send (I am ready to xmit) */
#define McrDtr 0x01 /* b0: data terminal ready (I am alive ready to rcv) */
#define McrDflt (McrRts|McrDtr)
#define LsrTxD 0x6000 /* b5: transmit holding register empty (i.e. xmit OK!)*/
/* b6: transmitter empty */
#define LsrRxD 0x0100 /* b0: received data ready (i.e. got a byte!) */
#define MsrRi 0x0040 /* b6: ring indicator (other guy is ready to rcv) */
#define MsrDsr 0x0020 /* b5: data set ready (other guy is alive ready to rcv */
#define MsrCts 0x0010 /* b4: clear to send (other guy is ready to rcv) */
#define IerRda 0xf /* b0: Enable received data available interrupt */
#endif
#endif /* __SERIAL_H__ */

20
board/pxa255_idp/memsetup.S
View File

@ -323,13 +323,6 @@ mem_init:
str r2, [r1, #MDMRS_OFFSET]
/* We are finished with Intel's memory controller initialisation */
#if 0
/* FIXME turn on serial ports */
/* look into moving this to board_init() */
ldr r2, =(PXA_CS5_PHYS + 0x03C0002c)
mov r3, #0x13
str r3, [r2]
#endif
#ifdef DEBUG_BLINK_ENABLE
/* 6th blink */
@ -360,19 +353,6 @@ initclks:
/* Turn Off ALL on-chip peripheral clocks for re-configuration */
/* Note: See label 'ENABLECLKS' for the re-enabling */
#if 0
ldr r1, =CKEN
mov r2, #0
str r2, [r1]
/* default value in case no valid rotary switch setting is found */
ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */
/* ... and write the core clock config register */
ldr r1, =CCCR
str r2, [r1]
#endif
#ifdef RTC
/* enable the 32Khz oscillator for RTC and PowerManager */

46
board/sbc8560/sbc8560.c
View File

@ -265,13 +265,6 @@ long int initdram (int board_type)
long dram_size = 0;
extern long spd_sdram (void);
volatile immap_t *immap = (immap_t *)CFG_IMMR;
#if 0
#if !defined(CONFIG_RAM_AS_FLASH)
volatile ccsr_lbc_t *lbc= &immap->im_lbc;
sys_info_t sysinfo;
uint temp_lbcdll = 0;
#endif
#endif /* 0 */
#if !defined(CONFIG_RAM_AS_FLASH) || defined(CONFIG_DDR_DLL)
volatile ccsr_gur_t *gur= &immap->im_gur;
#endif
@ -290,45 +283,6 @@ long int initdram (int board_type)
dram_size = fixed_sdram ();
#endif
#if 0
#if !defined(CONFIG_RAM_AS_FLASH) /* LocalBus SDRAM is not emulating flash */
get_sys_info(&sysinfo);
/* if localbus freq is less than 66Mhz,we use bypass mode,otherwise use DLL */
if(sysinfo.freqSystemBus/(CFG_LBC_LCRR & 0x0f) < 66000000) {
lbc->lcrr = (CFG_LBC_LCRR & 0x0fffffff)| 0x80000000;
} else {
#if defined(CONFIG_MPC85xx_REV1) /* need change CLKDIV before enable DLL */
lbc->lcrr = 0x10000004; /* default CLKDIV is 8, change it to 4 temporarily */
#endif
lbc->lcrr = CFG_LBC_LCRR & 0x7fffffff;
udelay(200);
temp_lbcdll = gur->lbcdllcr;
gur->lbcdllcr = ((temp_lbcdll & 0xff) << 16 ) | 0x80000000;
asm("sync;isync;msync");
}
lbc->or2 = CFG_OR2_PRELIM; /* 64MB SDRAM */
lbc->br2 = CFG_BR2_PRELIM;
lbc->lbcr = CFG_LBC_LBCR;
lbc->lsdmr = CFG_LBC_LSDMR_1;
asm("sync");
(unsigned int) * (ulong *)0 = 0x000000ff;
lbc->lsdmr = CFG_LBC_LSDMR_2;
asm("sync");
(unsigned int) * (ulong *)0 = 0x000000ff;
lbc->lsdmr = CFG_LBC_LSDMR_3;
asm("sync");
(unsigned int) * (ulong *)0 = 0x000000ff;
lbc->lsdmr = CFG_LBC_LSDMR_4;
asm("sync");
(unsigned int) * (ulong *)0 = 0x000000ff;
lbc->lsdmr = CFG_LBC_LSDMR_5;
asm("sync");
lbc->lsrt = CFG_LBC_LSRT;
asm("sync");
lbc->mrtpr = CFG_LBC_MRTPR;
asm("sync");
#endif
#endif
#if defined(CONFIG_DDR_ECC)
{

4
board/stxxtc/stxxtc.c
View File

@ -536,19 +536,16 @@ int board_early_init_f(void)
(void)ioport;
(void)cpm;
#if 1
/* NAND chip select */
upmconfig(UPMB, (uint *) nandcs_table, sizeof(nandcs_table) / sizeof(nandcs_table[0]));
memctl->memc_or2 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_BI | OR_G5LS);
memctl->memc_br2 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V | BR_MS_UPMB);
memctl->memc_mbmr = 0; /* all clear */
#endif
memctl->memc_br5 &= ~BR_V;
memctl->memc_br6 &= ~BR_V;
memctl->memc_br7 &= ~BR_V;
#if 1
ioport->iop_padat = PA_GP_OUTVAL;
ioport->iop_paodr = PA_ODR_VAL;
ioport->iop_padir = PA_GP_OUTMASK | PA_SP_DIRVAL;
@ -569,7 +566,6 @@ int board_early_init_f(void)
cpm->cp_peodr = PE_ODR_VAL;
cpm->cp_pedir = PE_GP_OUTMASK | PE_SP_DIRVAL;
cpm->cp_pepar = PE_SP_MASK;
#endif
return 0;
}

5
board/tqm8272/tqm8272.c
View File

@ -35,13 +35,8 @@
#include <image.h>
#endif
#if 0
#define deb_printf(fmt,arg...) \
printf ("TQM8272 %s %s: " fmt,__FILE__, __FUNCTION__, ##arg)
#else
#define deb_printf(fmt,arg...) \
do { } while (0)
#endif
#if defined(CONFIG_BOARD_GET_CPU_CLK_F)
unsigned long board_get_cpu_clk_f (void);

4
board/tqm834x/pci.c
View File

@ -100,10 +100,6 @@ pci_init_board(void)
* (13 oct 05)
*/
reg32 = OCCR_PCICOE1;
#if 0
/* enabling all PCI_CLK_OUTPUT lines HANGS the board... */
reg32 = 0xff000000;
#endif
if (clk->spmr & SPMR_CKID) {
/* PCI Clock is half CONFIG_83XX_CLKIN so need to set up OCCR
* fields accordingly */

3
board/uc100/uc100.c
View File

@ -21,9 +21,6 @@
* MA 02111-1307 USA
*/
#if 0
#define DEBUG
#endif
#include <common.h>
#include <mpc8xx.h>

7
common/ACEX1K.c
View File

@ -209,13 +209,6 @@ static int ACEX1K_ps_load (Altera_desc * desc, void *buf, size_t bsize)
#endif
/* Altera detects an error if INIT goes low (active)
while DONE is low (inactive) */
#if 0 /* not yet implemented */
if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) {
puts ("** CRC error during FPGA load.\n");
(*fn->abort) (cookie);
return (FPGA_FAIL);
}
#endif
val = data [bytecount ++ ];
i = 8;
do {

8
common/cmd_cache.c
View File

@ -36,10 +36,6 @@ int do_icache ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
switch (argc) {
case 2: /* on / off */
switch (on_off(argv[1])) {
#if 0 /* prevented by varargs handling; FALLTROUGH is harmless, too */
default: printf ("Usage:\n%s\n", cmdtp->usage);
return;
#endif
case 0: icache_disable();
break;
case 1: icache_enable ();
@ -62,10 +58,6 @@ int do_dcache ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
switch (argc) {
case 2: /* on / off */
switch (on_off(argv[1])) {
#if 0 /* prevented by varargs handling; FALLTROUGH is harmless, too */
default: printf ("Usage:\n%s\n", cmdtp->usage);
return;
#endif
case 0: dcache_disable();
break;
case 1: dcache_enable ();

4
common/cmd_doc.c
View File

@ -1551,10 +1551,6 @@ static inline int doccheck(unsigned long potential, unsigned long physadr)
* if the ID isn't the DoC2000 or DoCMillenium ID, so we can assume
* the DOC is missing
*/
# if 0
printf("Possible DiskOnChip with unknown ChipID %2.2X found at 0x%lx\n",
ChipID, physadr);
# endif
#endif
#ifndef DOC_PASSIVE_PROBE
/* Put back the contents of the DOCControl register, in case it's not

7
common/cmd_elf.c
View File

@ -243,13 +243,6 @@ int valid_elf_image (unsigned long addr)
return 0;
}
#if 0
if (ehdr->e_machine != EM_PPC) {
printf ("## Not a PowerPC elf image at address 0x%08lx\n",
addr);
return 0;
}
#endif
return 1;
}

3
common/cmd_fpga.c
View File

@ -33,9 +33,6 @@
#include <fpga.h>
#include <malloc.h>
#if 0
#define FPGA_DEBUG
#endif
#ifdef FPGA_DEBUG
#define PRINTF(fmt,args...) printf (fmt ,##args)

7
common/cmd_i2c.c
View File

@ -321,13 +321,6 @@ int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
udelay(11000);
#endif
#if 0
for (timeout = 0; timeout < 10; timeout++) {
udelay(2000);
if (i2c_probe(chip) == 0)
break;
}
#endif
}
return (0);

60
common/cmd_ide.c
View File

@ -282,20 +282,6 @@ int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
rcode = 1;
}
return rcode;
#if 0
} else if (strncmp(argv[1],"pio",4) == 0) {
int mode = (int)simple_strtoul(argv[2], NULL, 10);
if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
puts ("\nSetting ");
pio_mode = mode;
ide_init ();
} else {
printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
mode, IDE_MAX_PIO_MODE);
}
return;
#endif
}
printf ("Usage:\n%s\n", cmdtp->usage);
@ -1029,9 +1015,6 @@ static void ide_ident (block_dev_desc_t *dev_desc)
int do_retry = 0;
#endif
#if 0
int mode, cycle_time;
#endif
int device;
device=dev_desc->dev;
printf (" Device %d: ", device);
@ -1144,34 +1127,6 @@ static void ide_ident (block_dev_desc_t *dev_desc)
else
dev_desc->removable = 0;
#if 0
/*
* Drive PIO mode autoselection
*/
mode = iop->tPIO;
printf ("tPIO = 0x%02x = %d\n",mode, mode);
if (mode > 2) { /* 2 is maximum allowed tPIO value */
mode = 2;
debug ("Override tPIO -> 2\n");
}
if (iop->field_valid & 2) { /* drive implements ATA2? */
debug ("Drive implements ATA2\n");
if (iop->capability & 8) { /* drive supports use_iordy? */
cycle_time = iop->eide_pio_iordy;
} else {
cycle_time = iop->eide_pio;
}
debug ("cycle time = %d\n", cycle_time);
mode = 4;
if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
}
printf ("PIO mode to use: PIO %d\n", mode);
#endif /* 0 */
#ifdef CONFIG_ATAPI
if (dev_desc->if_type==IF_TYPE_ATAPI) {
atapi_inquiry(dev_desc);
@ -1207,21 +1162,6 @@ static void ide_ident (block_dev_desc_t *dev_desc)
dev_desc->type=DEV_TYPE_HARDDISK;
dev_desc->blksz=ATA_BLOCKSIZE;
dev_desc->lun=0; /* just to fill something in... */
#if 0 /* only used to test the powersaving mode,
* if enabled, the drive goes after 5 sec
* in standby mode */
ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c = ide_wait (device, IDE_TIME_OUT);
ide_outb (device, ATA_SECT_CNT, 1);
ide_outb (device, ATA_LBA_LOW, 0);
ide_outb (device, ATA_LBA_MID, 0);
ide_outb (device, ATA_LBA_HIGH, 0);
ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
ide_outb (device, ATA_COMMAND, 0xe3);
udelay (50);
c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
#endif
}

6
common/cmd_load.c
View File

@ -842,12 +842,6 @@ static int k_recv (void)
If a character less than SPACE (0x20) is received - error.
*/
#if 0
/* OLD CODE, Prior to checking sequence numbers */
/* first have all state machines save current states */
k_state_saved = k_state;
k_data_save ();
#endif
/* get a packet */
/* wait for the starting character or ^C */

4
common/cmd_nand.c
View File

@ -629,10 +629,6 @@ U_BOOT_CMD(nboot, 4, 1, do_nandboot,
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#include <linux/mtd/nand_legacy.h>
#if 0
#include <linux/mtd/nand_ids.h>
#include <jffs2/jffs2.h>
#endif
#ifdef CONFIG_OMAP1510
void archflashwp(void *archdata, int wp);

7
common/cmd_pcmcia.c
View File

@ -351,13 +351,6 @@ int check_ide_device (int slot)
#else
/* set I/O area in config reg -> only valid for ARGOSY D5!!! */
*((uchar *)(addr + config_base)) = 1;
#endif
#if 0
printf("\n## Config_base = %04x ###\n", config_base);
printf("Configuration Option Register: %02x @ %x\n", readb(addr + config_base), addr + config_base);
printf("Card Configuration and Status Register: %02x\n", readb(addr + config_base + 2));
printf("Pin Replacement Register Register: %02x\n", readb(addr + config_base + 4));
printf("Socket and Copy Register: %02x\n", readb(addr + config_base + 6));
#endif
return (0);
}

11
common/command.c
View File

@ -90,14 +90,6 @@ do_test (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
if (argc < 3)
return 1;
#if 0
{
printf("test:");
left = 1;
while (argv[left])
printf(" %s", argv[left++]);
}
#endif
last_expr = 0;
left = argc - 1; ap = argv + 1;
@ -196,9 +188,6 @@ do_test (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
expr = !expr;
#if 0
printf(": returns %d\n", expr);
#endif
return expr;
}

10
common/console.c
View File

@ -474,11 +474,6 @@ int console_init_r (void)
}
#endif /* CFG_CONSOLE_ENV_OVERWRITE */
#if 0
/* If nothing usable installed, use only the initial console */
if ((stdio_devices[stdin] == NULL) && (stdio_devices[stdout] == NULL))
return (0);
#endif
return (0);
}
@ -560,11 +555,6 @@ int console_init_r (void)
setenv (stdio_names[i], stdio_devices[i]->name);
}
#if 0
/* If nothing usable installed, use only the initial console */
if ((stdio_devices[stdin] == NULL) && (stdio_devices[stdout] == NULL))
return (0);
#endif
return (0);
}

1021
common/dlmalloc.c
View File

File diff suppressed because it is too large Load Diff

7
common/fpga.c
View File

@ -31,9 +31,6 @@
#if defined(CONFIG_FPGA)
#if 0
#define FPGA_DEBUG /* define FPGA_DEBUG to get debug messages */
#endif
/* Local definitions */
#ifndef CONFIG_MAX_FPGA_DEVICES
@ -207,10 +204,6 @@ void fpga_init( ulong reloc_off )
memset( desc_table, 0, sizeof(desc_table));
PRINTF( "%s: CONFIG_FPGA = 0x%x\n", __FUNCTION__, CONFIG_FPGA );
#if 0
PRINTF( "%s: CFG_FPGA_XILINX = 0x%x\n", __FUNCTION__, CFG_FPGA_XILINX );
PRINTF( "%s: CFG_FPGA_ALTERA = 0x%x\n", __FUNCTION__, CFG_FPGA_ALTERA );
#endif
}
/* fpga_count

48
common/hush.c
View File

@ -118,16 +118,8 @@ extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /
/* #include <dmalloc.h> */
/* #define DEBUG_SHELL */
#if 1
#include "busybox.h"
#include "cmdedit.h"
#else
#define applet_name "hush"
#include "standalone.h"
#define hush_main main
#undef CONFIG_FEATURE_SH_FANCY_PROMPT
#define BB_BANNER
#endif
#endif
#define SPECIAL_VAR_SYMBOL 03
#ifndef __U_BOOT__
@ -1480,14 +1472,6 @@ static int checkjobs(struct pipe* fg_pipe)
pi->stopped_progs++;
pi->progs[prognum].is_stopped = 1;
#if 0
/* Printing this stuff is a pain, since it tends to
* overwrite the prompt an inconveinient moments. So
* don't do that. */
if (pi->stopped_progs == pi->num_progs) {
printf("\n"JOB_STATUS_FORMAT, pi->jobid, "Stopped", pi->text);
}
#endif
}
}
@ -2125,18 +2109,6 @@ static int glob_needed(const char *s)
return 0;
}
#if 0
static void globprint(glob_t *pglob)
{
int i;
debug_printf("glob_t at %p:\n", pglob);
debug_printf(" gl_pathc=%d gl_pathv=%p gl_offs=%d gl_flags=%d\n",
pglob->gl_pathc, pglob->gl_pathv, pglob->gl_offs, pglob->gl_flags);
for (i=0; i<pglob->gl_pathc; i++)
debug_printf("pglob->gl_pathv[%d] = %p = %s\n", i,
pglob->gl_pathv[i], pglob->gl_pathv[i]);
}
#endif
static int xglob(o_string *dest, int flags, glob_t *pglob)
{
@ -2693,7 +2665,6 @@ static int redirect_opt_num(o_string *o)
FILE *generate_stream_from_list(struct pipe *head)
{
FILE *pf;
#if 1
int pid, channel[2];
if (pipe(channel)<0) perror_msg_and_die("pipe");
pid=fork();
@ -2705,23 +2676,12 @@ FILE *generate_stream_from_list(struct pipe *head)
dup2(channel[1],1);
close(channel[1]);
}
#if 0
#define SURROGATE "surrogate response"
write(1,SURROGATE,sizeof(SURROGATE));
_exit(run_list(head));
#else
_exit(run_list_real(head)); /* leaks memory */
#endif
}
debug_printf("forked child %d\n",pid);
close(channel[1]);
pf = fdopen(channel[0],"r");
debug_printf("pipe on FILE *%p\n",pf);
#else
free_pipe_list(head,0);
pf=popen("echo surrogate response","r");
debug_printf("started fake pipe on FILE *%p\n",pf);
#endif
return pf;
}
@ -2984,14 +2944,6 @@ int parse_stream(o_string *dest, struct p_context *ctx,
debug_printf("leaving parse_stream (triggered)\n");
return 0;
}
#if 0
if (ch=='\n') {
/* Yahoo! Time to run with it! */
done_pipe(ctx,PIPE_SEQ);
run_list(ctx->list_head);
initialize_context(ctx);
}
#endif
if (m!=2) switch (ch) {
case '#':
if (dest->length == 0 && !dest->quote) {

21
common/lcd.c
View File

@ -110,32 +110,11 @@ static int lcd_getfgcolor (void);
static void console_scrollup (void)
{
#if 1
/* Copy up rows ignoring the first one */
memcpy (CONSOLE_ROW_FIRST, CONSOLE_ROW_SECOND, CONSOLE_SCROLL_SIZE);
/* Clear the last one */
memset (CONSOLE_ROW_LAST, COLOR_MASK(lcd_color_bg), CONSOLE_ROW_SIZE);
#else
/*
* Poor attempt to optimize speed by moving "long"s.
* But the code is ugly, and not a bit faster :-(
*/
ulong *t = (ulong *)CONSOLE_ROW_FIRST;
ulong *s = (ulong *)CONSOLE_ROW_SECOND;
ulong l = CONSOLE_SCROLL_SIZE / sizeof(ulong);
uchar c = lcd_color_bg & 0xFF;
ulong val= (c<<24) | (c<<16) | (c<<8) | c;
while (l--)
*t++ = *s++;
t = (ulong *)CONSOLE_ROW_LAST;
l = CONSOLE_ROW_SIZE / sizeof(ulong);
while (l-- > 0)
*t++ = val;
#endif
}
/*----------------------------------------------------------------------*/

369
common/usb_kbd.c
View File

@ -355,374 +355,5 @@ static int usb_kbd_probe(struct usb_device *dev, unsigned int ifnum)
}
#if 0
struct usb_hid_descriptor {
unsigned char bLength;
unsigned char bDescriptorType; /* 0x21 for HID */
unsigned short bcdHID; /* release number */
unsigned char bCountryCode;
unsigned char bNumDescriptors;
unsigned char bReportDescriptorType;
unsigned short wDescriptorLength;
} __attribute__ ((packed));
/*
* We parse each description item into this structure. Short items data
* values are expanded to 32-bit signed int, long items contain a pointer
* into the data area.
*/
struct hid_item {
unsigned char format;
unsigned char size;
unsigned char type;
unsigned char tag;
union {
unsigned char u8;
char s8;
unsigned short u16;
short s16;
unsigned long u32;
long s32;
unsigned char *longdata;
} data;
};
/*
* HID report item format
*/
#define HID_ITEM_FORMAT_SHORT 0
#define HID_ITEM_FORMAT_LONG 1
/*
* Special tag indicating long items
*/
#define HID_ITEM_TAG_LONG 15
static struct usb_hid_descriptor usb_kbd_hid_desc;
void usb_kbd_display_hid(struct usb_hid_descriptor *hid)
{
printf("USB_HID_DESC:\n");
printf(" bLenght 0x%x\n",hid->bLength);
printf(" bcdHID 0x%x\n",hid->bcdHID);
printf(" bCountryCode %d\n",hid->bCountryCode);
printf(" bNumDescriptors 0x%x\n",hid->bNumDescriptors);
printf(" bReportDescriptorType 0x%x\n",hid->bReportDescriptorType);
printf(" wDescriptorLength 0x%x\n",hid->wDescriptorLength);
}
/*
* Fetch a report description item from the data stream. We support long
* items, though they are not used yet.
*/
static int fetch_item(unsigned char *start,unsigned char *end, struct hid_item *item)
{
if((end - start) > 0) {
unsigned char b = *start++;
item->type = (b >> 2) & 3;
item->tag = (b >> 4) & 15;
if (item->tag == HID_ITEM_TAG_LONG) {
item->format = HID_ITEM_FORMAT_LONG;
if ((end - start) >= 2) {
item->size = *start++;
item->tag = *start++;
if ((end - start) >= item->size) {
item->data.longdata = start;
start += item->size;
return item->size;
}
}
} else {
item->format = HID_ITEM_FORMAT_SHORT;
item->size = b & 3;
switch (item->size) {
case 0:
return item->size;
case 1:
if ((end - start) >= 1) {
item->data.u8 = *start++;
return item->size;
}
break;
case 2:
if ((end - start) >= 2) {
item->data.u16 = swap_16((unsigned short *)start);
start+=2;
return item->size;
}
case 3:
item->size++;
if ((end - start) >= 4) {
item->data.u32 = swap_32((unsigned long *)start);
start+=4;
return item->size;
}
}
}
}
return -1;
}
/*
* HID report descriptor item type (prefix bit 2,3)
*/
#define HID_ITEM_TYPE_MAIN 0
#define HID_ITEM_TYPE_GLOBAL 1
#define HID_ITEM_TYPE_LOCAL 2
#define HID_ITEM_TYPE_RESERVED 3
/*
* HID report descriptor main item tags
*/
#define HID_MAIN_ITEM_TAG_INPUT 8
#define HID_MAIN_ITEM_TAG_OUTPUT 9
#define HID_MAIN_ITEM_TAG_FEATURE 11
#define HID_MAIN_ITEM_TAG_BEGIN_COLLECTION 10
#define HID_MAIN_ITEM_TAG_END_COLLECTION 12
/*
* HID report descriptor main item contents
*/
#define HID_MAIN_ITEM_CONSTANT 0x001
#define HID_MAIN_ITEM_VARIABLE 0x002
#define HID_MAIN_ITEM_RELATIVE 0x004
#define HID_MAIN_ITEM_WRAP 0x008
#define HID_MAIN_ITEM_NONLINEAR 0x010
#define HID_MAIN_ITEM_NO_PREFERRED 0x020
#define HID_MAIN_ITEM_NULL_STATE 0x040
#define HID_MAIN_ITEM_VOLATILE 0x080
#define HID_MAIN_ITEM_BUFFERED_BYTE 0x100
/*
* HID report descriptor collection item types
*/
#define HID_COLLECTION_PHYSICAL 0
#define HID_COLLECTION_APPLICATION 1
#define HID_COLLECTION_LOGICAL 2
/*
* HID report descriptor global item tags
*/
#define HID_GLOBAL_ITEM_TAG_USAGE_PAGE 0
#define HID_GLOBAL_ITEM_TAG_LOGICAL_MINIMUM 1
#define HID_GLOBAL_ITEM_TAG_LOGICAL_MAXIMUM 2
#define HID_GLOBAL_ITEM_TAG_PHYSICAL_MINIMUM 3
#define HID_GLOBAL_ITEM_TAG_PHYSICAL_MAXIMUM 4
#define HID_GLOBAL_ITEM_TAG_UNIT_EXPONENT 5
#define HID_GLOBAL_ITEM_TAG_UNIT 6
#define HID_GLOBAL_ITEM_TAG_REPORT_SIZE 7
#define HID_GLOBAL_ITEM_TAG_REPORT_ID 8
#define HID_GLOBAL_ITEM_TAG_REPORT_COUNT 9
#define HID_GLOBAL_ITEM_TAG_PUSH 10
#define HID_GLOBAL_ITEM_TAG_POP 11
/*
* HID report descriptor local item tags
*/
#define HID_LOCAL_ITEM_TAG_USAGE 0
#define HID_LOCAL_ITEM_TAG_USAGE_MINIMUM 1
#define HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM 2
#define HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX 3
#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MINIMUM 4
#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MAXIMUM 5
#define HID_LOCAL_ITEM_TAG_STRING_INDEX 7
#define HID_LOCAL_ITEM_TAG_STRING_MINIMUM 8
#define HID_LOCAL_ITEM_TAG_STRING_MAXIMUM 9
#define HID_LOCAL_ITEM_TAG_DELIMITER 10
static void usb_kbd_show_item(struct hid_item *item)
{
switch(item->type) {
case HID_ITEM_TYPE_MAIN:
switch(item->tag) {
case HID_MAIN_ITEM_TAG_INPUT:
printf("Main Input");
break;
case HID_MAIN_ITEM_TAG_OUTPUT:
printf("Main Output");
break;
case HID_MAIN_ITEM_TAG_FEATURE:
printf("Main Feature");
break;
case HID_MAIN_ITEM_TAG_BEGIN_COLLECTION:
printf("Main Begin Collection");
break;
case HID_MAIN_ITEM_TAG_END_COLLECTION:
printf("Main End Collection");
break;
default:
printf("Main reserved %d",item->tag);
break;
}
break;
case HID_ITEM_TYPE_GLOBAL:
switch(item->tag) {
case HID_GLOBAL_ITEM_TAG_USAGE_PAGE:
printf("- Global Usage Page");
break;
case HID_GLOBAL_ITEM_TAG_LOGICAL_MINIMUM:
printf("- Global Logical Minimum");
break;
case HID_GLOBAL_ITEM_TAG_LOGICAL_MAXIMUM:
printf("- Global Logical Maximum");
break;
case HID_GLOBAL_ITEM_TAG_PHYSICAL_MINIMUM:
printf("- Global physical Minimum");
break;
case HID_GLOBAL_ITEM_TAG_PHYSICAL_MAXIMUM:
printf("- Global physical Maximum");
break;
case HID_GLOBAL_ITEM_TAG_UNIT_EXPONENT:
printf("- Global Unit Exponent");
break;
case HID_GLOBAL_ITEM_TAG_UNIT:
printf("- Global Unit");
break;
case HID_GLOBAL_ITEM_TAG_REPORT_SIZE:
printf("- Global Report Size");
break;
case HID_GLOBAL_ITEM_TAG_REPORT_ID:
printf("- Global Report ID");
break;
case HID_GLOBAL_ITEM_TAG_REPORT_COUNT:
printf("- Global Report Count");
break;
case HID_GLOBAL_ITEM_TAG_PUSH:
printf("- Global Push");
break;
case HID_GLOBAL_ITEM_TAG_POP:
printf("- Global Pop");
break;
default:
printf("- Global reserved %d",item->tag);
break;
}
break;
case HID_ITEM_TYPE_LOCAL:
switch(item->tag) {
case HID_LOCAL_ITEM_TAG_USAGE:
printf("-- Local Usage");
break;
case HID_LOCAL_ITEM_TAG_USAGE_MINIMUM:
printf("-- Local Usage Minimum");
break;
case HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM:
printf("-- Local Usage Maximum");
break;
case HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX:
printf("-- Local Designator Index");
break;
case HID_LOCAL_ITEM_TAG_DESIGNATOR_MINIMUM:
printf("-- Local Designator Minimum");
break;
case HID_LOCAL_ITEM_TAG_DESIGNATOR_MAXIMUM:
printf("-- Local Designator Maximum");
break;
case HID_LOCAL_ITEM_TAG_STRING_INDEX:
printf("-- Local String Index");
break;
case HID_LOCAL_ITEM_TAG_STRING_MINIMUM:
printf("-- Local String Minimum");
break;
case HID_LOCAL_ITEM_TAG_STRING_MAXIMUM:
printf("-- Local String Maximum");
break;
case HID_LOCAL_ITEM_TAG_DELIMITER:
printf("-- Local Delimiter");
break;
default:
printf("-- Local reserved %d",item->tag);
break;
}
break;
default:
printf("--- reserved %d",item->type);
break;
}
switch(item->size) {
case 1:
printf(" %d",item->data.u8);
break;
case 2:
printf(" %d",item->data.u16);
break;
case 4:
printf(" %ld",item->data.u32);
break;
}
printf("\n");
}
static int usb_kbd_get_hid_desc(struct usb_device *dev)
{
unsigned char buffer[256];
struct usb_descriptor_header *head;
struct usb_config_descriptor *config;
int index,len,i;
unsigned char *start, *end;
struct hid_item item;
if(usb_get_configuration_no(dev,&buffer[0],0)==-1)
return -1;
head =(struct usb_descriptor_header *)&buffer[0];
if(head->bDescriptorType!=USB_DT_CONFIG) {
printf(" ERROR: NOT USB_CONFIG_DESC %x\n",head->bDescriptorType);
return -1;
}
index=head->bLength;
config=(struct usb_config_descriptor *)&buffer[0];
len=swap_16(config->wTotalLength);
/* Ok the first entry must be a configuration entry, now process the others */
head=(struct usb_descriptor_header *)&buffer[index];
while(index+1 < len) {
if(head->bDescriptorType==USB_DT_HID) {
printf("HID desc found\n");
memcpy(&usb_kbd_hid_desc,&buffer[index],buffer[index]);
usb_kbd_hid_desc.bcdHID=swap_16(usb_kbd_hid_desc.bcdHID);
usb_kbd_hid_desc.wDescriptorLength=swap_16(usb_kbd_hid_desc.wDescriptorLength);
usb_kbd_display_hid(&usb_kbd_hid_desc);
len=0;
break;
}
index+=head->bLength;
head=(struct usb_descriptor_header *)&buffer[index];
}
if(len>0)
return -1;
len=usb_kbd_hid_desc.wDescriptorLength;
if((index = usb_get_class_descriptor(dev, 0, USB_DT_REPORT, 0, &buffer[0], len)) < 0) {
printf("reading report descriptor failed\n");
return -1;
}
printf(" report descriptor (size %u, read %d)\n", len, index);
start=&buffer[0];
end=&buffer[len];
i=0;
do {
index=fetch_item(start,end,&item);
i+=index;
i++;
if(index>=0)
usb_kbd_show_item(&item);
start+=index;
start++;
} while(index>=0);
}
#endif
#endif /* CONFIG_USB_KEYBOARD */

13
common/usb_storage.c
View File

@ -1022,15 +1022,6 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,struct us_data
/* let's examine the device now */
iface = &dev->config.if_desc[ifnum];
#if 0
/* this is the place to patch some storage devices */
USB_STOR_PRINTF("iVendor %X iProduct %X\n",dev->descriptor.idVendor,dev->descriptor.idProduct);
if ((dev->descriptor.idVendor) == 0x066b && (dev->descriptor.idProduct) == 0x0103) {
USB_STOR_PRINTF("patched for E-USB\n");
protocol = US_PR_CB;
subclass = US_SC_UFI; /* an assumption */
}
#endif
if (dev->descriptor.bDeviceClass != 0 ||
iface->bInterfaceClass != USB_CLASS_MASS_STORAGE ||
@ -1214,10 +1205,6 @@ int usb_stor_get_info(struct usb_device *dev,struct us_data *ss,block_dev_desc_t
cap[1] = 0x200;
}
USB_STOR_PRINTF("Read Capacity returns: 0x%lx, 0x%lx\n",cap[0],cap[1]);
#if 0
if(cap[0]>(0x200000 * 10)) /* greater than 10 GByte */
cap[0]>>=16;
#endif
#ifdef LITTLEENDIAN
cap[0] = ((unsigned long)(
(((unsigned long)(cap[0]) & (unsigned long)0x000000ffUL) << 24) |

3
common/virtex2.c
View File

@ -33,9 +33,6 @@
#if (CONFIG_FPGA & (CFG_XILINX | CFG_VIRTEX2))
#if 0
#define FPGA_DEBUG
#endif
#ifdef FPGA_DEBUG
#define PRINTF(fmt,args...) printf (fmt ,##args)

3
common/xilinx.c
View File

@ -34,9 +34,6 @@
#if (CONFIG_FPGA & CFG_FPGA_XILINX)
#if 0
#define FPGA_DEBUG
#endif
/* Define FPGA_DEBUG to get debug printf's */
#ifdef FPGA_DEBUG

7
common/xyzModem.c
View File

@ -840,10 +840,3 @@ xyzModem_error (int err)
/*
* RedBoot interface
*/
#if 0 /* SB */
GETC_IO_FUNCS (xyzModem_io, xyzModem_stream_open, xyzModem_stream_close,
xyzModem_stream_terminate, xyzModem_stream_read,
xyzModem_error);
RedBoot_load (xmodem, xyzModem_io, false, false, xyzModem_xmodem);
RedBoot_load (ymodem, xyzModem_io, false, false, xyzModem_ymodem);
#endif

19
cpu/74xx_7xx/traps.c
View File

@ -232,24 +232,5 @@ UnknownException(struct pt_regs *regs)
int
addr_probe(uint *addr)
{
#if 0
int retval;
__asm__ __volatile__( \
"1: lwz %0,0(%1)\n" \
" eieio\n" \
" li %0,0\n" \
"2:\n" \
".section .fixup,\"ax\"\n" \
"3: li %0,-1\n" \
" b 2b\n" \
".section __ex_table,\"a\"\n" \
" .align 2\n" \
" .long 1b,3b\n" \
".text" \
: "=r" (retval) : "r"(addr));
return (retval);
#endif
return 0;
}

6
cpu/arm920t/at91rm9200/i2c.c
View File

@ -126,9 +126,6 @@ i2c_read (unsigned char chip, unsigned int addr, int alen,
return 1;
/* XXX assume an ATMEL AT24C16 */
if (alen == 1) {
#if 0 /* EEPROM code already sets this correctly */
chip |= (addr >> 8) & 0xff;
#endif
addr = addr & 0xff;
}
#endif
@ -151,9 +148,6 @@ i2c_write(unsigned char chip, unsigned int addr, int alen,
buf = buffer;
/* do single byte writes */
for (i = 0; i < len; i++) {
#if 0 /* EEPROM code already sets this correctly */
chip |= (addr >> 8) & 0xff;
#endif
addr = addr & 0xff;
if (at91_xfer(chip, addr, alen, buf++, 1, 0))
return 1;

4
cpu/arm920t/at91rm9200/usb_ohci.c
View File

@ -1279,10 +1279,6 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
/* abuse timeout */
timeout = rh_check_port_status(&gohci);
if (timeout >= 0) {
#if 0 /* this does nothing useful, but leave it here in case that changes */
/* the called routine adds 1 to the passed value */
usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
#endif
/*
* XXX
* This is potentially dangerous because it assumes

6
cpu/arm920t/s3c24x0/i2c.c
View File

@ -71,12 +71,6 @@ static int GetI2CSDA(void)
#endif
}
#if 0
static void SetI2CSDA(int x)
{
rGPEDAT = (rGPEDAT & ~0x8000) | (x&1) << 15;
}
#endif
static void SetI2CSCL(int x)
{

23
cpu/arm920t/s3c24x0/usb_ohci.c
View File

@ -1302,29 +1302,6 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
}
}
#if 0
/* we got an Root Hub Status Change interrupt */
if (got_rhsc) {
#ifdef DEBUG
ohci_dump_roothub (&gohci, 1);
#endif
got_rhsc = 0;
/* abuse timeout */
timeout = rh_check_port_status(&gohci);
if (timeout >= 0) {
#if 0 /* this does nothing useful, but leave it here in case that changes */
/* the called routine adds 1 to the passed value */
usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
#endif
/*
* XXX
* This is potentially dangerous because it assumes
* that only one device is ever plugged in!
*/
devgone = dev;
}
}
#endif
dev->status = stat;
dev->act_len = transfer_len;

20
cpu/arm920t/start.S
View File

@ -199,26 +199,6 @@ clbss_l:str r2, [r0] /* clear loop... */
cmp r0, r1
ble clbss_l
#if 0
/* try doing this stuff after the relocation */
ldr r0, =pWTCON
mov r1, #0x0
str r1, [r0]
/*
* mask all IRQs by setting all bits in the INTMR - default
*/
mov r1, #0xffffffff
ldr r0, =INTMR
str r1, [r0]
/* FCLK:HCLK:PCLK = 1:2:4 */
/* default FCLK is 120 MHz ! */
ldr r0, =CLKDIVN
mov r1, #3
str r1, [r0]
/* END stuff after relocation */
#endif
ldr pc, _start_armboot

9
cpu/i386/sc520.c
View File

@ -236,9 +236,6 @@ unsigned long init_sc520_dram(void)
}
#if 0
printf("Configured %d bytes of dram\n", dram_present);
#endif
gd->ram_size = dram_present;
return dram_present;
@ -284,9 +281,7 @@ int pci_sc520_set_irq(int pci_pin, int irq)
{
int i;
# if 1
printf("set_irq(): map INT%c to IRQ%d\n", pci_pin + 'A', irq);
#endif
if (irq < 0 || irq > 15) {
return -1; /* illegal irq */
}
@ -426,10 +421,6 @@ void udelay(unsigned long usec)
read_mmcr_word(SC520_SWTMRMILLI);
read_mmcr_word(SC520_SWTMRMICRO);
#if 0
/* do not enable this line, udelay is used in the serial driver -> recursion */
printf("udelay: %ld m.u %d.%d tm.tu %d.%d\n", usec, m, u, tm, tu);
#endif
while (1) {
m += read_mmcr_word(SC520_SWTMRMILLI);

72
cpu/i386/timer.c
View File

@ -136,76 +136,4 @@ void udelay (unsigned long usec)
}
#if 0
/* this is a version with debug output */
void _udelay (unsigned long usec)
{
int counter;
int wraps;
int usec1, usec2, usec3;
int wraps1, wraps2, wraps3, wraps4;
int ctr1, ctr2, ctr3, nct1, nct2;
int i;
usec1=usec;
if (!timer_init_done) {
return;
}
counter = read_pit();
ctr1 = counter;
wraps = usec/1000;
usec = usec%1000;
usec2 = usec;
wraps1 = wraps;
usec*=1194;
usec/=1000;
usec+=counter;
if (usec > 1194) {
usec-=1194;
wraps++;
}
usec3 = usec;
wraps2 = wraps;
ctr2 = wraps3 = nct1 = 4711;
ctr3 = wraps4 = nct2 = 4711;
i=0;
while (1) {
int new_count = read_pit();
i++;
if ((new_count < usec && !wraps) || wraps < 0) {
break;
}
if (new_count > counter) {
wraps--;
}
if (ctr2==4711) {
ctr2 = counter;
wraps3 = wraps;
nct1 = new_count;
} else {
ctr3 = counter;
wraps4 = wraps;
nct2 = new_count;
}
counter = new_count;
}
printf("udelay(%d)\n", usec1);
printf("counter %d\n", ctr1);
printf("1: wraps %d, usec %d\n", wraps1, usec2);
printf("2: wraps %d, usec %d\n", wraps2, usec3);
printf("new_count[0] %d counter %d wraps %d\n", nct1, ctr2, wraps3);
printf("new_count[%d] %d counter %d wraps %d\n", i, nct2, ctr3, wraps4);
printf("%d %d %d %d %d\n",
read_pit(), read_pit(), read_pit(),
read_pit(), read_pit());
}
#endif
#endif

28
cpu/ixp/npe/IxEthDBAPISupport.c
View File

@ -240,18 +240,6 @@ IxEthDBStatus ixEthDBPortEnable(IxEthDBPortId portID)
ixEthDBFirewallInvalidAddressFilterEnable(portID, ixEthDBPortState[portID].srcAddressFilterEnabled);
}
#if 0 /* test-only */
if ((portInfo->featureCapability & IX_ETH_DB_VLAN_QOS) != 0)
{
ixEthDBAcceptableFrameTypeSet(portID, ixEthDBPortState[portID].frameFilter);
ixEthDBIngressVlanTaggingEnabledSet(portID, ixEthDBPortState[portID].taggingAction);
ixEthDBEgressVlanTaggingEnabledSet(portID, ixEthDBPortState[portID].transmitTaggingInfo);
ixEthDBPortVlanMembershipSet(portID, ixEthDBPortState[portID].vlanMembership);
ixEthDBPriorityMappingTableSet(portID, ixEthDBPortState[portID].priorityTable);
}
#endif
if ((portInfo->featureCapability & IX_ETH_DB_SPANNING_TREE_PROTOCOL) != 0)
{
@ -290,9 +278,6 @@ IxEthDBStatus ixEthDBPortDisable(IxEthDBPortId portID)
BOOL result;
PortInfo *portInfo;
IxEthDBFeature learningEnabled;
#if 0 /* test-only */
IxEthDBPriorityTable classZeroTable;
#endif
IX_ETH_DB_CHECK_PORT_EXISTS(portID);
@ -325,19 +310,6 @@ IxEthDBStatus ixEthDBPortDisable(IxEthDBPortId portID)
/* now turn off all EthDB filtering features on the port */
#if 0 /* test-only */
/* VLAN & QoS */
if ((portInfo->featureCapability & IX_ETH_DB_VLAN_QOS) != 0)
{
ixEthDBPortVlanMembershipRangeAdd((IxEthDBPortId) portID, 0, IX_ETH_DB_802_1Q_MAX_VLAN_ID);
ixEthDBEgressVlanRangeTaggingEnabledSet((IxEthDBPortId) portID, 0, IX_ETH_DB_802_1Q_MAX_VLAN_ID, FALSE);
ixEthDBAcceptableFrameTypeSet((IxEthDBPortId) portID, IX_ETH_DB_ACCEPT_ALL_FRAMES);
ixEthDBIngressVlanTaggingEnabledSet((IxEthDBPortId) portID, IX_ETH_DB_PASS_THROUGH);
memset(classZeroTable, 0, sizeof (classZeroTable));
ixEthDBPriorityMappingTableSet((IxEthDBPortId) portID, classZeroTable);
}
#endif
/* STP */
if ((portInfo->featureCapability & IX_ETH_DB_SPANNING_TREE_PROTOCOL) != 0)

8
cpu/ixp/npe/IxOsalOsServices.c
View File

@ -135,15 +135,9 @@ ixOsalLog (IxOsalLogLevel level,
if (level <= ixOsalCurrLogLevel && level != IX_OSAL_LOG_LVL_NONE)
{
#if 0 /* sr: U-Boots printf or debug doesn't return a length */
int headerByteCount = (level == IX_OSAL_LOG_LVL_USER) ? 0 : diag_printf(traceHeaders[level - 1]);
return headerByteCount + diag_printf (format, arg1, arg2, arg3, arg4, arg5, arg6);
#else
int headerByteCount = (level == IX_OSAL_LOG_LVL_USER) ? 0 : strlen(traceHeaders[level - 1]);
return headerByteCount + strlen(format);
#endif
}
else
{
@ -191,7 +185,6 @@ PUBLIC void
ixOsalSleep (UINT32 milliseconds)
{
if (milliseconds != 0) {
#if 1
/*
* sr: We poll while we wait because interrupts are off in U-Boot
* and CSR expects messages, etc to be dispatched while sleeping.
@ -208,7 +201,6 @@ ixOsalSleep (UINT32 milliseconds)
udelay(1000);
}
#endif
}
}

12
cpu/ixp/npe/include/IxEthAccDataPlane_p.h
View File

@ -119,7 +119,6 @@ void ixEthAccDataPlaneShow(void);
#define IX_ETHACC_NE_SHARED(mBufPtr) \
((IxEthAccNe *)&((mBufPtr)->ix_ne))
#if 1
#define IX_ETHACC_NE_NEXT(mBufPtr) (mBufPtr)->ix_ne.reserved[0]
@ -128,17 +127,6 @@ void ixEthAccDataPlaneShow(void);
#define IX_ETHACC_NE_DATA(mBufPtr)(mBufPtr)->ix_ne.reserved[2]
#else
#define IX_ETHACC_NE_NEXT(mBufPtr) \
IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_next
#define IX_ETHACC_NE_LEN(mBufPtr) \
IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_lengths
#define IX_ETHACC_NE_DATA(mBufPtr) \
IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_data
#endif
/*
* Use MBUF next pointer field to chain data.

35
cpu/ixp/npe/include/IxOsalMemAccess.h
View File

@ -252,26 +252,13 @@ ixOsalWinCEReadLCookie (volatile UINT32 * lCookie)
static __inline__ UINT16
ixOsalWinCEReadWCookie (volatile UINT16 * wCookie)
{
#if 0
UINT32 auxVal = *((volatile UINT32 *) wCookie);
if ((unsigned) wCookie & 3)
return (UINT16) (auxVal >> 16);
else
return (UINT16) (auxVal & 0xffff);
#else
return *wCookie;
#endif
}
static __inline__ UINT8
ixOsalWinCEReadBCookie (volatile UINT8 * bCookie)
{
#if 0
UINT32 auxVal = *((volatile UINT32 *) bCookie);
return (UINT8) ((auxVal >> (3 - (((unsigned) bCookie & 3) << 3)) & 0xff));
#else
return *bCookie;
#endif
}
static __inline__ void
@ -283,35 +270,13 @@ ixOsalWinCEWriteLCookie (volatile UINT32 * lCookie, UINT32 lVal)
static __inline__ void
ixOsalWinCEWriteWCookie (volatile UINT16 * wCookie, UINT16 wVal)
{
#if 0
volatile UINT32 *auxCookie =
(volatile UINT32 *) ((unsigned) wCookie & ~3);
if ((unsigned) wCookie & 3)
{
*auxCookie &= 0xffff;
*auxCookie |= (UINT32) wVal << 16;
}
else
{
*auxCookie &= ~0xffff;
*auxCookie |= (UINT32) wVal & 0xffff;
}
#else
*wCookie = wVal;
#endif
}
static __inline__ void
ixOsalWinCEWriteBCookie (volatile UINT8 * bCookie, UINT8 bVal)
{
#if 0
volatile UINT32 *auxCookie =
(volatile UINT32 *) ((unsigned) bCookie & ~3);
*auxCookie &= 0xff << (3 - (((unsigned) bCookie & 3) << 3));
*auxCookie |= (UINT32) bVal << (3 - (((unsigned) bCookie & 3) << 3));
#else
*bCookie = bVal;
#endif
}

37
cpu/ixp/npe/include/IxOsalOsBufferMgt.h
View File

@ -55,42 +55,5 @@
#include "IxOsalBufferMgtDefault.h"
#if 0 /* FIXME */
/* Define os-specific buffer macros for subfields */
#define IX_OSAL_OSBUF_MDATA(osBufPtr) IX_OSAL_MBUF_MDATA(osBufPtr)
( ((M_BLK *) osBufPtr)->m_data )
#define IX_OSAL_OSBUF_MLEN(osBufPtr) \
( ((M_BLK *) osBufPtr)->m_len )
#define IX_OSAL_OSBUF_PKT_LEN(osBufPtr) \
( ((M_BLK *) osBufPtr)->m_pkthdr.len )
#define IX_OSAL_OS_CONVERT_OSBUF_TO_IXPBUF( osBufPtr, ixpBufPtr) \
{ \
IX_OSAL_MBUF_OSBUF_PTR( (IX_OSAL_MBUF *) ixpBufPtr) = (void *) osBufPtr; \
IX_OSAL_MBUF_MDATA((IX_OSAL_MBUF *) ixpBufPtr) = IX_OSAL_OSBUF_MDATA(osBufPtr); \
IX_OSAL_MBUF_PKT_LEN((IX_OSAL_MBUF *) ixpBufPtr) = IX_OSAL_OSBUF_PKT_LEN(osBufPtr); \
IX_OSAL_MBUF_MLEN((IX_OSAL_MBUF *) ixpBufPtr) = IX_OSAL_OSBUF_MLEN(osBufPtr); \
}
#define IX_OSAL_OS_CONVERT_IXPBUF_TO_OSBUF( ixpBufPtr, osBufPtr) \
{ \
if (ixpBufPtr == NULL) \
{ /* Do nothing */ } \
else \
{ \
(M_BLK *) osBufPtr = (M_BLK *) IX_OSAL_MBUF_OSBUF_PTR((IX_OSAL_MBUF *) ixpBufPtr); \
if (osBufPtr == NULL) \
{ /* Do nothing */ } \
else \
{ \
IX_OSAL_OSBUF_MLEN(osBufPtr) =IX_OSAL_MBUF_MLEN((IX_OSAL_MBUF *) ixpBufPtr); \
IX_OSAL_OSBUF_PKT_LEN(osBufPtr) =IX_OSAL_MBUF_PKT_LEN((IX_OSAL_MBUF *) ixpBufPtr); \
} \
} \
}
#endif /* FIXME */
#endif /* #define IX_OSAL_OS_BUFFER_MGT_H */

15
cpu/ixp/npe/include/IxOsalOsTypes.h
View File

@ -17,21 +17,6 @@ typedef u16 USHORT;
typedef u8 UCHAR;
typedef u32 BOOL;
#if 0 /* FIXME */
/* Default stack limit is 10 KB */
#define IX_OSAL_OS_THREAD_DEFAULT_STACK_SIZE (10240)
/* Maximum stack limit is 32 MB */
#define IX_OSAL_OS_THREAD_MAX_STACK_SIZE (33554432) /* 32 MBytes */
/* Default thread priority */
#define IX_OSAL_OS_DEFAULT_THREAD_PRIORITY (90)
/* Thread maximum priority (0 - 255). 0 - highest priority */
#define IX_OSAL_OS_MAX_THREAD_PRIORITY (255)
#endif /* FIXME */
#define IX_OSAL_OS_WAIT_FOREVER (-1L)
#define IX_OSAL_OS_WAIT_NONE 0

59
cpu/ixp/npe/npe.c
View File

@ -21,9 +21,6 @@
* MA 02111-1307 USA
*/
#if 0
#define DEBUG /* define for debug output */
#endif
#include <config.h>
#include <common.h>
@ -429,28 +426,6 @@ static int npe_init(struct eth_device *dev, bd_t * bis)
return 1;
}
#if 0 /* test-only: probably have to deal with it when booting linux (for a clean state) */
/* Uninitialize CSR library. */
static void npe_csr_unload(void)
{
ixEthAccUnload();
ixEthDBUnload();
ixNpeMhUnload();
ixQMgrUnload();
}
/* callback which is used by ethAcc to recover RX buffers when stopping */
static void npe_rx_stop_callback(u32 cbTag, IX_OSAL_MBUF *m, IxEthAccPortId portid)
{
debug("%s\n", __FUNCTION__);
}
/* callback which is used by ethAcc to recover TX buffers when stopping */
static void npe_tx_stop_callback(u32 cbTag, IX_OSAL_MBUF *m)
{
debug("%s\n", __FUNCTION__);
}
#endif
static void npe_halt(struct eth_device *dev)
{
@ -465,40 +440,6 @@ static void npe_halt(struct eth_device *dev)
udelay(100);
}
#if 0 /* test-only: probably have to deal with it when booting linux (for a clean state) */
if (ixEthAccPortRxCallbackRegister(p_npe->eth_id, npe_rx_stop_callback,
(u32)p_npe) != IX_ETH_ACC_SUCCESS) {
debug("Error registering rx callback!\n");
}
if (ixEthAccPortTxDoneCallbackRegister(p_npe->eth_id, npe_tx_stop_callback,
(u32)p_npe) != IX_ETH_ACC_SUCCESS) {
debug("Error registering tx callback!\n");
}
if (ixEthAccPortDisable(p_npe->eth_id) != IX_ETH_ACC_SUCCESS) {
debug("npe_stop: Error disabling NPEB!\n");
}
/* Delay to give time for recovery of mbufs */
for (i = 0; i < 100; i++) {
npe_poll(p_npe->eth_id);
udelay(10000);
}
/*
* For U-Boot only, we are probably launching Linux or other OS that
* needs a clean slate for its NPE library.
*/
#if 0 /* test-only */
for (i = 0; i < IX_ETH_ACC_NUMBER_OF_PORTS; i++) {
if (npe_used[i] && npe_exists[i])
if (ixNpeDlNpeStopAndReset(__eth_to_npe(i)) != IX_SUCCESS)
printf("Failed to stop and reset NPE B.\n");
}
#endif
#endif
p_npe->active = 0;
}

6
cpu/ixp/start.S
View File

@ -159,12 +159,6 @@ reset:
str r1, [r2]
/* make sure flash is visible at 0 */
#if 0
ldr r2, =IXP425_EXP_CFG0
ldr r1, [r2]
orr r1, r1, #0x80000000
str r1, [r2]
#endif
mov r1, #CFG_SDR_CONFIG
ldr r2, =IXP425_SDR_CONFIG
str r1, [r2]

5
cpu/mcf52x2/fec.c
View File

@ -324,14 +324,9 @@ int eth_init (bd_t * bd)
/* Enable MII mode
*/
#if 0 /* Full duplex mode */
fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE;
fecp->fec_x_cntrl = FEC_TCNTRL_FDEN;
#else /* Half duplex mode */
fecp->fec_r_cntrl = (PKT_MAXBUF_SIZE << 16); /* set max frame length */
fecp->fec_r_cntrl |= FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT;
fecp->fec_x_cntrl = 0;
#endif
/* Set MII speed */
fecp->fec_mii_speed = (((CFG_CLK / 2) / (2500000 / 10)) + 5) / 10;
fecp->fec_mii_speed *= 2;

8
cpu/mcf52x2/start.S
View File

@ -193,14 +193,6 @@ _copy_flash:
_after_flash_copy:
#endif
#if 0
/* invalidate and disable cache */
move.l #0x01000000, %d0 /* Invalidate cache cmd */
movec %d0, %CACR /* Invalidate cache */
move.l #0, %d0
movec %d0, %ACR0
movec %d0, %ACR1
#endif
/* set stackpointer to end of internal ram to get some stackspace for the first c-code */
move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp

4
cpu/mips/au1x00_usb_ohci.c
View File

@ -1284,10 +1284,6 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
/* abuse timeout */
timeout = rh_check_port_status(&gohci);
if (timeout >= 0) {
#if 0 /* this does nothing useful, but leave it here in case that changes */
/* the called routine adds 1 to the passed value */
usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
#endif
/*
* XXX
* This is potentially dangerous because it assumes

11
cpu/mpc5xx/interrupts.c
View File

@ -140,20 +140,12 @@ void irq_install_handler (int vec, interrupt_handler_t * handler,
irq_vecs[vec].handler = handler;
irq_vecs[vec].arg = arg;
immr->im_siu_conf.sc_simask |= 1 << (31 - vec);
#if 0
printf ("Install SIU interrupt for vector %d ==> %p\n",
vec, handler);
#endif
}
void irq_free_handler (int vec)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
/* SIU interrupt */
#if 0
printf ("Free CPM interrupt for vector %d\n",
vec);
#endif
immr->im_siu_conf.sc_simask &= ~(1 << (31 - vec));
irq_vecs[vec].handler = NULL;
irq_vecs[vec].arg = NULL;
@ -167,9 +159,6 @@ void timer_interrupt_cpu (struct pt_regs *regs)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
#if 0
printf ("*** Timer Interrupt *** ");
#endif
/* Reset Timer Status Bit and Timers Interrupt Status */
immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
__asm__ ("nop");

2
cpu/mpc5xxx/i2c.c
View File

@ -86,14 +86,12 @@ static int wait_for_bb(void)
status = mpc_reg_in(&regs->msr);
while (timeout-- && (status & I2C_BB)) {
#if 1
volatile int temp;
mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
temp = mpc_reg_in(&regs->mdr);
mpc_reg_out(&regs->mcr, 0, I2C_STA);
mpc_reg_out(&regs->mcr, 0, 0);
mpc_reg_out(&regs->mcr, I2C_EN, 0);
#endif
udelay(1000);
status = mpc_reg_in(&regs->msr);
}

19
cpu/mpc5xxx/traps.c
View File

@ -225,24 +225,5 @@ DebugException(struct pt_regs *regs)
int
addr_probe(uint *addr)
{
#if 0
int retval;
__asm__ __volatile__( \
"1: lwz %0,0(%1)\n" \
" eieio\n" \
" li %0,0\n" \
"2:\n" \
".section .fixup,\"ax\"\n" \
"3: li %0,-1\n" \
" b 2b\n" \
".section __ex_table,\"a\"\n" \
" .align 2\n" \
" .long 1b,3b\n" \
".text" \
: "=r" (retval) : "r"(addr));
return (retval);
#endif
return 0;
}

23
cpu/mpc5xxx/usb_ohci.c
View File

@ -1289,29 +1289,6 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
break;
}
}
#if 0
/* we got an Root Hub Status Change interrupt */
if (got_rhsc) {
#ifdef DEBUG
ohci_dump_roothub (&gohci, 1);
#endif
got_rhsc = 0;
/* abuse timeout */
timeout = rh_check_port_status(&gohci);
if (timeout >= 0) {
#if 0 /* this does nothing useful, but leave it here in case that changes */
/* the called routine adds 1 to the passed value */
usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
#endif
/*
* XXX
* This is potentially dangerous because it assumes
* that only one device is ever plugged in!
*/
devgone = dev;
}
}
#endif
dev->status = stat;
dev->act_len = transfer_len;

12
cpu/mpc8220/fec.c
View File

@ -348,14 +348,12 @@ static int mpc8220_fec_init (struct eth_device *dev, bd_t * bis)
*/
fec->eth->xmit_fsm = 0x03000000;
#if 1
/*#if defined(CONFIG_MPC5200)*/
/*
* Turn off COMM bus prefetch in the MGT5200 BestComm. It doesn't
* work w/ the current receive task.
*/
dma->PtdCntrl |= 0x00000001;
#endif
/*
* Set priority of different initiators
@ -777,16 +775,6 @@ static int mpc8220_fec_recv (struct eth_device *dev)
frame = (NBUF *) pRbd->dataPointer;
frame_length = pRbd->dataLength - 4;
#if (0)
{
int i;
printf ("recv data hdr:");
for (i = 0; i < 14; i++)
printf ("%x ", *(frame->head + i));
printf ("\n");
}
#endif
/*
* Fill the buffer and pass it to upper layers
*/

2
cpu/mpc8220/i2c.c
View File

@ -105,7 +105,6 @@ static int wait_for_bb (void)
status = mpc_reg_in (&regs->sr);
while (timeout-- && (status & I2C_BB)) {
#if 1
volatile int temp;
mpc_reg_out (&regs->cr, I2C_STA, I2C_STA);
@ -113,7 +112,6 @@ static int wait_for_bb (void)
mpc_reg_out (&regs->cr, 0, I2C_STA);
mpc_reg_out (&regs->cr, 0, 0);
mpc_reg_out (&regs->cr, I2C_EN, 0);
#endif
udelay (1000);
status = mpc_reg_in (&regs->sr);
}

9
cpu/mpc8220/i2cCore.c
View File

@ -191,9 +191,7 @@ STATUS i2c_start (PSI2C pi2c, PI2CSET pi2cSet)
#else
UINT8 ByteOffset = pi2cSet->str_adr;
#endif
#if 1
UINT8 tmp = 0;
#endif
UINT8 Addr = pi2cSet->slv_adr;
pi2c->cr |= I2C_CTL_STA; /* Generate start signal */
@ -207,13 +205,6 @@ STATUS i2c_start (PSI2C pi2c, PI2CSET pi2cSet)
return ERROR;
}
#ifdef TWOBYTES
# if 0
/* Issue the offset to start */
if (i2c_write2byte (pi2c, &ByteOffset) != OK) {
i2c_stop (pi2c); /* Disable I2c */
return ERROR;
}
#endif
tmp = (ByteOffset >> 8) & 0xff;
if (i2c_writebyte (pi2c, &tmp) != OK) {
i2c_stop (pi2c); /* Disable I2c */

17
cpu/mpc8220/traps.c
View File

@ -218,22 +218,5 @@ void DebugException (struct pt_regs *regs)
*/
int addr_probe (uint * addr)
{
#if 0
int retval;
__asm__ __volatile__ ("1: lwz %0,0(%1)\n"
" eieio\n"
" li %0,0\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3: li %0,-1\n"
" b 2b\n"
".section __ex_table,\"a\"\n"
" .align 2\n"
" .long 1b,3b\n"
".text":"=r" (retval):"r" (addr));
return (retval);
#endif
return 0;
}

29
cpu/mpc824x/cpu_init.c
View File

@ -106,35 +106,6 @@ cpu_init_f (void)
CONFIG_READ_BYTE(AMBOR,val);
CONFIG_WRITE_BYTE(AMBOR,val|0x1);
#if 0
/*
* The following bug only affects older (XPC8245) processors.
* DMA transfers initiated by external devices get corrupted due
* to a hardware scheduling problem.
*
* The effect is:
* when transferring X words, the first 32 words are transferred
* OK, the next 3 x 32 words are 'old' data (from previous DMA)
* while the rest of the X words is xferred fine.
*
* Disabling 3 of the 4 32 word hardware buffers solves the problem
* with no significant performance loss.
*/
CONFIG_READ_BYTE(PCMBCR,val);
/* in order not to corrupt data which is being read over the PCI bus
* with the PPC as slave, we need to reduce the number of PCMRBs to 1,
* 4.11 in the processor user manual
* */
#if 1
CONFIG_WRITE_BYTE(PCMBCR,(val|0xC0)); /* 1 PCMRB */
#else
CONFIG_WRITE_BYTE(PCMBCR,(val|0x80)); /* 2 PCMRBs */
CONFIG_WRITE_BYTE(PCMBCR,(val|0x40)); /* 3 PCMRBs */
/* default, 4 PCMRBs are used */
#endif
#endif
#endif
CONFIG_READ_WORD(PICR1, val);

16
cpu/mpc824x/start.S
View File

@ -306,28 +306,12 @@ transfer_to_handler:
SAVE_4GPRS(8, r21)
SAVE_8GPRS(12, r21)
SAVE_8GPRS(24, r21)
#if 0
andi. r23,r23,MSR_PR
mfspr r23,SPRG3 /* if from user, fix up tss.regs */
beq 2f
addi r24,r1,STACK_FRAME_OVERHEAD
stw r24,PT_REGS(r23)
2: addi r2,r23,-TSS /* set r2 to current */
tovirt(r2,r2,r23)
#endif
mflr r23
andi. r24,r23,0x3f00 /* get vector offset */
stw r24,TRAP(r21)
li r22,0
stw r22,RESULT(r21)
mtspr SPRG2,r22 /* r1 is now kernel sp */
#if 0
addi r24,r2,TASK_STRUCT_SIZE /* check for kernel stack overflow */
cmplw 0,r1,r2
cmplw 1,r1,r24
crand 1,1,4
bgt stack_ovf /* if r2 < r1 < r2+TASK_STRUCT_SIZE */
#endif
lwz r24,0(r23) /* virtual address of handler */
lwz r23,4(r23) /* where to go when done */
mtspr SRR0,r24

19
cpu/mpc824x/traps.c
View File

@ -196,24 +196,5 @@ DebugException(struct pt_regs *regs)
int
addr_probe(uint *addr)
{
#if 0
int retval;
__asm__ __volatile__( \
"1: lwz %0,0(%1)\n" \
" eieio\n" \
" li %0,0\n" \
"2:\n" \
".section .fixup,\"ax\"\n" \
"3: li %0,-1\n" \
" b 2b\n" \
".section __ex_table,\"a\"\n" \
" .align 2\n" \
" .long 1b,3b\n" \
".text" \
: "=r" (retval) : "r"(addr));
return (retval);
#endif
return 0;
}

19
cpu/mpc8260/ether_fcc.c
View File

@ -230,9 +230,6 @@ static int fec_init(struct eth_device* dev, bd_t *bis)
fcc_enet_t *pram_ptr;
unsigned long mem_addr;
#if 0
mii_discover_phy();
#endif
/* 28.9 - (1-2): ioports have been set up already */
@ -328,12 +325,6 @@ static int fec_init(struct eth_device* dev, bd_t *bis)
pram_ptr->fen_maxd2 = PKT_MAXDMA_SIZE; /* maximum DMA2 length */
pram_ptr->fen_rfthr = 1;
pram_ptr->fen_rfcnt = 1;
#if 0
printf("pram_ptr->fen_genfcc.fcc_rbase %08lx\n",
pram_ptr->fen_genfcc.fcc_rbase);
printf("pram_ptr->fen_genfcc.fcc_tbase %08lx\n",
pram_ptr->fen_genfcc.fcc_tbase);
#endif
/* 28.9 - (8): clear out events in FCCE */
immr->im_fcc[info->ether_index].fcc_fcce = ~0x0;
@ -560,7 +551,6 @@ static uint __inline__
nbs (uint value, uint nbits)
{
uint cnt = 0;
#if 1
uint pos = sizeof (uint) * 8;
__asm__ __volatile__ ("\
@ -573,15 +563,6 @@ nbs (uint value, uint nbits)
: "=r"(cnt)
: "r"(value), "r"(nbits), "r"(cnt), "r"(pos)
: "ctr", "cc" );
#else
uint mask = 1;
do {
if (value & mask)
cnt++;
mask <<= 1;
} while (--nbits);
#endif
return (cnt);
}

8
cpu/mpc8260/ether_scc.c
View File

@ -344,13 +344,5 @@ void eth_halt(void)
SCC_GSMRL_ENT);
}
#if 0
void restart(void)
{
volatile immap_t *immr = (immap_t *)CFG_IMMR;
immr->im_cpm.cp_scc[CONFIG_ETHER_INDEX-1].scc_gsmrl |= (SCC_GSMRL_ENR |
SCC_GSMRL_ENT);
}
#endif
#endif /* CONFIG_ETHER_ON_SCC && CFG_CMD_NET */

15
cpu/mpc8260/pci.c
View File

@ -275,22 +275,7 @@ void pci_mpc8250_init (struct pci_controller *hose)
| SIUMCR_BCTLC00
| SIUMCR_MMR11;
#elif defined(CONFIG_TQM8272)
#if 0
immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr &
~SIUMCR_LBPC11 &
~SIUMCR_CS10PC11 &
~SIUMCR_LBPC11) |
SIUMCR_LBPC01 |
SIUMCR_CS10PC01 |
SIUMCR_APPC10;
#else
#if 0
immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr |
SIUMCR_APPC10);
#else
immap->im_siu_conf.sc_siumcr = 0x88000000;
#endif
#endif
#else
/*
* Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]),

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