ARM: beaglebone: add support for beaglebone black with DDR3 RAM
Signed-off-by: Jan Luebbe <jlu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -0,0 +1,9 @@
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#ifndef __BOARD_BEAGLEBONE_H
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#define __BOARD_BEAGLEBONE_H
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static inline int is_beaglebone_black(void)
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{
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return am33xx_get_cpu_rev() != AM335X_ES1_0;
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}
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#endif /* __BOARD_BEAGLEBONE_H */
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@ -26,6 +26,8 @@
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#include <init.h>
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#include <driver.h>
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#include <envfs.h>
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#include <environment.h>
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#include <globalvar.h>
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#include <sizes.h>
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#include <io.h>
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#include <ns16550.h>
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@ -49,6 +51,8 @@
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#include <mach/am33xx-generic.h>
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#include <mach/cpsw.h>
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#include "beaglebone.h"
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#ifdef CONFIG_DRIVER_SERIAL_NS16550
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/**
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@ -68,7 +72,10 @@ console_initcall(beaglebone_console_init);
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static int beaglebone_mem_init(void)
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{
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omap_add_ram0(SZ_256M);
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if (is_beaglebone_black())
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omap_add_ram0(SZ_512M);
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else
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omap_add_ram0(SZ_256M);
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return 0;
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}
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@ -103,19 +110,54 @@ static struct i2c_board_info i2c0_devices[] = {
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},
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};
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static const __maybe_unused struct module_pin_mux mmc1_pin_mux[] = {
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{OFFSET(gpmc_ad0), (MODE(1) | RXACTIVE)}, /* MMC1_DAT0 */
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{OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE)}, /* MMC1_DAT1 */
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{OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE)}, /* MMC1_DAT2 */
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{OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE)}, /* MMC1_DAT3 */
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{OFFSET(gpmc_ad4), (MODE(1) | RXACTIVE)}, /* MMC1_DAT4 */
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{OFFSET(gpmc_ad5), (MODE(1) | RXACTIVE)}, /* MMC1_DAT5 */
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{OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE)}, /* MMC1_DAT6 */
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{OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE)}, /* MMC1_DAT7 */
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{OFFSET(gpmc_csn1), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CLK */
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{OFFSET(gpmc_csn2), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CMD */
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{-1},
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};
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static int beaglebone_devices_init(void)
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{
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am33xx_enable_mmc0_pin_mux();
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am33xx_add_mmc0(NULL);
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if (is_beaglebone_black()) {
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configure_module_pin_mux(mmc1_pin_mux);
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am33xx_add_mmc1(NULL);
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}
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am33xx_enable_i2c0_pin_mux();
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i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
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am33xx_add_i2c0(NULL);
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beaglebone_eth_init();
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return 0;
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}
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device_initcall(beaglebone_devices_init);
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static int beaglebone_env_init(void)
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{
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int black = is_beaglebone_black();
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#ifdef CONFIG_GLOBALVAR
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globalvar_add_simple("board.variant");
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setenv("global.board.variant", black ? "boneblack" : "bone");
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#endif
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printf("detected 'BeagleBone %s'\n", black ? "Black" : "White");
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armlinux_set_bootparams((void *)0x80000100);
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armlinux_set_architecture(MACH_TYPE_BEAGLEBONE);
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return 0;
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}
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device_initcall(beaglebone_devices_init);
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late_initcall(beaglebone_env_init);
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@ -14,6 +14,8 @@
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#include <mach/am33xx-generic.h>
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#include <mach/wdt.h>
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#include "beaglebone.h"
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#define DDR2_RD_DQS 0x12
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#define DDR2_PHY_FIFO_WE 0x80
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#define DDR2_WR_DQS 0x00
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@ -68,6 +70,38 @@ static const struct am33xx_ddr_data ddr2_data = {
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.dll_lock_diff0 = 0x0,
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};
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static const struct am33xx_ddr_data ddr3_data = {
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.rd_slave_ratio0 = 0x38,
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.wr_dqs_slave_ratio0 = 0x44,
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.fifo_we_slave_ratio0 = 0x94,
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.wr_slave_ratio0 = 0x7D,
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.use_rank0_delay = 0x01,
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.dll_lock_diff0 = 0x0,
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};
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static const struct am33xx_cmd_control ddr3_cmd_ctrl = {
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.slave_ratio0 = 0x80,
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.dll_lock_diff0 = 0x1,
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.invert_clkout0 = 0x0,
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.slave_ratio1 = 0x80,
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.dll_lock_diff1 = 0x1,
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.invert_clkout1 = 0x0,
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.slave_ratio2 = 0x80,
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.dll_lock_diff2 = 0x1,
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.invert_clkout2 = 0x0,
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};
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static const struct am33xx_emif_regs ddr3_regs = {
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.emif_read_latency = 0x100007,
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.emif_tim1 = 0x0AAAD4DB,
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.emif_tim2 = 0x266B7FDA,
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.emif_tim3 = 0x501F867F,
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.zq_config = 0x50074BE4,
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.sdram_config = 0x61C05332,
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.sdram_config2 = 0x0,
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.sdram_ref_ctrl = 0xC30,
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};
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/**
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* @brief The basic entry point for board initialization.
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*
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@ -90,9 +124,16 @@ static int beaglebone_board_init(void)
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if (running_in_sdram())
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return 0;
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pll_init(MPUPLL_M_500, 24, DDRPLL_M_266);
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am335x_sdram_init(0x18B, &ddr2_cmd_ctrl, &ddr2_regs, &ddr2_data);
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/* Setup the PLLs and the clocks for the peripherals */
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if (is_beaglebone_black()) {
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pll_init(MPUPLL_M_500, 24, DDRPLL_M_400);
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am335x_sdram_init(0x18B, &ddr3_cmd_ctrl, &ddr3_regs,
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&ddr3_data);
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} else {
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pll_init(MPUPLL_M_500, 24, DDRPLL_M_266);
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am335x_sdram_init(0x18B, &ddr2_cmd_ctrl, &ddr2_regs,
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&ddr2_data);
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}
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am33xx_uart0_soft_reset();
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am33xx_enable_uart0_pin_mux();
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@ -104,11 +145,18 @@ static int beaglebone_board_init(void)
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void __bare_init __naked barebox_arm_reset_vector(uint32_t *data)
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{
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unsigned sdram;
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am33xx_save_bootinfo(data);
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arm_cpu_lowlevel_init();
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beaglebone_board_init();
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barebox_arm_entry(0x80000000, SZ_256M, 0);
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if (is_beaglebone_black())
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sdram = SZ_512M;
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else
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sdram = SZ_256M;
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barebox_arm_entry(0x80000000, sdram, 0);
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}
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