ARM i.MX51 clk: select uart clk parent based on hardware setting
The previous code assumed pll2 which is correct when we set the uart parent to pll2 beforehand. The reset default is different though, so calculate uart parent based on hardware setting. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -115,7 +115,15 @@ unsigned long imx_get_uartclk(void)
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u32 reg, prediv, podf;
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unsigned long parent_rate;
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parent_rate = pll2_sw_get_rate();
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reg = ccm_readl(MX5_CCM_CSCMR1);
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reg &= MX5_CCM_CSCMR1_UART_CLK_SEL_MASK;
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reg >>= MX5_CCM_CSCMR1_UART_CLK_SEL_OFFSET;
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parent_rate = get_rate_select(reg,
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pll1_main_get_rate,
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pll2_sw_get_rate,
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pll3_sw_get_rate,
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NULL);
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reg = ccm_readl(MX5_CCM_CSCDR1);
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prediv = ((reg & MX5_CCM_CSCDR1_UART_CLK_PRED_MASK) >>
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