9
0
Fork 0

ARM i.MX51 clk: select uart clk parent based on hardware setting

The previous code assumed pll2 which is correct when we set the
uart parent to pll2 beforehand. The reset default is different
though, so calculate uart parent based on hardware setting.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer 2012-03-23 11:19:13 +01:00
parent 773e35bb94
commit 1b7a6ef394
1 changed files with 9 additions and 1 deletions

View File

@ -115,7 +115,15 @@ unsigned long imx_get_uartclk(void)
u32 reg, prediv, podf;
unsigned long parent_rate;
parent_rate = pll2_sw_get_rate();
reg = ccm_readl(MX5_CCM_CSCMR1);
reg &= MX5_CCM_CSCMR1_UART_CLK_SEL_MASK;
reg >>= MX5_CCM_CSCMR1_UART_CLK_SEL_OFFSET;
parent_rate = get_rate_select(reg,
pll1_main_get_rate,
pll2_sw_get_rate,
pll3_sw_get_rate,
NULL);
reg = ccm_readl(MX5_CCM_CSCDR1);
prediv = ((reg & MX5_CCM_CSCDR1_UART_CLK_PRED_MASK) >>