ARM: add minimal support for the Freescale Quad UDOO Board
Adding minimal support for the UDOO board. For more information about the board: http://www.udoo.org/ Signed-off-by: Raphael Poggi <poggi.raph@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Raphaël POGGI
Sascha Hauer
parent
6613e2d8fb
commit
1d8a49ae88
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@ -91,6 +91,7 @@ obj-$(CONFIG_MACH_TX25) += karo-tx25/
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obj-$(CONFIG_MACH_TX28) += karo-tx28/
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obj-$(CONFIG_MACH_TX51) += karo-tx51/
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obj-$(CONFIG_MACH_TX53) += karo-tx53/
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obj-$(CONFIG_MACH_UDOO) += udoo/
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obj-$(CONFIG_MACH_USB_A9260) += usb-a926x/
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obj-$(CONFIG_MACH_USB_A9263) += usb-a926x/
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obj-$(CONFIG_MACH_USB_A9G20) += usb-a926x/
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@ -0,0 +1,3 @@
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obj-y += board.o flash-header-mx6-udoo.dcd.o
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extra-y += flash-header-mx6-udoo.dcd.S flash-header-mx6-udoo.dcd
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lwl-y += lowlevel.o
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@ -0,0 +1,194 @@
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/*
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* Copyright (C) 2014 Raphaël Poggi
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* Copyright (C) 2012 Steffen Trumtrar, Pengutronix
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*
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* based on arch/arm/boards/freescale-mx6-arm2/board.c
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <init.h>
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#include <environment.h>
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#include <mach/imx6-regs.h>
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#include <fec.h>
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#include <gpio.h>
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#include <mach/bbu.h>
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#include <asm/armlinux.h>
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#include <generated/mach-types.h>
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#include <partition.h>
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#include <linux/phy.h>
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#include <asm/io.h>
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#include <asm/mmu.h>
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#include <mach/generic.h>
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#include <sizes.h>
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#include <net.h>
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#include <linux/micrel_phy.h>
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#include <mach/imx6.h>
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#include <mach/devices-imx6.h>
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#include <mach/iomux-mx6.h>
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#include <spi/spi.h>
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#include <mach/spi.h>
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#include <mach/usb.h>
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static iomux_v3_cfg_t udoo_enet_gpio_pads_1[] = {
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/* RGMII reset */
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MX6Q_PAD_EIM_D23__GPIO_3_23 | MUX_PAD_CTRL(NO_PAD_CTRL),
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/* alimentazione ethernet*/
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MX6Q_PAD_EIM_EB3__GPIO_2_31 | MUX_PAD_CTRL(NO_PAD_CTRL),
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/* pin 32 - 1 - (MODE0) all */
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MX6Q_PAD_RGMII_RD0__GPIO_6_25 | MUX_PAD_CTRL(NO_PAD_CTRL),
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/* pin 31 - 1 - (MODE1) all */
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MX6Q_PAD_RGMII_RD1__GPIO_6_27 | MUX_PAD_CTRL(NO_PAD_CTRL),
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/* pin 28 - 1 - (MODE2) all */
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MX6Q_PAD_RGMII_RD2__GPIO_6_28 | MUX_PAD_CTRL(NO_PAD_CTRL),
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/* pin 27 - 1 - (MODE3) all */
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MX6Q_PAD_RGMII_RD3__GPIO_6_29 | MUX_PAD_CTRL(NO_PAD_CTRL),
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/* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */
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MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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static iomux_v3_cfg_t udoo_enet_gpio_pads_2[] = {
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/* Ethernet */
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MX6Q_PAD_RGMII_RXC__GPIO_6_30, /* PHYAD */
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MX6Q_PAD_RGMII_RD0__GPIO_6_25, /* MODE0 */
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MX6Q_PAD_RGMII_RD1__GPIO_6_27, /* MODE1 */
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MX6Q_PAD_RGMII_RD2__GPIO_6_28, /* MODE2 */
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MX6Q_PAD_RGMII_RD3__GPIO_6_29, /* MODE3 */
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MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL,
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};
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static int ksz9021rn_phy_fixup(struct phy_device *dev)
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{
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phy_write(dev, 0x09, 0x1c00);
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phy_write(dev, 0x4, 0x0000);
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phy_write(dev, 0x5, 0x0000);
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phy_write(dev, 0x6, 0x0000);
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phy_write(dev, 0x8, 0x03ff);
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/* do same as linux kernel */
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/* min rx data delay */
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phy_write(dev, 0x0b, 0x8105);
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phy_write(dev, 0x0c, 0x0000);
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/* max rx/tx clock delay, min rx/tx control delay */
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phy_write(dev, 0x0b, 0x8104);
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phy_write(dev, 0x0c, 0xf0f0);
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phy_write(dev, 0x0b, 0x104);
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return 0;
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}
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static int udoo_ksz9021rn_setup(void)
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{
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if (!of_machine_is_compatible("udoo,imx6qdl-udoo"))
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return 0;
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mxc_iomux_v3_setup_multiple_pads(udoo_enet_gpio_pads_1,
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ARRAY_SIZE(udoo_enet_gpio_pads_1));
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gpio_direction_output(IMX_GPIO_NR(2, 31) , 1); /* Power on enet */
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/* MODE strap-in pins: advertise all capabilities */
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gpio_direction_output(IMX_GPIO_NR(6, 24), 1);
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gpio_direction_output(IMX_GPIO_NR(6, 25), 1);
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gpio_direction_output(IMX_GPIO_NR(6, 27), 1);
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gpio_direction_output(IMX_GPIO_NR(6, 28), 1);
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gpio_direction_output(IMX_GPIO_NR(6, 29), 1);
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mdelay(100);
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gpio_free(IMX_GPIO_NR(6, 24));
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gpio_free(IMX_GPIO_NR(6, 25));
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gpio_free(IMX_GPIO_NR(6, 27));
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gpio_free(IMX_GPIO_NR(6, 28));
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gpio_free(IMX_GPIO_NR(6, 29));
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mxc_iomux_v3_setup_multiple_pads(udoo_enet_gpio_pads_2, ARRAY_SIZE(udoo_enet_gpio_pads_2));
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return 0;
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}
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/*
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* Do this before the fec initializes but after our
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* gpios are available.
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*/
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fs_initcall(udoo_ksz9021rn_setup);
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static void udoo_ehci_init(void)
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{
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/* hub reset */
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gpio_direction_output(204, 0);
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udelay(2000);
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gpio_set_value(204, 1);
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}
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static iomux_v3_cfg_t const wdog_pads[] = {
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MX6Q_PAD_EIM_A24__GPIO_5_4 | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6Q_PAD_EIM_D19__EPIT1_EPITO,
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};
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#define WDT_EN IMX_GPIO_NR(5, 4)
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#define WDT_TRG IMX_GPIO_NR(3, 19)
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static void udoo_wdog_init(void)
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{
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mxc_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
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gpio_direction_output(WDT_TRG, 0);
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gpio_direction_output(WDT_EN, 1);
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gpio_direction_input(WDT_TRG);
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}
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static void udoo_epit_init(void)
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{
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writel(0x0000000, MX6_EPIT1_BASE_ADDR);
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writel(0x142000F, MX6_EPIT1_BASE_ADDR);
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writel(0x30000, MX6_EPIT1_BASE_ADDR + 0x8);
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writel(0x0, MX6_EPIT1_BASE_ADDR + 0xC);
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}
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static int udoo_devices_init(void)
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{
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if (!of_machine_is_compatible("udoo,imx6qdl-udoo"))
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return 0;
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udoo_wdog_init();
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udoo_ehci_init();
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udoo_epit_init();
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armlinux_set_bootparams((void *)0x10000100);
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return 0;
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}
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device_initcall(udoo_devices_init);
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static int udoo_coredevices_init(void)
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{
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if (!of_machine_is_compatible("udoo,imx6qdl-udoo"))
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return 0;
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phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
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ksz9021rn_phy_fixup);
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return 0;
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}
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coredevice_initcall(udoo_coredevices_init);
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static int udoo_postcore_init(void)
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{
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if (!of_machine_is_compatible("udoo,imx6qdl-udoo"))
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return 0;
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imx6_init_lowlevel();
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barebox_set_hostname("udoo");
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return 0;
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}
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postcore_initcall(udoo_postcore_init);
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@ -0,0 +1,6 @@
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#!/bin/sh
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# board defaults, do not change in running system. Change /env/config
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# instead
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global.linux.bootargs.base="console=ttymxc1,115200"
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@ -0,0 +1,104 @@
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soc imx6
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loadaddr 0x20000000
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dcdofs 0x400
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/* MX6_IOM_DRAM_SDQS0 -> MX6_IOM_DRAM_SDQS7 */
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wm 32 0x020e05a8 0x00000030
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wm 32 0x020e05b0 0x00000030
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wm 32 0x020e0524 0x00000030
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wm 32 0x020e051c 0x00000030
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wm 32 0x020e0518 0x00000030
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wm 32 0x020e050c 0x00000030
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wm 32 0x020e05b8 0x00000030
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wm 32 0x020e05c0 0x00000030
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/********************************************/
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/* MX6_IOM_DRAM_DQM0 -> MX6_IOM_DRAM_DQM7 */
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wm 32 0x020e05ac 0x00020030
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wm 32 0x020e05b4 0x00020030
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wm 32 0x020e0528 0x00020030
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wm 32 0x020e0520 0x00020030
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wm 32 0x020e0514 0x00020030
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wm 32 0x020e0510 0x00020030
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wm 32 0x020e05bc 0x00020030
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wm 32 0x020e05c4 0x00020030
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/******************************************/
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wm 32 0x020e056c 0x00020030 /* MX6_IOM_DRAM_CAS */
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wm 32 0x020e0578 0x00020030 /* MX6_IOM_DRAM_RAS */
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wm 32 0x020e0588 0x00020030 /* MX6_IOM_DRAM_SDCLK_0 */
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wm 32 0x020e0594 0x00020030 /* MX6_IOM_DRAM_SDCLK_1 */
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wm 32 0x020e057c 0x00020030 /* MX6_IOM_DRAM_RESET */
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wm 32 0x020e0590 0x00003000
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wm 32 0x020e0598 0x00003000
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wm 32 0x020e058c 0x00000000
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wm 32 0x020e059c 0x00003030
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wm 32 0x020e05a0 0x00003030
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/* MX6_IOM_GRP_B0DS -> MX6_IOM_GRP_B7DS */
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wm 32 0x020e0784 0x00000030
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wm 32 0x020e0788 0x00000030
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wm 32 0x020e0794 0x00000030
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wm 32 0x020e079c 0x00000030
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wm 32 0x020e07a0 0x00000030
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wm 32 0x020e07a4 0x00000030
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wm 32 0x020e07a8 0x00000030
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wm 32 0x020e0748 0x00000030
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/***************************************/
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wm 32 0x020e074c 0x00000030 /* MX6_IOM_GRP_ADDDS */
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wm 32 0x020e0750 0x00020000
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wm 32 0x020e0758 0x00000000
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wm 32 0x020e0774 0x00020000
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wm 32 0x020e078c 0x00000030 /* MX6_IOM_GRP_CTLDS */
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wm 32 0x020e0798 0x000c0000
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wm 32 0x021b081c 0x33333333
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wm 32 0x021b0820 0x33333333
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wm 32 0x021b0824 0x33333333
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wm 32 0x021b0828 0x33333333
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wm 32 0x021b481c 0x33333333
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wm 32 0x021b4820 0x33333333
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wm 32 0x021b4824 0x33333333
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wm 32 0x021b4828 0x33333333
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wm 32 0x021b0004 0x00020036
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wm 32 0x021b0008 0x09444040
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wm 32 0x021b000c 0x54597955
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wm 32 0x021b0010 0xFF328F64
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wm 32 0x021b0014 0x01FF00DB
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wm 32 0x021b0018 0x00001740
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wm 32 0x021b001c 0x00008000
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wm 32 0x021b002c 0x000026D2
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wm 32 0x021b0030 0x00591023
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wm 32 0x021b0040 0x00000027
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wm 32 0x021b0000 0x831A0000
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wm 32 0x021b001c 0x04088032
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wm 32 0x021b001c 0x00008033
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wm 32 0x021b001c 0x00048031
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wm 32 0x021b001c 0x09408030
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wm 32 0x021b001c 0x04008040
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wm 32 0x021b0800 0xA1380003
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wm 32 0x021b4800 0xA1380003
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wm 32 0x021b0020 0x00005800
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wm 32 0x021b0818 0x00011117
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wm 32 0x021b4818 0x00011117
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wm 32 0x021b083c 0x43510360
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wm 32 0x021b0840 0x0342033F
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wm 32 0x021b483c 0x033F033F
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wm 32 0x021b4840 0x03290266
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wm 32 0x021b0848 0x4B3E4141
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wm 32 0x021b4848 0x47413B4A
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wm 32 0x021b0850 0x42404843
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wm 32 0x021b4850 0x4C3F4C45
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wm 32 0x021b080c 0x00350035
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wm 32 0x021b0810 0x001F001F
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wm 32 0x021b480c 0x00010001
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wm 32 0x021b4810 0x00010001
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wm 32 0x021b08b8 0x00000800
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wm 32 0x021b48b8 0x00000800
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wm 32 0x021b0004 0x00025576
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wm 32 0x021b0404 0x00011006
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wm 32 0x021b001c 0x00000000
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@ -0,0 +1,17 @@
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#include <common.h>
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#include <sizes.h>
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#include <asm/barebox-arm-head.h>
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#include <asm/barebox-arm.h>
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extern char __dtb_imx6q_udoo_start[];
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ENTRY_FUNCTION(start_imx6_udoo, r0, r1, r2)
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{
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uint32_t fdt;
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arm_cpu_lowlevel_init();
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fdt = (uint32_t)__dtb_imx6q_udoo_start - get_runtime_offset();
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barebox_arm_entry(0x10000000, SZ_1G, fdt);
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}
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@ -13,6 +13,7 @@ CONFIG_MACH_TQMA6X=y
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CONFIG_MACH_SABRELITE=y
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CONFIG_MACH_NITROGEN6X=y
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CONFIG_MACH_SOLIDRUN_HUMMINGBOARD=y
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CONFIG_MACH_UDOO=y
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CONFIG_IMX_IIM=y
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CONFIG_IMX_IIM_FUSE_BLOW=y
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CONFIG_IMX_OCOTP=y
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@ -23,7 +23,8 @@ dtb-$(CONFIG_ARCH_IMX6) += imx6q-gk802.dtb \
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imx6q-phytec-pbab01.dtb \
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imx6dl-hummingboard.dtb \
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imx6q-nitrogen6x.dtb \
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imx6dl-nitrogen6x.dtb
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imx6dl-nitrogen6x.dtb \
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imx6q-udoo.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += dove-cubox.dtb
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dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5_sockit.dtb \
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socfpga_cyclone5_socrates.dtb
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@ -55,6 +56,7 @@ pbl-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o
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pbl-$(CONFIG_MACH_SOLIDRUN_HUMMINGBOARD) += imx6dl-hummingboard.dtb.o
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pbl-$(CONFIG_MACH_SABRELITE) += imx6q-sabrelite.dtb.o imx6dl-sabrelite.dtb.o
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pbl-$(CONFIG_MACH_NITROGEN6X) += imx6q-nitrogen6x.dtb.o imx6dl-nitrogen6x.dtb.o
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pbl-$(CONFIG_MACH_UDOO) += imx6q-udoo.dtb.o
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.SECONDARY: $(obj)/$(BUILTIN_DTB).dtb.S
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.SECONDARY: $(patsubst %,$(obj)/%.S,$(dtb-y))
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@ -0,0 +1,22 @@
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/*
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* Copyright 2014 Raphaël Poggi
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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#include "imx6q.dtsi"
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#include "imx6qdl-udoo.dtsi"
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/ {
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model = "Freescale i.MX6 Quad UDOO Board";
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compatible = "udoo,imx6q-udoo", "udoo,imx6qdl-udoo", "fsl,imx6q";
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};
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@ -0,0 +1,118 @@
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|||
/*
|
||||
* Copyright 2014 Raphaël Poggi
|
||||
* Copyright 2011 Freescale Semiconductor, Inc.
|
||||
* Copyright 2011 Linaro Ltd.
|
||||
*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*
|
||||
* http://www.opensource.org/licenses/gpl-license.html
|
||||
* http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
model = "Freescale i.MX6 UDOO Board";
|
||||
compatible = "udoo,imx6qdl-udoo", "fsl,imx6q";
|
||||
|
||||
chosen {
|
||||
linux,stdout-path = &uart2;
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x10000000 0x40000000>;
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
reg_2p5v: regulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <0>;
|
||||
regulator-name = "2P5V";
|
||||
regulator-min-microvolt = <2500000>;
|
||||
regulator-max-microvolt = <2500000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_otg_vbus: regulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <2>;
|
||||
regulator-name = "usb_otg_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
imx6q-udoo {
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
/* SGTL5000 sys_mclk */
|
||||
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_enet: enetgrp {
|
||||
fsl,pins = <MX6QDL_ENET_PINGRP_RGMII_MD(0x1b0b0, 0x1b0b0)>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <MX6QDL_I2C1_PINGRP1>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <MX6QDL_UART2_PINGRP1>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <MX6QDL_USDHC3_PINGRP_D4>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -37,6 +37,7 @@ config ARCH_TEXT_BASE
|
|||
default 0x2fc00000 if MACH_TQMA6X
|
||||
default 0x4fc00000 if MACH_PHYTEC_PFLA02
|
||||
default 0x4fc00000 if MACH_DFI_FS700_M60
|
||||
default 0x4fc00000 if MACH_UDOO
|
||||
|
||||
config ARCH_IMX_INTERNAL_BOOT
|
||||
bool "support internal boot mode"
|
||||
|
|
@ -233,6 +234,10 @@ config MACH_SOLIDRUN_HUMMINGBOARD
|
|||
bool "SolidRun Hummingboard"
|
||||
select ARCH_IMX6
|
||||
|
||||
config MACH_UDOO
|
||||
bool "Freescale i.MX6 UDOO Board"
|
||||
select ARCH_IMX6
|
||||
|
||||
endif
|
||||
|
||||
# ----------------------------------------------------------
|
||||
|
|
|
|||
|
|
@ -128,3 +128,8 @@ pblx-$(CONFIG_MACH_NITROGEN6X) += start_imx6dl_nitrogen6x_1g
|
|||
CFG_start_imx6dl_nitrogen6x_1g.pblx.imximg = $(board)/boundarydevices-nitrogen6x/flash-header-nitrogen6x-1g.imxcfg
|
||||
FILE_barebox-boundarydevices-imx6dl-nitrogen6x-1g.img = start_imx6dl_nitrogen6x_1g.pblx.imximg
|
||||
image-$(CONFIG_MACH_NITROGEN6X) += barebox-boundarydevices-imx6dl-nitrogen6x-1g.img
|
||||
|
||||
pblx-$(CONFIG_MACH_UDOO) += start_imx6_udoo
|
||||
CFG_start_imx6_udoo.pblx.imximg = $(board)/udoo/flash-header-mx6-udoo.imxcfg
|
||||
FILE_barebox-udoo-imx6q.img = start_imx6_udoo.pblx.imximg
|
||||
image-$(CONFIG_MACH_UDOO) += barebox-udoo-imx6q.img
|
||||
|
|
|
|||
Loading…
Reference in New Issue