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eukrea_cpuimx35: fix board support 

- updated mDDR init sequence
- LCD fixes
- default configuration update

Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Eric Bénard 2010-07-29 09:54:03 +02:00 committed by Sascha Hauer
parent edf1301d82
commit 21135a2dd6
5 changed files with 52 additions and 102 deletions
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4
arch/arm/boards/eukrea_cpuimx35/env/bin/init vendored
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@ -13,10 +13,14 @@ if [ -e /dev/nand0 ]; then
fi
if [ -f /env/logo.bmp ]; then
fb0.enable=1
bmp /env/logo.bmp
gpio_direction_out 1 1
elif [ -f /env/logo.bmp.lzo ]; then
unlzo /env/logo.bmp.lzo /logo.bmp
fb0.enable=1
bmp /logo.bmp
gpio_direction_out 1 1
fi
if [ -z $eth0.ethaddr ]; then

28
arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
View File

@ -99,14 +99,20 @@ static struct fb_videomode imxfb_mode = {
.lower_margin = 4,
.hsync_len = 30,
.vsync_len = 3,
.sync = FB_SYNC_OE_ACT_HIGH,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
};
static void eukrea_cpuimx35_enable_display(int enable)
{
gpio_direction_output(4, enable);
}
static struct imx_ipu_fb_platform_data ipu_fb_data = {
.mode = &imxfb_mode,
.bpp = 16,
.enable = eukrea_cpuimx35_enable_display,
};
static struct device_d imxfb_dev = {
@ -164,15 +170,6 @@ static int eukrea_cpuimx35_devices_init(void)
device_initcall(eukrea_cpuimx35_devices_init);
static int eukrea_cpuimx35_enable_display(void)
{
gpio_direction_output(1, 1);
gpio_direction_output(0, 0);
return 0;
}
late_initcall(eukrea_cpuimx35_enable_display);
static struct device_d eukrea_cpuimx35_serial_device = {
.name = "imx_serial",
.map_base = IMX_UART1_BASE,
@ -205,6 +202,10 @@ static struct pad_desc eukrea_cpuimx35_pads[] = {
MX35_PAD_TXD1__UART1_TXD_MUX,
MX35_PAD_RTS1__UART1_RTS,
MX35_PAD_CTS1__UART1_CTS,
MX35_PAD_LD23__GPIO3_29,
MX35_PAD_CONTRAST__GPIO1_1,
MX35_PAD_D3_CLS__GPIO1_4,
};
static int eukrea_cpuimx35_console_init(void)
@ -212,6 +213,13 @@ static int eukrea_cpuimx35_console_init(void)
mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx35_pads,
ARRAY_SIZE(eukrea_cpuimx35_pads));
/* screen default on to prevent flicker */
gpio_direction_output(4, 1);
/* backlight default off */
gpio_direction_output(1, 0);
/* led default off */
gpio_direction_output(32 * 2 + 29, 1);
register_device(&eukrea_cpuimx35_serial_device);
return 0;
}

33
arch/arm/boards/eukrea_cpuimx35/flash_header.c
View File

@ -1,50 +1,32 @@
#include <common.h>
#include <mach/imx-flash-header.h>
extern unsigned long _stext;
void __naked __flash_header_start go(void)
{
__asm__ __volatile__("b exception_vectors\n");
}
struct imx_dcd_entry __dcd_entry_0x400 dcd_entry[] = {
{ .ptr_type = 4, .addr = 0x53F80004, .val = 0x00821000, },
{ .ptr_type = 4, .addr = 0x53F80004, .val = 0x00821000, },
{ .ptr_type = 4, .addr = 0xB8001010, .val = 0x00000004, },
{ .ptr_type = 4, .addr = 0xB8001010, .val = 0x0000000C, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc3f, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x0009572B, },
{ .ptr_type = 4, .addr = 0xB8001000, .val = 0x92220000, },
{ .ptr_type = 1, .addr = 0x80000400, .val = 0x12345678, },
{ .ptr_type = 1, .addr = 0x80000400, .val = 0xda, },
{ .ptr_type = 4, .addr = 0xB8001000, .val = 0xA2220000, },
{ .ptr_type = 1, .addr = 0x80000000, .val = 0x87654321, },
{ .ptr_type = 1, .addr = 0x80000000, .val = 0x87654321, },
{ .ptr_type = 4, .addr = 0xB8001000, .val = 0xB2220000, },
{ .ptr_type = 1, .addr = 0x80000033, .val = 0xda, },
{ .ptr_type = 1, .addr = 0x82000000, .val = 0xda, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc2f, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc2f, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc2f, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc2f, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc2f, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc2f, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc2f, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc2f, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc2f, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc2f, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc2f, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc2f, },
{ .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc2f, },
{ .ptr_type = 4, .addr = 0xB8001000, .val = 0x82220080, },
{ .ptr_type = 4, .addr = 0xB8001000, .val = 0x82228080, },
{ .ptr_type = 4, .addr = 0xB8001020, .val = 0x80000028, },
{ .ptr_type = 4, .addr = 0xB8001024, .val = 0x80000028, },
{ .ptr_type = 4, .addr = 0xB8001028, .val = 0x80000028, },
{ .ptr_type = 4, .addr = 0xB800102c, .val = 0x80000028, },
{ .ptr_type = 4, .addr = 0xB8001030, .val = 0x80000028, },
{ .ptr_type = 4, .addr = 0xB8001000, .val = 0x82224080, },
{ .ptr_type = 4, .addr = 0xB8001010, .val = 0x00000004, },
};
#define APP_DEST 0x80000000
struct imx_flash_header __flash_header_0x400 flash_header = {
struct imx_flash_header __flash_header_0x400 eukrea_cpuimx35_header = {
.app_code_jump_vector = APP_DEST + 0x1000,
.app_code_barker = APP_CODE_BARKER,
.app_code_csf = 0,
@ -57,4 +39,3 @@ struct imx_flash_header __flash_header_0x400 flash_header = {
};
unsigned long __image_len_0x400 barebox_len = 0x40000;

71
arch/arm/boards/eukrea_cpuimx35/lowlevel.c
View File

@ -62,7 +62,6 @@ void __bare_init __naked board_init_lowlevel(void)
{
uint32_t r, s;
unsigned long ccm_base = IMX_CCM_BASE;
unsigned long iomuxc_base = IMX_IOMUXC_BASE;
#ifdef CONFIG_NAND_IMX_BOOT
unsigned int *trg, *src;
int i;
@ -132,80 +131,32 @@ void __bare_init __naked board_init_lowlevel(void)
if (r > 0x80000000 && r < 0x90000000)
board_init_lowlevel_return();
/* Set DDR Type to SDRAM, drive strength workaround *
* 0x00000000 MDDR *
* 0x00000800 3,3V SDRAM */
r = 0x00000800;
writel(r, iomuxc_base + 0x794);
writel(r, iomuxc_base + 0x798);
writel(r, iomuxc_base + 0x79c);
writel(r, iomuxc_base + 0x7a0);
writel(r, iomuxc_base + 0x7a4);
/* MDDR init, enable mDDR*/
writel(0x00000304, ESDMISC); /* was 0x00000004 */
/* set timing paramters */
writel(0x00255417, ESDCFG0);
/* select Precharge-All mode */
/* Init Mobile DDR */
writel(0x00000004, ESDMISC);
writel(0x0000000C, ESDMISC);
writel(0x0009572B, ESDCFG0);
writel(0x92220000, ESDCTL0);
/* Precharge-All */
writel(0x12345678, IMX_SDRAM_CS0 + 0x400);
/* select Load-Mode-Register mode */
writel(0xB8001000, ESDCTL0);
/* Load reg EMR2 */
writeb(0xda, 0x84000000);
/* Load reg EMR3 */
writeb(0xda, 0x86000000);
/* Load reg EMR1 -- enable DLL */
writeb(0xda, 0x82000400);
/* Load reg MR -- reset DLL */
writeb(0xda, 0x80000333);
/* select Precharge-All mode */
writel(0x92220000, ESDCTL0);
/* Precharge-All */
writel(0x12345678, IMX_SDRAM_CS0 + 0x400);
/* select Manual-Refresh mode */
writeb(0xda, IMX_SDRAM_CS0 + 0x400);
writel(0xA2220000, ESDCTL0);
/* Manual-Refresh 2 times */
writel(0x87654321, IMX_SDRAM_CS0);
writel(0x87654321, IMX_SDRAM_CS0);
/* select Load-Mode-Register mode */
writel(0xB2220000, ESDCTL0);
/* Load reg MR -- CL3, BL8, end DLL reset */
writeb(0xda, 0x80000233);
/* Load reg EMR1 -- OCD default */
writeb(0xda, 0x82000780);
/* Load reg EMR1 -- OCD exit */
writeb(0xda, 0x82000400);
/* select normal-operation mode
* DSIZ32-bit, BL8, COL10-bit, ROW13-bit
* disable PWT & PRCT
* disable Auto-Refresh */
writel(0x82220080, ESDCTL0);
/* enable Auto-Refresh */
writel(0x82228080, ESDCTL0);
/* enable Auto-Refresh */
writel(0x00002000, ESDCTL1);
writeb(0xda, IMX_SDRAM_CS0 + 0x33);
writeb(0xda, IMX_SDRAM_CS0 + 0x2000000);
writel(0x82224080, ESDCTL0);
writel(0x00000004, ESDMISC);
#ifdef CONFIG_NAND_IMX_BOOT
/* skip NAND boot if not running from NFC space */
r = get_pc();
if (r < IMX_NFC_BASE || r > IMX_NFC_BASE + 0x800)
if (r < IMX_NFC_BASE || r > IMX_NFC_BASE + 0x1000)
board_init_lowlevel_return();
src = (unsigned int *)IMX_NFC_BASE;
trg = (unsigned int *)TEXT_BASE;
/* Move ourselves out of NFC SRAM */
for (i = 0; i < 0x800 / sizeof(int); i++)
for (i = 0; i < 0x1000 / sizeof(int); i++)
*trg++ = *src++;
/* Jump to SDRAM */

18
arch/arm/configs/eukrea_cpuimx35_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# barebox version: 2010.06.0
# Mon Jun 7 18:25:47 2010
# barebox version: 2010.07.0
# Wed Jul 28 21:46:15 2010
#
# CONFIG_BOARD_LINKER_SCRIPT is not set
CONFIG_GENERIC_LINKER_SCRIPT=y
@ -110,7 +110,8 @@ CONFIG_CONSOLE_FULL=y
CONFIG_CONSOLE_ACTIVATE_FIRST=y
# CONFIG_OF_FLAT_TREE is not set
# CONFIG_PARTITION is not set
# CONFIG_DEFAULT_ENVIRONMENT is not set
CONFIG_DEFAULT_ENVIRONMENT=y
CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/eukrea_cpuimx35/env"
#
# Debugging
@ -170,7 +171,8 @@ CONFIG_CMD_MTEST=y
#
# flash
#
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FLASH=y
# CONFIG_CMD_UBI is not set
#
# booting
@ -195,10 +197,12 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_UNLZO=y
CONFIG_NET=y
CONFIG_NET_DHCP=y
# CONFIG_NET_RARP is not set
# CONFIG_NET_NFS is not set
CONFIG_NET_PING=y
CONFIG_NET_TFTP=y
# CONFIG_NET_TFTP_PUSH is not set
# CONFIG_NET_NETCONSOLE is not set
# CONFIG_NET_RESOLV is not set
#
# Drivers
@ -229,12 +233,14 @@ CONFIG_DRIVER_NET_FEC_IMX=y
# flash drivers
#
# CONFIG_DRIVER_CFI is not set
CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_NAND_IMX=y
# CONFIG_NAND_IMX_BOOT is not set
CONFIG_NAND_IMX_BOOT=y
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
# CONFIG_MTD_NAND_ECC_SMC is not set
CONFIG_MTD_NAND_IDS=y
# CONFIG_UBI is not set
# CONFIG_ATA is not set
# CONFIG_USB is not set
# CONFIG_USB_GADGET is not set