Merge branch 'for-next/mips'
This commit is contained in:
Sascha Hauer
commit
2720526fa4
|
|
@ -52,6 +52,7 @@ config MACH_MIPS_AR231X
|
|||
select SYS_SUPPORTS_BIG_ENDIAN
|
||||
select CSRC_R4K_LIB
|
||||
select DRIVER_SERIAL_NS16550
|
||||
select HAS_DEBUG_LL
|
||||
|
||||
config MACH_MIPS_BCM47XX
|
||||
bool "Broadcom BCM47xx-based boards"
|
||||
|
|
@ -244,6 +245,52 @@ config CMD_MIPS_CPUINFO
|
|||
Say yes here to get a cpuinfo command to show some
|
||||
information about the cpu model.
|
||||
|
||||
config HAS_NMON
|
||||
bool
|
||||
|
||||
config NMON
|
||||
bool "nmon"
|
||||
depends on HAS_NMON
|
||||
depends on DEBUG_LL
|
||||
help
|
||||
Say yes here to add the nmon to pbl.
|
||||
nmon -- nano-monitor program for the MIPS processors.
|
||||
It can operate with NO working RAM, using only
|
||||
the processor registers.
|
||||
|
||||
config NMON_USER_START
|
||||
bool "'press any key to start nmon' dialog"
|
||||
depends on NMON
|
||||
help
|
||||
Say yes here to get the 'press any key to start nmon'
|
||||
dialog on start.
|
||||
|
||||
config NMON_1S_DELAY
|
||||
prompt "number of delay loops for 1s time interval"
|
||||
depends on NMON_USER_START
|
||||
hex
|
||||
default 0x400000
|
||||
help
|
||||
nmon uses a very simple delay loop for time measurement.
|
||||
The delay is CPU-dependent or even board-dependent.
|
||||
The NMON_1S_DELAY parameter specify delay loop count
|
||||
for near 1 second time interval.
|
||||
|
||||
config NMON_USER_START_DELAY
|
||||
prompt "'press any key to start nmon' dialog delay"
|
||||
depends on NMON_USER_START
|
||||
hex
|
||||
default 3
|
||||
help
|
||||
Select the delay interval for nmon 'press any key to start nmon' dialog.
|
||||
|
||||
config NMON_HELP
|
||||
bool "nmon help message"
|
||||
depends on NMON
|
||||
help
|
||||
Say yes here to get the nmon commands message on
|
||||
every nmon start.
|
||||
|
||||
endmenu
|
||||
|
||||
source common/Kconfig
|
||||
|
|
|
|||
|
|
@ -0,0 +1,77 @@
|
|||
/*
|
||||
* Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com>
|
||||
* Copyright (C) 2013 Oleksij Rempel <linux@rempel-privat.de>
|
||||
*
|
||||
* This file is part of barebox.
|
||||
* See file CREDITS for list of people who contributed to this project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2
|
||||
* as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <asm/pbl_macros.h>
|
||||
#include <mach/pbl_macros.h>
|
||||
#include <mach/ar2312_regs.h>
|
||||
|
||||
#include <mach/debug_ll.h>
|
||||
|
||||
.macro board_pbl_start
|
||||
.set push
|
||||
.set noreorder
|
||||
|
||||
mips_barebox_10h
|
||||
|
||||
mips_disable_interrupts
|
||||
|
||||
pbl_ar2312_pll
|
||||
|
||||
pbl_ar2312_rst_uart0
|
||||
debug_ll_ns16550_init
|
||||
|
||||
debug_ll_ns16550_outc 'a'
|
||||
debug_ll_ns16550_outnl
|
||||
|
||||
/* check if SDRAM is already configured,
|
||||
* if yes, we are probably starting
|
||||
* as second stage loader and can skip configuration */
|
||||
la t0, KSEG1 | AR2312_MEM_CFG1
|
||||
lw t1, 0(t0)
|
||||
and t0, t1, MEM_CFG1_E0
|
||||
beq zero, t0, 1f
|
||||
nop
|
||||
|
||||
pbl_probe_mem t0, t1, KSEG1
|
||||
beq t0, t1, sdram_configured
|
||||
nop
|
||||
|
||||
1:
|
||||
/* start SDRAM configuration */
|
||||
pbl_ar2312_x16_sdram
|
||||
|
||||
/* check one more time. if some thing wrong,
|
||||
* we don't need to continue */
|
||||
pbl_probe_mem t0, t1, KSEG1
|
||||
beq t0, t1, sdram_configured
|
||||
nop
|
||||
debug_ll_ns16550_outc '#'
|
||||
debug_ll_ns16550_outnl
|
||||
|
||||
1:
|
||||
b 1b /* dead end */
|
||||
nop
|
||||
|
||||
sdram_configured:
|
||||
debug_ll_ns16550_outc 'b'
|
||||
debug_ll_ns16550_outnl
|
||||
|
||||
copy_to_link_location pbl_start
|
||||
|
||||
.set pop
|
||||
.endm
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
/*
|
||||
* Copyright (C) 2013 Oleksij Rempel <linux@rempel-privat.de>
|
||||
*
|
||||
* This file is part of barebox.
|
||||
* See file CREDITS for list of people who contributed to this project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2
|
||||
* as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
/** @file
|
||||
* This File contains declaration for early output support
|
||||
*/
|
||||
#ifndef __NETGEAR_WG102_DEBUG_LL_H__
|
||||
#define __NETGEAR_WG102_DEBUG_LL_H__
|
||||
|
||||
#include <mach/ar2312_regs.h>
|
||||
|
||||
#define DEBUG_LL_UART_ADDR KSEG1ADDR(AR2312_UART0)
|
||||
#define DEBUG_LL_UART_SHIFT AR2312_UART_SHIFT
|
||||
|
||||
#define DEBUG_LL_UART_CLK (45000000 / 16)
|
||||
#define DEBUG_LL_UART_BPS CONFIG_BAUDRATE
|
||||
#define DEBUG_LL_UART_DIVISOR (DEBUG_LL_UART_CLK / DEBUG_LL_UART_BPS)
|
||||
|
||||
#endif /* __NETGEAR_WG102_DEBUG_LL_H__ */
|
||||
|
|
@ -18,6 +18,7 @@
|
|||
*/
|
||||
|
||||
#include <asm/pbl_macros.h>
|
||||
#include <asm/pbl_nmon.h>
|
||||
|
||||
.macro board_pbl_start
|
||||
.set push
|
||||
|
|
@ -28,6 +29,8 @@
|
|||
/* cpu specific setup ... */
|
||||
/* ... absent */
|
||||
|
||||
mips_nmon
|
||||
|
||||
copy_to_link_location pbl_start
|
||||
|
||||
.set pop
|
||||
|
|
|
|||
|
|
@ -0,0 +1,27 @@
|
|||
/*
|
||||
* Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com>
|
||||
*
|
||||
* This file is part of barebox.
|
||||
* See file CREDITS for list of people who contributed to this project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2
|
||||
* as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __INCLUDE_BOARD_DEBUG_LL_QEMU_MALTA_H__
|
||||
#define __INCLUDE_BOARD_DEBUG_LL_QEMU_MALTA_H__
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#define DEBUG_LL_UART_ADDR MALTA_PIIX4_UART0
|
||||
#define DEBUG_LL_UART_SHIFT 0
|
||||
#define DEBUG_LL_UART_DIVISOR 1843200 /* no matter for emulated port */
|
||||
|
||||
#endif /* __INCLUDE_BOARD_DEBUG_LL_QEMU_MALTA_H__ */
|
||||
|
|
@ -44,7 +44,7 @@ static struct NS16550_plat serial_plat = {
|
|||
static int malta_console_init(void)
|
||||
{
|
||||
/* Register the serial port */
|
||||
add_ns16550_device(DEVICE_ID_DYNAMIC, DEBUG_LL_UART_ADDR, 8,
|
||||
add_ns16550_device(DEVICE_ID_DYNAMIC, MALTA_PIIX4_UART0, 8,
|
||||
IORESOURCE_MEM_8BIT, &serial_plat);
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -2,7 +2,6 @@
|
|||
* Startup Code for MIPS CPU
|
||||
*
|
||||
* Copyright (C) 2011, 2012 Antony Pavlov <antonynpavlov@gmail.com>
|
||||
* ADR macro copyrighted (C) 2009 by Shinya Kuribayashi <skuribay@pobox.com>
|
||||
*
|
||||
* This file is part of barebox.
|
||||
* See file CREDITS for list of people who contributed to this project.
|
||||
|
|
|
|||
|
|
@ -38,6 +38,7 @@
|
|||
#endif /* CONFIG_DEBUG_LL */
|
||||
|
||||
#define UART_THR (0x0 << DEBUG_LL_UART_SHIFT)
|
||||
#define UART_RBR (0x0 << DEBUG_LL_UART_SHIFT)
|
||||
#define UART_DLL (0x0 << DEBUG_LL_UART_SHIFT)
|
||||
#define UART_DLM (0x1 << DEBUG_LL_UART_SHIFT)
|
||||
#define UART_LCR (0x3 << DEBUG_LL_UART_SHIFT)
|
||||
|
|
@ -46,6 +47,7 @@
|
|||
#define UART_LCR_W 0x07 /* Set UART to 8,N,2 & DLAB = 0 */
|
||||
#define UART_LCR_DLAB 0x87 /* Set UART to 8,N,2 & DLAB = 1 */
|
||||
|
||||
#define UART_LSR_DR 0x01 /* UART received data present */
|
||||
#define UART_LSR_THRE 0x20 /* Xmit holding register empty */
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
|
@ -86,18 +88,30 @@ static __inline__ void PUTC_LL(char ch)
|
|||
/*
|
||||
* output a character in a0
|
||||
*/
|
||||
.macro debug_ll_ns16550_outc_a0
|
||||
#ifdef CONFIG_DEBUG_LL
|
||||
.set push
|
||||
.set reorder
|
||||
|
||||
la t0, DEBUG_LL_UART_ADDR
|
||||
|
||||
201: lbu t1, UART_LSR(t0) /* get line status */
|
||||
andi t1, t1, UART_LSR_THRE /* check for transmitter empty */
|
||||
beqz t1, 201b /* try again */
|
||||
|
||||
sb a0, UART_THR(t0) /* write the character */
|
||||
|
||||
.set pop
|
||||
#endif /* CONFIG_DEBUG_LL */
|
||||
.endm
|
||||
|
||||
/*
|
||||
* output a character
|
||||
*/
|
||||
.macro debug_ll_ns16550_outc chr
|
||||
#ifdef CONFIG_DEBUG_LL
|
||||
li a0, \chr
|
||||
la t0, DEBUG_LL_UART_ADDR
|
||||
|
||||
1: lbu t1, UART_LSR(t0) /* get line status */
|
||||
nop
|
||||
andi t1, t1, UART_LSR_THRE /* check for transmitter empty */
|
||||
beqz t1, 1b /* try again */
|
||||
nop
|
||||
|
||||
sb a0, UART_THR(t0) /* write the character */
|
||||
debug_ll_ns16550_outc_a0
|
||||
#endif /* CONFIG_DEBUG_LL */
|
||||
.endm
|
||||
|
||||
|
|
@ -110,6 +124,80 @@ static __inline__ void PUTC_LL(char ch)
|
|||
debug_ll_ns16550_outc '\n'
|
||||
#endif /* CONFIG_DEBUG_LL */
|
||||
.endm
|
||||
|
||||
/*
|
||||
* output a 32-bit value in hex
|
||||
*/
|
||||
.macro debug_ll_ns16550_outhexw
|
||||
#ifdef CONFIG_DEBUG_LL
|
||||
.set push
|
||||
.set reorder
|
||||
|
||||
move t6, a0
|
||||
li t5, 32
|
||||
|
||||
202:
|
||||
addi t5, t5, -4
|
||||
srlv a0, t6, t5
|
||||
|
||||
/* output one hex digit */
|
||||
andi a0, a0, 15
|
||||
blt a0, 10, 203f
|
||||
|
||||
addi a0, a0, ('a' - '9' - 1)
|
||||
|
||||
203:
|
||||
addi a0, a0, '0'
|
||||
|
||||
debug_ll_ns16550_outc_a0
|
||||
|
||||
bgtz t5, 202b
|
||||
|
||||
.set pop
|
||||
#endif /* CONFIG_DEBUG_LL */
|
||||
.endm
|
||||
|
||||
/*
|
||||
* check character in input buffer
|
||||
* return value:
|
||||
* v0 = 0 no character in input buffer
|
||||
* v0 != 0 character in input buffer
|
||||
*/
|
||||
.macro debug_ll_ns16550_check_char
|
||||
#ifdef CONFIG_DEBUG_LL
|
||||
.set push
|
||||
.set reorder
|
||||
|
||||
la t0, DEBUG_LL_UART_ADDR
|
||||
|
||||
/* get line status and check for data present */
|
||||
lbu t1, UART_LSR(t0)
|
||||
andi v0, t1, UART_LSR_DR
|
||||
|
||||
.set pop
|
||||
#endif /* CONFIG_DEBUG_LL */
|
||||
.endm
|
||||
|
||||
/*
|
||||
* get character to v0
|
||||
*/
|
||||
.macro debug_ll_ns16550_getc
|
||||
#ifdef CONFIG_DEBUG_LL
|
||||
.set push
|
||||
.set reorder
|
||||
|
||||
204:
|
||||
debug_ll_ns16550_check_char
|
||||
|
||||
/* try again */
|
||||
beqz v0, 204b
|
||||
|
||||
/* read a character */
|
||||
lbu v0, UART_RBR(t0)
|
||||
|
||||
.set pop
|
||||
#endif /* CONFIG_DEBUG_LL */
|
||||
.endm
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* __INCLUDE_MIPS_ASM_DEBUG_LL_NS16550_H__ */
|
||||
|
|
|
|||
|
|
@ -28,6 +28,28 @@
|
|||
#include <generated/compile.h>
|
||||
#include <generated/utsrelease.h>
|
||||
|
||||
.macro pbl_sleep reg count
|
||||
.set push
|
||||
.set noreorder
|
||||
li \reg, \count
|
||||
254:
|
||||
bgtz \reg, 254b
|
||||
addi \reg, -1
|
||||
.set pop
|
||||
.endm
|
||||
|
||||
.macro pbl_probe_mem ret1 ret2 addr
|
||||
.set push
|
||||
.set noreorder
|
||||
la \ret1, \addr
|
||||
sw zero, 0(\ret1)
|
||||
li \ret2, 0x12345678
|
||||
sw \ret2, 0(\ret1)
|
||||
lw \ret2, 0(\ret1)
|
||||
li \ret1, 0x12345678
|
||||
.set pop
|
||||
.endm
|
||||
|
||||
/*
|
||||
* ADR macro instruction (inspired by ARM)
|
||||
*
|
||||
|
|
@ -41,15 +63,13 @@
|
|||
.set push
|
||||
.set noreorder
|
||||
move \temp, ra # preserve ra beforehand
|
||||
bal _pc
|
||||
bal 255f
|
||||
nop
|
||||
_pc: addiu \rd, ra, \label - _pc # label is assumed to be
|
||||
255: addiu \rd, ra, \label - 255b # label is assumed to be
|
||||
move ra, \temp # within pc +/- 32KB
|
||||
.set pop
|
||||
.endm
|
||||
|
||||
#define LONGSIZE 4
|
||||
|
||||
.macro copy_to_link_location start_addr
|
||||
.set push
|
||||
.set noreorder
|
||||
|
|
@ -99,6 +119,22 @@ copy_loop_exit:
|
|||
.set pop
|
||||
.endm
|
||||
|
||||
.macro mips_barebox_10h
|
||||
.set push
|
||||
.set noreorder
|
||||
|
||||
b 1f
|
||||
nop
|
||||
|
||||
.org 0x10
|
||||
.ascii "barebox " UTS_RELEASE " " UTS_VERSION
|
||||
.byte 0
|
||||
|
||||
.align 4
|
||||
1:
|
||||
.set pop
|
||||
.endm
|
||||
|
||||
/*
|
||||
* Dominic Sweetman, See MIPS Run, Morgan Kaufmann, 2nd edition, 2006
|
||||
*
|
||||
|
|
|
|||
|
|
@ -0,0 +1,270 @@
|
|||
/*
|
||||
* nano-monitor for MIPS CPU
|
||||
*
|
||||
* Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com>
|
||||
*
|
||||
* This file is part of barebox.
|
||||
* See file CREDITS for list of people who contributed to this project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2
|
||||
* as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <board/debug_ll.h>
|
||||
#include <asm/debug_ll_ns16550.h>
|
||||
|
||||
#define CODE_ESC 0x1b
|
||||
|
||||
/*
|
||||
* Delay slot warning!
|
||||
*
|
||||
* NMON was made with code portability in mind.
|
||||
* So it uses '.set reorder' directives allowing
|
||||
* assembler to insert necessary 'nop' instructions
|
||||
* into delay slots (after branch instruction) and
|
||||
* into load delay slot (after memory load instruction
|
||||
* on very old R2000/R3000 processors).
|
||||
*/
|
||||
|
||||
.macro nmon_outs msg
|
||||
.set push
|
||||
.set reorder
|
||||
|
||||
ADR a1, \msg, t1
|
||||
|
||||
bal _nmon_outs
|
||||
|
||||
.set pop
|
||||
.endm
|
||||
|
||||
|
||||
.macro mips_nmon
|
||||
.set push
|
||||
.set reorder
|
||||
|
||||
#ifdef CONFIG_NMON
|
||||
#ifdef CONFIG_NMON_USER_START
|
||||
|
||||
#if CONFIG_NMON_USER_START_DELAY < 1
|
||||
#error CONFIG_NMON_USER_START_DELAY must be >= 1!
|
||||
#endif
|
||||
|
||||
nmon_outs msg_nmon_press_any_key
|
||||
|
||||
li s0, CONFIG_NMON_USER_START_DELAY
|
||||
move s1, s0
|
||||
|
||||
1:
|
||||
li a0, '.'
|
||||
bal _nmon_outc_a0
|
||||
addi s1, s1, -1
|
||||
bnez s1, 1b
|
||||
|
||||
move s1, s0
|
||||
|
||||
nmon_wait_user:
|
||||
pbl_sleep s2, CONFIG_NMON_1S_DELAY
|
||||
|
||||
nmon_outs msg_bsp
|
||||
|
||||
debug_ll_ns16550_check_char
|
||||
|
||||
bnez v0, 3f
|
||||
|
||||
addi s1, s1, -1
|
||||
bnez s1, nmon_wait_user
|
||||
|
||||
nmon_outs msg_skipping_nmon
|
||||
|
||||
b nmon_exit
|
||||
|
||||
msg_nmon_press_any_key:
|
||||
.asciz "\r\npress any key to start nmon\r\n"
|
||||
|
||||
.align 4
|
||||
3:
|
||||
/* get received char from ns16550's buffer */
|
||||
debug_ll_ns16550_getc
|
||||
#endif /* CONFIG_NMON_USER_START */
|
||||
|
||||
nmon_main_help:
|
||||
#ifdef CONFIG_NMON_HELP
|
||||
nmon_outs msg_nmon_help
|
||||
#endif /* CONFIG_NMON_HELP */
|
||||
|
||||
nmon_main:
|
||||
nmon_outs msg_prompt
|
||||
|
||||
debug_ll_ns16550_getc
|
||||
|
||||
/* prepare a0 for debug_ll_ns16550_outc_a0 */
|
||||
move a0, v0
|
||||
|
||||
li v1, 'q'
|
||||
bne v0, v1, 3f
|
||||
|
||||
bal _nmon_outc_a0
|
||||
|
||||
b nmon_exit
|
||||
|
||||
3:
|
||||
li v1, 'd'
|
||||
beq v0, v1, nmon_cmd_d
|
||||
|
||||
li v1, 'w'
|
||||
beq v0, v1, nmon_cmd_w
|
||||
|
||||
li v1, 'g'
|
||||
beq v0, v1, nmon_cmd_g
|
||||
|
||||
b nmon_main_help
|
||||
|
||||
nmon_cmd_d:
|
||||
bal _nmon_outc_a0
|
||||
|
||||
li a0, ' '
|
||||
bal _nmon_outc_a0
|
||||
|
||||
bal _nmon_gethexw
|
||||
|
||||
nmon_outs msg_nl
|
||||
|
||||
lw a0, (v0)
|
||||
debug_ll_ns16550_outhexw
|
||||
|
||||
b nmon_main
|
||||
|
||||
nmon_cmd_w:
|
||||
bal _nmon_outc_a0
|
||||
|
||||
li a0, ' '
|
||||
bal _nmon_outc_a0
|
||||
bal _nmon_gethexw
|
||||
move s0, v0
|
||||
|
||||
li a0, ' '
|
||||
bal _nmon_outc_a0
|
||||
bal _nmon_gethexw
|
||||
|
||||
sw v0, (s0)
|
||||
b nmon_main
|
||||
|
||||
nmon_cmd_g:
|
||||
bal _nmon_outc_a0
|
||||
|
||||
li a0, ' '
|
||||
bal _nmon_outc_a0
|
||||
|
||||
bal _nmon_gethexw
|
||||
|
||||
nmon_outs msg_nl
|
||||
|
||||
jal v0
|
||||
b nmon_main
|
||||
|
||||
_nmon_outc_a0:
|
||||
debug_ll_ns16550_outc_a0
|
||||
jr ra
|
||||
|
||||
_nmon_outs:
|
||||
lbu a0, 0(a1)
|
||||
addi a1, a1, 1
|
||||
beqz a0, _nmon_jr_ra_exit
|
||||
|
||||
debug_ll_ns16550_outc_a0
|
||||
|
||||
b _nmon_outs
|
||||
|
||||
_nmon_gethexw:
|
||||
|
||||
li t3, 8
|
||||
li t2, 0
|
||||
|
||||
_get_hex_digit:
|
||||
debug_ll_ns16550_getc
|
||||
|
||||
li v1, CODE_ESC
|
||||
beq v0, v1, nmon_main
|
||||
|
||||
li v1, '0'
|
||||
bge v0, v1, 0f
|
||||
b _get_hex_digit
|
||||
|
||||
0:
|
||||
li v1, '9'
|
||||
ble v0, v1, 9f
|
||||
|
||||
li v1, 'f'
|
||||
ble v0, v1, 1f
|
||||
b _get_hex_digit
|
||||
|
||||
1:
|
||||
li v1, 'a'
|
||||
bge v0, v1, 8f
|
||||
|
||||
b _get_hex_digit
|
||||
|
||||
8: /* v0 \in {'a', 'b' ... 'f'} */
|
||||
sub a3, v0, v1
|
||||
addi a3, 0xa
|
||||
b 0f
|
||||
|
||||
9: /* v0 \in {'0', '1' ... '9'} */
|
||||
li a3, '0'
|
||||
sub a3, v0, a3
|
||||
|
||||
0: move a0, v0
|
||||
debug_ll_ns16550_outc_a0
|
||||
|
||||
sll t2, t2, 4
|
||||
or t2, t2, a3
|
||||
sub t3, t3, 1
|
||||
|
||||
beqz t3, 0f
|
||||
|
||||
b _get_hex_digit
|
||||
|
||||
0:
|
||||
move v0, t2
|
||||
|
||||
_nmon_jr_ra_exit:
|
||||
jr ra
|
||||
|
||||
msg_prompt:
|
||||
.asciz "\r\nnmon> "
|
||||
|
||||
msg_nl:
|
||||
.asciz "\r\n"
|
||||
|
||||
msg_bsp:
|
||||
.asciz "\b \b"
|
||||
|
||||
msg_skipping_nmon:
|
||||
.asciz "skipping nmon..."
|
||||
|
||||
#ifdef CONFIG_NMON_HELP
|
||||
msg_nmon_help:
|
||||
.ascii "\r\n\r\nnmon commands:\r\n"
|
||||
.ascii " q - quit\r\n"
|
||||
.ascii " d <addr> - read 32-bit word from <addr>\r\n"
|
||||
.ascii " w <addr> <val> - write 32-bit word to <addr>\r\n"
|
||||
.ascii " g <addr> - jump to <addr>\r\n"
|
||||
.asciz " use <ESC> key to interrupt current command\r\n"
|
||||
#endif /* CONFIG_NMON_HELP */
|
||||
|
||||
.align 4
|
||||
|
||||
nmon_exit:
|
||||
|
||||
nmon_outs msg_nl
|
||||
|
||||
#endif /* CONFIG_NMON */
|
||||
.set pop
|
||||
.endm
|
||||
|
|
@ -9,6 +9,8 @@ choice
|
|||
|
||||
config BOARD_NETGEAR_WG102
|
||||
bool "Netgear WG102"
|
||||
select HAVE_PBL_IMAGE
|
||||
select HAVE_IMAGE_COMPRESSION
|
||||
|
||||
endchoice
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,27 @@
|
|||
/*
|
||||
* Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com>
|
||||
*
|
||||
* This file is part of barebox.
|
||||
* See file CREDITS for list of people who contributed to this project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2
|
||||
* as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __MACH_AR231X_DEBUG_LL__
|
||||
#define __MACH_AR231X_DEBUG_LL__
|
||||
|
||||
/** @file
|
||||
* This File contains declaration for early output support
|
||||
*/
|
||||
#include <board/debug_ll.h>
|
||||
#include <asm/debug_ll_ns16550.h>
|
||||
|
||||
#endif /* __MACH_AR231X_DEBUG_LL__ */
|
||||
|
|
@ -0,0 +1,177 @@
|
|||
#ifndef __ASM_MACH_AR2312_PBL_MACROS_H
|
||||
#define __ASM_MACH_AR2312_PBL_MACROS_H
|
||||
|
||||
#include <asm/regdef.h>
|
||||
#include <mach/ar2312_regs.h>
|
||||
|
||||
.macro pbl_ar2312_pll
|
||||
.set push
|
||||
.set noreorder
|
||||
|
||||
mfc0 k0, CP0_STATUS
|
||||
li k1, ST0_NMI
|
||||
and k1, k1, k0
|
||||
bnez k1, pllskip
|
||||
nop
|
||||
|
||||
/* Clear any prior AHB errors by reading both addr registers */
|
||||
li t0, KSEG1 | AR2312_PROCADDR
|
||||
lw zero, 0(t0)
|
||||
li t0, KSEG1 | AR2312_DMAADDR
|
||||
lw zero, 0(t0)
|
||||
|
||||
pbl_sleep t2, 4000
|
||||
|
||||
li t0, KSEG1 | AR2312_CLOCKCTL2
|
||||
lw t1, (t0)
|
||||
bgez t1, pllskip /* upper bit guaranteed non-0 at reset */
|
||||
nop
|
||||
|
||||
/* For Viper 0xbc003064 register has to be programmed with 0x91000 to
|
||||
* get 180Mhz Processor clock
|
||||
* Set /2 clocking and turn OFF AR2312_CLOCKCTL2_STATUS_PLL_BYPASS.
|
||||
* Processor RESETs at this point; the CLOCKCTL registers retain
|
||||
* their new values across the reset.
|
||||
*/
|
||||
|
||||
li t0, KSEG1 | AR2312_CLOCKCTL1
|
||||
li t1, AR2313_CLOCKCTL1_SELECTION
|
||||
sw t1, (t0)
|
||||
|
||||
li t0, KSEG1 | AR2312_CLOCKCTL2
|
||||
li t1, AR2312_CLOCKCTL2_WANT_RESET
|
||||
sw t1, (t0) /* reset CPU */
|
||||
1: b 1b /* NOTREACHED */
|
||||
nop
|
||||
pllskip:
|
||||
|
||||
.set pop
|
||||
.endm
|
||||
|
||||
.macro pbl_ar2312_rst_uart0
|
||||
.set push
|
||||
.set noreorder
|
||||
|
||||
li a0, KSEG1 | AR2312_RESET
|
||||
lw t0, 0(a0)
|
||||
and t0, ~AR2312_RESET_APB
|
||||
or t0, AR2312_RESET_UART0
|
||||
sw t0, 0(a0)
|
||||
lw zero, 0(a0) /* flush */
|
||||
|
||||
and t0, ~AR2312_RESET_UART0
|
||||
sw t0, 0(a0)
|
||||
lw zero, 0(a0) /* flush */
|
||||
|
||||
1: /* Use internal clocking */
|
||||
li a0, KSEG1 | AR2312_CLOCKCTL0
|
||||
lw t0, 0(a0)
|
||||
and t0, ~AR2312_CLOCKCTL_UART0
|
||||
sw t0, 0(a0)
|
||||
|
||||
.set pop
|
||||
.endm
|
||||
|
||||
.macro pbl_ar2312_x16_sdram
|
||||
.set push
|
||||
.set noreorder
|
||||
|
||||
li a0, KSEG1 | AR2312_MEM_CFG0
|
||||
li a1, KSEG1 | AR2312_MEM_CFG1
|
||||
li a2, KSEG1 | AR2312_MEM_REF
|
||||
|
||||
li a3, MEM_CFG1_E0 | (MEM_CFG1_AC_128 << MEM_CFG1_AC0_S)
|
||||
|
||||
/* Set the I and M bits to issue an SDRAM nop */
|
||||
ori t0, a3, MEM_CFG1_M | MEM_CFG1_I
|
||||
sw t0, 0(a1) /* AR2312_MEM_CFG1 */
|
||||
|
||||
pbl_sleep t2, 50
|
||||
|
||||
/* Reset the M bit to issue an SDRAM PRE-ALL */
|
||||
ori t0, a3, MEM_CFG1_I
|
||||
sw t0, 0(a1) /* AR2312_MEM_CFG1 */
|
||||
sync
|
||||
|
||||
/* Generate a refresh every 16 clocks (spec says 10) */
|
||||
li t0, 16 /* very fast refresh for now */
|
||||
sw t0, 0(a2) /* AR2312_MEM_REF */
|
||||
|
||||
pbl_sleep t2, 5
|
||||
|
||||
/* Set command write mode, and read SDRAM */
|
||||
ori t0, a3, MEM_CFG1_M
|
||||
sw t0, 0(a1) /* AR2312_MEM_CFG1 */
|
||||
sync
|
||||
|
||||
li t0, KSEG1 | AR2312_SDRAM0
|
||||
or t0, 0x23000 /* 16bit burst */
|
||||
lw zero, 0(t0)
|
||||
|
||||
/* Program configuration register */
|
||||
li t0, MEM_CFG0_C | MEM_CFG0_C2 | MEM_CFG0_R1 | \
|
||||
MEM_CFG0_B0 | MEM_CFG0_X
|
||||
sw t0, 0(a0) /* AR2312_MEM_CFG0 */
|
||||
sync
|
||||
|
||||
li t0, AR2312_SDRAM_MEMORY_REFRESH_VALUE
|
||||
sw t0, 0(a2) /* AR2312_MEM_REF */
|
||||
sync
|
||||
|
||||
/* Clear I and M and set cfg1 to the normal operational value */
|
||||
sw a3, 0(a1) /* AR2312_MEM_CFG1 */
|
||||
sync
|
||||
|
||||
pbl_sleep t2, 10
|
||||
|
||||
/* Now we need to set size of RAM to prevent some wired errors.
|
||||
* Since I do not have access to any board with two SDRAM chips, or
|
||||
* any was registered in the wild - we will support only one. */
|
||||
/* So, lets find the beef */
|
||||
li a0, KSEG1 | AR2312_MEM_CFG1
|
||||
li a1, KSEG1 | AR2312_SDRAM0
|
||||
li a2, 0xdeadbeef
|
||||
li t0, 0x200000
|
||||
li t1, MEM_CFG1_AC_2
|
||||
|
||||
/* We will write some magic word to the beginning of RAM,
|
||||
* and see if it appears somewhere else. If yes, we made
|
||||
* a travel around the world. */
|
||||
|
||||
/* But first of all save original state of the first RAM word. */
|
||||
lw a3, 0(a1)
|
||||
sw a2, 0(a1)
|
||||
|
||||
find_the_beef:
|
||||
or t2, a1, t0
|
||||
lw t3, 0(t2)
|
||||
beq a2, t3, 1f
|
||||
nop
|
||||
sll t0, 1
|
||||
add t1, 1
|
||||
/* we should have some limit here. */
|
||||
blt t1, MEM_CFG1_AC_64, find_the_beef
|
||||
nop
|
||||
b make_beefsteak
|
||||
nop
|
||||
|
||||
/* additional paranoid check */
|
||||
1:
|
||||
sw zero, 0(a1)
|
||||
lw t3, 0(t2)
|
||||
bne zero, t3, find_the_beef
|
||||
nop
|
||||
|
||||
make_beefsteak:
|
||||
/* create new config for AR2312_MEM_CFG1 and overwrite it */
|
||||
sll t1, MEM_CFG1_AC0_S
|
||||
or t2, t1, MEM_CFG1_E0
|
||||
sw t2, 0(a0) /* AR2312_MEM_CFG1 */
|
||||
|
||||
/* restore original state of the first RAM word */
|
||||
sw a3, 0(a1)
|
||||
|
||||
.set pop
|
||||
.endm
|
||||
|
||||
#endif /* __ASM_MACH_AR2312_PBL_MACROS_H */
|
||||
|
|
@ -11,6 +11,7 @@ config BOARD_QEMU_MALTA
|
|||
bool "qemu malta"
|
||||
select HAVE_PBL_IMAGE
|
||||
select HAVE_IMAGE_COMPRESSION
|
||||
select HAS_NMON
|
||||
|
||||
endchoice
|
||||
|
||||
|
|
|
|||
|
|
@ -18,11 +18,10 @@
|
|||
/** @file
|
||||
* This File contains declaration for early output support
|
||||
*/
|
||||
#ifndef __INCLUDE_ARCH_DEBUG_LL_H__
|
||||
#define __INCLUDE_ARCH_DEBUG_LL_H__
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#ifndef __MACH_MALTA_DEBUG_LL_H__
|
||||
#define __MACH_MALTA_DEBUG_LL_H__
|
||||
|
||||
#include <board/debug_ll.h>
|
||||
#include <asm/debug_ll_ns16550.h>
|
||||
|
||||
#endif /* __INCLUDE_ARCH_DEBUG_LL_H__ */
|
||||
#endif /* __MACH_MALTA_DEBUG_LL_H__ */
|
||||
|
|
|
|||
|
|
@ -18,9 +18,7 @@
|
|||
#ifndef __INCLUDE_ARCH_HARDWARE_H__
|
||||
#define __INCLUDE_ARCH_HARDWARE_H__
|
||||
|
||||
#define DEBUG_LL_UART_ADDR 0xb00003f8
|
||||
#define DEBUG_LL_UART_SHIFT 0
|
||||
#define DEBUG_LL_UART_DIVISOR 1 /* no matter for emulated port */
|
||||
#define MALTA_PIIX4_UART0 0xb00003f8
|
||||
|
||||
/*
|
||||
* Reset register.
|
||||
|
|
|
|||
Loading…
Reference in New Issue