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ARM: mvebu: Simplify memory init order 

The initialisation of the memory nodes on mvebu is a bit
compilcated:

pure_initcall(mvebu_memory_fixup_register)
	of_register_fixup(mvebu_memory_of_fixup, NULL)
core_initcall(kirkwood_init_soc)
	mvebu_set_memory()
core_initcall(of_arm_init)
	of_fix_tree()
		mvebu_memory_of_fixup()

First a mvebu common of_fixup function is registered, then the SoC
calls mvebu_set_memory which stores the memory base and size in global
variables. Afterwards the of_fixup is executed which fixes the memory
nodes according to the global variables.

Instead register a SoC specific fixup which directly calls mvebu_set_memory
with the memory base and size as arguments:

pure_initcall(kirkwood_register_soc_fixup);
	of_register_fixup(kirkwood_init_soc, NULL);
core_initcall(of_arm_init)
	of_fix_tree()
		kirkwood_init_soc()
			mvebu_set_memory(phys_base, phys_size);

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer 2014-09-17 22:22:41 +02:00
parent 561dfebb4b
commit 295f0b23b5
5 changed files with 39 additions and 37 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
arch/arm/mach-mvebu/armada-370-xp.c
View File

@ -52,7 +52,7 @@ static void __noreturn armada_370_xp_reset_cpu(unsigned long addr)
;
}
static int armada_370_xp_init_soc(void)
static int armada_370_xp_init_soc(struct device_node *root, void *context)
{
unsigned long phys_base, phys_size;
u32 reg;
@ -70,9 +70,14 @@ static int armada_370_xp_init_soc(void)
armada_370_xp_memory_find(&phys_base, &phys_size);
mvebu_set_memory(phys_base, phys_size);
mvebu_mbus_add_range("marvell,armada-370-xp", 0xf0, 0x01,
MVEBU_REMAP_INT_REG_BASE);
return 0;
}
core_initcall(armada_370_xp_init_soc);
static int armada_370_xp_register_soc_fixup(void)
{
mvebu_mbus_add_range("marvell,armada-370-xp", 0xf0, 0x01,
MVEBU_REMAP_INT_REG_BASE);
return of_register_fixup(armada_370_xp_init_soc, NULL);
}
pure_initcall(armada_370_xp_register_soc_fixup);

35
arch/arm/mach-mvebu/common.c
View File

@ -81,29 +81,21 @@ static int mvebu_soc_id_init(void)
}
postcore_initcall(mvebu_soc_id_init);
static u64 mvebu_mem[2];
void mvebu_set_memory(u64 phys_base, u64 phys_size)
{
mvebu_mem[0] = phys_base;
mvebu_mem[1] = phys_size;
}
/*
* Memory size is set up by BootROM and can be read from SoC's ram controller
* registers. Fixup provided DTs to reflect accessible amount of directly
* attached RAM. Removable RAM, e.g. SODIMM, should be added by a per-board
* fixup.
*/
static int mvebu_memory_of_fixup(struct device_node *root, void *context)
int mvebu_set_memory(u64 phys_base, u64 phys_size)
{
struct device_node *np;
struct device_node *np, *root;
__be32 reg[4];
int na, ns;
/* bail out on zero-sized mem */
if (!mvebu_mem[1])
return -ENODEV;
root = of_get_root_node();
if (!root)
return -EINVAL;
np = of_find_node_by_path("/memory");
if (!np)
@ -115,17 +107,17 @@ static int mvebu_memory_of_fixup(struct device_node *root, void *context)
ns = of_n_size_cells(np);
if (na == 2) {
reg[0] = cpu_to_be32(mvebu_mem[0] >> 32);
reg[1] = cpu_to_be32(mvebu_mem[0] & 0xffffffff);
reg[0] = cpu_to_be32(phys_base >> 32);
reg[1] = cpu_to_be32(phys_base & 0xffffffff);
} else {
reg[0] = cpu_to_be32(mvebu_mem[0] & 0xffffffff);
reg[0] = cpu_to_be32(phys_base & 0xffffffff);
}
if (ns == 2) {
reg[2] = cpu_to_be32(mvebu_mem[1] >> 32);
reg[3] = cpu_to_be32(mvebu_mem[1] & 0xffffffff);
reg[2] = cpu_to_be32(phys_size >> 32);
reg[3] = cpu_to_be32(phys_size & 0xffffffff);
} else {
reg[1] = cpu_to_be32(mvebu_mem[1] & 0xffffffff);
reg[1] = cpu_to_be32(phys_size & 0xffffffff);
}
if (of_set_property(np, "device_type", "memory", sizeof("memory"), 1) ||
@ -135,11 +127,6 @@ static int mvebu_memory_of_fixup(struct device_node *root, void *context)
return 0;
}
static int mvebu_memory_fixup_register(void) {
return of_register_fixup(mvebu_memory_of_fixup, NULL);
}
pure_initcall(mvebu_memory_fixup_register);
static __noreturn void (*mvebu_reset_cpu)(unsigned long addr);
void __noreturn reset_cpu(unsigned long addr)

13
arch/arm/mach-mvebu/dove.c
View File

@ -77,7 +77,7 @@ static void __noreturn dove_reset_cpu(unsigned long addr)
;
}
static int dove_init_soc(void)
static int dove_init_soc(struct device_node *root, void *context)
{
unsigned long phys_base, phys_size;
@ -90,11 +90,16 @@ static int dove_init_soc(void)
dove_memory_find(&phys_base, &phys_size);
mvebu_set_memory(phys_base, phys_size);
return 0;
}
static int dove_register_soc_fixup(void)
{
mvebu_mbus_add_range("marvell,dove", 0xf0, 0x01,
MVEBU_REMAP_INT_REG_BASE);
mvebu_mbus_add_range("marvell,dove", 0xf0, 0x02,
DOVE_REMAP_MC_REGS);
return 0;
return of_register_fixup(dove_init_soc, NULL);
}
core_initcall(dove_init_soc);
pure_initcall(dove_register_soc_fixup);

2
arch/arm/mach-mvebu/include/mach/common.h
View File

@ -20,7 +20,7 @@
#define MVEBU_REMAP_INT_REG_BASE 0xf1000000
void mvebu_set_memory(u64 phys_base, u64 phys_size);
int mvebu_set_memory(u64 phys_base, u64 phys_size);
void mvebu_set_reset(void __noreturn (*reset)(unsigned long addr));
#endif

13
arch/arm/mach-mvebu/kirkwood.c
View File

@ -51,7 +51,7 @@ static void __noreturn kirkwood_reset_cpu(unsigned long addr)
;
}
static int kirkwood_init_soc(void)
static int kirkwood_init_soc(struct device_node *root, void *context)
{
unsigned long phys_base, phys_size;
@ -63,9 +63,14 @@ static int kirkwood_init_soc(void)
kirkwood_memory_find(&phys_base, &phys_size);
mvebu_set_memory(phys_base, phys_size);
mvebu_mbus_add_range("marvell,kirkwood", 0xf0, 0x01,
MVEBU_REMAP_INT_REG_BASE);
return 0;
}
core_initcall(kirkwood_init_soc);
static int kirkwood_register_soc_fixup(void)
{
mvebu_mbus_add_range("marvell,kirkwood", 0xf0, 0x01,
MVEBU_REMAP_INT_REG_BASE);
return of_register_fixup(kirkwood_init_soc, NULL);
}
pure_initcall(kirkwood_register_soc_fixup);