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clk: gate: add CLK_GATE_HIWORD_MASK flag 

Clock gates having the CLK_GATE_HIWORD_MASK flag set use the upper 16
bits of the register as a "write enable" mask for the value in the
lower 16 bits.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Beniamino Galvani 2014-04-27 11:30:40 +02:00 committed by Sascha Hauer
parent b80f5d5800
commit 298ecc5860
2 changed files with 13 additions and 5 deletions
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17
drivers/clk/clk-gate.c
View File

@ -37,12 +37,19 @@ static void clk_gate_endisable(struct clk *clk, int enable)
u32 val;
set ^= enable;
val = readl(gate->reg);
if (set)
val |= BIT(gate->shift);
else
val &= ~BIT(gate->shift);
if (gate->flags & CLK_GATE_HIWORD_MASK) {
val = BIT(gate->shift + 16);
if (set)
val |= BIT(gate->shift);
} else {
val = readl(gate->reg);
if (set)
val |= BIT(gate->shift);
else
val &= ~BIT(gate->shift);
}
writel(val, gate->reg);
}

1
include/linux/clk.h
View File

@ -200,6 +200,7 @@ static inline int clk_set_rate(struct clk *clk, unsigned long rate)
#define CLK_SET_RATE_PARENT (1 << 0) /* propagate rate change up one level */
#define CLK_GATE_INVERTED (1 << 0)
#define CLK_GATE_HIWORD_MASK (1 << 1)
struct clk_ops {
int (*enable)(struct clk *clk);