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i.MX: fec: Enable all clocks specified for FEC

For some i.MX variants more than just "ipg" clock need to be enabled for
Ethernet to function, so change the code to enable all of the clock
defined for FEC node (this is what analogous Linux driver does as well).

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Andrey Smirnov 2016-11-09 08:14:14 -08:00 committed by Sascha Hauer
parent e8371faca1
commit 2de277264c
2 changed files with 70 additions and 11 deletions

View File

@ -51,7 +51,7 @@ static int fec_miibus_read(struct mii_bus *bus, int phyAddr, int regAddr)
uint32_t phy; /* convenient holder for the PHY */
uint64_t start;
writel(((clk_get_rate(fec->clk) >> 20) / 5) << 1,
writel(((clk_get_rate(fec->clk[FEC_CLK_IPG]) >> 20) / 5) << 1,
fec->regs + FEC_MII_SPEED);
/*
* reading from any PHY's register is done by properly
@ -94,7 +94,7 @@ static int fec_miibus_write(struct mii_bus *bus, int phyAddr,
uint32_t phy; /* convenient holder for the PHY */
uint64_t start;
writel(((clk_get_rate(fec->clk) >> 20) / 5) << 1,
writel(((clk_get_rate(fec->clk[FEC_CLK_IPG]) >> 20) / 5) << 1,
fec->regs + FEC_MII_SPEED);
reg = regAddr << FEC_MII_DATA_RA_SHIFT;
@ -287,7 +287,7 @@ static int fec_init(struct eth_device *dev)
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
*/
writel(((clk_get_rate(fec->clk) >> 20) / 5) << 1,
writel(((clk_get_rate(fec->clk[FEC_CLK_IPG]) >> 20) / 5) << 1,
fec->regs + FEC_MII_SPEED);
if (fec->interface == PHY_INTERFACE_MODE_RMII) {
@ -651,6 +651,59 @@ static int fec_probe_dt(struct device_d *dev, struct fec_priv *fec)
return -ENODEV;
}
#endif
static int fec_clk_enable(struct fec_priv *fec)
{
int i;
for (i = 0; i < ARRAY_SIZE(fec->clk); i++) {
const int err = clk_enable(fec->clk[i]);
if (err < 0)
return err;
}
return 0;
}
static void fec_clk_disable(struct fec_priv *fec)
{
int i;
for (i = 0; i < ARRAY_SIZE(fec->clk); i++) {
if (!IS_ERR_OR_NULL(fec->clk[i]))
clk_disable(fec->clk[i]);
}
}
static void fec_clk_put(struct fec_priv *fec)
{
int i;
for (i = 0; i < ARRAY_SIZE(fec->clk); i++) {
if (!IS_ERR_OR_NULL(fec->clk[i]))
clk_put(fec->clk[i]);
}
}
static int fec_clk_get(struct fec_priv *fec)
{
int i, err = 0;
static const char *clk_names[ARRAY_SIZE(fec->clk)] = {
"ipg", "ahb", "ptp"
};
for (i = 0; i < ARRAY_SIZE(fec->clk); i++) {
fec->clk[i] = clk_get(fec->edev.parent, clk_names[i]);
if (IS_ERR(fec->clk[i])) {
err = PTR_ERR(fec->clk[i]);
fec_clk_put(fec);
break;
}
}
return err;
}
static int fec_probe(struct device_d *dev)
{
struct resource *iores;
@ -681,13 +734,11 @@ static int fec_probe(struct device_d *dev)
edev->set_ethaddr = fec_set_hwaddr;
edev->parent = dev;
fec->clk = clk_get(dev, NULL);
if (IS_ERR(fec->clk)) {
ret = PTR_ERR(fec->clk);
ret = fec_clk_get(fec);
if (ret < 0)
goto err_free;
}
ret = clk_enable(fec->clk);
ret = fec_clk_enable(fec);
if (ret < 0)
goto put_clk;
@ -787,9 +838,9 @@ free_gpio:
release_res:
release_region(iores);
disable_clk:
clk_disable(fec->clk);
fec_clk_disable(fec);
put_clk:
clk_put(fec->clk);
fec_clk_put(fec);
err_free:
free(fec);
return ret;

View File

@ -129,6 +129,14 @@ enum fec_type {
FEC_TYPE_IMX6,
};
enum fec_clock {
FEC_CLK_IPG,
FEC_CLK_AHB,
FEC_CLK_PTP,
FEC_CLK_NUM
};
/**
* @brief i.MX27-FEC private structure
*/
@ -144,7 +152,7 @@ struct fec_priv {
u32 phy_flags;
struct mii_bus miibus;
void (*phy_init)(struct phy_device *dev);
struct clk *clk;
struct clk *clk[FEC_CLK_NUM];
enum fec_type type;
};