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net: fec: drop sevenwire support 

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer 2013-03-07 22:14:11 +01:00
parent d34aca4c09
commit 31865e8a7f
3 changed files with 67 additions and 93 deletions
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75
drivers/net/fec_imx.c
View File

@ -298,15 +298,14 @@ static int fec_init(struct eth_device *dev)
* Set FEC-Lite receive control register(R_CNTRL):
*/
rcntl = FEC_R_CNTRL_MAX_FL(1518);
if (fec->xcv_type != SEVENWIRE) {
rcntl |= FEC_R_CNTRL_MII_MODE;
/*
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
*/
writel(((fec_clk_get_rate(fec) >> 20) / 5) << 1,
fec->regs + FEC_MII_SPEED);
}
rcntl |= FEC_R_CNTRL_MII_MODE;
/*
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
*/
writel(((fec_clk_get_rate(fec) >> 20) / 5) << 1,
fec->regs + FEC_MII_SPEED);
if (fec->xcv_type == RMII) {
if (fec_is_imx28(fec) || fec_is_imx6(fec)) {
@ -385,16 +384,14 @@ static int fec_open(struct eth_device *edev)
int ret;
u32 ecr;
if (fec->xcv_type != SEVENWIRE) {
ret = phy_device_connect(edev, &fec->miibus, fec->phy_addr,
fec_update_linkspeed, fec->phy_flags,
fec->interface);
if (ret)
return ret;
ret = phy_device_connect(edev, &fec->miibus, fec->phy_addr,
fec_update_linkspeed, fec->phy_flags,
fec->interface);
if (ret)
return ret;
if (fec->phy_init)
fec->phy_init(edev->phydev);
}
if (fec->phy_init)
fec->phy_init(edev->phydev);
/*
* Initialize RxBD/TxBD rings
@ -699,31 +696,27 @@ static int fec_probe(struct device_d *dev)
fec_init(edev);
if (fec->xcv_type != SEVENWIRE) {
fec->miibus.read = fec_miibus_read;
fec->miibus.write = fec_miibus_write;
switch (fec->xcv_type) {
case RMII:
fec->interface = PHY_INTERFACE_MODE_RMII;
break;
case RGMII:
fec->interface = PHY_INTERFACE_MODE_RGMII;
break;
case MII10:
fec->phy_flags = PHYLIB_FORCE_10;
case MII100:
fec->interface = PHY_INTERFACE_MODE_MII;
break;
case SEVENWIRE:
fec->interface = PHY_INTERFACE_MODE_NA;
break;
}
fec->miibus.priv = fec;
fec->miibus.parent = dev;
mdiobus_register(&fec->miibus);
fec->miibus.read = fec_miibus_read;
fec->miibus.write = fec_miibus_write;
switch (fec->xcv_type) {
case RMII:
fec->interface = PHY_INTERFACE_MODE_RMII;
break;
case RGMII:
fec->interface = PHY_INTERFACE_MODE_RGMII;
break;
case MII10:
fec->phy_flags = PHYLIB_FORCE_10;
case MII100:
fec->interface = PHY_INTERFACE_MODE_MII;
break;
}
fec->miibus.priv = fec;
fec->miibus.parent = dev;
mdiobus_register(&fec->miibus);
eth_register(edev);
return 0;

84
drivers/net/fec_mpc5200.c
View File

@ -294,25 +294,17 @@ static int mpc5xxx_fec_init(struct eth_device *dev)
/*
* Set FEC-Lite receive control register(R_CNTRL):
*/
if (fec->xcv_type == SEVENWIRE) {
/*
* Frame length=1518; 7-wire mode
*/
fec->eth->r_cntrl = 0x05ee0020; /*0x05ee0000;FIXME */
} else {
/*
* Frame length=1518; MII mode;
*/
fec->eth->r_cntrl = 0x05ee0024; /*0x05ee0004;FIXME */
}
if (fec->xcv_type != SEVENWIRE) {
/*
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
*/
fec->eth->mii_speed = (((get_ipb_clock() >> 20) / 5) << 1); /* No MII for 7-wire mode */
}
/*
* Frame length=1518; MII mode;
*/
fec->eth->r_cntrl = 0x05ee0024; /*0x05ee0004;FIXME */
/*
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
*/
fec->eth->mii_speed = (((get_ipb_clock() >> 20) / 5) << 1); /* No MII for 7-wire mode */
/*
* Set Opcode/Pause Duration Register
@ -406,12 +398,8 @@ static int mpc5xxx_fec_open(struct eth_device *edev)
*/
SDMA_TASK_ENABLE(FEC_RECV_TASK_NO);
if (fec->xcv_type != SEVENWIRE) {
return phy_device_connect(edev, &fec->miibus, CONFIG_PHY_ADDR,
NULL, fec->phy_flags, fec->interface);
}
return 0;
return phy_device_connect(edev, &fec->miibus, CONFIG_PHY_ADDR,
NULL, fec->phy_flags, fec->interface);
}
static void mpc5xxx_fec_halt(struct eth_device *dev)
@ -511,6 +499,7 @@ static int mpc5xxx_fec_send(struct eth_device *dev, void *eth_data,
*/
mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv;
volatile FEC_TBD *pTbd;
uint16_t phyStatus;
#ifdef DEBUG_FIFO
debug_fifo("tbd status: 0x%04x\n", fec->tbdBase[0].status);
@ -548,10 +537,7 @@ static int mpc5xxx_fec_send(struct eth_device *dev, void *eth_data,
/*
* Kick the MII i/f
*/
if (fec->xcv_type != SEVENWIRE) {
uint16_t phyStatus;
phyStatus = fec5xxx_miibus_read(&fec->miibus, 0, 0x1);
}
phyStatus = fec5xxx_miibus_read(&fec->miibus, 0, 0x1);
/*
* Enable SmartDMA transmit task
@ -676,31 +662,27 @@ int mpc5xxx_fec_probe(struct device_d *dev)
loadtask(0, 2);
if (fec->xcv_type != SEVENWIRE) {
fec->miibus.read = fec5xxx_miibus_read;
fec->miibus.write = fec5xxx_miibus_write;
switch (pdata->xcv_type) {
case RMII:
fec->interface = PHY_INTERFACE_MODE_RMII;
break;
case RGMII:
fec->interface = PHY_INTERFACE_MODE_RGMII;
break;
case MII10:
fec->phy_flags = PHYLIB_FORCE_10;
case MII100:
fec->interface = PHY_INTERFACE_MODE_MII;
break;
case SEVENWIRE:
fec->interface = PHY_INTERFACE_MODE_NA;
break;
}
fec->miibus.priv = fec;
fec->miibus.parent = dev;
mdiobus_register(&fec->miibus);
fec->miibus.read = fec5xxx_miibus_read;
fec->miibus.write = fec5xxx_miibus_write;
switch (pdata->xcv_type) {
case RMII:
fec->interface = PHY_INTERFACE_MODE_RMII;
break;
case RGMII:
fec->interface = PHY_INTERFACE_MODE_RGMII;
break;
case MII10:
fec->phy_flags = PHYLIB_FORCE_10;
case MII100:
fec->interface = PHY_INTERFACE_MODE_MII;
break;
}
fec->miibus.priv = fec;
fec->miibus.parent = dev;
mdiobus_register(&fec->miibus);
eth_register(edev);
return 0;
}

1
include/fec.h
View File

@ -27,7 +27,6 @@
* Supported phy types on this platform
*/
typedef enum {
SEVENWIRE,
MII10,
MII100,
RMII,