video: IPU framebuffer: honor clock and enable polarities
These flags are already parsed from DT, so we can just use them to configure the timings correctly. Signed-off-by: Jan Luebbe <jlu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -128,8 +128,9 @@ int ipu_crtc_mode_set(struct ipufb_info *fbi,
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if (mode->sync & FB_SYNC_VERT_HIGH_ACT)
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sig_cfg.Vsync_pol = 1;
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sig_cfg.enable_pol = 1;
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sig_cfg.clk_pol = 0;
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sig_cfg.enable_pol = !(mode->display_flags & DISPLAY_FLAGS_DE_LOW);
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/* Default to driving pixel data on negative clock edges */
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sig_cfg.clk_pol = !!(mode->display_flags & DISPLAY_FLAGS_PIXDATA_POSEDGE);
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sig_cfg.width = mode->xres;
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sig_cfg.height = mode->yres;
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sig_cfg.h_start_width = mode->left_margin;
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