phylib: add micrel support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Jean-Christophe PLAGNIOL-VILLARD
Sascha Hauer
parent
4a1e4d4b1d
commit
34bcbaa2ba
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@ -8,6 +8,11 @@ if PHYLIB
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comment "MII PHY device drivers"
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config MICREL_PHY
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bool "Driver for Micrel PHYs"
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---help---
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Supports the KSZ9021, VSC8201, KS8001 PHYs.
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config SMSC_PHY
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bool "Drivers for SMSC PHYs"
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---help---
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@ -1,2 +1,3 @@
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obj-y += phy.o mdio_bus.o
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obj-$(CONFIG_MICREL_PHY) += micrel.o
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obj-$(CONFIG_SMSC_PHY) += smsc.o
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@ -0,0 +1,174 @@
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/*
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* drivers/net/phy/micrel.c
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*
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* Driver for Micrel PHYs
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*
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* Author: David J. Choi
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*
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* Copyright (c) 2010 Micrel, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* Support : ksz9021 1000/100/10 phy from Micrel
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* ks8001, ks8737, ks8721, ks8041, ks8051 100/10 phy
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*/
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#include <common.h>
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#include <init.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/phy.h>
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#include <linux/micrel_phy.h>
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/* Operation Mode Strap Override */
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#define MII_KSZPHY_OMSO 0x16
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#define KSZPHY_OMSO_B_CAST_OFF (1 << 9)
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#define KSZPHY_OMSO_RMII_OVERRIDE (1 << 1)
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#define KSZPHY_OMSO_MII_OVERRIDE (1 << 0)
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/* general PHY control reg in vendor specific block. */
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#define MII_KSZPHY_CTRL 0x1F
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/* bitmap of PHY register to set interrupt mode */
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#define KSZPHY_CTRL_INT_ACTIVE_HIGH (1 << 9)
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#define KSZ9021_CTRL_INT_ACTIVE_HIGH (1 << 14)
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#define KS8737_CTRL_INT_ACTIVE_HIGH (1 << 14)
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#define KSZ8051_RMII_50MHZ_CLK (1 << 7)
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static int kszphy_config_init(struct phy_device *phydev)
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{
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return 0;
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}
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static int ksz8021_config_init(struct phy_device *phydev)
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{
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const u16 val = KSZPHY_OMSO_B_CAST_OFF | KSZPHY_OMSO_RMII_OVERRIDE;
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phy_write(phydev, MII_KSZPHY_OMSO, val);
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return 0;
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}
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static int ks8051_config_init(struct phy_device *phydev)
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{
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int regval;
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if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) {
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regval = phy_read(phydev, MII_KSZPHY_CTRL);
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regval |= KSZ8051_RMII_50MHZ_CLK;
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phy_write(phydev, MII_KSZPHY_CTRL, regval);
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}
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return 0;
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}
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#define KSZ8873MLL_GLOBAL_CONTROL_4 0x06
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#define KSZ8873MLL_GLOBAL_CONTROL_4_DUPLEX (1 << 6)
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#define KSZ8873MLL_GLOBAL_CONTROL_4_SPEED (1 << 4)
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int ksz8873mll_read_status(struct phy_device *phydev)
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{
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int regval;
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/* dummy read */
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regval = phy_read(phydev, KSZ8873MLL_GLOBAL_CONTROL_4);
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regval = phy_read(phydev, KSZ8873MLL_GLOBAL_CONTROL_4);
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if (regval & KSZ8873MLL_GLOBAL_CONTROL_4_DUPLEX)
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phydev->duplex = DUPLEX_HALF;
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else
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phydev->duplex = DUPLEX_FULL;
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if (regval & KSZ8873MLL_GLOBAL_CONTROL_4_SPEED)
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phydev->speed = SPEED_10;
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else
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phydev->speed = SPEED_100;
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phydev->link = 1;
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phydev->pause = phydev->asym_pause = 0;
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return 0;
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}
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static int ksz8873mll_config_aneg(struct phy_device *phydev)
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{
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return 0;
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}
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static int ksz8873mll_config_init(struct phy_device *phydev)
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{
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phydev->autoneg = AUTONEG_DISABLE;
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phydev->link = 1;
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return 0;
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}
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static struct phy_driver ksphy_driver[] = {
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{
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.phy_id = PHY_ID_KS8737,
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.phy_id_mask = 0x00fffff0,
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.drv.name = "Micrel KS8737",
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.features = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
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.config_init = kszphy_config_init,
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.config_aneg = genphy_config_aneg,
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.read_status = genphy_read_status,
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}, {
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.phy_id = PHY_ID_KSZ8021,
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.phy_id_mask = 0x00ffffff,
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.drv.name = "Micrel KSZ8021",
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.features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
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SUPPORTED_Asym_Pause),
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.config_init = ksz8021_config_init,
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.config_aneg = genphy_config_aneg,
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.read_status = genphy_read_status,
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}, {
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.phy_id = PHY_ID_KSZ8041,
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.phy_id_mask = 0x00fffff0,
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.drv.name = "Micrel KSZ8041",
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.features = (PHY_BASIC_FEATURES | SUPPORTED_Pause
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| SUPPORTED_Asym_Pause),
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.config_init = kszphy_config_init,
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.config_aneg = genphy_config_aneg,
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.read_status = genphy_read_status,
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}, {
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.phy_id = PHY_ID_KSZ8051,
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.phy_id_mask = 0x00fffff0,
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.drv.name = "Micrel KSZ8051",
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.features = (PHY_BASIC_FEATURES | SUPPORTED_Pause
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| SUPPORTED_Asym_Pause),
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.config_init = ks8051_config_init,
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.config_aneg = genphy_config_aneg,
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.read_status = genphy_read_status,
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}, {
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.phy_id = PHY_ID_KSZ8001,
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.drv.name = "Micrel KSZ8001 or KS8721",
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.phy_id_mask = 0x00ffffff,
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.features = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
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.config_init = kszphy_config_init,
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.config_aneg = genphy_config_aneg,
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.read_status = genphy_read_status,
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}, {
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.phy_id = PHY_ID_KSZ9021,
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.phy_id_mask = 0x000ffffe,
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.drv.name = "Micrel KSZ9021 Gigabit PHY",
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.features = (PHY_GBIT_FEATURES | SUPPORTED_Pause
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| SUPPORTED_Asym_Pause),
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.config_init = kszphy_config_init,
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.config_aneg = genphy_config_aneg,
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.read_status = genphy_read_status,
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}, {
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.phy_id = PHY_ID_KSZ8873MLL,
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.phy_id_mask = 0x00fffff0,
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.drv.name = "Micrel KSZ8873MLL Swithch",
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.features = (SUPPORTED_Pause | SUPPORTED_Asym_Pause),
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.config_init = ksz8873mll_config_init,
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.config_aneg = ksz8873mll_config_aneg,
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.read_status = ksz8873mll_read_status,
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} };
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static int ksphy_init(void)
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{
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return phy_drivers_register(ksphy_driver,
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ARRAY_SIZE(ksphy_driver));
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}
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fs_initcall(ksphy_init);
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@ -0,0 +1,30 @@
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/*
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* include/linux/micrel_phy.h
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*
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* Micrel PHY IDs
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef _MICREL_PHY_H
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#define _MICREL_PHY_H
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#define MICREL_PHY_ID_MASK 0x00fffff0
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#define PHY_ID_KSZ8873MLL 0x000e7237
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#define PHY_ID_KSZ9021 0x00221610
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#define PHY_ID_KS8737 0x00221720
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#define PHY_ID_KSZ8021 0x00221555
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#define PHY_ID_KSZ8041 0x00221510
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#define PHY_ID_KSZ8051 0x00221550
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/* both for ks8001 Rev. A/B, and for ks8721 Rev 3. */
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#define PHY_ID_KSZ8001 0x0022161A
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/* struct phy_device dev_flags definitions */
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#define MICREL_PHY_50MHZ_CLK 0x00000001
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#endif /* _MICREL_PHY_H */
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