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ARM: i.MX53: Fix pll216 setup 

The value for i.MX53 216MHz is actually 432MHz. Use the same value
as for i.MX51 which really corresponds to 216MHz. These are the same
PLL216 values as U-Boot uses.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer 2013-04-02 16:17:23 +02:00
parent 9b1d226a79
commit 389785f106
3 changed files with 3 additions and 4 deletions
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2
arch/arm/mach-imx/imx51.c
View File

@ -151,7 +151,7 @@ void imx51_init_lowlevel(unsigned int cpufreq_mhz)
writel(0x19239145, ccm + MX5_CCM_CBCDR);
writel(0x000020C0, ccm + MX5_CCM_CBCMR);
imx51_setup_pll_216((void __iomem *)MX51_PLL3_BASE_ADDR);
imx5_setup_pll_216((void __iomem *)MX51_PLL3_BASE_ADDR);
/* Set the platform clock dividers */
writel(0x00000124, MX51_ARM_BASE_ADDR + 0x14);

2
arch/arm/mach-imx/imx53.c
View File

@ -146,7 +146,7 @@ void imx53_init_lowlevel(unsigned int cpufreq_mhz)
/* make sure change is effective */
while (readl(ccm + MX5_CCM_CDHIPR));
imx53_setup_pll_216((void __iomem *)MX53_PLL3_BASE_ADDR);
imx5_setup_pll_216((void __iomem *)MX53_PLL3_BASE_ADDR);
imx5_setup_pll_455((void __iomem *)MX53_PLL4_BASE_ADDR);
/* Set the platform clock dividers */

3
arch/arm/mach-imx/include/mach/imx5.h
View File

@ -13,7 +13,6 @@ void imx5_setup_pll(void __iomem *base, int freq, u32 op, u32 mfd, u32 mfn);
#define imx5_setup_pll_600(base) imx5_setup_pll((base), 600, (( 6 << 4) + ((1 - 1) << 0)), ( 4 - 1), 1)
#define imx5_setup_pll_455(base) imx5_setup_pll((base), 455, (( 9 << 4) + ((2 - 1) << 0)), (48 - 1), 23)
#define imx5_setup_pll_400(base) imx5_setup_pll((base), 400, (( 8 << 4) + ((2 - 1) << 0)), (3 - 1), 1)
#define imx53_setup_pll_216(base) imx5_setup_pll((base), 216, (( 8 << 4) + ((2 - 1) << 0)), (1 - 1), 1)
#define imx51_setup_pll_216(base) imx5_setup_pll((base), 216, (( 6 << 4) + ((3 - 1) << 0)), (4 - 1), 3)
#define imx5_setup_pll_216(base) imx5_setup_pll((base), 216, (( 6 << 4) + ((3 - 1) << 0)), (4 - 1), 3)
#endif /* __MACH_MX53_H */