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tegra: disable IDDQ for PLL_X on Tegra124 

This is an additional power down control.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Lucas Stach 2014-06-03 22:34:58 +02:00 committed by Sascha Hauer
parent acef7b8f3d
commit 3cc59d0e21
2 changed files with 28 additions and 0 deletions
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19
arch/arm/mach-tegra/include/mach/tegra124-car.h Normal file
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@ -0,0 +1,19 @@
/*
* Copyright (C) 2014 Lucas Stach <l.stach@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* Register definitions */
#define CRC_PLLX_MISC_3 0x518
#define CRC_PLLX_MISC_3_IDDQ (1 << 3)

9
arch/arm/mach-tegra/tegra_avp_init.c
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@ -25,6 +25,7 @@
#include <mach/tegra20-pmc.h>
#include <mach/tegra30-car.h>
#include <mach/tegra30-flow.h>
#include <mach/tegra124-car.h>
/* instruct the PMIC to enable the CPU power rail */
static void enable_maincomplex_powerrail(void)
@ -107,6 +108,14 @@ static void init_pllx(void)
chiptype = tegra_get_chiptype();
/* disable IDDQ on T124 */
if (chiptype == TEGRA124) {
reg = readl(TEGRA_CLK_RESET_BASE + CRC_PLLX_MISC_3);
reg &= ~CRC_PLLX_MISC_3_IDDQ;
writel(reg, TEGRA_CLK_RESET_BASE + CRC_PLLX_MISC_3);
tegra_ll_delay_usec(2);
}
osc_freq = (readl(TEGRA_CLK_RESET_BASE + CRC_OSC_CTRL) &
CRC_OSC_CTRL_OSC_FREQ_MASK) >> CRC_OSC_CTRL_OSC_FREQ_SHIFT;