Add i.MX21ads support
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Ivo Clarysse
Sascha Hauer
parent
fcfbd10d3c
commit
3ccfdfd9b9
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@ -1,7 +1,7 @@
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#
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# Automatically generated make config: don't edit
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# U-Boot version: 2.0.0-rc7
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# Thu Apr 2 15:40:41 2009
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# U-Boot version: 2.0.0-rc8
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# Tue Apr 7 09:14:23 2009
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#
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CONFIG_ARCH_TEXT_BASE=0xc0000000
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CONFIG_BOARDINFO="Freescale i.MX21 ADS"
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@ -9,8 +9,6 @@ CONFIG_BOARDINFO="Freescale i.MX21 ADS"
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CONFIG_GENERIC_LINKER_SCRIPT=y
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CONFIG_ARM=y
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CONFIG_ARM926EJS=y
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CONFIG_ARCH_IMX=y
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CONFIG_ARCH_IMX21=y
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# CONFIG_MACH_MX1ADS is not set
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# CONFIG_MACH_SCB9328 is not set
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# CONFIG_MACH_PCM038 is not set
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@ -28,6 +26,8 @@ CONFIG_MACH_IMX21ADS=y
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#
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# Board specific settings
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#
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CONFIG_ARCH_IMX=y
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CONFIG_ARCH_IMX21=y
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#
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# i.MX specific settings
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@ -98,6 +98,8 @@ CONFIG_DEFAULT_ENVIRONMENT_PATH="board/imx21ads/env"
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#
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# Commands
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#
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CONFIG_ARCH_IMX=y
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CONFIG_ARCH_IMX21=y
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#
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# scripting
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@ -145,6 +147,7 @@ CONFIG_CMD_MTEST_ALTERNATIVE=y
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# flash
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#
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CONFIG_CMD_FLASH=y
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CONFIG_CMD_NAND=y
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#
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# booting
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@ -191,7 +194,12 @@ CONFIG_DRIVER_CFI_BANK_WIDTH_2=y
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CONFIG_DRIVER_CFI_BANK_WIDTH_4=y
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# CONFIG_DRIVER_CFI_BANK_WIDTH_8 is not set
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CONFIG_CFI_BUFFER_WRITE=y
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# CONFIG_NAND is not set
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CONFIG_NAND=y
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CONFIG_NAND_IMX=y
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# CONFIG_NAND_IMX_BOOT is not set
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# CONFIG_MTD_NAND_VERIFY_WRITE is not set
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# CONFIG_MTD_NAND_ECC_SMC is not set
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CONFIG_MTD_NAND_IDS=y
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#
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# Filesystem support
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@ -0,0 +1,2 @@
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obj-y += lowlevel_init.o
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obj-y += imx21ads.o
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@ -0,0 +1,24 @@
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/**
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* @file
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* @brief Global defintions for the ARM i.MX21 based imx21ads
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#endif /* __CONFIG_H */
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@ -0,0 +1 @@
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# Dummy Init environment script
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@ -0,0 +1,146 @@
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/*
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* Copyright (C) 2009 Ivo Clarysse
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*
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* Based on imx27ads.c,
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* Copyright (C) 2007 Sascha Hauer, Pengutronix
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#include <common.h>
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#include <net.h>
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#include <cfi_flash.h>
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#include <init.h>
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#include <environment.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/armlinux.h>
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#include <asm/io.h>
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#include <asm/arch/gpio.h>
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#include <partition.h>
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#include <fs.h>
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#include <fcntl.h>
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#include <asm/mach-types.h>
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#include <asm/arch/imx-nand.h>
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static struct device_d cfi_dev = {
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.name = "cfi_flash",
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.id = "nor0",
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.map_base = 0xC8000000,
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.size = 32 * 1024 * 1024,
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};
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static struct device_d sdram_dev = {
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.name = "ram",
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.id = "ram0",
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.map_base = 0xc0000000,
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.size = 64 * 1024 * 1024,
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.type = DEVICE_TYPE_DRAM,
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};
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struct imx_nand_platform_data nand_info = {
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.width = 1,
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.hw_ecc = 1,
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};
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static struct device_d nand_dev = {
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.name = "imx_nand",
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.map_base = 0xDF003000,
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.platform_data = &nand_info,
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};
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static int imx21ads_timing_init(void)
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{
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u32 temp;
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/* Configure External Interface Module */
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/* CS0: burst flash */
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CS0U = 0x00003E00;
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CS0L = 0x00000E01;
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/* CS1: Ethernet controller, external UART, memory-mapped I/O (16-bit) */
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CS1U = 0x00002000;
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CS1L = 0x11118501;
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/* CS2: disable (not available, since CSD0 in use) */
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CS2U = 0x0;
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CS2L = 0x0;
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/* CS3: disable */
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CS3U = 0x0;
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CS3L = 0x0;
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/* CS4: disable */
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CS4U = 0x0;
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CS4L = 0x0;
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/* CS5: disable */
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CS5U = 0x0;
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CS5L = 0x0;
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temp = PCDR0;
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temp &= ~0xF000;
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temp |= 0xA000; /* Set NFC divider; 0xA yields 24.18MHz */
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PCDR0 = temp;
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return 0;
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}
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core_initcall(imx21ads_timing_init);
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static int mx21ads_devices_init(void)
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{
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int i;
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unsigned int mode[] = {
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PE12_PF_UART1_TXD,
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PE13_PF_UART1_RXD,
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PE14_PF_UART1_CTS,
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PE15_PF_UART1_RTS,
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};
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/* initizalize gpios */
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for (i = 0; i < ARRAY_SIZE(mode); i++)
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imx_gpio_mode(mode[i]);
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register_device(&cfi_dev);
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register_device(&sdram_dev);
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register_device(&nand_dev);
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armlinux_set_bootparams((void *)0xc0000100);
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armlinux_set_architecture(MACH_TYPE_MX21ADS);
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return 0;
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}
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device_initcall(mx21ads_devices_init);
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static struct device_d mx21ads_serial_device = {
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.name = "imx_serial",
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.id = "cs0",
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.map_base = IMX_UART1_BASE,
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.size = 4096,
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.type = DEVICE_TYPE_CONSOLE,
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};
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static int mx21ads_console_init(void)
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{
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register_device(&mx21ads_serial_device);
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return 0;
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}
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console_initcall(mx21ads_console_init);
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@ -0,0 +1,5 @@
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/** @page imx21ads Freescale i.MX21ads
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This is the Freescale evaluation board for the i.MX21 Processor
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*/
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@ -0,0 +1,70 @@
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/*
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* For clock initialization, see chapter 6 of the
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* "i.MX21 Applications Processor Reference Manual, Rev. 3".
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*/
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#include <config.h>
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#include <asm/arch/imx-regs.h>
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#define writel(val, reg) \
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ldr r0, =reg; \
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ldr r1, =val; \
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str r1, [r0];
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.macro sdram_init_mx21ads
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#if 0
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/* Set precharge command */
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writel(0x92120300, SDCTL0);
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/* Issue Precharge all Command */
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ldr r3, =0xC0200000;
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ldr r2, [r3];
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/* Set AutoRefresh command */
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writel(0x92120300, SDCTL0);
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/* Issue AutoRefresh command */
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ldr r3, =0xC0000000;
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ldr r2, [r3];
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ldr r2, [r3];
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ldr r2, [r3];
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ldr r2, [r3];
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ldr r2, [r3];
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ldr r2, [r3];
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ldr r2, [r3];
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ldr r2, [r3];
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/* Set Mode Register */
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writel(0xB2120300, SDCTL0);
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#endif
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.endm
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.globl board_init_lowlevel
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board_init_lowlevel:
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mov r10, lr
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/* ahb lite ip interface */
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writel(0x00040304, AIPI1_PSR0)
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writel(0xFFFBFCFB, AIPI1_PSR1)
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writel(0x00000000, AIPI2_PSR0)
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writel(0xFFFFFFFF, AIPI2_PSR1)
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/* Set MPLL to 266MHz */
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writel(0x007B1C73, MPCTL0);
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/* PLL 133MHz */
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writel(0x17000607, CSCR);
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/* skip sdram initialization if we run from ram */
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/* (SDRAM is mapped from C0000000 to C3FFFFFF) */
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cmp pc, #0xc0000000
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bls 1f
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cmp pc, #0xc8000000
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bhi 1f
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mov pc,r10
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1:
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sdram_init_mx21ads
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mov pc,r10
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