[CFI Driver] - Update Kconfig help texts
- Turn switch/case into if/else to be able to optimize out unused code when not all bankwidths are needed
This commit is contained in:
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51c840cd18
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@ -10,14 +10,68 @@ config HAS_CFI
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config DRIVER_CFI
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bool "cfi flash driver"
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help
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If you have NOR Flash devices connected to your system and wish
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to use them say yes here.
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config DRIVER_CFI_NEW
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depends on DRIVER_CFI
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default y
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bool "new cfi flash driver"
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help
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The old cfi flash driver is mainly an adopted version from U-Boot v1
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whereas the new driver contains some more experimental features such
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as selecting the supported chiptypes and bus widths making the driver
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smaller.
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Normally you should stick with the new driver, but if you experience
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troubles you could try the old driver. Please report if the new driver
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breaks something.
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config DRIVER_CFI_OLD
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bool
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default y
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depends on !DRIVER_CFI_NEW
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config DRIVER_CFI_INTEL
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depends on DRIVER_CFI_NEW
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bool "Support Intel flash chips"
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config DRIVER_CFI_AMD
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depends on DRIVER_CFI_NEW
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bool "support AMD flash chips"
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config DRIVER_CFI_BANK_WIDTH_1
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bool "Support 8-bit buswidth"
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depends on DRIVER_CFI_NEW
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default y
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help
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If you wish to support CFI devices on a physical bus which is
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8 bits wide, say 'Y'.
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config DRIVER_CFI_BANK_WIDTH_2
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bool "Support 16-bit buswidth"
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depends on DRIVER_CFI_NEW
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default y
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help
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If you wish to support CFI devices on a physical bus which is
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16 bits wide, say 'Y'.
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config DRIVER_CFI_BANK_WIDTH_4
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bool "Support 32-bit buswidth"
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depends on DRIVER_CFI_NEW
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default y
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help
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If you wish to support CFI devices on a physical bus which is
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32 bits wide, say 'Y'.
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config DRIVER_CFI_BANK_WIDTH_8
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bool "Support 64-bit buswidth"
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depends on DRIVER_CFI_NEW
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default n
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help
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If you wish to support CFI devices on a physical bus which is
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64 bits wide, say 'Y'.
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config CFI_BUFFER_WRITE
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bool "use cfi driver with buffer write"
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depends on DRIVER_CFI || DRIVER_CFI_NEW
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@ -1,7 +1,7 @@
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obj-y += net/
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obj-y += serial/
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obj-y += nand/
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obj-$(CONFIG_DRIVER_CFI) += cfi_flash.o
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obj-$(CONFIG_DRIVER_CFI_OLD) += cfi_flash.o
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obj-$(CONFIG_DRIVER_CFI_NEW) += cfi_flash_new.o
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obj-$(CONFIG_DRIVER_CFI_INTEL) += cfi_flash_intel.o
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obj-$(CONFIG_DRIVER_CFI_AMD) += cfi_flash_amd.o
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@ -47,24 +47,18 @@ static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uc
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cptr.cp = flash_make_addr (info, sect, offset);
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flash_make_cmd (info, cmd, &cword);
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switch (info->portwidth) {
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case FLASH_CFI_8BIT:
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if (bankwidth_is_1(info)) {
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retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
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break;
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case FLASH_CFI_16BIT:
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} else if (bankwidth_is_2(info)) {
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retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
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break;
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case FLASH_CFI_32BIT:
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} else if (bankwidth_is_4(info)) {
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retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
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break;
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case FLASH_CFI_64BIT:
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} else if (bankwidth_is_8(info)) {
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retval = ((cptr.llp[0] & cword.ll) !=
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(cptr.llp[0] & cword.ll));
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break;
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default:
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} else
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retval = 0;
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break;
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}
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return retval;
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}
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@ -120,29 +114,22 @@ static int amd_flash_write_cfibuffer (flash_info_t * info, ulong dest, const uch
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flash_make_cmd (info, AMD_CMD_WRITE_TO_BUFFER, &cword);
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flash_write_word(info, cword, (void *)dest);
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switch (info->portwidth) {
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case FLASH_CFI_8BIT:
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if (bankwidth_is_1(info)) {
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cnt = len;
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flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
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while (cnt-- > 0) *dst.cp++ = *src.cp++;
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break;
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case FLASH_CFI_16BIT:
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} else if (bankwidth_is_2(info)) {
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cnt = len >> 1;
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flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
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while (cnt-- > 0) *dst.wp++ = *src.wp++;
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break;
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case FLASH_CFI_32BIT:
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} else if (bankwidth_is_4(info)) {
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cnt = len >> 2;
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flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
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while (cnt-- > 0) *dst.lp++ = *src.lp++;
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break;
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case FLASH_CFI_64BIT:
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} else if (bankwidth_is_8(info)) {
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cnt = len >> 3;
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flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
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while (cnt-- > 0) *dst.llp++ = *src.llp++;
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break;
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default:
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return ERR_INVAL;
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}
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flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
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@ -108,41 +108,18 @@ static int intel_flash_write_cfibuffer (flash_info_t * info, ulong dest, const u
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if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
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"write to buffer")) == ERR_OK) {
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/* reduce the number of loops by the width of the port */
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switch (info->portwidth) {
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case FLASH_CFI_8BIT:
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cnt = len;
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break;
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case FLASH_CFI_16BIT:
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cnt = len >> 1;
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break;
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case FLASH_CFI_32BIT:
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cnt = len >> 2;
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break;
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case FLASH_CFI_64BIT:
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cnt = len >> 3;
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break;
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default:
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return ERR_INVAL;
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break;
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}
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cnt = len >> (info->portwidth - 1);
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flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
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while (cnt-- > 0) {
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switch (info->portwidth) {
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case FLASH_CFI_8BIT:
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if (bankwidth_is_1(info)) {
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*dst.cp++ = *src.cp++;
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break;
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case FLASH_CFI_16BIT:
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} else if (bankwidth_is_2(info)) {
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*dst.wp++ = *src.wp++;
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break;
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case FLASH_CFI_32BIT:
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} else if (bankwidth_is_4(info)) {
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*dst.lp++ = *src.lp++;
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break;
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case FLASH_CFI_64BIT:
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} else if (bankwidth_is_8(info)) {
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*dst.llp++ = *src.llp++;
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break;
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default:
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return ERR_INVAL;
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break;
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}
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}
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flash_write_cmd (info, sector, 0,
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@ -83,11 +83,9 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
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unsigned long long ll;
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#endif
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switch (info->portwidth) {
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case FLASH_CFI_8BIT:
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if (bankwidth_is_1(info)) {
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cword->c = c;
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break;
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case FLASH_CFI_16BIT:
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} else if (bankwidth_is_2(info)) {
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#if defined(__LITTLE_ENDIAN)
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w = c;
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w <<= 8;
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@ -95,8 +93,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
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#else
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cword->w = (cword->w << 8) | c;
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#endif
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break;
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case FLASH_CFI_32BIT:
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} else if (bankwidth_is_4(info)) {
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#if defined(__LITTLE_ENDIAN)
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l = c;
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l <<= 24;
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@ -104,8 +101,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
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#else
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cword->l = (cword->l << 8) | c;
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#endif
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break;
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case FLASH_CFI_64BIT:
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} else if (bankwidth_is_8(info)) {
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#if defined(__LITTLE_ENDIAN)
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ll = c;
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ll <<= 56;
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@ -113,7 +109,6 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
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#else
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cword->ll = (cword->ll << 8) | c;
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#endif
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break;
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}
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}
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@ -129,22 +124,17 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest,
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/* Check if Flash is (sufficiently) erased */
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switch (info->portwidth) {
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case FLASH_CFI_8BIT:
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if (bankwidth_is_1(info)) {
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flag = ((cptr.cp[0] & cword.c) == cword.c);
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break;
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case FLASH_CFI_16BIT:
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} else if (bankwidth_is_2(info)) {
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flag = ((cptr.wp[0] & cword.w) == cword.w);
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break;
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case FLASH_CFI_32BIT:
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} else if (bankwidth_is_4(info)) {
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flag = ((cptr.lp[0] & cword.l) == cword.l);
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break;
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case FLASH_CFI_64BIT:
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} else if (bankwidth_is_8(info)) {
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flag = ((cptr.llp[0] & cword.ll) == cword.ll);
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break;
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default:
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} else
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return 2;
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}
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if (!flag)
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return 2;
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@ -153,19 +143,14 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest,
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info->cfi_cmd_set->flash_prepare_write(info);
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switch (info->portwidth) {
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case FLASH_CFI_8BIT:
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if (bankwidth_is_1(info)) {
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cptr.cp[0] = cword.c;
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break;
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case FLASH_CFI_16BIT:
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} else if (bankwidth_is_2(info)) {
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cptr.wp[0] = cword.w;
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break;
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case FLASH_CFI_32BIT:
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} else if (bankwidth_is_4(info)) {
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cptr.lp[0] = cword.l;
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break;
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case FLASH_CFI_64BIT:
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} else if (bankwidth_is_8(info)) {
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cptr.llp[0] = cword.ll;
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break;
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}
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/* re-enable interrupts if necessary */
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@ -322,7 +307,7 @@ static int flash_detect_cfi (flash_info_t * info)
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/*
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* The following code cannot be run from FLASH!
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*/
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ulong flash_get_size (flash_info_t *info, ulong base)
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static ulong flash_get_size (flash_info_t *info, ulong base)
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{
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int i, j;
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flash_sect_t sect_cnt;
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@ -531,7 +516,7 @@ static int cfi_probe (struct device_d *dev)
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* when the passed address is greater or equal to the sector address
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* we have a match
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*/
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flash_sect_t find_sector (flash_info_t * info, ulong addr)
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static inline flash_sect_t find_sector (flash_info_t * info, ulong addr)
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{
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flash_sect_t sector;
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@ -878,7 +863,6 @@ int flash_status_check (flash_info_t * info, flash_sect_t sector,
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void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
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{
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int i;
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cfiword_t val;
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uchar *cp = (uchar *) cmdbuf;
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#if defined(__LITTLE_ENDIAN)
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@ -913,20 +897,16 @@ int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cm
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flash_make_cmd (info, cmd, &cword);
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debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
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switch (info->portwidth) {
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case FLASH_CFI_8BIT:
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if (bankwidth_is_1(info)) {
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debug ("is= %x %x\n", cptr.cp[0], cword.c);
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retval = (cptr.cp[0] == cword.c);
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break;
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case FLASH_CFI_16BIT:
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} else if (bankwidth_is_2(info)) {
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debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
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retval = (cptr.wp[0] == cword.w);
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break;
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case FLASH_CFI_32BIT:
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} else if (bankwidth_is_4(info)) {
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debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
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retval = (cptr.lp[0] == cword.l);
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break;
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case FLASH_CFI_64BIT:
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} else if (bankwidth_is_8(info)) {
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#ifdef DEBUG
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{
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char str1[20];
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@ -938,11 +918,9 @@ int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cm
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}
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#endif
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retval = (cptr.llp[0] == cword.ll);
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break;
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default:
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} else
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retval = 0;
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break;
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}
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return retval;
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}
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@ -954,23 +932,17 @@ int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
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cptr.cp = flash_make_addr (info, sect, offset);
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flash_make_cmd (info, cmd, &cword);
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switch (info->portwidth) {
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case FLASH_CFI_8BIT:
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if (bankwidth_is_1(info)) {
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retval = ((cptr.cp[0] & cword.c) == cword.c);
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break;
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case FLASH_CFI_16BIT:
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} else if (bankwidth_is_2(info)) {
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retval = ((cptr.wp[0] & cword.w) == cword.w);
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break;
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case FLASH_CFI_32BIT:
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} else if (bankwidth_is_4(info)) {
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retval = ((cptr.lp[0] & cword.l) == cword.l);
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break;
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case FLASH_CFI_64BIT:
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} else if (bankwidth_is_8(info)) {
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retval = ((cptr.llp[0] & cword.ll) == cword.ll);
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break;
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default:
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} else
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retval = 0;
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break;
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}
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return retval;
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}
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@ -209,6 +209,30 @@ static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
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#endif
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}
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#ifdef CONFIG_DRIVER_CFI_BANK_WIDTH_1
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#define bankwidth_is_1(info) (info->portwidth == 1)
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#else
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#define bankwidth_is_1(info) 0
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#endif
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#ifdef CONFIG_DRIVER_CFI_BANK_WIDTH_2
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#define bankwidth_is_2(info) (info->portwidth == 2)
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#else
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#define bankwidth_is_2(info) 0
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#endif
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#ifdef CONFIG_DRIVER_CFI_BANK_WIDTH_4
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#define bankwidth_is_4(info) (info->portwidth == 4)
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#else
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#define bankwidth_is_4(info) 0
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#endif
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#ifdef CONFIG_DRIVER_CFI_BANK_WIDTH_8
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#define bankwidth_is_8(info) (info->portwidth == 8)
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#else
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#define bankwidth_is_8(info) 0
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#endif
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typedef union {
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unsigned char c;
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unsigned short w;
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@ -225,22 +249,17 @@ typedef union {
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static inline void flash_write_word(flash_info_t *info, cfiword_t datum, void *addr)
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{
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switch (info->portwidth) {
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case FLASH_CFI_8BIT:
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if (bankwidth_is_1(info)) {
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debug("fw addr %p val %02x\n", addr, datum.c);
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writeb(datum.c, addr);
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break;
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case FLASH_CFI_16BIT:
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} else if (bankwidth_is_2(info)) {
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debug("fw addr %p val %04x\n", addr, datum.w);
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writew(datum.w, addr);
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break;
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case FLASH_CFI_32BIT:
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} else if (bankwidth_is_4(info)) {
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debug("fw addr %p val %08x\n", addr, datum.l);
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writel(datum.l, addr);
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break;
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case FLASH_CFI_64BIT:
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} else if (bankwidth_is_8(info)) {
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memcpy((void *)addr, &datum.ll, 8);
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break;
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}
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}
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