i.MX: Add DEBUG_LL hooks for VF610
Add code to support DEBUG_LL functionality on VF610/Vybrid platform. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Andrey Smirnov
Sascha Hauer
parent
a5ef52e502
commit
3dc136ef87
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@ -14,8 +14,10 @@
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#include <mach/imx51-regs.h>
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#include <mach/imx53-regs.h>
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#include <mach/imx6-regs.h>
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#include <mach/vf610-regs.h>
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#include <serial/imx-uart.h>
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#include <serial/lpuart.h>
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#ifdef CONFIG_DEBUG_LL
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@ -42,6 +44,8 @@
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#define IMX_DEBUG_SOC MX53
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#elif defined CONFIG_DEBUG_IMX6Q_UART
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#define IMX_DEBUG_SOC MX6
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#elif defined CONFIG_DEBUG_VF610_UART
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#define IMX_DEBUG_SOC VF610
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#else
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#error "unknown i.MX debug uart soc type"
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#endif
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@ -74,6 +78,13 @@ static inline void imx6_uart_setup_ll(void)
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imx6_uart_setup(base);
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}
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static inline void vf610_uart_setup_ll(void)
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{
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void *base = IOMEM(IMX_UART_BASE(IMX_DEBUG_SOC, CONFIG_DEBUG_IMX_UART_PORT));
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lpuart_setup(base, 66000000);
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}
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static inline void PUTC_LL(int c)
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{
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void __iomem *base = IOMEM(IMX_UART_BASE(IMX_DEBUG_SOC,
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@ -82,14 +93,19 @@ static inline void PUTC_LL(int c)
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if (!base)
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return;
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imx_uart_putc(base, c);
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if (IS_ENABLED(CONFIG_DEBUG_VF610_UART))
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lpuart_putc(base, c);
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else
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imx_uart_putc(base, c);
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}
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#else
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static inline void imx50_uart_setup_ll(void) {}
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static inline void imx51_uart_setup_ll(void) {}
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static inline void imx53_uart_setup_ll(void) {}
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static inline void imx6_uart_setup_ll(void) {}
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static inline void vf610_uart_setup_ll(void) {}
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#endif /* CONFIG_DEBUG_LL */
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@ -115,4 +131,13 @@ static inline void imx53_ungate_all_peripherals(void)
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imx_ungate_all_peripherals(IOMEM(MX53_CCM_BASE_ADDR));
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}
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static inline void vf610_ungate_all_peripherals(void)
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{
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void __iomem *ccmbase = IOMEM(VF610_CCM_BASE_ADDR);
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int i;
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for (i = 0x40; i <= 0x6c; i += 4)
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writel(0xffffffff, ccmbase + i);
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}
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#endif /* __MACH_DEBUG_LL_H__ */
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@ -1071,6 +1071,13 @@ config DEBUG_IMX6Q_UART
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Say Y here if you want kernel low-level debugging support
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on i.MX6Q.
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config DEBUG_VF610_UART
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bool "VF610 Debug UART"
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depends on ARCH_VF610
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help
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Say Y here if you want kernel low-level debugging support
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on VF610.
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config DEBUG_OMAP3_UART
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bool "OMAP3 Debug UART"
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depends on ARCH_OMAP3
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@ -1111,7 +1118,8 @@ config DEBUG_IMX_UART_PORT
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DEBUG_IMX51_UART || \
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DEBUG_IMX53_UART || \
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DEBUG_IMX6Q_UART || \
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DEBUG_IMX6SL_UART
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DEBUG_IMX6SL_UART || \
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DEBUG_VF610_UART
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default 1
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depends on ARCH_IMX
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help
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@ -0,0 +1,281 @@
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/*
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* Copyright (c) 2016 Zodiac Inflight Innovation
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* Author: Andrey Smirnov <andrew.smirnov@gmail.com>
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*
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* Based on code found in Linux kernel and U-Boot.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __LPUART_H__
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#define __LPUART_H__
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/* All registers are 8-bit width */
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#define UARTBDH 0x00
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#define UARTBDL 0x01
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#define UARTCR1 0x02
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#define UARTCR2 0x03
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#define UARTSR1 0x04
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#define UARTCR3 0x06
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#define UARTDR 0x07
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#define UARTCR4 0x0a
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#define UARTCR5 0x0b
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#define UARTMODEM 0x0d
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#define UARTPFIFO 0x10
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#define UARTCFIFO 0x11
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#define UARTSFIFO 0x12
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#define UARTTWFIFO 0x13
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#define UARTTCFIFO 0x14
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#define UARTRWFIFO 0x15
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#define UARTRCFIFO 0x16
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#define UARTBDH_LBKDIE 0x80
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#define UARTBDH_RXEDGIE 0x40
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#define UARTBDH_SBR_MASK 0x1f
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#define UARTCR1_LOOPS 0x80
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#define UARTCR1_RSRC 0x20
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#define UARTCR1_M 0x10
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#define UARTCR1_WAKE 0x08
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#define UARTCR1_ILT 0x04
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#define UARTCR1_PE 0x02
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#define UARTCR1_PT 0x01
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#define UARTCR2_TIE 0x80
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#define UARTCR2_TCIE 0x40
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#define UARTCR2_RIE 0x20
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#define UARTCR2_ILIE 0x10
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#define UARTCR2_TE 0x08
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#define UARTCR2_RE 0x04
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#define UARTCR2_RWU 0x02
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#define UARTCR2_SBK 0x01
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#define UARTSR1_TDRE 0x80
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#define UARTSR1_TC 0x40
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#define UARTSR1_RDRF 0x20
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#define UARTSR1_IDLE 0x10
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#define UARTSR1_OR 0x08
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#define UARTSR1_NF 0x04
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#define UARTSR1_FE 0x02
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#define UARTSR1_PE 0x01
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#define UARTCR3_R8 0x80
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#define UARTCR3_T8 0x40
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#define UARTCR3_TXDIR 0x20
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#define UARTCR3_TXINV 0x10
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#define UARTCR3_ORIE 0x08
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#define UARTCR3_NEIE 0x04
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#define UARTCR3_FEIE 0x02
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#define UARTCR3_PEIE 0x01
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#define UARTCR4_MAEN1 0x80
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#define UARTCR4_MAEN2 0x40
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#define UARTCR4_M10 0x20
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#define UARTCR4_BRFA_MASK 0x1f
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#define UARTCR4_BRFA_OFF 0
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#define UARTCR5_TDMAS 0x80
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#define UARTCR5_RDMAS 0x20
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#define UARTMODEM_RXRTSE 0x08
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#define UARTMODEM_TXRTSPOL 0x04
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#define UARTMODEM_TXRTSE 0x02
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#define UARTMODEM_TXCTSE 0x01
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#define UARTPFIFO_TXFE 0x80
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#define UARTPFIFO_FIFOSIZE_MASK 0x7
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#define UARTPFIFO_TXSIZE_OFF 4
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#define UARTPFIFO_RXFE 0x08
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#define UARTPFIFO_RXSIZE_OFF 0
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#define UARTCFIFO_TXFLUSH 0x80
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#define UARTCFIFO_RXFLUSH 0x40
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#define UARTCFIFO_RXOFE 0x04
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#define UARTCFIFO_TXOFE 0x02
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#define UARTCFIFO_RXUFE 0x01
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#define UARTSFIFO_TXEMPT 0x80
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#define UARTSFIFO_RXEMPT 0x40
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#define UARTSFIFO_RXOF 0x04
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#define UARTSFIFO_TXOF 0x02
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#define UARTSFIFO_RXUF 0x01
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/* 32-bit register defination */
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#define UARTBAUD 0x00
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#define UARTSTAT 0x04
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#define UARTCTRL 0x08
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#define UARTDATA 0x0C
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#define UARTMATCH 0x10
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#define UARTMODIR 0x14
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#define UARTFIFO 0x18
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#define UARTWATER 0x1c
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#define UARTBAUD_MAEN1 0x80000000
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#define UARTBAUD_MAEN2 0x40000000
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#define UARTBAUD_M10 0x20000000
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#define UARTBAUD_TDMAE 0x00800000
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#define UARTBAUD_RDMAE 0x00200000
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#define UARTBAUD_MATCFG 0x00400000
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#define UARTBAUD_BOTHEDGE 0x00020000
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#define UARTBAUD_RESYNCDIS 0x00010000
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#define UARTBAUD_LBKDIE 0x00008000
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#define UARTBAUD_RXEDGIE 0x00004000
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#define UARTBAUD_SBNS 0x00002000
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#define UARTBAUD_SBR 0x00000000
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#define UARTBAUD_SBR_MASK 0x1fff
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#define UARTSTAT_LBKDIF 0x80000000
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#define UARTSTAT_RXEDGIF 0x40000000
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#define UARTSTAT_MSBF 0x20000000
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#define UARTSTAT_RXINV 0x10000000
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#define UARTSTAT_RWUID 0x08000000
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#define UARTSTAT_BRK13 0x04000000
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#define UARTSTAT_LBKDE 0x02000000
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#define UARTSTAT_RAF 0x01000000
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#define UARTSTAT_TDRE 0x00800000
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#define UARTSTAT_TC 0x00400000
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#define UARTSTAT_RDRF 0x00200000
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#define UARTSTAT_IDLE 0x00100000
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#define UARTSTAT_OR 0x00080000
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#define UARTSTAT_NF 0x00040000
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#define UARTSTAT_FE 0x00020000
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#define UARTSTAT_PE 0x00010000
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#define UARTSTAT_MA1F 0x00008000
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#define UARTSTAT_M21F 0x00004000
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#define UARTCTRL_R8T9 0x80000000
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#define UARTCTRL_R9T8 0x40000000
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#define UARTCTRL_TXDIR 0x20000000
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#define UARTCTRL_TXINV 0x10000000
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#define UARTCTRL_ORIE 0x08000000
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#define UARTCTRL_NEIE 0x04000000
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#define UARTCTRL_FEIE 0x02000000
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#define UARTCTRL_PEIE 0x01000000
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#define UARTCTRL_TIE 0x00800000
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#define UARTCTRL_TCIE 0x00400000
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#define UARTCTRL_RIE 0x00200000
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#define UARTCTRL_ILIE 0x00100000
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#define UARTCTRL_TE 0x00080000
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#define UARTCTRL_RE 0x00040000
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#define UARTCTRL_RWU 0x00020000
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#define UARTCTRL_SBK 0x00010000
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#define UARTCTRL_MA1IE 0x00008000
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#define UARTCTRL_MA2IE 0x00004000
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#define UARTCTRL_IDLECFG 0x00000100
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#define UARTCTRL_LOOPS 0x00000080
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#define UARTCTRL_DOZEEN 0x00000040
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#define UARTCTRL_RSRC 0x00000020
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#define UARTCTRL_M 0x00000010
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#define UARTCTRL_WAKE 0x00000008
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#define UARTCTRL_ILT 0x00000004
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#define UARTCTRL_PE 0x00000002
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#define UARTCTRL_PT 0x00000001
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#define UARTDATA_NOISY 0x00008000
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#define UARTDATA_PARITYE 0x00004000
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#define UARTDATA_FRETSC 0x00002000
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#define UARTDATA_RXEMPT 0x00001000
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#define UARTDATA_IDLINE 0x00000800
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#define UARTDATA_MASK 0x3ff
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#define UARTMODIR_IREN 0x00020000
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#define UARTMODIR_TXCTSSRC 0x00000020
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#define UARTMODIR_TXCTSC 0x00000010
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#define UARTMODIR_RXRTSE 0x00000008
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#define UARTMODIR_TXRTSPOL 0x00000004
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#define UARTMODIR_TXRTSE 0x00000002
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#define UARTMODIR_TXCTSE 0x00000001
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#define UARTFIFO_TXEMPT 0x00800000
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#define UARTFIFO_RXEMPT 0x00400000
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#define UARTFIFO_TXOF 0x00020000
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#define UARTFIFO_RXUF 0x00010000
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#define UARTFIFO_TXFLUSH 0x00008000
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#define UARTFIFO_RXFLUSH 0x00004000
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#define UARTFIFO_TXOFE 0x00000200
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#define UARTFIFO_RXUFE 0x00000100
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#define UARTFIFO_TXFE 0x00000080
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#define UARTFIFO_FIFOSIZE_MASK 0x7
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#define UARTFIFO_TXSIZE_OFF 4
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#define UARTFIFO_RXFE 0x00000008
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#define UARTFIFO_RXSIZE_OFF 0
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#define UARTWATER_COUNT_MASK 0xff
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#define UARTWATER_TXCNT_OFF 8
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#define UARTWATER_RXCNT_OFF 24
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#define UARTWATER_WATER_MASK 0xff
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#define UARTWATER_TXWATER_OFF 0
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#define UARTWATER_RXWATER_OFF 16
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#define FSL_UART_RX_DMA_BUFFER_SIZE 64
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static inline void lpuart_setbrg(void __iomem *base,
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unsigned int refclock,
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unsigned int baudrate)
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{
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unsigned int bfra;
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u16 sbr;
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sbr = (u16) (refclock / (16 * baudrate));
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writeb(sbr >> 8, base + UARTBDH);
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writeb(sbr & 0xff, base + UARTBDL);
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bfra = DIV_ROUND_UP(2 * refclock, baudrate) - 32 * sbr;
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bfra &= UARTCR4_BRFA_MASK;
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writeb(bfra, base + UARTCR4);
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}
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static inline void lpuart_setup_with_fifo(void __iomem *base,
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unsigned int refclock,
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unsigned int twfifo)
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{
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/* Disable UART */
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writeb(0, base + UARTCR2);
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writeb(0, base + UARTMODEM);
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writeb(0, base + UARTCR1);
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if (twfifo) {
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writeb(UARTPFIFO_TXFE | UARTPFIFO_RXFE, base + UARTPFIFO);
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writeb((u8)twfifo, base + UARTTWFIFO);
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} else {
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writeb(0, base + UARTPFIFO);
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writeb(0, base + UARTTWFIFO);
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}
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writeb(1, base + UARTRWFIFO);
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writeb(UARTCFIFO_RXFLUSH | UARTCFIFO_TXFLUSH, base + UARTCFIFO);
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lpuart_setbrg(base, refclock, CONFIG_BAUDRATE);
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writeb(UARTCR2_TE | UARTCR2_RE, base + UARTCR2);
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}
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static inline void lpuart_setup(void __iomem *base,
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unsigned int refclock)
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{
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lpuart_setup_with_fifo(base, refclock, 0x00);
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}
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static inline void lpuart_putc(void __iomem *base, int c)
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{
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if (!(readb(base + UARTCR2) & UARTCR2_TE))
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return;
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while (!(readb(base + UARTSR1) & UARTSR1_TDRE));
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writeb(c, base + UARTDR);
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}
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#endif
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